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Add 200MHz DDDSU Liteon configuration file

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This commit is contained in:
Karim Boutiba
2026-04-24 14:53:15 +02:00
committed by karim
parent 38dc378224
commit 28c1634fdd
2 changed files with 32 additions and 32 deletions
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6
doc/ORAN_FHI7.2_Tutorial.md
View File

@@ -616,9 +616,9 @@ jumboframe 1 # enable jumbo frame
###### FR2
The OAI configuration file [`gnb.sa.band257.66prb.fhi72.2x2-liteon.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band257.66prb.fhi72.2x2-liteon.conf) corresponds to:
- TDD pattern `DDDDDDDSUU`, 1.25ms
- Bandwidth 100MHz
The OAI configuration file [`gnb.sa.band257.132prb.fhi72.2x2-liteon.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band257.132prb.fhi72.2x2-liteon.conf) corresponds to:
- TDD pattern `DDDSU`, 0.625ms
- Bandwidth 200MHz
- FW v02.00.07
- DL uses jumbo frame, UL uses standard MTU of 1500 bytes

58
targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band257.66prb.fhi72.2x2-liteon.conf → targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band257.132prb.fhi72.2x2-liteon.conf
View File

@@ -26,7 +26,7 @@ gNBs =
maxMIMO_layers = 2;
do_CSIRS = 1;
do_SRS = 0;
min_rxtxtime = 4;
min_rxtxtime = 3;
servingCellConfigCommon = (
{
@@ -37,20 +37,20 @@ gNBs =
# downlinkConfigCommon
#frequencyInfoDL
# center frequency = 28701.12 MHz
# selected SSB frequency = 28691.04 MHz
absoluteFrequencySSB = 2090683;
# selected SSB frequency = 28656.48 MHz
absoluteFrequencySSB = 2090107;
dl_frequencyBand = 257;
# frequency point A = 28653.6 MHz
dl_absoluteFrequencyPointA = 2090059;
# frequency point A = 28606.08 MHz
dl_absoluteFrequencyPointA = 2089267;
#scs-SpecificCarrierList
dl_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_subcarrierSpacing = 3;
dl_carrierBandwidth = 66;
dl_carrierBandwidth = 132;
#initialDownlinkBWP
#genericParameters
initialDLBWPlocationAndBandwidth = 17875;
initialDLBWPlocationAndBandwidth = 36025;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 3;
@@ -66,11 +66,11 @@ gNBs =
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_subcarrierSpacing = 3;
ul_carrierBandwidth = 66;
ul_carrierBandwidth = 132;
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 17875;
initialULBWPlocationAndBandwidth = 36025;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 3;
@@ -90,7 +90,7 @@ gNBs =
powerRampingStep = 2;
#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen
ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 3;
ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4;
#one (0..15) 4,8,12,16,...60,64
ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15;
#ra_ContentionResolutionTimer
@@ -119,11 +119,11 @@ gNBs =
hoppingId = 40;
p0_nominal = -90;
ssb_PositionsInBurst_Bitmap = 1;
ssb_PositionsInBurst_Bitmap = 4;
# ssb_periodicityServingCell
# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
ssb_periodicityServingCell = 1;
ssb_periodicityServingCell = 4;
# dmrs_TypeA_position
# 0 = pos2, 1 = pos3
@@ -141,11 +141,11 @@ gNBs =
# pattern1
# dl_UL_TransmissionPeriodicity
# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
dl_UL_TransmissionPeriodicity = 3;
nrofDownlinkSlots = 7;
nrofDownlinkSymbols = 6;
nrofUplinkSlots = 2;
nrofUplinkSymbols = 4;
dl_UL_TransmissionPeriodicity = 1;
nrofDownlinkSlots = 3;
nrofDownlinkSymbols = 10;
nrofUplinkSlots = 1;
nrofUplinkSymbols = 2;
ssPBCH_BlockPower = 0;
}
@@ -166,8 +166,8 @@ gNBs =
NETWORK_INTERFACES :
{
GNB_IPV4_ADDRESS_FOR_NG_AMF = "172.21.16.51";
GNB_IPV4_ADDRESS_FOR_NGU = "172.21.16.51";
GNB_IPV4_ADDRESS_FOR_NG_AMF = "172.21.18.51";
GNB_IPV4_ADDRESS_FOR_NGU = "172.21.18.51";
GNB_PORT_FOR_S1U = 2152; # Spec 2152
};
}
@@ -178,7 +178,7 @@ MACRLCs = (
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
pusch_TargetSNRx10 = 200;
pucch_TargetSNRx10 = 200;
pucch_TargetSNRx10 = 250;
pusch_FailureThres = 1000;
#ul_bler_target_upper =.02;
#ul_bler_target_lower =.01;
@@ -195,12 +195,12 @@ L1s = (
{
tr_n_preference = "local_mac";
prach_dtx_threshold = 250;
pucch0_dtx_threshold = 100;
pucch0_dtx_threshold = 150;
pusch_dtx_threshold = -200;
max_ldpc_iterations = 10;
tx_amp_backoff_dB = 18;
L1_rx_thread_core = 10;
L1_tx_thread_core = 11;
L1_rx_thread_core = 37;
L1_tx_thread_core = 36;
phase_compensation = 1;
}
@@ -219,8 +219,8 @@ RUs = (
max_rxgain = 60;
#sf_extension = 0;
eNB_instances = [0];
ru_thread_core = 9;
sl_ahead = 10;
ru_thread_core = 35;
sl_ahead = 5;
tr_preference = "raw_if4p5";
do_precoding = 0;
}
@@ -257,10 +257,10 @@ log_config :
};
fhi_72 = {
dpdk_devices = ("0000:c1:11.0", "0000:c1:11.1"); # one VF can be used as well
system_core = 6;
io_core = 7;
worker_cores = (8);
dpdk_devices = ("01:01.0","01:01.1");
system_core = 32;
io_core = 33;
worker_cores = (34);
ru_addr = ("E8:C7:4F:1E:C7:5B", "E8:C7:4F:1E:C7:5B");
mtu = 9216;
fh_config = ({