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Make number of UL/DL actors in NR UE fully configurable

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Due to different processing requirements on different CPUs it might
be beneficial to enable the users to set the number of UL/DL actors.

Allow disabling UL/DL actor frameworks and processing inline or
setting the number of DL/UL threads with --num-ul-actors/num-dl-actors

This was tested to work with 0 UL/DL actors with rfsim.
This commit is contained in:
Bartosz Podrygajlo
2025-05-26 11:21:36 +02:00
parent b2c9a1d2b5
commit 56330fde7c
4 changed files with 32 additions and 18 deletions
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19
executables/nr-ue.c
View File

@@ -106,9 +106,12 @@ static void *NRUE_phy_stub_standalone_pnf_task(void *arg);
static void start_process_slot_tx(void* arg) {
notifiedFIFO_elt_t *newTx = arg;
nr_rxtx_thread_data_t *curMsgTx = NotifiedFifoData(newTx);
int num_ul_actors_to_use =
get_nrUE_params()->num_ul_actors == 0 ? NUM_UL_ACTORS : min(get_nrUE_params()->num_ul_actors, NUM_UL_ACTORS);
pushNotifiedFIFO(&curMsgTx->UE->ul_actors[curMsgTx->proc.nr_slot_tx % num_ul_actors_to_use].fifo, newTx);
int num_ul_actors = get_nrUE_params()->num_ul_actors;
if (num_ul_actors > 0) {
pushNotifiedFIFO(&curMsgTx->UE->ul_actors[curMsgTx->proc.nr_slot_tx % num_ul_actors].fifo, newTx);
} else {
newTx->processingFunc(curMsgTx);
}
}
static size_t dump_L1_UE_meas_stats(PHY_VARS_NR_UE *ue, char *output, size_t max_len)
@@ -677,10 +680,10 @@ static int handle_sync_req_from_mac(PHY_VARS_NR_UE *UE)
/* Clearing UE harq while DL actors are active causes race condition.
So we let the current execution to complete here.*/
for (int i = 0; i < NUM_DL_ACTORS; i++) {
for (int i = 0; i < get_nrUE_params()->num_dl_actors; i++) {
flush_actor(UE->dl_actors + i);
}
for (int i = 0; i < NUM_UL_ACTORS; i++) {
for (int i = 0; i < get_nrUE_params()->num_ul_actors; i++) {
flush_actor(UE->ul_actors + i);
}
@@ -1183,7 +1186,11 @@ void *UE_thread(void *arg)
int ret = UE_dl_preprocessing(UE, &curMsgRx->proc, tx_wait_for_dlsch, &curMsgRx->phy_data, &stats_printed);
if (ret != INT_MAX)
shiftForNextFrame = ret;
pushNotifiedFIFO(&UE->dl_actors[curMsg.proc.nr_slot_rx % NUM_DL_ACTORS].fifo, newRx);
if (get_nrUE_params()->num_dl_actors > 0) {
pushNotifiedFIFO(&UE->dl_actors[curMsg.proc.nr_slot_rx % get_nrUE_params()->num_dl_actors].fifo, newRx);
} else {
newRx->processingFunc(curMsgRx);
}
// apply new NTN timing information
apply_ntn_config(UE, fp, slot_nr, &duration_rx_to_tx, &timing_advance, &ntn_koffset);

18
executables/nr-uesoftmodem.c
View File

@@ -506,11 +506,17 @@ int main(int argc, char **argv)
UE[CC_id]->sl_mode = get_softmodem_params()->sl_mode;
init_actor(&UE[CC_id]->sync_actor, "SYNC_", -1);
for (int i = 0; i < NUM_DL_ACTORS; i++) {
init_actor(&UE[CC_id]->dl_actors[i], "DL_", -1);
if (get_nrUE_params()->num_dl_actors > 0) {
UE[CC_id]->dl_actors = calloc_or_fail(get_nrUE_params()->num_dl_actors, sizeof(*UE[CC_id]->dl_actors));
for (int i = 0; i < get_nrUE_params()->num_dl_actors; i++) {
init_actor(&UE[CC_id]->dl_actors[i], "DL_", -1);
}
}
for (int i = 0; i < NUM_UL_ACTORS; i++) {
init_actor(&UE[CC_id]->ul_actors[i], "UL_", -1);
if (get_nrUE_params()->num_ul_actors > 0) {
UE[CC_id]->ul_actors = calloc_or_fail(get_nrUE_params()->num_ul_actors, sizeof(*UE[CC_id]->ul_actors));
for (int i = 0; i < get_nrUE_params()->num_ul_actors; i++) {
init_actor(&UE[CC_id]->ul_actors[i], "UL_", -1);
}
}
init_nr_ue_vars(UE[CC_id], inst);
@@ -576,10 +582,10 @@ int main(int argc, char **argv)
for (int CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
PHY_VARS_NR_UE *phy_vars = PHY_vars_UE_g[0][CC_id];
if (phy_vars) {
for (int i = 0; i < NUM_UL_ACTORS; i++) {
for (int i = 0; i < get_nrUE_params()->num_ul_actors; i++) {
shutdown_actor(&phy_vars->ul_actors[i]);
}
for (int i = 0; i < NUM_DL_ACTORS; i++) {
for (int i = 0; i < get_nrUE_params()->num_dl_actors; i++) {
shutdown_actor(&phy_vars->dl_actors[i]);
}
int ret = pthread_join(phy_vars->main_thread, NULL);

7
executables/nr-uesoftmodem.h
View File

@@ -22,7 +22,8 @@ extern uint16_t ue_id_g;
#define CONFIG_HLP_FREQ_SYNC_I "coefficient for Integrating part of continuous frequency offset compensation PI controller\n"
#define CONFIG_HLP_CONT_FO_COMP "Enable continuous frequency offset (FO) estimation and compensation and specify main FO source (1 = local oscillator, 2 = Doppler shift)\n"
#define CONFIG_HLP_AGC "Rx Gain control used for UE\n"
#define CONFIG_HLP_NUM_UL_ACTORS "Number of UL actors to use. Set to 0 to use the default value\n"
#define CONFIG_HLP_NUM_UL_ACTORS "Number of UL actors to use. Set to 0 to disable UL actor framework and do processing inline\n"
#define CONFIG_HLP_NUM_DL_ACTORS "Number of DL actors to use. Set to 0 to disable DL actor framework and do processing inline\n"
/***************************************************************************************************************************************/
/* command line options definitions, CMDLINE_XXXX_DESC macros are used to initialize paramdef_t arrays which are then used as argument
@@ -78,7 +79,8 @@ extern uint16_t ue_id_g;
{"freq-sync-I", CONFIG_HLP_FREQ_SYNC_I, 0, .dblptr=&(nrUE_params.freq_sync_I), .defdblval=0.001, TYPE_DOUBLE, 0}, \
{"cont-fo-comp", CONFIG_HLP_CONT_FO_COMP, 0, .iptr=&(nrUE_params.cont_fo_comp), .defintval=0, TYPE_INT, 0}, \
{"agc", CONFIG_HLP_AGC, PARAMFLAG_BOOL, .iptr=&(nrUE_params.agc), .defintval=0, TYPE_INT, 0}, \
{"num-ul-actors", CONFIG_HLP_NUM_UL_ACTORS, 0, .iptr=&nrUE_params.num_ul_actors, .defintval=0, TYPE_INT, 0}, \
{"num-ul-actors", CONFIG_HLP_NUM_UL_ACTORS, 0, .iptr=&nrUE_params.num_ul_actors, .defintval=2, TYPE_INT, 0}, \
{"num-dl-actors", CONFIG_HLP_NUM_DL_ACTORS, 0, .iptr=&nrUE_params.num_dl_actors, .defintval=4, TYPE_INT, 0}, \
}
// clang-format on
@@ -119,6 +121,7 @@ typedef struct {
int vcdflag;
int tx_max_power;
int num_ul_actors;
int num_dl_actors;
} nrUE_params_t;
extern uint64_t get_nrUE_optmask(void);
extern uint64_t set_nrUE_optmask(uint64_t bitmask);