mirror of
https://gitlab.eurecom.fr/oai/openairinterface5g.git
synced 2026-07-13 04:30:28 +00:00
automatic selection of SIB1 TDA
This commit is contained in:
@@ -16,8 +16,6 @@ gNBs =
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nr_cellid = 12345678L;
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////////// Physical parameters:
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sib1_tda = 5;
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min_rxtxtime = 6;
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servingCellConfigCommon = (
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@@ -18,8 +18,6 @@ gNBs =
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tr_s_preference = "local_mac"
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////////// Physical parameters:
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sib1_tda = 15;
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min_rxtxtime = 6;
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servingCellConfigCommon = (
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@@ -16,8 +16,6 @@ gNBs =
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nr_cellid = 12345678L;
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////////// Physical parameters:
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sib1_tda = 15;
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min_rxtxtime = 6;
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servingCellConfigCommon = (
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@@ -23,7 +23,6 @@ gNBs =
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pusch_AntennaPorts = 4;
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do_CSIRS = 1;
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do_SRS = 0;
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sib1_tda = 15;
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# force_UL256qam_off = 1;
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servingCellConfigCommon = (
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@@ -255,8 +255,6 @@ configuration](../RRC/rrc-usage.md) as well for SIB configuration.
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* `pusch_AntennaPorts` (default 1): number of antenna ports in PUSCH
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* `maxMIMO_layers` (default -1=unlimited): maximum number of MIMO layers to use
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in downlink
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* `sib1_tda` (default 1): time domain allocation (TDA) indices to use for SIB1
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(38.214 section 5.1.2.1.1)
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* `do_CSIRS` (default 0): flag whether to use channel-state information
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reference signal (CSI-RS)
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* `do_SRS` (default 0): flag whether to use sounding reference signal (SRS)
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@@ -296,7 +296,6 @@ This allows to reuse HARQ processes immediately, but it breaks compatibility wit
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To enable this feature, the `disable_harq` flag has to be added to the gNB conf file in the section `gNBs.[0]`
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```
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...
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sib1_tda = 5;
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min_rxtxtime = 6;
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disable_harq = 1; // <--
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@@ -699,7 +699,6 @@ void RCconfig_verify(configmodule_interface_t *cfg, ngran_node_t node_type)
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verify_gnb_param_notset(gnbp, GNB_PDSCH_ANTENNAPORTS_XP_IDX, GNB_CONFIG_STRING_PDSCHANTENNAPORTS_XP);
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verify_gnb_param_notset(gnbp, GNB_PUSCH_ANTENNAPORTS_IDX, GNB_CONFIG_STRING_PUSCHANTENNAPORTS);
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verify_gnb_param_notset(gnbp, GNB_MINRXTXTIME_IDX, GNB_CONFIG_STRING_MINRXTXTIME);
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verify_gnb_param_notset(gnbp, GNB_SIB1_TDA_IDX, GNB_CONFIG_STRING_SIB1TDA);
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verify_gnb_param_notset(gnbp, GNB_DO_CSIRS_IDX, GNB_CONFIG_STRING_DOCSIRS);
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verify_gnb_param_notset(gnbp, GNB_DO_SRS_IDX, GNB_CONFIG_STRING_DOSRS);
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verify_gnb_param_notset(gnbp, GNB_FORCE256QAMOFF_IDX, GNB_CONFIG_STRING_FORCE256QAMOFF);
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@@ -1436,8 +1435,6 @@ void RCconfig_nr_macrlc(configmodule_interface_t *cfg)
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}
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config.minRXTXTIME = *GNBParamList.paramarray[0][GNB_MINRXTXTIME_IDX].iptr;
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LOG_I(GNB_APP, "minTXRXTIME %d\n", config.minRXTXTIME);
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config.sib1_tda = *GNBParamList.paramarray[0][GNB_SIB1_TDA_IDX].iptr;
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LOG_I(GNB_APP, "SIB1 TDA %d\n", config.sib1_tda);
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config.do_CSIRS = *GNBParamList.paramarray[0][GNB_DO_CSIRS_IDX].iptr;
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config.do_SRS = *GNBParamList.paramarray[0][GNB_DO_SRS_IDX].iptr;
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config.max_num_rsrp = *GNBParamList.paramarray[0][GNB_LIMIT_RSRP_REPORT_IDX].iptr;
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@@ -114,7 +114,6 @@ typedef enum {
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#define GNB_CONFIG_STRING_PDSCHANTENNAPORTS_N2 "pdsch_AntennaPorts_N2"
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#define GNB_CONFIG_STRING_PDSCHANTENNAPORTS_XP "pdsch_AntennaPorts_XP"
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#define GNB_CONFIG_STRING_PUSCHANTENNAPORTS "pusch_AntennaPorts"
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#define GNB_CONFIG_STRING_SIB1TDA "sib1_tda"
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#define GNB_CONFIG_STRING_DOCSIRS "do_CSIRS"
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#define GNB_CONFIG_STRING_DOSRS "do_SRS"
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#define GNB_CONFIG_STRING_NRCELLID "nr_cellid"
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@@ -179,7 +178,6 @@ typedef enum {
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{GNB_CONFIG_STRING_PDSCHANTENNAPORTS_N2, "vert. log. antenna ports", 0, .iptr=NULL, .defintval=1, TYPE_INT, 0}, \
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{GNB_CONFIG_STRING_PDSCHANTENNAPORTS_XP, "XP log. antenna ports", 0, .iptr=NULL, .defintval=1, TYPE_INT, 0}, \
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{GNB_CONFIG_STRING_PUSCHANTENNAPORTS, NULL, 0, .iptr=NULL, .defintval=1, TYPE_INT, 0}, \
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{GNB_CONFIG_STRING_SIB1TDA, NULL, 0, .iptr=NULL, .defintval=1, TYPE_INT, 0}, \
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{GNB_CONFIG_STRING_DOCSIRS, NULL, 0, .iptr=NULL, .defintval=0, TYPE_INT, 0}, \
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{GNB_CONFIG_STRING_DOSRS, NULL, 0, .iptr=NULL, .defintval=0, TYPE_INT, 0}, \
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{GNB_CONFIG_STRING_NRCELLID, NULL, 0, .u64ptr=NULL,.defint64val=1, TYPE_UINT64, 0}, \
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@@ -225,30 +223,29 @@ typedef enum {
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#define GNB_PDSCH_ANTENNAPORTS_N2_IDX 14
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#define GNB_PDSCH_ANTENNAPORTS_XP_IDX 15
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#define GNB_PUSCH_ANTENNAPORTS_IDX 16
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#define GNB_SIB1_TDA_IDX 17
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#define GNB_DO_CSIRS_IDX 18
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#define GNB_DO_SRS_IDX 19
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#define GNB_NRCELLID_IDX 20
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#define GNB_MINRXTXTIME_IDX 21
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#define GNB_ULPRBBLACKLIST_IDX 22
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#define GNB_UMONDEFAULTDRB_IDX 23
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#define GNB_FORCE256QAMOFF_IDX 24
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#define GNB_ENABLE_SDAP_IDX 25
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#define GNB_DRBS 26
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#define GNB_GNB_DU_ID_IDX 27
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#define GNB_GNB_CU_UP_ID_IDX 28
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#define GNB_USE_DELTA_MCS_IDX 29
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#define GNB_FORCEUL256QAMOFF_IDX 30
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#define GNB_MAXMIMOLAYERS_IDX 31
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#define GNB_DISABLE_HARQ_IDX 32
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#define GNB_NUM_DL_HARQ_IDX 33
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#define GNB_NUM_UL_HARQ_IDX 34
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#define GNB_UESS_AGG_LEVEL_LIST_IDX 35
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#define GNB_CU_SIBS_IDX 36
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#define GNB_DU_SIBS_IDX 37
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#define GNB_CONFIG_REP_IDX 38
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#define GNB_1ST_ACTIVE_BWP_IDX 39
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#define GNB_LIMIT_RSRP_REPORT_IDX 40
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#define GNB_DO_CSIRS_IDX 17
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#define GNB_DO_SRS_IDX 18
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#define GNB_NRCELLID_IDX 19
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#define GNB_MINRXTXTIME_IDX 20
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#define GNB_ULPRBBLACKLIST_IDX 21
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#define GNB_UMONDEFAULTDRB_IDX 22
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#define GNB_FORCE256QAMOFF_IDX 23
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#define GNB_ENABLE_SDAP_IDX 24
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#define GNB_DRBS 25
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#define GNB_GNB_DU_ID_IDX 26
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#define GNB_GNB_CU_UP_ID_IDX 27
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#define GNB_USE_DELTA_MCS_IDX 28
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#define GNB_FORCEUL256QAMOFF_IDX 29
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#define GNB_MAXMIMOLAYERS_IDX 30
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#define GNB_DISABLE_HARQ_IDX 31
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#define GNB_NUM_DL_HARQ_IDX 32
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#define GNB_NUM_UL_HARQ_IDX 33
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#define GNB_UESS_AGG_LEVEL_LIST_IDX 34
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#define GNB_CU_SIBS_IDX 35
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#define GNB_DU_SIBS_IDX 36
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#define GNB_CONFIG_REP_IDX 37
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#define GNB_1ST_ACTIVE_BWP_IDX 38
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#define GNB_LIMIT_RSRP_REPORT_IDX 39
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#define TRACKING_AREA_CODE_OKRANGE {0x0001,0xFFFD}
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#define NUM_DL_HARQ_OKVALUES {2,4,6,8,10,12,16,32}
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@@ -287,7 +284,6 @@ typedef enum {
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{ .s5 = { NULL } }, \
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{ .s5 = { NULL } }, \
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{ .s5 = { NULL } }, \
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{ .s5 = { NULL } }, \
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{ .s1 = { config_check_intval, NUM_DL_HARQ_OKVALUES,8 } }, \
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{ .s1 = { config_check_intval, NUM_UL_HARQ_OKVALUES,2 } }, \
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{ .s5 = { NULL } }, \
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@@ -255,7 +255,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, slot_t slotP, nfapi
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}
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}
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static void update_rb_mcs_tbs(NR_sched_pdsch_t *pdsch, uint32_t num_total_bytes, uint16_t *vrb_map)
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static bool update_rb_mcs_tbs(NR_sched_pdsch_t *pdsch, uint32_t num_total_bytes, uint16_t *vrb_map)
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{
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const NR_tda_info_t *tda_info = &pdsch->tda_info;
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@@ -296,12 +296,15 @@ static void update_rb_mcs_tbs(NR_sched_pdsch_t *pdsch, uint32_t num_total_bytes,
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break;
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}
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}
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AssertFatal(pdsch->tb_size >= num_total_bytes,
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"Couldn't allocate enough resources for %d bytes in SIB PDSCH (rbStart %d, rbSize %d, bwpSize %d)\n",
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num_total_bytes,
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pdsch->rbStart,
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pdsch->rbSize,
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bwpSize);
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if (pdsch->tb_size < num_total_bytes) {
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LOG_D(NR_MAC,
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"Couldn't allocate enough resources for %d bytes in SIB PDSCH (rbStart %d, rbSize %d, bwpSize %d)\n",
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num_total_bytes,
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pdsch->rbStart,
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pdsch->rbSize,
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bwpSize);
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return false;
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}
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LOG_D(NR_MAC,
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"mcs=%i, startSymbolIndex = %i, nrOfSymbols = %i, rbSize = %i, TBS = %i, dmrs_length %d, N_PRB_DMRS = %d, mappingtype = %d\n",
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@@ -313,6 +316,7 @@ static void update_rb_mcs_tbs(NR_sched_pdsch_t *pdsch, uint32_t num_total_bytes,
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pdsch->dmrs_parms.N_DMRS_SLOT,
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N_PRB_DMRS,
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tda_info->mapping_type);
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return true;
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}
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static NR_sched_pdsch_t schedule_control_sib1(gNB_MAC_INST *gNB_mac,
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@@ -342,11 +346,12 @@ static NR_sched_pdsch_t schedule_control_sib1(gNB_MAC_INST *gNB_mac,
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uint8_t nr_of_candidates = 0;
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for (int i=0; i<3; i++) {
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for (int i = 0; i < 3; i++) {
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find_aggregation_candidates(&gNB_mac->sched_ctrlCommon->aggregation_level, &nr_of_candidates, gNB_mac->sched_ctrlCommon->search_space,4<<i);
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if (nr_of_candidates>0) break; // choosing the lower value of aggregation level available
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if (nr_of_candidates > 0)
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break; // choosing the lower value of aggregation level available
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}
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AssertFatal(nr_of_candidates>0,"nr_of_candidates is 0\n");
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AssertFatal(nr_of_candidates > 0, "nr_of_candidates is 0\n");
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gNB_mac->sched_ctrlCommon->cce_index = find_pdcch_candidate(gNB_mac,
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CC_id,
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gNB_mac->sched_ctrlCommon->aggregation_level,
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@@ -358,18 +363,21 @@ static NR_sched_pdsch_t schedule_control_sib1(gNB_MAC_INST *gNB_mac,
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AssertFatal(gNB_mac->sched_ctrlCommon->cce_index >= 0, "Could not find CCE for coreset0\n");
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update_rb_mcs_tbs(&pdsch, gNB_mac->sched_ctrlCommon->num_total_bytes, vrb_map);
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bool success = update_rb_mcs_tbs(&pdsch, gNB_mac->sched_ctrlCommon->num_total_bytes, vrb_map);
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if (success) {
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// Mark the corresponding RBs as used
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fill_pdcch_vrb_map(gNB_mac,
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CC_id,
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pdcch,
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gNB_mac->sched_ctrlCommon->cce_index,
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gNB_mac->sched_ctrlCommon->aggregation_level,
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beam);
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for (int rb = 0; rb < pdsch.rbSize; rb++) {
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vrb_map[rb + type0_PDCCH_CSS_config->cset_start_rb] |= SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols);
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}
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} else
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pdsch.tb_size = 0; // to signal we couldn't allocate TBS
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// Mark the corresponding RBs as used
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fill_pdcch_vrb_map(gNB_mac,
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CC_id,
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pdcch,
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gNB_mac->sched_ctrlCommon->cce_index,
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gNB_mac->sched_ctrlCommon->aggregation_level,
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beam);
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for (int rb = 0; rb < pdsch.rbSize; rb++) {
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vrb_map[rb + type0_PDCCH_CSS_config->cset_start_rb] |= SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols);
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}
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return pdsch;
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}
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@@ -474,12 +482,8 @@ void schedule_nr_sib1(module_id_t module_idP,
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// TODO: Get these values from RRC
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const int CC_id = 0;
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uint8_t candidate_idx = 0;
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gNB_MAC_INST *gNB_mac = RC.nrmac[module_idP];
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NR_ServingCellConfigCommon_t *scc = gNB_mac->common_channels[CC_id].ServingCellConfigCommon;
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int time_domain_allocation = gNB_mac->radio_config.sib1_tda;
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int L_max;
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switch (scc->ssb_PositionsInBurst->present) {
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case 1:
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@@ -492,8 +496,7 @@ void schedule_nr_sib1(module_id_t module_idP,
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L_max = 64;
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break;
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default:
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AssertFatal(0,"SSB bitmap size value %d undefined (allowed values 1,2,3)\n",
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scc->ssb_PositionsInBurst->present);
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AssertFatal(false, "SSB bitmap size value %d undefined (allowed values 1,2,3)\n", scc->ssb_PositionsInBurst->present);
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}
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for (int i = 0; i < L_max; i++) {
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@@ -512,38 +515,51 @@ void schedule_nr_sib1(module_id_t module_idP,
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int beam_index = get_beam_from_ssbidx(gNB_mac, i);
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NR_beam_alloc_t beam = beam_allocation_procedure(&gNB_mac->beam_info, frameP, slotP, beam_index, n_slots_frame);
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AssertFatal(beam.idx >= 0, "Cannot allocate SIB1 corresponding to SSB %d in any available beam\n", i);
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NR_COMMON_channels_t *cc = &gNB_mac->common_channels[0];
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LOG_D(NR_MAC,"(%d.%d) SIB1 transmission: ssb_index %d\n", frameP, slotP, type0_PDCCH_CSS_config->ssb_index);
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default_table_type_t table_type = get_default_table_type(type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern);
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// assuming normal CP
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NR_tda_info_t tda_info = get_info_from_tda_tables(table_type, time_domain_allocation, scc->dmrs_TypeA_Position, true);
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AssertFatal((tda_info.startSymbolIndex + tda_info.nrOfSymbols) < 14,
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"SIB1 TDA %d would cause overlap with CSI-RS. Please select a different SIB1 TDA.\n",
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time_domain_allocation);
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NR_pdsch_dmrs_t dmrs_parms = get_dl_dmrs_params(scc, NULL, &tda_info, 1);
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NR_sched_pdcch_t sched_pdcch = set_pdcch_structure(NULL,
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gNB_mac->sched_ctrlCommon->search_space,
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gNB_mac->sched_ctrlCommon->coreset,
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scc,
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NULL,
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type0_PDCCH_CSS_config);
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int time_domain_allocation = -1;
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NR_sched_pdsch_t sched_pdsch = {0};
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for (int t = 0; t < 16; t++) {
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// If the PDSCH was scheduled with SI-RNTI in PDCCH Type0 common search space,
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// the UE may assume that this PDSCH resource allocation is not applied (Table 5.1.2.1.1-4 and 5 in 38.214)
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int row = t + 1;
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if (table_type == defaultB && (row == 12 || row == 13 || row == 14))
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continue;
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if (table_type == defaultC && (row == 1 || row == 6 || row == 7 ||row > 12))
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continue;
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// assuming normal CP
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NR_tda_info_t tda_info = get_info_from_tda_tables(table_type, t, scc->dmrs_TypeA_Position, true);
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// SIB1 TDA going to the last symbol would cause overlap with CSI-RS
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if (!tda_info.valid_tda || tda_info.startSymbolIndex + tda_info.nrOfSymbols == 14)
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continue;
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if (tda_info.startSymbolIndex < type0_PDCCH_CSS_config->first_symbol_index + type0_PDCCH_CSS_config->num_symbols)
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continue;
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NR_COMMON_channels_t *cc = &gNB_mac->common_channels[0];
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// Configure sched_ctrlCommon for SIB1
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NR_sched_pdsch_t sched_pdsch = schedule_control_sib1(gNB_mac,
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CC_id,
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&sched_pdcch,
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type0_PDCCH_CSS_config,
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time_domain_allocation,
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&dmrs_parms,
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&tda_info,
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candidate_idx,
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beam.idx,
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cc->sib1_bcch_length);
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NR_pdsch_dmrs_t dmrs_parms = get_dl_dmrs_params(scc, NULL, &tda_info, 1);
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// Configure sched_ctrlCommon for SIB1
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sched_pdsch = schedule_control_sib1(gNB_mac,
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CC_id,
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&sched_pdcch,
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type0_PDCCH_CSS_config,
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t,
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&dmrs_parms,
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&tda_info,
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candidate_idx,
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beam.idx,
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cc->sib1_bcch_length);
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if (sched_pdsch.tb_size > 0) {
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time_domain_allocation = t;
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break;
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}
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}
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AssertFatal(time_domain_allocation > 0, "Couldn't select any TDA for SIB1\n");
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nfapi_nr_dl_tti_request_body_t *dl_req = &DL_req->dl_tti_request_body;
|
||||
int pdu_index = gNB_mac->pdu_index[0]++;
|
||||
nr_fill_nfapi_dl_SIB_pdu(gNB_mac,
|
||||
@@ -673,7 +689,8 @@ static void other_sib_sched_control(module_id_t module_idP,
|
||||
uint16_t *vrb_map = cc->vrb_map[beam.idx];
|
||||
uint8_t *sib_bcch_pdu = cc->other_sib_bcch_pdu[payload_idx];
|
||||
int num_total_bytes = cc->other_sib_bcch_length[payload_idx];
|
||||
update_rb_mcs_tbs(&sched_pdsch_otherSI, num_total_bytes, vrb_map);
|
||||
bool success = update_rb_mcs_tbs(&sched_pdsch_otherSI, num_total_bytes, vrb_map);
|
||||
AssertFatal(success, "Couldn't allocate TBS for other SIB\n");
|
||||
|
||||
for (int rb = 0; rb < sched_pdsch_otherSI.rbSize; rb++) {
|
||||
vrb_map[rb + type0_PDCCH_CSS_config->cset_start_rb] |= SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols);
|
||||
|
||||
@@ -186,7 +186,6 @@ typedef enum {
|
||||
} nr_config_report_type_t;
|
||||
|
||||
typedef struct nr_mac_config_t {
|
||||
int sib1_tda;
|
||||
nr_pdsch_AntennaPorts_t pdsch_AntennaPorts;
|
||||
int pusch_AntennaPorts;
|
||||
int minRXTXTIME;
|
||||
|
||||
@@ -19,7 +19,6 @@ gNBs =
|
||||
////////// Physical parameters:
|
||||
|
||||
min_rxtxtime = 4;
|
||||
sib1_tda = 15;
|
||||
|
||||
servingCellConfigCommon = (
|
||||
{
|
||||
|
||||
@@ -19,7 +19,6 @@ gNBs =
|
||||
////////// Physical parameters:
|
||||
|
||||
min_rxtxtime = 4;
|
||||
sib1_tda = 15;
|
||||
|
||||
servingCellConfigCommon = (
|
||||
{
|
||||
|
||||
@@ -23,7 +23,6 @@ gNBs =
|
||||
pusch_AntennaPorts = 4;
|
||||
do_CSIRS = 1;
|
||||
do_SRS = 0;
|
||||
sib1_tda = 15;
|
||||
force_UL256qam_off = 1;
|
||||
# maxMIMO_layers = 2;
|
||||
|
||||
|
||||
@@ -23,7 +23,6 @@ gNBs =
|
||||
pusch_AntennaPorts = 8;
|
||||
do_CSIRS = 1;
|
||||
do_SRS = 0;
|
||||
sib1_tda = 15;
|
||||
force_UL256qam_off = 1;
|
||||
maxMIMO_layers = 2;
|
||||
|
||||
|
||||
@@ -23,7 +23,6 @@ gNBs =
|
||||
pusch_AntennaPorts = 8;
|
||||
do_CSIRS = 1;
|
||||
do_SRS = 0;
|
||||
sib1_tda = 15;
|
||||
force_UL256qam_off = 1;
|
||||
maxMIMO_layers = 2;
|
||||
|
||||
|
||||
@@ -22,7 +22,6 @@ gNBs =
|
||||
pusch_AntennaPorts = 1;
|
||||
min_rxtxtime = 6;
|
||||
enable_sdap = 0;
|
||||
#sib1_tda = 0;
|
||||
|
||||
servingCellConfigCommon = (
|
||||
{
|
||||
|
||||
@@ -16,7 +16,6 @@ gNBs =
|
||||
|
||||
////////// Physical parameters:
|
||||
|
||||
sib1_tda = 5;
|
||||
min_rxtxtime = 6;
|
||||
disable_harq = 1;
|
||||
cu_sibs = [2];
|
||||
|
||||
@@ -16,7 +16,6 @@ gNBs =
|
||||
|
||||
////////// Physical parameters:
|
||||
|
||||
sib1_tda = 5;
|
||||
min_rxtxtime = 6;
|
||||
disable_harq = 1;
|
||||
cu_sibs = [2];
|
||||
|
||||
@@ -16,7 +16,6 @@ gNBs =
|
||||
|
||||
////////// Physical parameters:
|
||||
|
||||
sib1_tda = 5;
|
||||
min_rxtxtime = 6;
|
||||
disable_harq = 1;
|
||||
cu_sibs = [2];
|
||||
|
||||
@@ -21,7 +21,6 @@ gNBs =
|
||||
pusch_AntennaPorts = 1;
|
||||
do_CSIRS = 1;
|
||||
do_SRS = 1;
|
||||
sib1_tda = 15;
|
||||
min_rxtxtime = 6;
|
||||
|
||||
servingCellConfigCommon = (
|
||||
|
||||
@@ -22,7 +22,6 @@ gNBs =
|
||||
|
||||
do_CSIRS = 1;
|
||||
do_SRS = 1;
|
||||
sib1_tda = 15;
|
||||
min_rxtxtime = 6;
|
||||
|
||||
servingCellConfigCommon = (
|
||||
|
||||
@@ -32,7 +32,6 @@ gNBs =
|
||||
|
||||
////////// Physical parameters:
|
||||
|
||||
sib1_tda = 5;
|
||||
min_rxtxtime = 6;
|
||||
# disable_harq = 1;
|
||||
# num_dlharq = 32;
|
||||
|
||||
@@ -32,7 +32,6 @@ gNBs =
|
||||
|
||||
////////// Physical parameters:
|
||||
|
||||
sib1_tda = 5;
|
||||
min_rxtxtime = 6;
|
||||
# disable_harq = 1;
|
||||
# num_dlharq = 32;
|
||||
|
||||
@@ -17,7 +17,6 @@ gNBs =
|
||||
|
||||
////////// Physical parameters:
|
||||
|
||||
sib1_tda = 5;
|
||||
min_rxtxtime = 6;
|
||||
|
||||
servingCellConfigCommon = (
|
||||
|
||||
@@ -23,7 +23,6 @@ gNBs =
|
||||
pusch_AntennaPorts = 4;
|
||||
do_CSIRS = 1;
|
||||
do_SRS = 0;
|
||||
sib1_tda = 15;
|
||||
|
||||
servingCellConfigCommon = (
|
||||
{
|
||||
|
||||
@@ -21,7 +21,6 @@ gNBs =
|
||||
pusch_AntennaPorts = 2;
|
||||
do_CSIRS = 1;
|
||||
do_SRS = 0;
|
||||
sib1_tda = 15;
|
||||
|
||||
servingCellConfigCommon = (
|
||||
{
|
||||
|
||||
@@ -23,7 +23,6 @@ gNBs =
|
||||
pusch_AntennaPorts = 4;
|
||||
do_CSIRS = 1;
|
||||
do_SRS = 0;
|
||||
sib1_tda = 15;
|
||||
|
||||
servingCellConfigCommon = (
|
||||
{
|
||||
|
||||
@@ -21,7 +21,6 @@ gNBs =
|
||||
pusch_AntennaPorts = 2;
|
||||
do_CSIRS = 1;
|
||||
do_SRS = 0;
|
||||
sib1_tda = 15;
|
||||
# force_UL256qam_off = 1;
|
||||
|
||||
servingCellConfigCommon = (
|
||||
|
||||
@@ -23,7 +23,6 @@ gNBs =
|
||||
pusch_AntennaPorts = 4;
|
||||
do_CSIRS = 1;
|
||||
do_SRS = 0;
|
||||
sib1_tda = 15;
|
||||
# force_UL256qam_off = 1;
|
||||
|
||||
servingCellConfigCommon = (
|
||||
|
||||
@@ -23,7 +23,6 @@ gNBs =
|
||||
pusch_AntennaPorts = 4;
|
||||
do_CSIRS = 1;
|
||||
do_SRS = 0;
|
||||
sib1_tda = 15;
|
||||
# force_UL256qam_off = 1;
|
||||
|
||||
servingCellConfigCommon = (
|
||||
|
||||
@@ -23,7 +23,6 @@ gNBs =
|
||||
pusch_AntennaPorts = 4;
|
||||
do_CSIRS = 1;
|
||||
do_SRS = 0;
|
||||
sib1_tda = 15;
|
||||
|
||||
servingCellConfigCommon = (
|
||||
{
|
||||
|
||||
@@ -21,7 +21,6 @@ gNBs =
|
||||
do_CSIRS = 1;
|
||||
do_SRS = 0;
|
||||
force_UL256qam_off = 1;
|
||||
# sib1_tda = 15;
|
||||
|
||||
servingCellConfigCommon = (
|
||||
{
|
||||
|
||||
@@ -17,7 +17,6 @@ gNBs =
|
||||
|
||||
////////// Physical parameters:
|
||||
|
||||
sib1_tda = 15;
|
||||
min_rxtxtime = 6;
|
||||
|
||||
servingCellConfigCommon = (
|
||||
|
||||
Reference in New Issue
Block a user