Fix Liteon for xran F release and improve docs

1. Closes #884 - increase the XRAN_MAX_FRAGMENT from 4 to 6 (sufficient for MTU 1500 with compression 8b)
2. Add new firmware version that supports jumbo frames
3. Update the config file to align with the new Liteon unit in our lab - center frequency, jumbo frames, compression and RU MAC address,
as well as the max DL MIMO layers.
This commit is contained in:
Teodora
2025-04-29 11:00:42 +02:00
parent 83afb8b852
commit 3a1fc2ef65
4 changed files with 40 additions and 32 deletions

View File

@@ -1,5 +1,5 @@
diff --git a/fhi_lib/app/src/common.h b/fhi_lib/app/src/common.h
index ac5f471..bbd39fe 100644
index ac5f471..9ebbcab 100644
--- a/fhi_lib/app/src/common.h
+++ b/fhi_lib/app/src/common.h
@@ -28,7 +28,7 @@
@@ -7,7 +7,7 @@ index ac5f471..bbd39fe 100644
#include <rte_mbuf.h>
-#define VERSIONX "oran_f_release_v1.0"
+#define VERSIONX "oran_f_release_v1.2"
+#define VERSIONX "oran_f_release_v1.3"
#define APP_O_DU 0
#define APP_O_RU 1
@@ -164,9 +164,18 @@ index eccc4ae..b1b8f4b 100644
CPP_FLAGS_FULL := $(CPP_FLAGS) $(CPP_COMP) $(INC) $(DEF)
CPP_FLAGS_FULL_SNC := $(CPP_FLAGS) $(CPP_COMP_SNC) $(INC) $(DEF)
diff --git a/fhi_lib/lib/api/xran_fh_o_du.h b/fhi_lib/lib/api/xran_fh_o_du.h
index bacf597..90a42a2 100644
index bacf597..8bd7c66 100644
--- a/fhi_lib/lib/api/xran_fh_o_du.h
+++ b/fhi_lib/lib/api/xran_fh_o_du.h
@@ -141,7 +141,7 @@ extern "C" {
#define XRAN_MAX_SECTIONS_PER_SYM (XRAN_MAX_SECTIONS_PER_SLOT) /**< Max number of different sections in single slot (section may be equal to RB allocation for UE) */
#define XRAN_MIN_SECTIONS_PER_SYM (XRAN_MIN_SECTIONS_PER_SLOT) /**< Min number of different sections in single slot (section may be equal to RB allocation for UE) */
-#define XRAN_MAX_FRAGMENT (4) /**< Max number of fragmentations in single symbol */
+#define XRAN_MAX_FRAGMENT (6) /**< Max number of fragmentations in single symbol */
#define XRAN_MAX_SET_BFWS (64) /**< Assumed 64Ant, BFP 9bit with 9K jumbo frame */
#define XRAN_MAX_PKT_BURST (448+4) /**< 4x14x8 symbols per ms */
@@ -1193,6 +1193,31 @@ int32_t xran_reg_physide_cb_by_dev_id(void *pHandle, xran_fh_tti_callback_fn Cb,
*/
int32_t xran_get_slot_idx (uint32_t PortId, uint32_t *nFrameIdx, uint32_t *nSubframeIdx, uint32_t *nSlotIdx, uint64_t *nSecond);

View File

@@ -68,13 +68,13 @@ We have only verified LLS-C3 configuration in our lab, i.e. using an external
grandmaster, a switch as a boundary clock, and the gNB/DU and RU. We haven't
tested any RU without S-plane. Radio units we are testing/integrating:
|Vendor |Software Version |
|-----------------|----------------------|
|VVDN LPRU |03-v3.0.5 |
|LiteON RU |01.00.08/02.00.03 |
|Benetel 650 |RAN650-1v1.0.4-dda1bf5|
|Benetel 550 CAT-A|RAN550-1v1.0.4-605a25a|
|Foxconn RPQN |v3.1.15q.551_rc10 |
|Vendor |Software Version |
|-----------------|---------------------------------------------|
|VVDN LPRU |03-v3.0.5 |
|LiteON RU |01.00.08/02.00.03/02.00.10 |
|Benetel 650 |RAN650-1v1.0.4-dda1bf5 |
|Benetel 550 CAT-A|RAN550-1v1.0.4-605a25a |
|Foxconn RPQN |v3.1.15q.551_rc10 |
Tested libxran releases:
@@ -590,11 +590,11 @@ dl_tuning_special_slot=0x13b6
### LITEON
**Verson 01.00.08**
The OAI configuration file [`gnb.sa.band78.273prb.fhi72.4x4-liteon.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.273prb.fhi72.4x4-liteon.conf) corresponds to:
- TDD pattern `DDDSU`, 2.5ms
- Bandwidth 100MHz
- MTU 1500 (the above mentioned LITEON version doesn't support jumbo frames)
- MTU 1500
- MTU 9600: v02.00.10
#### RU configuration
@@ -614,18 +614,16 @@ Once the RU is PTP synced, and RF state and DPD are `Ready`, write `configure te
- Bandwidth
- Compression Bitwidth
- TX/RX attenuation
- PRACH eAxC IDs
- DU MAC address
...
After each reboot, the PRACH has to be manually configured.
To do so, please login to RU as user `root` and run below commands:
The configuration mode example:
```bash
devmem 0x80001014 32 0x00050004
devmem 0x80001018 32 0x00070006
devmem 0x8000201C 32 0x00000001
```
If you have RU version that supports jumbo frames, please enable it as:
```bash
devmem 0x8000200C 32 0x00000001
compression-bit 9 # set IQ bitwidth for PxSCH/PRACH
eAXC_id 4 5 6 7 # set PRACH eAxC IDs
jumboframe 1 # enable jumbo frame
...
```
### VVDN LPRU

View File

@@ -17,7 +17,7 @@ add_library(oran_fhlib_5g MODULE
)
set(E_VERSION 5.1.5)
set(F_VERSION 6.1.2)
set(F_VERSION 6.1.3)
find_package(xran REQUIRED)
if(xran_VERSION VERSION_EQUAL E_VERSION)

View File

@@ -19,7 +19,7 @@ gNBs =
pdsch_AntennaPorts_XP = 2;
pdsch_AntennaPorts_N1 = 2;
maxMIMO_layers = 2;
maxMIMO_layers = 4;
pusch_AntennaPorts = 4;
do_CSIRS = 1;
do_SRS = 0;
@@ -33,12 +33,12 @@ gNBs =
# n_TimingAdvanceOffset = 0;
# downlinkConfigCommon
#frequencyInfoDL
# center frequency = 3450.72 MHz
# selected SSB frequency = 3450.72 MHz
absoluteFrequencySSB = 630048;
# center frequency = 3350.01 MHz
# selected SSB frequency = 3349.92 MHz
absoluteFrequencySSB = 623328;
dl_frequencyBand = 78;
# frequency point A = 3401.58 MHz
dl_absoluteFrequencyPointA = 626772;
# frequency point A = 3300.87 MHz
dl_absoluteFrequencyPointA = 620058;
#scs-SpecificCarrierList
dl_offstToCarrier = 0;
# subcarrierSpacing
@@ -257,15 +257,16 @@ fhi_72 = {
system_core = 0;
io_core = 1;
worker_cores = (2);
ru_addr = ("e8:c7:4f:1e:c7:11", "e8:c7:4f:1e:c7:11");
ru_addr = ("e8:c7:4f:25:81:b3", "e8:c7:4f:25:81:b3");
mtu = 9600; # note: 1500 works as well, with both E and F releases
fh_config = ({
T1a_cp_dl = (285, 429);
T1a_cp_ul = (285, 429);
T1a_up = (96, 196);
Ta4 = (110, 180);
ru_config = {
iq_width = 8;
iq_width_prach = 8;
iq_width = 9;
iq_width_prach = 9;
};
prach_config = {
kbar = 0;