mirror of
https://gitlab.eurecom.fr/oai/openairinterface5g.git
synced 2026-07-13 04:30:28 +00:00
Merge remote-tracking branch 'bpodrygajlo/oru-fixes' into integration_2026_w28
O-RU first fix pass (#260) Added several fixes requested in the original PR - simplify code - add example config files & test procedure Reviewed-by: Robert Schmidt <robert.schmidt@openairinterface.org>
This commit is contained in:
@@ -36,12 +36,7 @@ int emulate_rf = 0;
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RAN_CONTEXT_t RC;
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extern void kill_NR_RU_proc(int inst);
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extern void set_function_spec_param(RU_t *ru);
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extern void start_NR_RU();
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extern void init_NR_RU(configmodule_interface_t *cfg, char *);
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void fill_rf_config(RU_t *ru, char *rf_config_file);
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void fill_split7_2_config(split7_config_t *split7, const nfapi_nr_config_request_scf_t *config, const NR_DL_FRAME_PARMS *fp);
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int64_t uplink_frequency_offset[MAX_NUM_CCs][4];
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@@ -220,11 +215,11 @@ int main(int argc, char **argv)
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oru.fronthaul = oru_fh_init(&oru.fh_config);
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AssertFatal(oru.fronthaul != NULL, "Cannot configure oru fronthaul, check your config file/cmdline");
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LOG_I(PHY, "starting vrtsim\n");
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ret = openair0_load(&ru->rfdevice, "vrtsim", &ru->openair0_cfg, NULL);
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AssertFatal(ret == 0, "RU %u: openair0_load() ret %d: cannot initialize vrtsim\n", ru->idx, ret);
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LOG_I(PHY, "starting rfdevice\n");
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ret = openair0_device_load(&ru->rfdevice, &ru->openair0_cfg);
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AssertFatal(ret == 0, "RU %u: openair0_device_load() ret %d: cannot initialize rfdevice\n", ru->idx, ret);
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ret = ru->rfdevice.trx_start_func(&ru->rfdevice);
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AssertFatal(ret == 0, "RU %u: trx_start_func() ret %d: cannot start vrtsim\n", ru->idx, ret);
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AssertFatal(ret == 0, "RU %u: trx_start_func() ret %d: cannot start rfdevice\n", ru->idx, ret);
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threadCreate(&oru.north_read_thread, oru_north_read_thread, (void *)&oru, "north_read_thread", -1, OAI_PRIORITY_RT_MAX);
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threadCreate(&oru.south_read_thread, oru_south_read_thread, (void *)&oru, "south_read_thread", -1, OAI_PRIORITY_RT_MAX);
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@@ -326,25 +326,23 @@ void oru_init_frame_parms(ORU_t *oru)
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for (int n = 0; n < numb_slots_frame; n++) {
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int s = 0;
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int p = n % numb_slots_period;
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nfapi_nr_max_tdd_periodicity_t *periodicity = &ru->config.tdd_table.max_tdd_periodicity_list[n];
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periodicity->max_num_of_symbol_per_slot_list =
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malloc(sizeof(*periodicity->max_num_of_symbol_per_slot_list) * NR_SYMBOLS_PER_SLOT);
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nfapi_nr_max_num_of_symbol_per_slot_t *symbol_list = periodicity->max_num_of_symbol_per_slot_list;
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if (p < oru->num_DL_slots) {
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ru->config.tdd_table.max_tdd_periodicity_list[n].max_num_of_symbol_per_slot_list =
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malloc(sizeof(*ru->config.tdd_table.max_tdd_periodicity_list[n].max_num_of_symbol_per_slot_list) * NR_SYMBOLS_PER_SLOT);
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for (s = 0; s < 14; s++)
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ru->config.tdd_table.max_tdd_periodicity_list[n].max_num_of_symbol_per_slot_list[s].slot_config.value = 0;
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symbol_list[s].slot_config.value = 0;
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} else if (p == oru->num_DL_slots) {
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ru->config.tdd_table.max_tdd_periodicity_list[n].max_num_of_symbol_per_slot_list =
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malloc(sizeof(*ru->config.tdd_table.max_tdd_periodicity_list[n].max_num_of_symbol_per_slot_list) * NR_SYMBOLS_PER_SLOT);
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for (s = 0; s < oru->num_DL_symbols; s++)
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ru->config.tdd_table.max_tdd_periodicity_list[n].max_num_of_symbol_per_slot_list[s].slot_config.value = 0;
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symbol_list[s].slot_config.value = 0;
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for (; s < NR_SYMBOLS_PER_SLOT - oru->num_UL_symbols; s++)
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ru->config.tdd_table.max_tdd_periodicity_list[n].max_num_of_symbol_per_slot_list[s].slot_config.value = 2;
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symbol_list[s].slot_config.value = 2;
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for (; s < NR_SYMBOLS_PER_SLOT; s++)
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ru->config.tdd_table.max_tdd_periodicity_list[n].max_num_of_symbol_per_slot_list[s].slot_config.value = 1;
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symbol_list[s].slot_config.value = 1;
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} else {
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ru->config.tdd_table.max_tdd_periodicity_list[n].max_num_of_symbol_per_slot_list =
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malloc(sizeof(*ru->config.tdd_table.max_tdd_periodicity_list[n].max_num_of_symbol_per_slot_list) * NR_SYMBOLS_PER_SLOT);
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for (s = 0; s < NR_SYMBOLS_PER_SLOT; s++)
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ru->config.tdd_table.max_tdd_periodicity_list[n].max_num_of_symbol_per_slot_list[s].slot_config.value = 1;
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symbol_list[s].slot_config.value = 1;
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}
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}
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}
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@@ -352,23 +350,19 @@ void oru_init_frame_parms(ORU_t *oru)
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void fft_and_cp_insertion(NR_DL_FRAME_PARMS *fp, c16_t *txdataF, c16_t *txdata, int slot, int symbol)
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{
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if (fp->Ncp == 1) {
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PHY_ofdm_mod((int *)txdataF, (int *)txdata, fp->ofdm_symbol_size, 1, fp->nb_prefix_samples, CYCLIC_PREFIX);
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} else {
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int nb_prefix_samples = fp->nb_prefix_samples;
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if (fp->Ncp != 1) {
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if (fp->numerology_index != 0) {
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if (!(slot % (fp->slots_per_subframe / 2)) && (symbol == 0)) {
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PHY_ofdm_mod((int *)txdataF, (int *)txdata, fp->ofdm_symbol_size, 1, fp->nb_prefix_samples0, CYCLIC_PREFIX);
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} else {
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PHY_ofdm_mod((int *)txdataF, (int *)txdata, fp->ofdm_symbol_size, 1, fp->nb_prefix_samples, CYCLIC_PREFIX);
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nb_prefix_samples = fp->nb_prefix_samples0;
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}
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} else {
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if (symbol % 0x7) {
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PHY_ofdm_mod((int *)txdataF, (int *)txdata, fp->ofdm_symbol_size, 1, fp->nb_prefix_samples, CYCLIC_PREFIX);
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} else {
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PHY_ofdm_mod((int *)txdataF, (int *)txdata, fp->ofdm_symbol_size, 1, fp->nb_prefix_samples0, CYCLIC_PREFIX);
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if (symbol % 0x7 == 0) {
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nb_prefix_samples = fp->nb_prefix_samples0;
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}
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}
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}
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PHY_ofdm_mod((int *)txdataF, (int *)txdata, fp->ofdm_symbol_size, 1, nb_prefix_samples, CYCLIC_PREFIX);
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}
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static void dl_symbol_process(RU_t *ru, int frame, int slot, int symbol, c16_t **txDataF, int64_t timestamp)
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@@ -64,4 +64,6 @@ void init_eNB_afterRU(void);
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void init_pdcp(void);
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void fill_rf_config(RU_t *ru, char *rf_config_file);
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#endif
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@@ -147,19 +147,6 @@ int openair0_transport_load(openair0_device_t *device, openair0_config_t *openai
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return rc;
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}
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int openair0_load(openair0_device_t *device, char *name, openair0_config_t *openair0_cfg, eth_params_t *eth_params)
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{
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loader_shlibfunc_t shlib_fdesc[1];
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int ret = 0;
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shlib_fdesc[0].fname = eth_params == NULL ? "device_init" : "transport_init";
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ret = load_module_shlib(name, shlib_fdesc, 1, NULL);
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AssertFatal((ret >= 0), "Library %s couldn't be loaded\n", name);
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return ((devfunc_t)shlib_fdesc[0].fptr)(device, openair0_cfg, eth_params);
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}
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static void writerEnqueue(re_order_t *ctx, openair0_timestamp_t timestamp, void **txp, int nsamps, int nbAnt, int flags)
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{
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pthread_mutex_lock(&ctx->mutex_store);
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@@ -638,7 +638,6 @@ const char *get_devname(int devtype);
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int openair0_device_load(openair0_device_t *device, openair0_config_t *openair0_cfg);
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/*! \brief Initialize transport protocol . It returns 0 if OK */
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int openair0_transport_load(openair0_device_t *device, openair0_config_t *openair0_cfg, eth_params_t *eth_params);
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int openair0_load(openair0_device_t *device, char *name, openair0_config_t *openair0_cfg, eth_params_t *eth_params);
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/*! \brief Set RX frequencies
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* \param device the hardware to use
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@@ -0,0 +1,266 @@
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# SPDX-License-Identifier: LicenseRef-CSSL-1.0
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Active_gNBs = ( "gNB-OAI");
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# Asn1_verbosity, choice in: none, info, annoying
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Asn1_verbosity = "none";
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gNBs =
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(
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{
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////////// Identification parameters:
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gNB_ID = 0xe00;
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gNB_name = "gNB-OAI";
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// Tracking area code, 0x0000 and 0xfffe are reserved values
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tracking_area_code = 1;
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plmn_list = ({ mcc = 208; mnc = 99; mnc_length = 2; snssaiList = ({ sst = 1; }) });
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nr_cellid = 12345678L;
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////////// Physical parameters:
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pdsch_AntennaPorts_N1 = 1;
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maxMIMO_layers = 1;
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min_rxtxtime = 6;
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servingCellConfigCommon = (
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{
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#spCellConfigCommon
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physCellId = 0;
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# n_TimingAdvanceOffset = 0;
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# downlinkConfigCommon
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#frequencyInfoDL
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# center frequency = 4049.76 MHz
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# selected SSB frequency = 4049.76 MHz
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absoluteFrequencySSB = 669984;
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dl_frequencyBand = 77;
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# frequency point A = 4030.68 MHz
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dl_absoluteFrequencyPointA = 668712;
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#scs-SpecificCarrierList
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dl_offstToCarrier = 0;
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# subcarrierSpacing
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# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
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dl_subcarrierSpacing = 1;
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dl_carrierBandwidth = 106;
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#initialDownlinkBWP
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#genericParameters
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initialDLBWPlocationAndBandwidth = 28875; #38.101-1 Table 5.3.2-1
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#
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# subcarrierSpacing
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# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
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initialDLBWPsubcarrierSpacing = 1;
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#pdcch-ConfigCommon
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initialDLBWPcontrolResourceSetZero = 11;
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initialDLBWPsearchSpaceZero = 0;
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#uplinkConfigCommon
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#frequencyInfoUL
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ul_frequencyBand = 77;
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#scs-SpecificCarrierList
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ul_offstToCarrier = 0;
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# subcarrierSpacing
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# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
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ul_subcarrierSpacing = 1;
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ul_carrierBandwidth = 106;
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pMax = 23;
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#initialUplinkBWP
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#genericParameters
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initialULBWPlocationAndBandwidth = 28875;
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# subcarrierSpacing
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# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
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initialULBWPsubcarrierSpacing = 1;
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#rach-ConfigCommon
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#rach-ConfigGeneric
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prach_ConfigurationIndex = 157;
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#prach_msg1_FDM
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#0 = one, 1=two, 2=four, 3=eight
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prach_msg1_FDM = 0;
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prach_msg1_FrequencyStart = 0;
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zeroCorrelationZoneConfig = 0;
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preambleReceivedTargetPower = -100;
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#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
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preambleTransMax = 7;
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#powerRampingStep
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# 0=dB0,1=dB2,2=dB4,3=dB6
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powerRampingStep = 2;
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#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
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#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen
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ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4;
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#one (0..15) 4,8,12,16,...60,64
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ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15;
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#ra_ContentionResolutionTimer
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#(0..7) 8,16,24,32,40,48,56,64
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ra_ContentionResolutionTimer = 7;
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rsrp_ThresholdSSB = 19;
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#prach-RootSequenceIndex_PR
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#1 = 839, 2 = 139
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prach_RootSequenceIndex_PR = 2;
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prach_RootSequenceIndex = 1;
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# SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
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#
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msg1_SubcarrierSpacing = 1,
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# restrictedSetConfig
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# 0=unrestricted, 1=restricted type A, 2=restricted type B
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restrictedSetConfig = 0,
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# this is the offset between the last PRACH preamble power and the Msg3 PUSCH, 2 times the field value in dB
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msg3_DeltaPreamble = 2;
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p0_NominalWithGrant = -100;
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# pucch-ConfigCommon setup :
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# pucchGroupHopping
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# 0 = neither, 1= group hopping, 2=sequence hopping
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pucchGroupHopping = 0;
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hoppingId = 0;
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p0_nominal = -96;
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ssb_PositionsInBurst_Bitmap = 0x1;
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# ssb_periodicityServingCell
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# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
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ssb_periodicityServingCell = 2;
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# dmrs_TypeA_position
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# 0 = pos2, 1 = pos3
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dmrs_TypeA_Position = 0;
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# subcarrierSpacing
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# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
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subcarrierSpacing = 1;
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#tdd-UL-DL-ConfigurationCommon
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# subcarrierSpacing
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# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
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referenceSubcarrierSpacing = 1;
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# pattern1
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# dl_UL_TransmissionPeriodicity
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# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
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dl_UL_TransmissionPeriodicity = 5;
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nrofDownlinkSlots = 3;
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nrofDownlinkSymbols = 6;
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nrofUplinkSlots = 1;
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nrofUplinkSymbols = 4;
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ssPBCH_BlockPower = 0;
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}
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);
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# ------- SCTP definitions
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SCTP :
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{
|
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# Number of streams to use in input/output
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SCTP_INSTREAMS = 2;
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SCTP_OUTSTREAMS = 2;
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};
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////////// AMF parameters:
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amf_ip_address = ({ ipv4 = "192.168.101.132"; });
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NETWORK_INTERFACES :
|
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{
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GNB_IPV4_ADDRESS_FOR_NG_AMF = "192.168.101.140";
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GNB_IPV4_ADDRESS_FOR_NGU = "192.168.101.140";
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GNB_PORT_FOR_NGU = 2152; # Spec 2152
|
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};
|
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}
|
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);
|
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|
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MACRLCs = (
|
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{
|
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tr_s_preference = "local_L1";
|
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tr_n_preference = "local_RRC";
|
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pusch_TargetSNRx10 = 200;
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pucch_TargetSNRx10 = 200;
|
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pusch_FailureThres = 100;
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}
|
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);
|
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L1s = (
|
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{
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num_cc = 1;
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tr_n_preference = "local_mac";
|
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prach_dtx_threshold = 110;
|
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pucch0_dtx_threshold = 80;
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pusch_dtx_threshold = -100;
|
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# thread_pool_size = 8;
|
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tx_amp_backoff_dB = 36;
|
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L1_rx_thread_core = -1;
|
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L1_tx_thread_core = -1;
|
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phase_compensation = 0; # needs to match O-RU configuration
|
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}
|
||||
);
|
||||
|
||||
RUs = (
|
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{
|
||||
local_rf = "no";
|
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nb_tx = 1;
|
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nb_rx = 1;
|
||||
att_tx = 0;
|
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att_rx = 0;
|
||||
bands = [77];
|
||||
max_pdschReferenceSignalPower = -27;
|
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max_rxgain = 75;
|
||||
sf_extension = 0;
|
||||
eNB_instances = [0];
|
||||
sl_ahead = 5;
|
||||
tr_preference = "raw_if4p5"; # important: activate FHI7.2
|
||||
do_precoding = 0; # needs to match O-RU configuration
|
||||
}
|
||||
);
|
||||
|
||||
security = {
|
||||
# preferred ciphering algorithms
|
||||
# the first one of the list that an UE supports in chosen
|
||||
# valid values: nea0, nea1, nea2, nea3
|
||||
ciphering_algorithms = ( "nea0" );
|
||||
|
||||
# preferred integrity algorithms
|
||||
# the first one of the list that an UE supports in chosen
|
||||
# valid values: nia0, nia1, nia2, nia3
|
||||
integrity_algorithms = ( "nia2", "nia0" );
|
||||
|
||||
# setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter
|
||||
# what 'ciphering_algorithms' configures; same thing for 'drb_integrity'
|
||||
drb_ciphering = "yes";
|
||||
drb_integrity = "no";
|
||||
};
|
||||
|
||||
log_config :
|
||||
{
|
||||
global_log_level = "info";
|
||||
hw_log_level = "info";
|
||||
phy_log_level = "info";
|
||||
mac_log_level = "info";
|
||||
rlc_log_level = "info";
|
||||
pdcp_log_level = "info";
|
||||
rrc_log_level = "info";
|
||||
ngap_log_level = "info";
|
||||
f1ap_log_level = "info";
|
||||
};
|
||||
|
||||
fhi_72 = {
|
||||
dpdk_devices = ("0000:05:02.2", "0000:05:02.3"); # one VF can be used as well
|
||||
dpdk_iova_mode = "VA";
|
||||
system_core = 7;
|
||||
io_core = 8;
|
||||
worker_cores = (9);
|
||||
ru_addr = ("00:11:22:33:64:66", "00:11:22:33:64:67");
|
||||
mtu = 9600;
|
||||
fh_config = ({
|
||||
T1a_cp_dl = (285, 470);
|
||||
T1a_cp_ul = (285, 429);
|
||||
T1a_up = (300, 450);
|
||||
Ta4 = (900, 950);
|
||||
ru_config = {
|
||||
iq_width = 16;
|
||||
iq_width_prach = 16;
|
||||
};
|
||||
prach_config = {
|
||||
kbar = 0;
|
||||
};
|
||||
});
|
||||
};
|
||||
@@ -0,0 +1,55 @@
|
||||
# SPDX-License-Identifier: LicenseRef-CSSL-1.0
|
||||
|
||||
ORUs = (
|
||||
{
|
||||
tx_bw = [106];
|
||||
rx_bw = [106];
|
||||
carrier_tx = [4049760];
|
||||
carrier_rx = [4049760];
|
||||
prach_config_index = 157;
|
||||
prach_msg1_start = 0;
|
||||
tdd_period = 5;
|
||||
num_dl_slots = 3;
|
||||
num_dl_symbols = 6;
|
||||
num_ul_slots = 1;
|
||||
num_ul_symbols = 4;
|
||||
numerology = 1;
|
||||
fronthaul = {
|
||||
dpdk_devices = ("0000:05:02.0", "0000:05:02.1"); # one VF can be used as well
|
||||
rx_core = 25;
|
||||
du_mac_addr = ("00:11:22:33:64:68", "00:11:22:33:64:69");
|
||||
mtu = 9216;
|
||||
T2a_up = (300, 1200);
|
||||
T2a_cp = (285, 1200);
|
||||
prach_eaxc_offset = 1;
|
||||
extra_eal_args = ("--file-prefix", "ru");
|
||||
}
|
||||
});
|
||||
|
||||
RUs = (
|
||||
{
|
||||
local_rf = "no";
|
||||
nb_tx = 1;
|
||||
nb_rx = 1;
|
||||
att_tx = 0;
|
||||
att_rx = 0;
|
||||
bands = [77];
|
||||
max_pdschReferenceSignalPower = -27;
|
||||
max_rxgain = 75;
|
||||
sf_extension = 0;
|
||||
eNB_instances = [0];
|
||||
sl_ahead = 5;
|
||||
tr_preference = "raw_if4p5"; # important: activate FHI7.2
|
||||
do_precoding = 0; # needs to match O-RU configuration
|
||||
# PRACH configuration
|
||||
num_tp_cores = 4;
|
||||
tp_cores = [-1,-1,-1,-1];
|
||||
});
|
||||
|
||||
|
||||
log_config :
|
||||
{
|
||||
global_log_level = "info";
|
||||
hw_log_level = "info";
|
||||
phy_log_level = "info";
|
||||
};
|
||||
Reference in New Issue
Block a user