Fix the PRACH FFT size for 7.2 interface

We assumed that PRACH FFT size is equivalent to PxSCH FFT size.

However, the parameter ru_config->fftSize is used for the C-plane Section Type 3
which is dedicated for PRACH and mixed numerology.
Based on the PRACH format, short or long, the PRACH values 256 or 1024
shall be filled.

Co-authored-by: knopp <raymond.knopp@eurecom.fr>
This commit is contained in:
Teodora
2025-12-09 12:43:16 +01:00
parent 479be40b30
commit 7fe34d779b
4 changed files with 8 additions and 5 deletions

View File

@@ -896,6 +896,7 @@ static void fill_split7_2_config(split7_config_t *split7, const nfapi_nr_config_
}
}
split7->prach_fftSize = prach_config->prach_sequence_length.value == 0 ? 10 : 8; // need to handle 5kHz cases better than this
split7->fftSize = log2(fp->ofdm_symbol_size);
// M-plane related parameters

View File

@@ -199,6 +199,8 @@ typedef struct split7_config {
/*! this is the exponent in 2^X for the FFT size */
uint16_t fftSize;
/*! this is the ceil of the exponent in 2^X for the prach FFT size */
uint16_t prach_fftSize;
// M-plane related parameters
uint16_t dl_k0[5];
uint16_t ul_k0[5];

View File

@@ -338,7 +338,7 @@ int xran_fh_rx_read_slot(ru_info_t *ru, int *frame, int *slot)
const struct xran_fh_init *fh_init = get_xran_fh_init();
int nPRBs = fh_cfg->nULRBs;
int fftsize = 1 << fh_cfg->ru_conf.fftSize;
int fftsize = 1 << fh_cfg->nULFftSize;
int slot_offset_rxdata = 3 & (*slot);
uint32_t slot_size = 4 * 14 * fftsize;
@@ -496,7 +496,7 @@ int xran_fh_tx_send_slot(ru_info_t *ru, int frame, int slot, uint64_t timestamp)
const struct xran_fh_init *fh_init = get_xran_fh_init();
const struct xran_fh_config *fh_cfg = get_xran_fh_config(0);
int nPRBs = fh_cfg->nDLRBs;
int fftsize = 1 << fh_cfg->ru_conf.fftSize;
int fftsize = 1 << fh_cfg->nDLFftSize;
int nb_tx_per_ru = ru->nb_tx / fh_init->xran_ports;
int nb_rx_per_ru = ru->nb_rx / fh_init->xran_ports;

View File

@@ -921,8 +921,8 @@ static bool set_fh_config(void *mplane_api, int ru_idx, int num_rus, enum xran_c
fh_config->neAxc = RTE_MAX(oai0->tx_num_channels / num_rus, oai0->rx_num_channels / num_rus); // number of eAxc supported on one CC = max(PDSCH, PUSCH)
fh_config->neAxcUl = 0; // number of eAxc supported on one CC for UL direction = PUSCH; used only if XRAN_CATEGORY_B
fh_config->nAntElmTRx = 0; // number of antenna elements for TX and RX = SRS; used only if XRAN_CATEGORY_B
fh_config->nDLFftSize = 0; // DL FFT size; not used in xran
fh_config->nULFftSize = 0; // UL FFT size; not used in xran
fh_config->nDLFftSize = oai0->split7.fftSize; // DL FFT size; not used in xran
fh_config->nULFftSize = oai0->split7.fftSize; // UL FFT size; not used in xran
fh_config->nDLRBs = oai0->num_rb_dl; // DL PRB; used in oaioran.c/oran-init.c; not used in xran, neither in E nor in F release
fh_config->nULRBs = oai0->num_rb_dl; // UL PRB; used in oaioran.c/oran-init.c; in xran E release not used so the patch fixes it, but in xran F release this value is properly used
fh_config->nDLAbsFrePointA = 0; // Abs Freq Point A of the Carrier Center Frequency for in KHz Value; not used in xran
@@ -966,7 +966,7 @@ static bool set_fh_config(void *mplane_api, int ru_idx, int num_rus, enum xran_c
// fh_config->srs_conf = {0};
if (!set_fh_frame_config(oai0, &fh_config->frame_conf))
return false;
if (!set_fh_ru_config(mplane_api, rup, oai0->split7.fftSize, nru, xran_cat, &fh_config->ru_conf))
if (!set_fh_ru_config(mplane_api, rup, oai0->split7.prach_fftSize, nru, xran_cat, &fh_config->ru_conf))
return false;
fh_config->bbdev_enc = NULL; // call back to poll BBDev encoder