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13 Commits

Author SHA1 Message Date
Robert Schmidt
02841ba05a TODO address 2026-02-07 09:25:23 +01:00
Robert Schmidt
4b33d4a062 NR_gNB_DLSCH => txdataF 2026-02-07 09:25:22 +01:00
Robert Schmidt
c3abf1d7ba do_one_dlsch() 2026-02-07 09:25:22 +01:00
Robert Schmidt
f64705b881 nr_codeword_scrambling() const 2026-02-07 09:25:21 +01:00
Robert Schmidt
77ec06fd28 nr_dlsch_encoding 2026-02-07 09:25:21 +01:00
Robert Schmidt
37d4ac017f simplify DLSCH stats handling 2026-02-07 09:25:20 +01:00
Robert Schmidt
31c8862332 Simplify do_txdataF 2026-02-07 09:25:19 +01:00
Robert Schmidt
ef0161a8a4 TODO: nr_generate_pdsch() 2026-02-07 09:25:19 +01:00
Robert Schmidt
a8ca3bc6b0 nr_generate_csi_rs_gNB 2026-02-07 09:25:18 +01:00
Robert Schmidt
df221933c5 nr_common_signal_procedures() + const 2026-02-07 09:25:16 +01:00
Robert Schmidt
b6fef0cc86 nr_generate_pbch() 2026-02-07 09:24:49 +01:00
Robert Schmidt
9b09504285 Fix: pre-select txdataF beam. This does not work, each DCI says which beam, independently 2026-02-07 09:24:45 +01:00
Robert Schmidt
ae7af7b704 nr_generate_dci() 2026-02-05 14:45:36 +01:00
215 changed files with 3733 additions and 10389 deletions

View File

@@ -24,38 +24,6 @@ project (OpenAirInterface LANGUAGES C CXX)
set(CMAKE_CXX_STANDARD 17)
set(OAI_VERSION 2.4.0)
option(CUDA_ENABLE "Enable CUDA accelerated channel simulation" OFF)
if(CUDA_ENABLE)
find_package(CUDA REQUIRED)
find_package(CUDAToolkit REQUIRED)
message(STATUS "CUDA explicitly enabled, building with GPU acceleration support.")
enable_language(CUDA)
if(CMAKE_SYSTEM_PROCESSOR STREQUAL "aarch64")
set(CMAKE_CUDA_ARCHITECTURES 90)
endif()
option(USE_UNIFIED_MEMORY "Enable CUDA Unified Memory path" OFF)
option(USE_ATS_MEMORY "Enable ATS Hybrid Memory path" ON)
if(USE_UNIFIED_MEMORY AND USE_ATS_MEMORY)
message(FATAL_ERROR "Cannot enable both USE_UNIFIED_MEMORY and USE_ATS_MEMORY at the same time.")
endif()
if(USE_UNIFIED_MEMORY)
add_compile_definitions(USE_UNIFIED_MEMORY)
message(STATUS "CUDA Unified Memory path enabled.")
elseif(USE_ATS_MEMORY)
add_compile_definitions(USE_ATS_MEMORY)
message(STATUS "CUDA ATS Hybrid Memory path enabled.")
else()
message(STATUS "CUDA Explicit Copy path enabled (default ATS was overridden).")
endif()
add_compile_definitions(ENABLE_CUDA)
endif()
#########################################################
# Base directories, compatible with legacy OAI building #
#########################################################
@@ -198,8 +166,6 @@ elseif (CMAKE_SYSTEM_PROCESSOR STREQUAL "aarch64")
set(C_FLAGS_PROCESSOR "${C_FLAGS_PROCESSOR} -gdwarf-2 -mcpu=neoverse-n1 -lgcc -lrt")
elseif (CPUPART MATCHES "0xd49") # Neoverse-N2
set(C_FLAGS_PROCESSOR "${C_FLAGS_PROCESSOR} -gdwarf-2 -mcpu=neoverse-n2 -ftree-vectorize -lgcc -lrt")
elseif (CPUPART MATCHES "0xd03") # Cortex-A53
set(C_FLAGS_PROCESSOR "${C_FLAGS_PROCESSOR} -gdwarf-2 -mcpu=cortex-a53 -lgcc -lrt")
else ()
set(C_FLAGS_PROCESSOR "${C_FLAGS_PROCESSOR} -gdwarf-2 -mcpu=native -lgcc -lrt")
endif()
@@ -208,12 +174,7 @@ else()
endif()
if (NOT CROSS_COMPILE)
if (CPUPART MATCHES "0xd03")
# Cortex-A53 does not support ARMv8.2-A extensions
set(C_FLAGS_PROCESSOR "${C_FLAGS_PROCESSOR} -march=armv8-a+simd")
else()
set(C_FLAGS_PROCESSOR "${C_FLAGS_PROCESSOR} -march=native")
endif()
set(C_FLAGS_PROCESSOR "${C_FLAGS_PROCESSOR} -march=native")
else ()
set(C_FLAGS_PROCESSOR "${C_FLAGS_PROCESSOR} -march=armv8.2-a")
endif()
@@ -321,22 +282,6 @@ if(GIT_FOUND)
)
endif()
option(USE_UNIFIED_MEMORY "Enable CUDA Unified Memory path instead of explicit copies" OFF)
option(USE_ATS_MEMORY "Enable Hybrid ATS (CPU->GPU) and Explicit Copy (GPU->CPU) path" OFF)
if(USE_UNIFIED_MEMORY AND USE_ATS_MEMORY)
message(FATAL_ERROR "Cannot enable both USE_UNIFIED_MEMORY and USE_ATS_MEMORY at the same time.")
endif()
if(USE_UNIFIED_MEMORY)
add_compile_definitions(USE_UNIFIED_MEMORY)
message(STATUS "CUDA Unified Memory path enabled.")
elseif(USE_ATS_MEMORY)
add_compile_definitions(USE_ATS_MEMORY)
message(STATUS "CUDA ATS Hybrid Memory path enabled.")
endif()
# Debug related options
#########################################
# asn1c skeletons have hardcoded this flag to make customized debug logs
@@ -352,7 +297,7 @@ add_boolean_option(TRACY_ENABLE OFF "Enable tracy instrumentation" ON)
if (TRACY_ENABLE)
# the tracy version here should match the tracy server version
# below is latest release as of this commit
CPMAddPackage("gh:wolfpld/tracy#v0.13.1")
CPMAddPackage("gh:wolfpld/tracy#0.12.2")
endif()
set (OCP_ITTI ${OPENAIR_DIR}/common/utils/ocp_itti)
@@ -397,7 +342,7 @@ target_link_libraries(lte_rrc PRIVATE nr_rrc)
#NR RRC
#######
add_library(nr_rrc ${OPENAIR2_DIR}/RRC/NR/MESSAGES/asn1_msg.c)
target_link_libraries(nr_rrc PUBLIC asn1_nr_rrc asn1_lte_rrc rrc_cell_management)
target_link_libraries(nr_rrc PUBLIC asn1_nr_rrc asn1_lte_rrc)
# S1AP
##############
@@ -532,7 +477,7 @@ add_library(f1ap
${F1AP_DIR}/f1ap_itti_messaging.c)
target_include_directories(f1ap PUBLIC F1AP_DIR)
target_link_libraries(f1ap PUBLIC asn1_f1ap GTPV1U)
target_link_libraries(f1ap PRIVATE ngap nr_rrc ds f1ap_lib)
target_link_libraries(f1ap PRIVATE ngap nr_rrc HASHTABLE f1ap_lib)
target_include_directories(f1ap PRIVATE ${F1AP_DIR}/lib)
if(E2_AGENT)
target_compile_definitions(f1ap PRIVATE E2_AGENT)
@@ -570,6 +515,8 @@ target_link_libraries(params_libconfig PRIVATE config_internals ${libconfig_LIBR
add_library(shlib_loader OBJECT common/utils/load_module_shlib.c)
target_link_libraries(shlib_loader PRIVATE CONFIG_LIB)
include_directories ("${OPENAIR_DIR}/radio/COMMON")
##############################################################
# ???!!! TO BE DOCUMENTED OPTIONS !!!???
##############################################################
@@ -670,6 +617,12 @@ include_directories(${CMAKE_CURRENT_SOURCE_DIR}/common/utils/T
# set the T_LIB name to T if the target exists, otherwise leave empty
set(T_LIB $<TARGET_NAME_IF_EXISTS:T>)
add_library(HASHTABLE
${OPENAIR_DIR}/common/utils/hashtable/hashtable.c
${OPENAIR_DIR}/common/utils/hashtable/obj_hashtable.c
)
include_directories(${OPENAIR_DIR}/common/utils/hashtable)
add_library(UTIL
${OPENAIR_DIR}/common/utils/LOG/vcd_signal_dumper.c
${OPENAIR2_DIR}/UTIL/OPT/probe.c
@@ -827,6 +780,24 @@ include_directories(${NFAPI_USER_DIR})
# Layer 1
#############################
set(PHY_POLARSRC
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_init.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_bitwise_operations.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_crc_byte.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_decoder.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_decoding_tools.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_encoder.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_interleaving_pattern.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_kernal_operation.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_kronecker_power_matrices.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_matrix_and_array.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_procedures.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_sequence_pattern.c
)
set(PHY_SMALLBLOCKSRC
${OPENAIR1_DIR}/PHY/CODING/nrSmallBlock/encodeSmallBlock.c
${OPENAIR1_DIR}/PHY/CODING/nrSmallBlock/decodeSmallBlock.c
)
set(PHY_TURBOIF
${OPENAIR1_DIR}/PHY/CODING/coding_load.c
)
@@ -837,6 +808,8 @@ set(PHY_NRLDPC_CODINGIF
add_library(dfts MODULE ${OPENAIR1_DIR}/PHY/TOOLS/oai_dfts.c ${OPENAIR1_DIR}/PHY/TOOLS/oai_dfts_neon.c)
add_library(crc_byte OBJECT ${OPENAIR1_DIR}/PHY/CODING/crc_byte.c)
set(PHY_SRC_COMMON
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/dci_tools_common.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/lte_mcs.c
@@ -1005,6 +978,8 @@ set(PHY_SRC_UE
${OPENAIR1_DIR}/PHY/TOOLS/dB_routines.c
${OPENAIR1_DIR}/PHY/TOOLS/sqrt.c
${OPENAIR1_DIR}/PHY/TOOLS/oai_arith_operations.c
${PHY_POLARSRC}
${PHY_SMALLBLOCKSRC}
${PHY_NRLDPC_CODINGIF}
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/pucch_rx.c
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/srs_rx.c
@@ -1054,6 +1029,8 @@ set(PHY_SRC_UE
${OPENAIR1_DIR}/PHY/TOOLS/sqrt.c
${OPENAIR1_DIR}/PHY/TOOLS/oai_arith_operations.c
${OPENAIR1_DIR}/PHY/INIT/nr_init_ue.c
${PHY_POLARSRC}
${PHY_SMALLBLOCKSRC}
${PHY_NRLDPC_CODINGIF}
)
@@ -1087,14 +1064,14 @@ add_library(PHY_NR_COMMON ${PHY_NR_SRC_COMMON})
target_link_libraries(PHY_NR_COMMON PUBLIC UTIL)
add_library(PHY_NR ${PHY_NR_SRC})
target_link_libraries(PHY_NR nr_phy_common nr_common nr_fapi_p5 polar smallblock)
target_link_libraries(PHY_NR nr_phy_common nr_common nr_fapi_p5)
add_library(PHY_NR_NO_AVX_256 ${PHY_NR_SRC})
target_link_libraries(PHY_NR_NO_AVX_256 nr_phy_common nr_common)
target_compile_definitions(PHY_NR_NO_AVX_256 PUBLIC USE_128BIT)
add_library(PHY_NR_UE ${PHY_NR_UE_SRC})
target_link_libraries(PHY_NR_UE PRIVATE asn1_nr_rrc_hdrs nr_phy_common nr_common UTIL polar smallblock)
target_link_libraries(PHY_NR_UE PRIVATE asn1_nr_rrc_hdrs nr_phy_common nr_common UTIL)
add_library(PHY_RU ${PHY_SRC_RU})
target_link_libraries(PHY_RU PRIVATE asn1_lte_rrc_hdrs UTIL)
@@ -1224,7 +1201,6 @@ set(NR_L2_SRC_UE
${NR_UE_RRC_DIR}/L2_interface_ue.c
${NR_UE_RRC_DIR}/main_ue.c
${NR_UE_RRC_DIR}/rrc_UE.c
${NR_UE_RRC_DIR}/verify_RRC.c
${NR_UE_RRC_DIR}/rrc_timers_and_constants.c
${NR_UE_RRC_DIR}/rrc_sl_preconfig.c
)
@@ -1711,17 +1687,6 @@ set (SIMUSRC
add_library(SIMU STATIC ${SIMUSRC} )
target_include_directories(SIMU PUBLIC ${OPENAIR1_DIR}/SIMULATION/TOOLS ${OPENAIR1_DIR}/SIMULATION/RF)
option(CHANNEL_SSE "Enable SSE optimizations for channel simulation" OFF)
if(CHANNEL_SSE)
message(STATUS "SSE-optimized channel simulation enabled.")
target_compile_definitions(SIMU PRIVATE CHANNEL_SSE)
endif()
if(CUDA_FOUND)
set_property(TARGET SIMU PROPERTY CUDA_ARCHITECTURES ${CMAKE_CUDA_ARCHITECTURES})
set_property(TARGET SIMU PROPERTY LINKER_LANGUAGE CXX)
endif()
include_directories("${NFAPI_DIR}/nfapi/public_inc")
include_directories("${NFAPI_DIR}/common/public_inc")
include_directories("${NFAPI_DIR}/pnf/public_inc")
@@ -1752,9 +1717,12 @@ add_executable(lte-softmodem
${OPENAIR_DIR}/executables/lte-ru.c
${OPENAIR_DIR}/executables/ru_control.c
${OPENAIR_DIR}/executables/lte-softmodem.c
${OPENAIR_DIR}/executables/softmodem-common.c
${OPENAIR2_DIR}/ENB_APP/NB_IoT_interface.c
${OPENAIR_DIR}/executables/create_tasks.c
${OPENAIR_DIR}/executables/create_tasks_mbms.c
${OPENAIR_DIR}/radio/COMMON/common_lib.c
${OPENAIR_DIR}/radio/COMMON/record_player.c
${OPENAIR3_DIR}/NAS/UE/nas_ue_task.c
${PHY_INTERFACE_DIR}/queue_t.c
${OPENAIR_DIR}/common/utils/lte/ue_power.c
@@ -1765,9 +1733,9 @@ add_dependencies(lte-softmodem oai_iqplayer)
target_link_libraries(lte-softmodem PRIVATE
-Wl,--start-group
lte_rrc nr_rrc s1ap m2ap x2ap m3ap GTPV1U SECURITY UTIL SCTP_CLIENT MME_APP SCHED_LIB SCHED_RU_LIB
lte_rrc nr_rrc s1ap m2ap x2ap m3ap GTPV1U SECURITY UTIL HASHTABLE SCTP_CLIENT MME_APP SCHED_LIB SCHED_RU_LIB
PHY_COMMON PHY PHY_RU L2 L2_LTE NFAPI_LIB NFAPI_VNF_LIB NFAPI_PNF_LIB NFAPI_USER_LIB MISC_NFAPI_LTE_LIB
${NAS_UE_LIB} ITTI SIMU radio_common softmodem_common
${NAS_UE_LIB} ITTI SIMU shlib_loader
-Wl,--end-group z dl)
target_link_libraries(lte-softmodem PRIVATE pthread m CONFIG_LIB rt)
@@ -1783,13 +1751,16 @@ endif()
add_executable(oairu
${OPENAIR_DIR}/executables/lte-ru.c
${OPENAIR_DIR}/executables/ru_control.c
${OPENAIR_DIR}/radio/COMMON/common_lib.c
${OPENAIR_DIR}/radio/COMMON/record_player.c
${OPENAIR_DIR}/executables/softmodem-common.c
${OPENAIR_DIR}/openair1/SCHED/phy_procedures_lte_common.c
${OPENAIR_DIR}/executables/main_ru.c
${OPENAIR_DIR}/common/utils/lte/prach_utils.c
)
target_link_libraries(oairu PRIVATE
-Wl,--start-group
SCHED_RU_LIB PHY_COMMON PHY_RU UTIL radio_common softmodem_common
SCHED_RU_LIB PHY_COMMON PHY_RU UTIL shlib_loader
-Wl,--end-group z dl)
target_link_libraries(oairu PRIVATE pthread m CONFIG_LIB rt ${T_LIB})
@@ -1806,7 +1777,10 @@ target_link_libraries(lte-softmodem PRIVATE
add_executable(lte-uesoftmodem
${OPENAIR_DIR}/executables/lte-ue.c
${OPENAIR_DIR}/executables/lte-uesoftmodem.c
${OPENAIR_DIR}/executables/softmodem-common.c
${OPENAIR_DIR}/executables/create_tasks_ue.c
${OPENAIR_DIR}/radio/COMMON/common_lib.c
${OPENAIR_DIR}/radio/COMMON/record_player.c
${OPENAIR3_DIR}/NAS/UE/nas_ue_task.c
${OPENAIR_DIR}/common/utils/lte/ue_power.c
${OPENAIR_DIR}/common/utils/lte/prach_utils.c
@@ -1816,9 +1790,9 @@ add_executable(lte-uesoftmodem
target_link_libraries(lte-uesoftmodem PRIVATE
-Wl,--start-group
lte_rrc nr_rrc s1ap x2ap m2ap m3ap
SECURITY UTIL SCTP_CLIENT MME_APP SCHED_RU_LIB SCHED_UE_LIB PHY_COMMON
SECURITY UTIL HASHTABLE SCTP_CLIENT MME_APP SCHED_RU_LIB SCHED_UE_LIB PHY_COMMON
PHY_UE PHY_RU L2_UE L2_LTE SIMU NFAPI_LIB NFAPI_PNF_LIB NFAPI_USER_LIB MISC_NFAPI_LTE_LIB
${NAS_UE_LIB} ITTI radio_common softmodem_common
${NAS_UE_LIB} ITTI shlib_loader
-Wl,--end-group z dl)
target_link_libraries(lte-uesoftmodem PRIVATE pthread m CONFIG_LIB rt)
@@ -1837,11 +1811,13 @@ add_executable(nr-oru
${OPENAIR_DIR}/openair1/SCHED_NR/phy_frame_config_nr.c
${OPENAIR_DIR}/openair1/SCHED_NR/nr_prach_procedures.c
${OPENAIR_DIR}/openair1/SCHED/phy_procedures_lte_common.c
${OPENAIR_DIR}/radio/COMMON/common_lib.c
${OPENAIR_DIR}/radio/COMMON/record_player.c
${OPENAIR_DIR}/executables/softmodem-common.c
${OPENAIR_DIR}/executables/main_nr_ru.c
)
target_link_libraries(nr-oru PRIVATE
UTIL SCHED_RU_LIB PHY_COMMON PHY_RU PHY_NR shlib_loader z dl
radio_common softmodem_common)
UTIL SCHED_RU_LIB PHY_COMMON PHY_RU PHY_NR shlib_loader z dl)
target_link_libraries(nr-oru PRIVATE pthread m CONFIG_LIB rt ${T_LIB} utils
barrier actor)
target_link_libraries(nr-oru PRIVATE asn1_nr_rrc_hdrs asn1_lte_rrc_hdrs nr_phy_common time_management)
@@ -1856,6 +1832,9 @@ add_executable(nr-softmodem
${OPENAIR_DIR}/executables/nr-gnb.c
${OPENAIR_DIR}/executables/nr-ru.c
${OPENAIR_DIR}/executables/nr-softmodem.c
${OPENAIR_DIR}/executables/softmodem-common.c
${OPENAIR_DIR}/radio/COMMON/common_lib.c
${OPENAIR_DIR}/radio/COMMON/record_player.c
${OPENAIR_DIR}/common/utils/lte/ue_power.c
${OPENAIR_DIR}/common/utils/lte/prach_utils.c
${PHY_INTERFACE_DIR}/queue_t.c
@@ -1864,11 +1843,11 @@ add_executable(nr-softmodem
target_link_libraries(nr-softmodem PRIVATE
-Wl,--start-group
UTIL SCTP_CLIENT SCHED_LIB SCHED_RU_LIB SCHED_NR_LIB PHY_NR PHY PHY_COMMON PHY_NR_COMMON PHY_RU GTPV1U SECURITY
UTIL HASHTABLE SCTP_CLIENT SCHED_LIB SCHED_RU_LIB SCHED_NR_LIB PHY_NR PHY PHY_COMMON PHY_NR_COMMON PHY_RU GTPV1U SECURITY
ITTI ${NAS_UE_LIB} lte_rrc nr_rrc
ngap s1ap L2_LTE_NR L2_NR MAC_NR_COMMON NFAPI_LIB NFAPI_VNF_LIB NFAPI_PNF_LIB NFAPI_USER_LIB SIMU
x2ap f1ap m2ap m3ap e1ap radio_common
time_management softmodem_common
x2ap f1ap m2ap m3ap e1ap shlib_loader
time_management
-Wl,--end-group z dl)
target_link_libraries(nr-softmodem PRIVATE pthread m CONFIG_LIB rt)
@@ -1898,6 +1877,7 @@ target_link_libraries(nr-softmodem PRIVATE
add_executable(nr-cuup
executables/nr-cuup.c
executables/softmodem-common.c
${NR_RRC_DIR}/rrc_gNB_UE_context.c
${OPENAIR2_DIR}/E1AP/e1ap_setup.c
${NR_PDCP_SRC}
@@ -1907,9 +1887,9 @@ add_executable(nr-cuup
target_link_libraries(nr-cuup PRIVATE
CONFIG_LIB ITTI SCTP_CLIENT
GTPV1U e1ap f1ap
time_management softmodem_common
time_management
alg
z dl pthread ${T_LIB})
z dl pthread shlib_loader ${T_LIB})
target_link_libraries(nr-cuup PRIVATE asn1_lte_rrc_hdrs asn1_nr_rrc_hdrs)
if(E2_AGENT)
target_link_libraries(nr-cuup PRIVATE e2_agent e2_agent_arg e2_ran_func_cuup)
@@ -1926,6 +1906,11 @@ add_executable(nr-uesoftmodem
${OPENAIR_DIR}/executables/position_interface.c
${OPENAIR_DIR}/executables/nr-ue.c
${OPENAIR_DIR}/executables/nr-ue-ru.c
${OPENAIR_DIR}/executables/softmodem-common.c
${OPENAIR_DIR}/radio/COMMON/common_lib.c
${OPENAIR_DIR}/radio/COMMON/record_player.c
${OPENAIR2_DIR}/LAYER2/NR_MAC_COMMON/nr_mac_common.c
${OPENAIR2_DIR}/LAYER2/NR_MAC_COMMON/nr_mac_common_tdd.c
${OPENAIR1_DIR}/PHY/TOOLS/phy_scope_interface.c
${NFAPI_USER_DIR}/nfapi.c
${PHY_INTERFACE_DIR}/queue_t.c
@@ -1933,10 +1918,10 @@ add_executable(nr-uesoftmodem
target_link_libraries(nr-uesoftmodem PRIVATE
-Wl,--start-group
nr_rrc SECURITY UTIL SCHED_RU_LIB SCHED_NR_UE_LIB
nr_rrc SECURITY UTIL HASHTABLE SCHED_RU_LIB SCHED_NR_UE_LIB
PHY_COMMON PHY_NR_COMMON PHY_NR_UE NR_L2_UE MAC_NR_COMMON NFAPI_LIB
ITTI SIMU radio_common
time_management softmodem_common
ITTI SIMU shlib_loader
time_management
-Wl,--end-group z dl)
target_link_libraries(nr-uesoftmodem PRIVATE pthread m CONFIG_LIB rt nr_ue_phy_meas)
@@ -1969,10 +1954,10 @@ target_link_libraries(nr-uesoftmodem PRIVATE
add_executable(rftest
${OPENAIR_DIR}/openair1/PHY/TOOLS/calibration_test.c
${OPENAIR_DIR}/openair1/PHY/TOOLS/calibration_scope.c
${OPENAIR_DIR}/radio/COMMON/common_lib.c
${OPENAIR_DIR}/executables/softmodem-common.c
)
target_link_libraries(rftest PRIVATE
minimal_lib PHY_NR_COMMON UTIL forms pthread dl m ${T_LIB}
radio_common softmodem_common)
target_link_libraries(rftest PRIVATE minimal_lib PHY_NR_COMMON UTIL forms pthread dl m ${T_LIB} shlib_loader)
target_link_libraries(rftest PRIVATE asn1_lte_rrc_hdrs asn1_nr_rrc_hdrs)
add_executable(polartest
@@ -1989,7 +1974,7 @@ add_executable(smallblocktest
target_link_libraries(smallblocktest PRIVATE
-Wl,--start-group UTIL SIMU PHY_NR PHY_COMMON PHY_NR_COMMON -Wl,--end-group
m pthread dl ${T_LIB}
m pthread dl shlib_loader ${T_LIB}
)
@@ -1999,7 +1984,7 @@ add_executable(ldpctest
)
target_link_libraries(ldpctest PRIVATE
-Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR_COMMON -Wl,--end-group
m pthread dl ${T_LIB}
m pthread dl shlib_loader ${T_LIB}
# link 'check_crc' to make it resolved in the LDPC coding libraries
# 'check_crc' is not used in ldpctest so it is not linked in the executable by default
# --whole-archive links 'check_crc' in the executable even though it is note used, see 'man ld'
@@ -2012,53 +1997,54 @@ target_link_libraries(physim_common PRIVATE UTIL)
add_executable(nr_dlschsim ${OPENAIR1_DIR}/SIMULATION/NR_PHY/dlschsim.c)
target_link_libraries(nr_dlschsim PRIVATE
-Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB CONFIG_LIB MAC_NR_COMMON -Wl,--end-group
m pthread ${T_LIB} ITTI dl physim_common
m pthread ${T_LIB} ITTI dl shlib_loader physim_common
)
target_link_libraries(nr_dlschsim PRIVATE asn1_nr_rrc_hdrs)
add_executable(nr_pbchsim ${OPENAIR1_DIR}/SIMULATION/NR_PHY/pbchsim.c)
target_link_libraries(nr_pbchsim PRIVATE
-Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB CONFIG_LIB MAC_NR_COMMON -Wl,--end-group
m pthread ${T_LIB} ITTI dl physim_common
m pthread ${T_LIB} ITTI dl shlib_loader physim_common
)
target_link_libraries(nr_pbchsim PRIVATE asn1_nr_rrc_hdrs asn1_lte_rrc_hdrs)
add_executable(nr_psbchsim
${OPENAIR1_DIR}/SIMULATION/NR_PHY/psbchsim.c
${OPENAIR_DIR}/executables/softmodem-common.c
${NFAPI_USER_DIR}/nfapi.c
${NFAPI_USER_DIR}/gnb_ind_vars.c
${PHY_INTERFACE_DIR}/queue_t.c
)
target_link_libraries(nr_psbchsim PRIVATE
-Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB SCHED_NR_UE_LIB MAC_UE_NR MAC_NR_COMMON CONFIG_LIB L2_NR -Wl,--end-group
m pthread ${T_LIB} ITTI dl physim_common softmodem_common
-Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB SCHED_NR_UE_LIB MAC_UE_NR MAC_NR_COMMON CONFIG_LIB L2_NR -lz -Wl,--end-group
m pthread ${T_LIB} ITTI dl shlib_loader physim_common
)
target_link_libraries(nr_psbchsim PRIVATE asn1_nr_rrc_hdrs asn1_lte_rrc_hdrs)
add_executable(nr_pucchsim ${OPENAIR1_DIR}/SIMULATION/NR_PHY/pucchsim.c)
target_link_libraries(nr_pucchsim PRIVATE
-Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB CONFIG_LIB MAC_NR_COMMON -Wl,--end-group
m pthread ${T_LIB} ITTI dl physim_common
m pthread ${T_LIB} ITTI dl shlib_loader physim_common
)
target_link_libraries(nr_pucchsim PRIVATE asn1_nr_rrc_hdrs asn1_lte_rrc_hdrs)
add_executable(nr_dlsim
${OPENAIR1_DIR}/SIMULATION/NR_PHY/dlsim.c
${OPENAIR_DIR}/executables/softmodem-common.c
${NFAPI_USER_DIR}/nfapi.c
${NFAPI_USER_DIR}/gnb_ind_vars.c
${PHY_INTERFACE_DIR}/queue_t.c
)
target_link_libraries(nr_dlsim PRIVATE
-Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB SCHED_NR_UE_LIB MAC_UE_NR MAC_NR_COMMON nr_rrc CONFIG_LIB L2_NR x2ap SECURITY ngap -Wl,--end-group
m pthread ${T_LIB} ITTI dl nr_ue_phy_meas physim_common
softmodem_common
-Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB SCHED_NR_UE_LIB MAC_UE_NR MAC_NR_COMMON nr_rrc CONFIG_LIB L2_NR HASHTABLE x2ap SECURITY ngap -lz -Wl,--end-group
m pthread ${T_LIB} ITTI dl shlib_loader nr_ue_phy_meas physim_common
)
target_link_libraries(nr_dlsim PRIVATE asn1_nr_rrc_hdrs asn1_lte_rrc_hdrs)
add_executable(nr_prachsim ${OPENAIR1_DIR}/SIMULATION/NR_PHY/prachsim.c)
target_link_libraries(nr_prachsim PRIVATE
-Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR_COMMON PHY_NR PHY_RU PHY_NR_UE MAC_NR_COMMON SCHED_NR_LIB CONFIG_LIB -Wl,--end-group
m pthread ${T_LIB} ITTI dl physim_common)
-Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR_COMMON PHY_NR PHY_RU PHY_NR_UE MAC_NR_COMMON SCHED_NR_LIB CONFIG_LIB -lz -Wl,--end-group
m pthread ${T_LIB} ITTI dl shlib_loader physim_common)
target_link_libraries(nr_prachsim PRIVATE asn1_nr_rrc_hdrs asn1_lte_rrc_hdrs)
add_executable(nr_ulschsim
@@ -2067,48 +2053,41 @@ add_executable(nr_ulschsim
)
target_link_libraries(nr_ulschsim PRIVATE
-Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB CONFIG_LIB MAC_NR_COMMON -Wl,--end-group
m pthread ${T_LIB} ITTI dl physim_common
m pthread ${T_LIB} ITTI dl shlib_loader physim_common
)
target_link_libraries(nr_ulschsim PRIVATE asn1_nr_rrc_hdrs asn1_lte_rrc_hdrs)
add_executable(nr_ulsim
${OPENAIR1_DIR}/SIMULATION/NR_PHY/ulsim.c
${OPENAIR_DIR}/executables/softmodem-common.c
${NFAPI_USER_DIR}/nfapi.c
${NFAPI_USER_DIR}/gnb_ind_vars.c
${PHY_INTERFACE_DIR}/queue_t.c
)
target_link_libraries(nr_ulsim PRIVATE
-Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB SCHED_NR_UE_LIB MAC_UE_NR MAC_NR_COMMON nr_rrc CONFIG_LIB L2_NR x2ap SECURITY ngap -Wl,--end-group
m pthread ${T_LIB} ITTI dl nr_ue_phy_meas physim_common softmodem_common
-Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB SCHED_NR_UE_LIB MAC_UE_NR MAC_NR_COMMON nr_rrc CONFIG_LIB L2_NR HASHTABLE x2ap SECURITY ngap -lz -Wl,--end-group
m pthread ${T_LIB} ITTI dl shlib_loader nr_ue_phy_meas physim_common
)
target_link_libraries(nr_ulsim PRIVATE asn1_nr_rrc_hdrs asn1_lte_rrc_hdrs)
add_executable(nr_srssim
${OPENAIR1_DIR}/SIMULATION/NR_PHY/srssim.c
${OPENAIR_DIR}/executables/softmodem-common.c
${NFAPI_USER_DIR}/nfapi.c
${NFAPI_USER_DIR}/gnb_ind_vars.c
${PHY_INTERFACE_DIR}/queue_t.c
)
target_link_libraries(nr_srssim PRIVATE
-Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB SCHED_NR_UE_LIB MAC_UE_NR MAC_NR_COMMON -Wl,--end-group
m pthread ITTI dl nr_ue_phy_meas physim_common softmodem_common
-Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB SCHED_NR_UE_LIB MAC_UE_NR MAC_NR_COMMON nr_rrc L2_NR -lz -Wl,--end-group
m pthread ITTI dl nr_ue_phy_meas physim_common
)
if(CUDA_ENABLE)
if (TARGET oai_cuda_lib)
target_link_libraries(nr_dlsim PRIVATE oai_cuda_lib)
target_link_libraries(nr_ulsim PRIVATE oai_cuda_lib)
target_compile_definitions(nr_dlsim PRIVATE ENABLE_CUDA)
target_compile_definitions(nr_ulsim PRIVATE ENABLE_CUDA)
endif()
endif()
# these simulators do not compile:
# dlsim_tm7 pbchsim scansim mbmssim pdcchsim pucchsim prachsim syncsim
foreach(myExe dlsim ulsim)
add_executable(${myExe}
${OPENAIR1_DIR}/SIMULATION/LTE_PHY/${myExe}.c
${OPENAIR_DIR}/common/utils/lte/ue_power.c
@@ -2118,7 +2097,7 @@ foreach(myExe dlsim ulsim)
)
target_link_libraries (${myExe} PRIVATE
-Wl,--start-group SIMU UTIL SCHED_LIB SCHED_RU_LIB SCHED_UE_LIB PHY_COMMON PHY_NR_COMMON PHY PHY_UE PHY_RU ITTI -Wl,--end-group
pthread m rt CONFIG_LIB ${T_LIB} dl
pthread m rt CONFIG_LIB ${T_LIB} dl shlib_loader
)
target_link_libraries(${myExe} PRIVATE asn1_lte_rrc_hdrs)
add_dependencies(${myExe} coding)
@@ -2157,7 +2136,7 @@ if (${T_TRACER})
#all "add_library" definitions
ITTI lte_rrc nr_rrc s1ap x2ap m2ap m3ap f1ap
params_libconfig
oai_eth_transpro UTIL
oai_eth_transpro HASHTABLE UTIL
SECURITY SCHED_LIB SCHED_NR_LIB SCHED_RU_LIB SCHED_UE_LIB SCHED_NR_UE_LIB
NFAPI_LIB NFAPI_PNF_LIB NFAPI_VNF_LIB NFAPI_USER_LIB
MISC_NFAPI_LTE_LIB
@@ -2210,7 +2189,6 @@ if(ENABLE_TESTS)
endif()
add_subdirectory(common)
add_subdirectory(executables)
add_subdirectory(doc)
add_subdirectory(nfapi)
add_subdirectory(openair1)
@@ -2219,11 +2197,6 @@ add_subdirectory(openair3)
add_subdirectory(radio)
add_subdirectory(tests)
if(TARGET oai_cuda_lib)
message(STATUS "CUDA library 'oai_cuda_lib' found, linking to targets...")
target_link_libraries(nr_dlsim PRIVATE oai_cuda_lib)
target_link_libraries(nr_ulsim PRIVATE oai_cuda_lib)
endif()
if(PACKAGING_LTE OR PACKAGING_NR OR PACKAGING_COMMON OR PACKAGING_USRP OR PACKAGING_PHYSIM)
include("tools/packages/packages.cmake")

View File

@@ -334,29 +334,6 @@ pipeline {
}
}
}
stage ("Channel-Simulation") {
when { expression {do5Gtest || do5GUeTest} }
steps {
script {
triggerSlaveJob ('RAN-Channel-Simulation', 'Channel-Simulation')
}
}
post {
always {
script {
// Using a unique variable name for each test stage to avoid overwriting on a global variable
// due to parallel-time concurrency
channelSimStatus = finalizeSlaveJob('RAN-Channel-Simulation')
}
}
failure {
script {
currentBuild.result = 'FAILURE'
failingStages += channelSimStatus
}
}
}
}
stage ("PhySim-Cluster-4G") {
when { expression {do4Gtest} }
steps {
@@ -726,11 +703,11 @@ pipeline {
}
}
}
stage ("SA-Multi-Antenna-CN5G") {
stage ("SA-2x2-Module-CN5G") {
when { expression {do5Gtest} }
steps {
script {
triggerSlaveJob ('RAN-SA-Multi-Antenna-CN5G', 'SA-Multi-Antenna-CN5G')
triggerSlaveJob ('RAN-SA-2x2-Module-CN5G', 'SA-2x2-Module-CN5G')
}
}
post {
@@ -738,13 +715,13 @@ pipeline {
script {
// Using a unique variable name for each test stage to avoid overwriting on a global variable
// due to parallel-time concurrency
saMultiAntennaStatus = finalizeSlaveJob('RAN-SA-Multi-Antenna-CN5G')
saTDD2x2Status = finalizeSlaveJob('RAN-SA-2x2-Module-CN5G')
}
}
failure {
script {
currentBuild.result = 'FAILURE'
failingStages += saMultiAntennaStatus
failingStages += saTDD2x2Status
}
}
}

View File

@@ -255,7 +255,7 @@ def Deploy_Physim(ctx, HTML, node, workdir, script, options):
logging.debug(f'Running physims on server {node} workdir {workdir}')
with cls_cmd.getConnection(node) as c:
sys_info = c.exec_script("scripts/sys-info.sh", 5)
ret = c.exec_script(script, 1500, options)
ret = c.exec_script(script, 1000, options)
logging.debug(f'"{script}" finished with code {ret.returncode}, output:\n{ret.stdout}')
HTML.CreateHtmlTestRowQueue('Query system info', 'OK', [sys_info.stdout])
with cls_cmd.getConnection(node) as ssh:

View File

@@ -175,7 +175,7 @@ MACRLCs = ({
tr_n_preference = "local_RRC";
pusch_TargetSNRx10 = 200;
pucch_TargetSNRx10 = 200;
set_analog_beamforming = "lophy";
set_analog_beamforming = 2;
beam_duration = 1;
beams_per_period = 1;
beam_weights = [0]; // single SSB -> one analog beam

View File

@@ -18,7 +18,7 @@ gNBs =
////////// Physical parameters:
min_rxtxtime = 6;
enable_sdap = 0;
enable_sdap = 1;
servingCellConfigCommon = (
{

View File

@@ -18,7 +18,7 @@ gNBs =
////////// Physical parameters:
min_rxtxtime = 6;
enable_sdap = 0;
enable_sdap = 1;
servingCellConfigCommon = (
{

View File

@@ -1,52 +0,0 @@
#/*
# * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
# * contributor license agreements. See the NOTICE file distributed with
# * this work for additional information regarding copyright ownership.
# * The OpenAirInterface Software Alliance licenses this file to You under
# * the OAI Public License, Version 1.1 (the "License"); you may not use this file
# * except in compliance with the License.
# * You may obtain a copy of the License at
# *
# * http://www.openairinterface.org/?page_id=698
# *
# * Unless required by applicable law or agreed to in writing, software
# * distributed under the License is distributed on an "AS IS" BASIS,
# * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# * See the License for the specific language governing permissions and
# * limitations under the License.
# *-------------------------------------------------------------------------------
# * For more information about the OpenAirInterface (OAI) Software Alliance:
# * contact@openairinterface.org
# */
#---------------------------------------------------------------------
#
# Dockerfile for the Open-Air-Interface BUILD service
# Valid for Ubuntu 24.04
#
#---------------------------------------------------------------------
FROM nvidia/cuda:12.9.1-devel-ubuntu22.04 AS cuda-image
FROM ran-base:develop AS ran-tests
RUN rm -Rf /oai-ran
COPY --from=cuda-image /usr/local/cuda/ /usr/local/cuda/
# Set the LD_LIBRARY_PATH to ensure the system can find the copied libraries.
# This is crucial for applications that use CUDA.
ENV LD_LIBRARY_PATH=/usr/local/cuda/lib64:/usr/local/cuda/targets/sbsa-linux/lib
ENV PATH=/usr/local/cuda/bin:$PATH
ENV C_INCLUDE_PATH=/usr/local/cuda/include
WORKDIR /oai-ran
COPY . .
WORKDIR /oai-ran/build
RUN cmake -GNinja -DENABLE_PHYSIM_TESTS=ON -DENABLE_TESTS=ON \
-DSANITIZE_UNDEFINED=OFF -DSANITIZE_ADDRESS=OFF \
-DCMAKE_C_FLAGS=-Werror -DCMAKE_CXX_FLAGS=-Werror \
-DPHYSIM_CHECK_FILES="ThresholdsCuda.cmake" \
-DCUDA_ENABLE=ON \
-DUSE_UNIFIED_MEMORY=ON \
-DUSE_ATS_MEMORY=OFF \
-DCMAKE_RUNTIME_OUTPUT_DIRECTORY=/oai-ran/cmake_targets/ran_build/build \
.. && \
ninja test_channel_scalability test_multipath test_noise

View File

@@ -202,9 +202,9 @@ def ExecuteActionWithParam(action, ctx, node):
workdir = CLUSTER.eNBSourceCodePath
success = cls_oaicitest.Deploy_Physim(ctx, HTML, node, workdir, script, options)
elif action == 'Build_Deploy_PhySim':
elif action == 'Build_Deploy_Docker_PhySim' or action == 'Build_Deploy_Source_PhySim':
ctest_opt = test.findtext('ctest-opt') or ''
script = test.findtext('script')
script = "scripts/docker-build-and-deploy-physims.sh" if action == 'Build_Deploy_Docker_PhySim' else 'scripts/source-deploy-physims.sh'
options = f"{CONTAINERS.eNBSourceCodePath} {ctest_opt}"
workdir = CONTAINERS.eNBSourceCodePath
success = cls_oaicitest.Deploy_Physim(ctx, HTML, node, workdir, script, options)

View File

@@ -1,46 +0,0 @@
#!/bin/bash
function die() { echo $@; exit 1; }
[ $# -ge 1 ] || die "usage: $0 <directory> [ctest-options]"
IMAGE=ran-channelsim:ci-temp
CONTAINER=ran-channelsim
function cleanup-docker() {
docker stop ${CONTAINER}
docker rm ${CONTAINER}
docker rmi ${IMAGE}
docker volume prune --force
}
trap cleanup-docker EXIT
set -x
DIR=$1
RESULT_DIR=${DIR}/
shift
CTEST_OPT=$@
# build channel simulator
docker build --progress=plain --tag ${IMAGE} --file ${DIR}/ci-scripts/docker/Dockerfile.channelsim.ubuntu ${DIR} &>> ${RESULT_DIR}/channelsim_build_log.txt
if [ $? -ne 0 ]; then
echo "build of channel simulator failed"
exit 1
fi
# get a JSON description of all tests to run
docker run -a STDOUT --workdir /oai-ran/build/ --env LD_LIBRARY_PATH=/oai-ran/build/ --rm --name ${CONTAINER} ${IMAGE} ctest ${CTEST_OPT} --show-only=json-v1 &> ${RESULT_DIR}/desc-tests.json
JSON_RES=$?
# run the actual tests: we don't suppy --rm as we have to copy the files
# similar to unit tests, we can't mount the file where we write physims-5g-run.xml to
# as it would write a file as root, but this script is run as a normal user
docker run -a STDOUT --gpus all --workdir /oai-ran/build/ --env LD_LIBRARY_PATH=/oai-ran/build/ --name ${CONTAINER} ${IMAGE} ctest ${CTEST_OPT} --output-junit results-run.xml --test-output-size-passed 100000 --test-output-size-failed 100000 &>> ${RESULT_DIR}/channelsim_log.txt
RUN_RES=$?
docker cp ${CONTAINER}:/oai-ran/build/results-run.xml ${RESULT_DIR}/
docker cp ${CONTAINER}:/oai-ran/build/Testing/Temporary/LastTestsFailed.log ${RESULT_DIR}/
docker cp ${CONTAINER}:/oai-ran/build/Testing/Temporary/LastTest.log ${RESULT_DIR}/
# if both were successful, return 0
# TODO not sure
#[[ $JSON_RES -eq 0 && $RUN_RES -eq 0 ]] && exit 0
exit 0

View File

@@ -24,7 +24,8 @@
- Undeploy_Object
- Cppcheck_Analysis
- Deploy_Run_OC_PhySim
- Build_Deploy_PhySim
- Build_Deploy_Docker_PhySim
- Build_Deploy_Source_PhySim
- LicenceAndFormattingCheck
- Push_Local_Registry
- Pull_Local_Registry

View File

@@ -1,130 +0,0 @@
<!--
Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
contributor license agreements. See the NOTICE file distributed with
this work for additional information regarding copyright ownership.
The OpenAirInterface Software Alliance licenses this file to You under
the OAI Public License, Version 1.1 (the "License"); you may not use this file
except in compliance with the License.
You may obtain a copy of the License at
http://www.openairinterface.org/?page_id=698
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
For more information about the OpenAirInterface (OAI) Software Alliance:
contact@openairinterface.org
-->
<testCaseList>
<htmlTabRef>vrtsim-5gnr-cirdb</htmlTabRef>
<htmlTabName>Monolithic gNB vrtsim + CIRDB</htmlTabName>
<htmlTabIcon>wrench</htmlTabIcon>
<testCase>
<class>Pull_Local_Registry</class>
<desc>Pull Images from Local Registry</desc>
<node>localhost</node>
<images>oai-gnb oai-nr-ue</images>
<tag_prefix>arm_</tag_prefix>
</testCase>
<testCase>
<class>Create_Workspace</class>
<desc>Create new Workspace</desc>
<node>localhost</node>
</testCase>
<testCase>
<class>Deploy_Object</class>
<desc>Deploy OAI 5G CoreNetwork</desc>
<node>localhost</node>
<yaml_path>ci-scripts/yaml_files/5g_vrtsim_cirdb</yaml_path>
<services>mysql oai-amf oai-smf oai-upf oai-ext-dn</services>
</testCase>
<testCase>
<class>Deploy_Object</class>
<desc>Deploy OAI 5G gNB+UE RF sim SA</desc>
<node>localhost</node>
<yaml_path>ci-scripts/yaml_files/5g_vrtsim_cirdb</yaml_path>
<services>oai-gnb oai-nr-ue</services>
</testCase>
<testCase>
<class>Attach_UE</class>
<desc>Attach OAI UE (Wait for IP)</desc>
<id>rfsim5g_ue</id>
<node>localhost</node>
</testCase>
<testCase>
<class>Ping</class>
<desc>Ping ext-dn from NR-UE</desc>
<id>rfsim5g_ue</id>
<node>localhost</node>
<svr_id>rfsim5g_ext_dn</svr_id>
<svr_node>localhost</svr_node>
<ping_args>-c 20 -i 0.25</ping_args>
<ping_packetloss_threshold>5</ping_packetloss_threshold>
</testCase>
<testCase>
<class>Ping</class>
<desc>Ping NR-UE from ext-dn</desc>
<id>rfsim5g_ext_dn</id>
<node>localhost</node>
<svr_id>rfsim5g_ue</svr_id>
<svr_node>localhost</svr_node>
<ping_args>-c 20 -i 0.25</ping_args>
<ping_packetloss_threshold>5</ping_packetloss_threshold>
</testCase>
<testCase>
<class>Iperf</class>
<desc>Iperf (DL/3Mbps/UDP)(20 sec)</desc>
<iperf_args>-u -b 3M -t 20 -R</iperf_args>
<id>rfsim5g_ue</id>
<node>localhost</node>
<svr_id>rfsim5g_ext_dn</svr_id>
<svr_node>localhost</svr_node>
<iperf_packetloss_threshold>5</iperf_packetloss_threshold>
<iperf_bitrate_threshold>90</iperf_bitrate_threshold>
</testCase>
<testCase>
<class>Iperf</class>
<desc>Iperf (UL/1Mbps/UDP)(20 sec)</desc>
<iperf_args>-u -b 1M -t 20</iperf_args>
<id>rfsim5g_ue</id>
<node>localhost</node>
<svr_id>rfsim5g_ext_dn</svr_id>
<svr_node>localhost</svr_node>
<iperf_packetloss_threshold>5</iperf_packetloss_threshold>
<iperf_bitrate_threshold>90</iperf_bitrate_threshold>
</testCase>
<testCase>
<class>Undeploy_Object</class>
<always_exec>true</always_exec>
<desc>Undeploy all OAI 5G stack</desc>
<node>localhost</node>
<yaml_path>ci-scripts/yaml_files/5g_vrtsim_cirdb</yaml_path>
<d_retx_th>10,0,0,0</d_retx_th>
<u_retx_th>1,0,0,0</u_retx_th>
</testCase>
<testCase>
<class>Clean_Test_Server_Images</class>
<always_exec>true</always_exec>
<desc>Clean Test Images on Test Server</desc>
<node>localhost</node>
<images>oai-gnb oai-nr-ue</images>
</testCase>
</testCaseList>

View File

@@ -32,9 +32,8 @@
</testCase>
<testCase>
<class>Build_Deploy_PhySim</class>
<desc>Build and Deploy PhySim in Docker</desc>
<script>scripts/docker-build-and-deploy-physims.sh</script>
<class>Build_Deploy_Docker_PhySim</class>
<desc>Build and Deploy PhySim</desc>
<node>localhost</node>
<ctest-opt>-R 5g -E "nr_dlsim|nr_ulsim|ldpctest" -j32</ctest-opt>
</testCase>

View File

@@ -32,9 +32,8 @@
</testCase>
<testCase>
<class>Build_Deploy_PhySim</class>
<class>Build_Deploy_Docker_PhySim</class>
<desc>Build and Deploy PhySim with timing check</desc>
<script>scripts/docker-build-and-deploy-physims.sh</script>
<node>localhost</node>
<ctest-opt>-R 5g -R "nr_dlsim|nr_ulsim|ldpctest" -E physim.5g.nr_dlsim.mcs.mimo.test9 -j1</ctest-opt>
</testCase>

View File

@@ -32,9 +32,8 @@
</testCase>
<testCase>
<class>Build_Deploy_PhySim</class>
<class>Build_Deploy_Source_PhySim</class>
<desc>Build and Deploy PhySim T2 Offload tests</desc>
<script>scripts/source-deploy-physims.sh</script>
<node>caracal</node>
<ctest-opt>-R 5g-offload -j1</ctest-opt>
</testCase>

View File

@@ -1,43 +0,0 @@
<!--
Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
contributor license agreements. See the NOTICE file distributed with
this work for additional information regarding copyright ownership.
The OpenAirInterface Software Alliance licenses this file to You under
the OAI Public License, Version 1.1 (the "License"); you may not use this file
except in compliance with the License.
You may obtain a copy of the License at
http://www.openairinterface.org/?page_id=698
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
For more information about the OpenAirInterface (OAI) Software Alliance:
contact@openairinterface.org
-->
<testCaseList>
<htmlTabRef>channelsim-tab</htmlTabRef>
<htmlTabName>ChannelSim</htmlTabName>
<htmlTabIcon>wrench</htmlTabIcon>
<testCase>
<class>Create_Workspace</class>
<desc>Create new Workspace</desc>
<node>localhost</node>
</testCase>
<testCase>
<class>Build_Deploy_PhySim</class>
<desc>Build and Deploy Test Channel Simulation</desc>
<script>scripts/docker-build-and-deploy-chansim.sh</script>
<node>localhost</node>
<ctest-opt>-R cuda.5g.channelsim</ctest-opt>
</testCase>
</testCaseList>

View File

@@ -1,183 +0,0 @@
services:
# CIR Generator service - generates CIRDB files on every CI run
cir-generator:
image: oaisoftwarealliance/cir-generator:test
environment:
GENERATOR_ARGS: "--demo"
OUTPUT: "--out /opt/output/cir_db.bin"
volumes:
- cirdb_data:/opt/output
mysql:
container_name: "rfsim5g-mysql"
image: mysql:8.0
init: true
volumes:
- ../5g_rfsimulator/oai_db.sql:/docker-entrypoint-initdb.d/oai_db.sql
- ../5g_rfsimulator/mysql-healthcheck.sh:/tmp/mysql-healthcheck.sh
environment:
- TZ=Europe/Paris
- MYSQL_DATABASE=oai_db
- MYSQL_USER=test
- MYSQL_PASSWORD=test
- MYSQL_ROOT_PASSWORD=linux
healthcheck:
test: /bin/bash -c "/tmp/mysql-healthcheck.sh"
interval: 10s
timeout: 5s
start_period: 10s
start_interval: 500ms
retries: 30
networks:
public_net:
ipv4_address: 192.168.71.131
oai-amf:
container_name: "rfsim5g-oai-amf"
image: oaisoftwarealliance/oai-amf:v2.1.10
environment:
- TZ=Europe/paris
volumes:
- ../5g_rfsimulator/mini_nonrf_config.yaml:/openair-amf/etc/config.yaml
depends_on:
- mysql
networks:
public_net:
ipv4_address: 192.168.71.132
oai-smf:
container_name: "rfsim5g-oai-smf"
image: oaisoftwarealliance/oai-smf:v2.1.10
environment:
- TZ=Europe/Paris
volumes:
- ../5g_rfsimulator/mini_nonrf_config.yaml:/openair-smf/etc/config.yaml
depends_on:
- oai-amf
networks:
public_net:
ipv4_address: 192.168.71.133
oai-upf:
container_name: "rfsim5g-oai-upf"
image: oaisoftwarealliance/oai-upf:v2.1.10
init: true
environment:
- TZ=Europe/Paris
volumes:
- ../5g_rfsimulator/mini_nonrf_config.yaml:/openair-upf/etc/config.yaml
depends_on:
- oai-smf
cap_add:
- NET_ADMIN
- SYS_ADMIN
cap_drop:
- ALL
privileged: true
networks:
public_net:
ipv4_address: 192.168.71.134
interface_name: eth0
traffic_net:
ipv4_address: 192.168.72.134
interface_name: eth1
oai-ext-dn:
privileged: true
container_name: rfsim5g-oai-ext-dn
image: oaisoftwarealliance/trf-gen-cn5g:latest
init: true
entrypoint: /bin/bash -c \
"iptables -t nat -A POSTROUTING -o eth0 -j MASQUERADE;"\
"ip route add 12.1.1.0/24 via 192.168.72.134 dev eth0; sleep infinity"
depends_on:
- oai-upf
networks:
traffic_net:
ipv4_address: 192.168.72.135
healthcheck:
test: /bin/bash -c "ping -c 2 192.168.72.134"
interval: 10s
timeout: 5s
retries: 5
start_period: 10s
start_interval: 500ms
oai-gnb:
image: ${REGISTRY-oaisoftwarealliance/}${GNB_IMG:-oai-gnb}:${TAG:-develop}
container_name: rfsim5g-oai-gnb
cap_drop:
- ALL
environment:
USE_ADDITIONAL_OPTIONS: -E --log_config.global_log_options level,nocolor,time --device.name vrtsim --vrtsim.role server --vrtsim.cirdb 1 --vrtsim.cirdb_file /cirdb/cir_db.bin --vrtsim.cirdb_yaml /cirdb/cir_db.yaml --vrtsim.cirdb_model_id 0 --vrtsim.cirdb_ds_ns 1 --vrtsim.cirdb_speed_mps 1.5
depends_on:
cir-generator:
condition: service_completed_successfully
oai-ext-dn:
condition: service_started
networks:
public_net:
ipv4_address: 192.168.71.140
volumes:
- ../../conf_files/gnb.sa.band78.106prb.vrtsim.2x2.yaml:/opt/oai-gnb/etc/gnb.yaml
- cirdb_data:/cirdb:ro
- tmp_data:/tmp/
healthcheck:
test: /bin/bash -c "pgrep nr-softmodem"
interval: 10s
timeout: 5s
start_period: 10s
start_interval: 500ms
retries: 5
ipc: host
oai-nr-ue:
image: ${REGISTRY-oaisoftwarealliance/}${NRUE_IMG:-oai-nr-ue}:${TAG:-develop}
container_name: rfsim5g-oai-nr-ue
cap_drop:
- ALL
cap_add:
- NET_ADMIN
- NET_RAW
environment:
USE_ADDITIONAL_OPTIONS: -E -r 106 --numerology 1 --band 78 -C 3619200000 --ssb 516 --uicc0.imsi 208990100001100 --log_config.global_log_options level,nocolor,time --device.name vrtsim --vrtsim.role client
depends_on:
- oai-gnb
networks:
public_net:
ipv4_address: 192.168.71.150
devices:
- /dev/net/tun:/dev/net/tun
volumes:
- ../../conf_files/nrue.vrtsim.chanmod.yaml:/opt/oai-nr-ue/etc/nr-ue.yaml
- tmp_data:/tmp/
healthcheck:
test: /bin/bash -c "pgrep nr-uesoftmodem"
interval: 10s
timeout: 5s
retries: 5
start_period: 10s
start_interval: 500ms
ipc: host
networks:
public_net:
driver: bridge
name: rfsim5g-oai-public-net
ipam:
config:
- subnet: 192.168.71.128/26
driver_opts:
com.docker.network.bridge.name: "rfsim5g-public"
traffic_net:
driver: bridge
name: rfsim5g-oai-traffic-net
ipam:
config:
- subnet: 192.168.72.128/26
driver_opts:
com.docker.network.bridge.name: "rfsim5g-traffic"
volumes:
tmp_data:
cirdb_data:

View File

@@ -36,8 +36,9 @@ set_openair_env
# Variables for UE data generation
conf_nvram_path=$OPENAIR_DIR/openair3/NAS/TOOLS/ue_eurecom_test_sfr.conf
HWs=""
HW=""
BUILD_DIR=ran_build
DISABLE_HARDWARE_DEPENDENCY="False"
CMAKE_BUILD_TYPE="RelWithDebInfo"
CMAKE_CMD="$CMAKE"
OPTIONAL_LIBRARIES="telnetsrv enbscope uescope nrscope ldpc_cuda ldpc_aal ldpc_xdma websrv oai_iqplayer imscope imscope_record"
@@ -253,22 +254,22 @@ function main() {
-w | --hardware)
case "$2" in
"USRP" | "BLADERF" | "LMSSDR" | "IRIS")
HWs+=" OAI_"$2
HW="OAI_"$2
TARGET_LIST="$TARGET_LIST oai_${2,,}devif" # ,, makes lowercase
CMAKE_CMD="$CMAKE_CMD -DOAI_$2=ON"
;;
"SIMU")
HWs+=" OAI_"$2
HW="OAI_"$2
TARGET_LIST="$TARGET_LIST rfsimulator"
CMAKE_CMD="$CMAKE_CMD -DOAI_$2=ON"
;;
"AW2SORI")
HWs=" OAI_"$2
HW="OAI_"$2
TARGET_LIST="$TARGET_LIST aw2sori_transpro"
CMAKE_CMD="$CMAKE_CMD -DOAI_$2=ON"
;;
"AERIAL"|"Aerial"|"aerial")
HWs+=" OAI_AERIAL"
HW="OAI_AERIAL"
CMAKE_CMD="$CMAKE_CMD -DOAI_AERIAL=ON"
;;
"None")
@@ -327,6 +328,10 @@ function main() {
CMAKE_CMD="$CMAKE_CMD -DT_TRACER=False"
echo_info "Disabling the T tracer"
shift 1;;
--disable-hardware-dependency)
echo_info "Disabling hardware dependency for compiling software"
DISABLE_HARDWARE_DEPENDENCY="True"
shift 1;;
--ue-trace)
CMAKE_CMD="$CMAKE_CMD -DUE_DEBUG_TRACE=False"
echo_info "Enabling UE trace for debug"
@@ -419,23 +424,27 @@ function main() {
echo_info "installing LTTng"
install_lttng $1
fi
for HW in $HWs; do
if [ "$HW" == "OAI_USRP" ] ; then
echo_info "installing packages for USRP support"
check_install_usrp_uhd_driver
if [ ! -v BUILD_UHD_FROM_SOURCE ]; then
install_usrp_uhd_driver $UHD_IMAGES_DIR
fi
elif [ "$HW" == "OAI_BLADERF" ] ; then
echo_info "installing packages for BLADERF support"
check_install_bladerf_driver
elif [ "$HW" == "OAI_IRIS" ] ; then
echo_info "installing packages for IRIS support"
check_install_soapy
else
echo_warning "no installation scripts for hardware $HW"
if [ "$HW" == "OAI_USRP" ] ; then
echo_info "installing packages for USRP support"
check_install_usrp_uhd_driver
if [ ! -v BUILD_UHD_FROM_SOURCE ] && [ ! "$DISABLE_HARDWARE_DEPENDENCY" == "True" ]; then
install_usrp_uhd_driver $UHD_IMAGES_DIR
fi
done
fi
if [ "$HW" == "OAI_BLADERF" ] ; then
echo_info "installing packages for BLADERF support"
check_install_bladerf_driver
if [ ! "$DISABLE_HARDWARE_DEPENDENCY" == "True" ]; then
flash_firmware_bladerf
fi
fi
if [ "$HW" == "OAI_IRIS" ] ; then
echo_info "installing packages for IRIS support"
check_install_soapy
#if [ ! "$DISABLE_HARDWARE_DEPENDENCY" == "True" ]; then
# flash_firmware_iris
#fi
fi
fi
if [ "$INSTALL_OPTIONAL" = "1" ] ; then

View File

@@ -107,7 +107,6 @@ check_supported_distribution() {
"ubuntu22.04") return 0 ;;
"ubuntu20.04") return 0 ;;
"debian11") return 0 ;;
"debian12") return 0 ;;
"fedora41") return 0 ;;
"fedora40") return 0 ;;
"rhel8.2") return 0 ;;
@@ -346,10 +345,19 @@ install_bladerf_driver_from_source(){
make
$SUDO make install
$SUDO ldconfig
echo "Downloading FPGA and firmware images"
cd /tmp/bladeRF
#wget has been removed from default dependencies, so we must be sure that's installed
$SUDO $INSTALLER -y install wget
wget --tries=3 --retry-connrefused https://www.nuand.com/fx3/bladeRF_fw_latest.img
wget --tries=3 --retry-connrefused https://www.nuand.com/fpga/hostedx40-latest.rbf
sudo mkdir -p /usr/share/Nuand/bladeRF
sudo mv bladeRF_fw_latest.img /usr/share/Nuand/bladeRF/bladeRF_fw.img
sudo mv hostedx40-latest.rbf /usr/share/Nuand/bladeRF/hostedx40.rbf
}
check_install_bladerf_driver(){
if [[ "$OS_BASEDISTRO" == "debian" ]]; then
if [[ "$OS_DISTRO" == "ubuntu" ]]; then
$SUDO apt-get install -y bladerf libbladerf-dev
$SUDO apt-get install -y bladerf-firmware-fx3
$SUDO apt-get install -y bladerf-fpga-hostedx40
@@ -360,6 +368,10 @@ check_install_bladerf_driver(){
fi
}
flash_firmware_bladerf() {
$SUDO bladeRF-cli --flash-firmware /usr/share/Nuand/bladeRF/bladeRF_fw.img
}
check_install_lmssdr_driver(){
if ( [ -d "/usr/local/include/lime" ] &&
[ -f "/usr/local/include/lime/LimeSuite.h" ] )
@@ -441,7 +453,7 @@ check_install_additional_tools (){
local optional_packages=""
if [[ "$OS_BASEDISTRO" == "debian" ]]; then
case "$(get_distribution_release)" in
"ubuntu20.04" | "ubuntu22.04" | "debian11" | "debian12" )
"ubuntu20.04" | "ubuntu22.04" | "debian11" )
optional_packages="python3 python3-pip python3-dev python3-scipy python3-matplotlib python3-pyroute2 universal-ctags"
;;
esac
@@ -484,7 +496,7 @@ check_install_oai_software() {
if [[ "$OS_BASEDISTRO" == "debian" ]]; then
$SUDO apt install -y software-properties-common
case "$(get_distribution_release)" in
"debian11" | "debian12" )
"debian11")
specific_packages="libz-dev"
;;
esac

View File

@@ -1,5 +1,5 @@
diff --git a/fhi_lib/app/src/common.h b/fhi_lib/app/src/common.h
index ac5f471..b1acb26 100644
index ac5f471..ed9ab7d 100644
--- a/fhi_lib/app/src/common.h
+++ b/fhi_lib/app/src/common.h
@@ -28,7 +28,7 @@
@@ -7,7 +7,7 @@ index ac5f471..b1acb26 100644
#include <rte_mbuf.h>
-#define VERSIONX "oran_f_release_v1.0"
+#define VERSIONX "oran_f_release_v1.8"
+#define VERSIONX "oran_f_release_v1.7"
#define APP_O_DU 0
#define APP_O_RU 1
@@ -530,7 +530,7 @@ index 59b6850..322d238 100644
\ No newline at end of file
+}
diff --git a/fhi_lib/lib/src/xran_cb_proc.c b/fhi_lib/lib/src/xran_cb_proc.c
index 08660f3..b5de607 100644
index 08660f3..2bb5187 100644
--- a/fhi_lib/lib/src/xran_cb_proc.c
+++ b/fhi_lib/lib/src/xran_cb_proc.c
@@ -25,7 +25,10 @@
@@ -544,55 +544,6 @@ index 08660f3..b5de607 100644
#include <rte_common.h>
#include <rte_eal.h>
#include <rte_errno.h>
@@ -106,6 +109,12 @@ void xran_timer_arm_for_deadline(struct rte_timer *tim, void* arg, void *p_dev_
+ nSubframeIdx*SLOTNUM_PER_SUBFRAME(p_xran_dev_ctx->interval_us_local)
+ nSlotIdx;
+ /* correction to rx_tti for Ta4 values larger than a TTI */
+ rx_tti -= p_xran_dev_ctx->offset_num_slots_up_ul;
+ if (rx_tti < 0) {
+ rx_tti += (SUBFRAMES_PER_SYSTEMFRAME*SLOTNUM_PER_SUBFRAME(p_xran_dev_ctx->interval_us_local)*1024);
+ }
+
p_xran_dev_ctx->cb_timer_ctx[p_xran_dev_ctx->timer_put % MAX_CB_TIMER_CTX].tti_to_process = rx_tti;
if (xran_if_current_state == XRAN_RUNNING){
rte_timer_cb_t fct = (rte_timer_cb_t)arg;
@@ -195,6 +204,7 @@ xran_timing_create_cbs(void *args)
max_dl_delay_offset += interval_us_local;
numSlots++;
}
+ p_dev_ctx->offset_num_slots_cp_dl = numSlots;
/* Delay from start of 'a' slot */
delay_cp_dl_max = max_dl_delay_offset - p_dev_ctx->fh_cfg.T1a_max_cp_dl;
@@ -227,6 +237,7 @@ xran_timing_create_cbs(void *args)
ul_delay_offset += interval_us_local;
numSlots++;
}
+ p_dev_ctx->offset_num_slots_cp_ul = numSlots;
delay_cp_ul = ul_delay_offset - p_dev_ctx->fh_cfg.T1a_max_cp_ul;
sym_cp_ul = (delay_cp_ul*1000/(interval_us_local*1000/N_SYM_PER_SLOT)+1);
uint8_t ul_offset_sym = (numSlots+1)*N_SYM_PER_SLOT - sym_cp_ul;
@@ -242,8 +253,18 @@ xran_timing_create_cbs(void *args)
delay_up = p_dev_ctx->fh_cfg.T1a_max_up;
time_diff_us = p_dev_ctx->fh_cfg.Ta4_max;
+ uint32_t ul_up_delay_offset=interval_us_local;
+ numSlots=0;
+ while(time_diff_us > ul_up_delay_offset) {
+ ul_up_delay_offset += interval_us_local;
+ numSlots++;
+ }
+ p_dev_ctx->offset_num_slots_up_ul = numSlots;
+
+ printf("offset_num_slots_cp_dl=%d, offset_num_slots_cp_ul=%d, offset_num_slots_up_ul=%d\n",
+ p_dev_ctx->offset_num_slots_cp_dl, p_dev_ctx->offset_num_slots_cp_ul, p_dev_ctx->offset_num_slots_up_ul);
- delay_cp2up = delay_up-delay_cp_dl_max;
+ delay_cp2up = p_dev_ctx->fh_cfg.T1a_max_cp_dl - p_dev_ctx->fh_cfg.T1a_max_up;
time_diff_nSymb = time_diff_us*1000/(interval_us_local*1000/N_SYM_PER_SLOT);
diff --git a/fhi_lib/lib/src/xran_common.c b/fhi_lib/lib/src/xran_common.c
index dc40ad9..1b88013 100644
--- a/fhi_lib/lib/src/xran_common.c
@@ -1081,7 +1032,7 @@ index 4acade1..c939edc 100644
for(i = 0; i < xran_ports_num; i++){
g_xran_dev_ctx[i] = pCtx;
diff --git a/fhi_lib/lib/src/xran_dev.h b/fhi_lib/lib/src/xran_dev.h
index 0371a53..778b38d 100644
index 0371a53..dd76b49 100644
--- a/fhi_lib/lib/src/xran_dev.h
+++ b/fhi_lib/lib/src/xran_dev.h
@@ -201,6 +201,7 @@ struct __rte_cache_aligned xran_device_ctx
@@ -1092,18 +1043,6 @@ index 0371a53..778b38d 100644
int64_t offset_sec;
int64_t offset_nsec; //offset to GPS time calcuated based on alpha and beta
uint32_t interval_us_local;
@@ -254,6 +255,11 @@ struct __rte_cache_aligned xran_device_ctx
int32_t sym_up; /**< when we start sym 0 of up with respect to OTA time as measured in symbols */
int32_t sym_up_ul;
+ /* used to support large T1a/Ta4 values */
+ int32_t offset_num_slots_cp_dl;
+ int32_t offset_num_slots_cp_ul;
+ int32_t offset_num_slots_up_ul;
+
xran_fh_tti_callback_fn ttiCb[XRAN_CB_MAX];
void *TtiCbParam[XRAN_CB_MAX];
uint32_t SkipTti[XRAN_CB_MAX];
diff --git a/fhi_lib/lib/src/xran_frame_struct.c b/fhi_lib/lib/src/xran_frame_struct.c
index fbb1298..44aaf92 100644
--- a/fhi_lib/lib/src/xran_frame_struct.c
@@ -1143,7 +1082,7 @@ index 7ed0a3a..8e66945 100644
#ifdef __cplusplus
}
diff --git a/fhi_lib/lib/src/xran_main.c b/fhi_lib/lib/src/xran_main.c
index 7c472d7..db03d94 100644
index 7c472d7..7c7cf91 100644
--- a/fhi_lib/lib/src/xran_main.c
+++ b/fhi_lib/lib/src/xran_main.c
@@ -35,7 +35,11 @@
@@ -1193,42 +1132,7 @@ index 7c472d7..db03d94 100644
print_dbg("PRACH eAxC_offset %d\n", pPrachCPConfig->eAxC_offset);
/* Save some configs for app */
@@ -623,6 +646,8 @@ xran_prepare_cp_dl_slot(uint16_t xran_port_id, uint32_t nSlotIdx, uint32_t nCcS
return ret;
}
+uint32_t prev_dl_tti = -1;
+
void
tx_cp_dl_cb(struct rte_timer *tim, void *arg)
{
@@ -655,7 +680,7 @@ tx_cp_dl_cb(struct rte_timer *tim, void *arg)
if(first_call && p_xran_dev_ctx->enableCP)
{
- tti = pTCtx[(xran_lib_ota_tti[PortId] & 1) ^ 1].tti_to_process;
+ tti = pTCtx[(xran_lib_ota_tti[PortId] & 1) ^ 1].tti_to_process + p_xran_dev_ctx->offset_num_slots_cp_dl;
buf_id = tti % XRAN_N_FE_BUF_LEN;
slot_id = XranGetSlotNum(tti, SLOTNUM_PER_SUBFRAME(interval_us_local));
@@ -665,6 +690,16 @@ tx_cp_dl_cb(struct rte_timer *tim, void *arg)
{
/* Wrap around to next second */
frame_id = (frame_id + NUM_OF_FRAMES_PER_SECOND) & 0x3ff;
+ prev_dl_tti = -1;
+ }
+ else if (p_xran_dev_ctx->offset_num_slots_cp_dl > 0 && prev_dl_tti == xran_fs_get_max_slot(PortId) - 1 + p_xran_dev_ctx->offset_num_slots_cp_dl)
+ {
+ prev_dl_tti = tti;
+ tti = xran_fs_get_max_slot(PortId) + p_xran_dev_ctx->offset_num_slots_cp_dl;
+ }
+ else
+ {
+ prev_dl_tti = tti;
}
ctx_id = tti % XRAN_MAX_SECTIONDB_CTX;
@@ -1169,6 +1204,10 @@ xran_prepare_cp_ul_slot(uint16_t xran_port_id, uint32_t nSlotIdx, uint32_t nCcS
@@ -1169,6 +1192,10 @@ xran_prepare_cp_ul_slot(uint16_t xran_port_id, uint32_t nSlotIdx, uint32_t nCcS
uint8_t seqid = xran_get_cp_seqid(pHandle, XRAN_DIR_UL, cc_id, port_id);
beam_id = xran_get_beamid(pHandle, XRAN_DIR_UL, cc_id, port_id, slot_id);
@@ -1239,45 +1143,7 @@ index 7c472d7..db03d94 100644
ret = generate_cpmsg_prach(pHandle, &params, sect_geninfo, mbuf, p_xran_dev_ctx,
frame_id, subframe_id, slot_id, tti,
beam_id, cc_id, port_id, occasionid, seqid);
@@ -1213,6 +1252,7 @@ xran_prepare_cp_ul_slot(uint16_t xran_port_id, uint32_t nSlotIdx, uint32_t nCcS
return ret;
}
+uint32_t prev_ul_tti = -1;
void
tx_cp_ul_cb(struct rte_timer *tim, void *arg)
@@ -1254,7 +1294,7 @@ tx_cp_ul_cb(struct rte_timer *tim, void *arg)
pTCtx = &p_xran_dev_ctx->timer_ctx[0];
interval = p_xran_dev_ctx->interval_us_local;
PortId = p_xran_dev_ctx->xran_port_id;
- tti = pTCtx[(xran_lib_ota_tti[PortId] & 1) ^ 1].tti_to_process;
+ tti = pTCtx[(xran_lib_ota_tti[PortId] & 1) ^ 1].tti_to_process + p_xran_dev_ctx->offset_num_slots_cp_ul;
buf_id = tti % XRAN_N_FE_BUF_LEN;
ctx_id = tti % XRAN_MAX_SECTIONDB_CTX;
@@ -1264,7 +1304,20 @@ tx_cp_ul_cb(struct rte_timer *tim, void *arg)
/* Wrap around to next second */
if(tti == 0)
+ {
frame_id = (frame_id + NUM_OF_FRAMES_PER_SECOND) & 0x3ff;
+ prev_ul_tti = tti;
+ }
+ else if (p_xran_dev_ctx->offset_num_slots_cp_ul > 0 && prev_ul_tti == xran_fs_get_max_slot(PortId) - 1 + p_xran_dev_ctx->offset_num_slots_cp_ul)
+ {
+ prev_ul_tti = tti;
+ tti = xran_fs_get_max_slot(PortId) + p_xran_dev_ctx->offset_num_slots_cp_ul;
+ }
+ else
+ {
+ prev_ul_tti = tti;
+ }
+
if(xran_get_ru_category(pHandle) == XRAN_CATEGORY_A)
num_eAxc = xran_get_num_eAxc(pHandle);
else
@@ -1338,6 +1391,10 @@ tx_cp_ul_cb(struct rte_timer *tim, void *arg)
@@ -1338,6 +1365,10 @@ tx_cp_ul_cb(struct rte_timer *tim, void *arg)
uint8_t seqid = xran_get_cp_seqid(pHandle, XRAN_DIR_UL, cc_id, port_id);
beam_id = xran_get_beamid(pHandle, XRAN_DIR_UL, cc_id, port_id, slot_id);
@@ -1288,7 +1154,7 @@ index 7c472d7..db03d94 100644
ret = generate_cpmsg_prach(pHandle, &params, sect_geninfo, mbuf, p_xran_dev_ctx,
frame_id, subframe_id, slot_id, tti,
beam_id, cc_id, port_id, occasionid, seqid);
@@ -1570,6 +1627,7 @@ int32_t handle_ecpri_ethertype(struct rte_mbuf* pkt_q[], uint16_t xport_id, stru
@@ -1570,6 +1601,7 @@ int32_t handle_ecpri_ethertype(struct rte_mbuf* pkt_q[], uint16_t xport_id, stru
{
case ECPRI_IQ_DATA:
pkt_data[num_data++] = pkt;
@@ -1296,7 +1162,7 @@ index 7c472d7..db03d94 100644
break;
// For RU emulation
case ECPRI_RT_CONTROL_DATA:
@@ -1587,7 +1645,7 @@ int32_t handle_ecpri_ethertype(struct rte_mbuf* pkt_q[], uint16_t xport_id, stru
@@ -1587,7 +1619,7 @@ int32_t handle_ecpri_ethertype(struct rte_mbuf* pkt_q[], uint16_t xport_id, stru
break;
default:
if (p_dev_ctx->fh_init.io_cfg.id == O_DU) {
@@ -1305,7 +1171,7 @@ index 7c472d7..db03d94 100644
}
break;
}
@@ -1876,7 +1934,7 @@ xran_sector_get_instances (uint32_t xran_port, void * pDevHandle, uint16_t nNumI
@@ -1876,7 +1908,7 @@ xran_sector_get_instances (uint32_t xran_port, void * pDevHandle, uint16_t nNumI
for (i = 0; i < nNumInstances; i++) {
/* Allocate Memory for CC handles */
@@ -1314,7 +1180,7 @@ index 7c472d7..db03d94 100644
if(pCcHandle == NULL)
return XRAN_STATUS_RESOURCE;
@@ -2347,8 +2405,7 @@ ring_processing_func_per_port(void* args)
@@ -2347,8 +2379,7 @@ ring_processing_func_per_port(void* args)
for (i = 0; i < ctx->io_cfg.num_vfs && i < XRAN_VF_MAX; i = i+1) {
if (ctx->vf2xran_port[i] == port_id) {
for(qi = 0; qi < ctx->rxq_per_port[port_id]; qi++){
@@ -1324,7 +1190,7 @@ index 7c472d7..db03d94 100644
}
}
}
@@ -2414,9 +2471,6 @@ xran_spawn_workers(void)
@@ -2414,9 +2445,6 @@ xran_spawn_workers(void)
nWorkerCore = nWorkerCore << 1;
}
@@ -1334,7 +1200,7 @@ index 7c472d7..db03d94 100644
printf("O-XU %d\n", eth_ctx->io_cfg.id);
printf("HW %d\n", icx_cpu);
printf("Num cores %d\n", total_num_cores);
@@ -2453,7 +2507,7 @@ xran_spawn_workers(void)
@@ -2453,7 +2481,7 @@ xran_spawn_workers(void)
eth_ctx->time_wrk_cfg.arg = NULL;
eth_ctx->time_wrk_cfg.state = 1;
@@ -1343,7 +1209,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -2475,7 +2529,7 @@ xran_spawn_workers(void)
@@ -2475,7 +2503,7 @@ xran_spawn_workers(void)
/* workers */
/** 0 **/
@@ -1352,7 +1218,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -2502,7 +2556,7 @@ xran_spawn_workers(void)
@@ -2502,7 +2530,7 @@ xran_spawn_workers(void)
}
/** 1 - CP GEN **/
@@ -1361,7 +1227,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -2536,7 +2590,7 @@ xran_spawn_workers(void)
@@ -2536,7 +2564,7 @@ xran_spawn_workers(void)
else
p_dev->tx_sym_gen_func = xran_process_tx_sym_cp_on_opt;
@@ -1370,7 +1236,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -2559,7 +2613,7 @@ xran_spawn_workers(void)
@@ -2559,7 +2587,7 @@ xran_spawn_workers(void)
/* workers */
/** 0 **/
@@ -1379,7 +1245,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -2586,7 +2640,7 @@ xran_spawn_workers(void)
@@ -2586,7 +2614,7 @@ xran_spawn_workers(void)
}
/** 1 - CP GEN **/
@@ -1388,7 +1254,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -2613,7 +2667,7 @@ xran_spawn_workers(void)
@@ -2613,7 +2641,7 @@ xran_spawn_workers(void)
/* workers */
/** 0 **/
@@ -1397,7 +1263,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -2628,7 +2682,7 @@ xran_spawn_workers(void)
@@ -2628,7 +2656,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** 1 - CP GEN **/
@@ -1406,7 +1272,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -2643,7 +2697,7 @@ xran_spawn_workers(void)
@@ -2643,7 +2671,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** 2 UP GEN **/
@@ -1415,7 +1281,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -2682,7 +2736,7 @@ xran_spawn_workers(void)
@@ -2682,7 +2710,7 @@ xran_spawn_workers(void)
/* workers */
/** 0 **/
@@ -1424,7 +1290,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -2697,7 +2751,7 @@ xran_spawn_workers(void)
@@ -2697,7 +2725,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** 1 - CP GEN **/
@@ -1433,7 +1299,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -2712,7 +2766,7 @@ xran_spawn_workers(void)
@@ -2712,7 +2740,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** 2 UP GEN **/
@@ -1442,7 +1308,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -2727,7 +2781,7 @@ xran_spawn_workers(void)
@@ -2727,7 +2755,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** 3 UP GEN **/
@@ -1451,7 +1317,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -2766,7 +2820,7 @@ xran_spawn_workers(void)
@@ -2766,7 +2794,7 @@ xran_spawn_workers(void)
/* workers */
/** 0 **/
@@ -1460,7 +1326,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -2781,7 +2835,7 @@ xran_spawn_workers(void)
@@ -2781,7 +2809,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** 1 Eth Tx **/
@@ -1469,7 +1335,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
@@ -2797,7 +2851,7 @@ xran_spawn_workers(void)
@@ -2797,7 +2825,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** 2 - CP GEN **/
@@ -1478,7 +1344,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -2812,7 +2866,7 @@ xran_spawn_workers(void)
@@ -2812,7 +2840,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** 3 UP GEN **/
@@ -1487,7 +1353,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -2827,7 +2881,7 @@ xran_spawn_workers(void)
@@ -2827,7 +2855,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** 4 UP GEN **/
@@ -1496,7 +1362,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -2861,7 +2915,7 @@ xran_spawn_workers(void)
@@ -2861,7 +2889,7 @@ xran_spawn_workers(void)
/* workers */
/** 0 Eth RX */
@@ -1505,7 +1371,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -2876,7 +2930,7 @@ xran_spawn_workers(void)
@@ -2876,7 +2904,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** 1 FH RX and BBDEV */
@@ -1514,7 +1380,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -2891,7 +2945,7 @@ xran_spawn_workers(void)
@@ -2891,7 +2919,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** 2 FH RX and BBDEV */
@@ -1523,7 +1389,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -2906,7 +2960,7 @@ xran_spawn_workers(void)
@@ -2906,7 +2934,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** 3 FH RX and BBDEV */
@@ -1532,7 +1398,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -2921,7 +2975,7 @@ xran_spawn_workers(void)
@@ -2921,7 +2949,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** FH TX and BBDEV */
@@ -1541,7 +1407,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -2969,7 +3023,7 @@ xran_spawn_workers(void)
@@ -2969,7 +2997,7 @@ xran_spawn_workers(void)
/* p_dev->tx_sym_gen_func = xran_process_tx_sym_cp_on_opt; */
@@ -1550,7 +1416,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3004,7 +3058,7 @@ xran_spawn_workers(void)
@@ -3004,7 +3032,7 @@ xran_spawn_workers(void)
/* workers */
/** 0 **/
@@ -1559,7 +1425,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3031,7 +3085,7 @@ xran_spawn_workers(void)
@@ -3031,7 +3059,7 @@ xran_spawn_workers(void)
}
/** 1 - CP GEN **/
@@ -1568,7 +1434,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3062,7 +3116,7 @@ xran_spawn_workers(void)
@@ -3062,7 +3090,7 @@ xran_spawn_workers(void)
/* workers */
/** 0 **/
@@ -1577,7 +1443,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3089,7 +3143,7 @@ xran_spawn_workers(void)
@@ -3089,7 +3117,7 @@ xran_spawn_workers(void)
}
/** 1 - CP GEN **/
@@ -1586,7 +1452,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3115,7 +3169,7 @@ xran_spawn_workers(void)
@@ -3115,7 +3143,7 @@ xran_spawn_workers(void)
/* workers */
/** 0 **/
@@ -1595,7 +1461,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3130,7 +3184,7 @@ xran_spawn_workers(void)
@@ -3130,7 +3158,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** 1 - CP GEN **/
@@ -1604,7 +1470,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3145,7 +3199,7 @@ xran_spawn_workers(void)
@@ -3145,7 +3173,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** 2 UP GEN **/
@@ -1613,7 +1479,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3184,7 +3238,7 @@ xran_spawn_workers(void)
@@ -3184,7 +3212,7 @@ xran_spawn_workers(void)
/* workers */
/** 0 FH RX and BBDEV */
@@ -1622,7 +1488,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3199,7 +3253,7 @@ xran_spawn_workers(void)
@@ -3199,7 +3227,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** 1 - CP GEN **/
@@ -1631,7 +1497,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3214,7 +3268,7 @@ xran_spawn_workers(void)
@@ -3214,7 +3242,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** 2 UP GEN **/
@@ -1640,7 +1506,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3229,7 +3283,7 @@ xran_spawn_workers(void)
@@ -3229,7 +3257,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** 3 UP GEN **/
@@ -1649,7 +1515,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3266,7 +3320,7 @@ xran_spawn_workers(void)
@@ -3266,7 +3294,7 @@ xran_spawn_workers(void)
/* workers */
/** 0 **/
@@ -1658,7 +1524,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3281,7 +3335,7 @@ xran_spawn_workers(void)
@@ -3281,7 +3309,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** 1 - CP GEN **/
@@ -1667,7 +1533,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3296,7 +3350,7 @@ xran_spawn_workers(void)
@@ -3296,7 +3324,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** 2 UP GEN **/
@@ -1676,7 +1542,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3311,7 +3365,7 @@ xran_spawn_workers(void)
@@ -3311,7 +3339,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** 3 UP GEN **/
@@ -1685,7 +1551,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3326,7 +3380,7 @@ xran_spawn_workers(void)
@@ -3326,7 +3354,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** 4 UP GEN **/
@@ -1694,7 +1560,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3348,7 +3402,7 @@ xran_spawn_workers(void)
@@ -3348,7 +3376,7 @@ xran_spawn_workers(void)
/* workers */
/** 0 Eth RX */
@@ -1703,7 +1569,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3363,7 +3417,7 @@ xran_spawn_workers(void)
@@ -3363,7 +3391,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** 1 FH RX and BBDEV */
@@ -1712,7 +1578,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3378,7 +3432,7 @@ xran_spawn_workers(void)
@@ -3378,7 +3406,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** 2 FH RX and BBDEV */
@@ -1721,7 +1587,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3393,7 +3447,7 @@ xran_spawn_workers(void)
@@ -3393,7 +3421,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** 3 FH RX and BBDEV */
@@ -1730,7 +1596,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3408,7 +3462,7 @@ xran_spawn_workers(void)
@@ -3408,7 +3436,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** FH TX and BBDEV */
@@ -1739,7 +1605,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3435,7 +3489,7 @@ xran_spawn_workers(void)
@@ -3435,7 +3463,7 @@ xran_spawn_workers(void)
/* workers */
/** 0 Eth RX */
@@ -1748,7 +1614,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3450,7 +3504,7 @@ xran_spawn_workers(void)
@@ -3450,7 +3478,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** 1 FH RX and BBDEV */
@@ -1757,7 +1623,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3465,7 +3519,7 @@ xran_spawn_workers(void)
@@ -3465,7 +3493,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** 2 FH RX and BBDEV */
@@ -1766,7 +1632,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3480,7 +3534,7 @@ xran_spawn_workers(void)
@@ -3480,7 +3508,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** 3 FH RX and BBDEV */
@@ -1775,7 +1641,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3495,7 +3549,7 @@ xran_spawn_workers(void)
@@ -3495,7 +3523,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** 4 FH RX and BBDEV */
@@ -1784,7 +1650,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3510,7 +3564,7 @@ xran_spawn_workers(void)
@@ -3510,7 +3538,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** FH TX and BBDEV */
@@ -1793,7 +1659,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3537,7 +3591,7 @@ xran_spawn_workers(void)
@@ -3537,7 +3565,7 @@ xran_spawn_workers(void)
/* workers */
/** 0 **/
@@ -1802,7 +1668,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3562,7 +3616,7 @@ xran_spawn_workers(void)
@@ -3562,7 +3590,7 @@ xran_spawn_workers(void)
}
/** 1 - CP GEN **/
@@ -1811,7 +1677,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3577,7 +3631,7 @@ xran_spawn_workers(void)
@@ -3577,7 +3605,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** 2 UP GEN **/
@@ -1820,7 +1686,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3602,7 +3656,7 @@ xran_spawn_workers(void)
@@ -3602,7 +3630,7 @@ xran_spawn_workers(void)
}
/** 3 UP GEN **/
@@ -1829,7 +1695,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3627,7 +3681,7 @@ xran_spawn_workers(void)
@@ -3627,7 +3655,7 @@ xran_spawn_workers(void)
}
/** 4 UP GEN **/
@@ -1838,7 +1704,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3642,7 +3696,7 @@ xran_spawn_workers(void)
@@ -3642,7 +3670,7 @@ xran_spawn_workers(void)
eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx;
/** 5 UP GEN **/
@@ -1847,7 +1713,7 @@ index 7c472d7..db03d94 100644
if(pThCtx == NULL){
print_err("pThCtx allocation error\n");
return XRAN_STATUS_FAIL;
@@ -3754,6 +3808,7 @@ xran_open(void *pHandle, struct xran_fh_config* pConf)
@@ -3754,6 +3782,7 @@ xran_open(void *pHandle, struct xran_fh_config* pConf)
p_xran_dev_ctx->puschMaskSlot = pConf->puschMaskSlot;
p_xran_dev_ctx->DynamicSectionEna = pConf->DynamicSectionEna;
p_xran_dev_ctx->RunSlotPrbMapBySymbolEnable = pConf->RunSlotPrbMapBySymbolEnable;
@@ -1855,7 +1721,7 @@ index 7c472d7..db03d94 100644
p_xran_dev_ctx->dssEnable = pConf->dssEnable;
p_xran_dev_ctx->dssPeriod = pConf->dssPeriod;
for(i=0; i<pConf->dssPeriod; i++) {
@@ -4034,6 +4089,24 @@ xran_get_slot_idx (uint32_t PortId, uint32_t *nFrameIdx, uint32_t *nSubframeIdx,
@@ -4034,6 +4063,24 @@ xran_get_slot_idx (uint32_t PortId, uint32_t *nFrameIdx, uint32_t *nSubframeIdx,
return tti;
}
@@ -1880,7 +1746,7 @@ index 7c472d7..db03d94 100644
int32_t
xran_set_debug_stop(int32_t value, int32_t count)
{
@@ -4208,7 +4281,7 @@ int32_t xran_init_PrbMap_by_symbol_from_cfg(struct xran_prb_map* p_PrbMapIn, str
@@ -4208,7 +4255,7 @@ int32_t xran_init_PrbMap_by_symbol_from_cfg(struct xran_prb_map* p_PrbMapIn, str
int32_t i = 0, j = 0, nPrbElm = 0;
int16_t iqwidth = p_PrbMapIn->prbMap[0].iqWidth;
struct xran_prb_elm *p_prb_elm_src, *p_prb_elm_dst;
@@ -1889,7 +1755,7 @@ index 7c472d7..db03d94 100644
int32_t nRBStart_tmp, nRBremain, nStartSymb, nEndSymb, nRBStart, nRBEnd, nRBSize;
// int32_t eth_xran_up_headers_sz = sizeof(struct eth_xran_up_pkt_hdr);
// int32_t nmaxRB = (mtu - eth_xran_up_headers_sz - RTE_PKTMBUF_HEADROOM)/XRAN_PAYLOAD_1_RB_SZ(iqwidth);
@@ -4217,7 +4290,6 @@ int32_t xran_init_PrbMap_by_symbol_from_cfg(struct xran_prb_map* p_PrbMapIn, str
@@ -4217,7 +4264,6 @@ int32_t xran_init_PrbMap_by_symbol_from_cfg(struct xran_prb_map* p_PrbMapIn, str
if (mtu==9600)
nmaxRB--; //for some reason when mtu is 9600, only 195 RB can be sent, not 196
@@ -1897,7 +1763,7 @@ index 7c472d7..db03d94 100644
memcpy(p_PrbMapOut, p_PrbMapIn, sizeof(struct xran_prb_map));
for(i = 0; i < XRAN_NUM_OF_SYMBOL_PER_SLOT; i++)
{
@@ -4292,26 +4364,30 @@ int32_t xran_init_PrbMap_by_symbol_from_cfg(struct xran_prb_map* p_PrbMapIn, str
@@ -4292,26 +4338,30 @@ int32_t xran_init_PrbMap_by_symbol_from_cfg(struct xran_prb_map* p_PrbMapIn, str
for(; i < XRAN_NUM_OF_SYMBOL_PER_SLOT; i++)
{
@@ -2179,7 +2045,7 @@ index 72249bc..6b30084 100644
#include <rte_config.h>
diff --git a/fhi_lib/lib/src/xran_tx_proc.c b/fhi_lib/lib/src/xran_tx_proc.c
index 45a17a8..cca2dcc 100644
index 45a17a8..85ce6fa 100644
--- a/fhi_lib/lib/src/xran_tx_proc.c
+++ b/fhi_lib/lib/src/xran_tx_proc.c
@@ -35,7 +35,11 @@
@@ -2194,19 +2060,7 @@ index 45a17a8..cca2dcc 100644
#include <rte_common.h>
#include <rte_eal.h>
@@ -1399,6 +1403,11 @@ xran_process_tx_sym_cp_on_opt(void* pHandle, uint8_t ctx_id, uint32_t tti, int32
if(0!=ptr_sect_elm->cur_index)
{
+ /* prevent xran from sending DL U-plane packets when it should not */
+ if(p_xran_dev_ctx->fh_init.io_cfg.id == O_DU && xran_fs_get_slot_type(xran_port_id, 0, tti, XRAN_SLOT_TYPE_DL) != 1)
+ {
+ return 0;
+ }
num_sections = ptr_sect_elm->cur_index;
/* iterate C-Plane configuration to generate corresponding U-Plane */
vf_id = p_xran_dev_ctx->map2vf[direction][cc_id][ant_id][XRAN_UP_VF];
@@ -1514,7 +1523,11 @@ xran_process_tx_sym_cp_on_opt(void* pHandle, uint8_t ctx_id, uint32_t tti, int32
@@ -1514,7 +1518,11 @@ xran_process_tx_sym_cp_on_opt(void* pHandle, uint8_t ctx_id, uint32_t tti, int32
mb_oran_hdr_ext->buf_addr = ext_buff;
mb_oran_hdr_ext->buf_iova = ((struct rte_mempool_objhdr*)RTE_PTR_SUB(mb_base, rte_mempool_objhdr_size))->iova + RTE_PTR_DIFF(ext_buff, mb_base);
mb_oran_hdr_ext->buf_len = ext_buff_len;
@@ -2218,7 +2072,7 @@ index 45a17a8..cca2dcc 100644
mb_oran_hdr_ext->shinfo = p_share_data;
mb_oran_hdr_ext->data_off = (uint16_t)RTE_MIN((uint16_t)RTE_PKTMBUF_HEADROOM, (uint16_t)mb_oran_hdr_ext->buf_len) - rte_ether_hdr_size;
mb_oran_hdr_ext->data_len = (uint16_t)(mb_oran_hdr_ext->data_len + rte_ether_hdr_size);
@@ -1532,8 +1545,13 @@ xran_process_tx_sym_cp_on_opt(void* pHandle, uint8_t ctx_id, uint32_t tti, int32
@@ -1532,8 +1540,13 @@ xran_process_tx_sym_cp_on_opt(void* pHandle, uint8_t ctx_id, uint32_t tti, int32
/* Fill in the ethernet header. */
#ifndef TRANSMIT_BURST
@@ -2232,7 +2086,7 @@ index 45a17a8..cca2dcc 100644
((struct rte_ether_hdr*)pStart)->ether_type = ETHER_TYPE_ECPRI_BE; /* ethertype */
#endif
nPktSize = sizeof(struct rte_ether_hdr)
@@ -1878,7 +1896,11 @@ xran_process_tx_srs_cp_on(void* pHandle, uint8_t ctx_id, uint32_t tti, int32_t s
@@ -1878,7 +1891,11 @@ xran_process_tx_srs_cp_on(void* pHandle, uint8_t ctx_id, uint32_t tti, int32_t s
mb_oran_hdr_ext->buf_addr = ext_buff;
mb_oran_hdr_ext->buf_iova = ((struct rte_mempool_objhdr*)RTE_PTR_SUB(mb_base, rte_mempool_objhdr_size))->iova + RTE_PTR_DIFF(ext_buff, mb_base);
mb_oran_hdr_ext->buf_len = ext_buff_len;
@@ -2244,7 +2098,7 @@ index 45a17a8..cca2dcc 100644
mb_oran_hdr_ext->shinfo = p_share_data;
mb_oran_hdr_ext->data_off = (uint16_t)RTE_MIN((uint16_t)RTE_PKTMBUF_HEADROOM, (uint16_t)mb_oran_hdr_ext->buf_len) - rte_ether_hdr_size;
mb_oran_hdr_ext->data_len = (uint16_t)(mb_oran_hdr_ext->data_len + rte_ether_hdr_size);
@@ -1887,8 +1909,13 @@ xran_process_tx_srs_cp_on(void* pHandle, uint8_t ctx_id, uint32_t tti, int32_t s
@@ -1887,8 +1904,13 @@ xran_process_tx_srs_cp_on(void* pHandle, uint8_t ctx_id, uint32_t tti, int32_t s
pStart = (char*)((char*)mb_oran_hdr_ext->buf_addr + mb_oran_hdr_ext->data_off);
/* Fill in the ethernet header. */

View File

@@ -319,32 +319,6 @@ int config_libconfig_set(configmodule_interface_t *cfg, paramdef_t *cfgoptions,
}
}
static const char *config_type_to_name(int type)
{
switch (type) {
case CONFIG_TYPE_NONE:
return "none";
case CONFIG_TYPE_GROUP:
return "group";
case CONFIG_TYPE_INT:
return "integer";
case CONFIG_TYPE_INT64:
return "64-bit integer";
case CONFIG_TYPE_FLOAT:
return "float";
case CONFIG_TYPE_STRING:
return "string";
case CONFIG_TYPE_BOOL:
return "boolean";
case CONFIG_TYPE_ARRAY:
return "array";
case CONFIG_TYPE_LIST:
return "list";
default:
return "unknown";
}
}
int config_libconfig_get(configmodule_interface_t *cfg, paramdef_t *cfgoptions, int numoptions, char *prefix)
{
config_setting_t *setting;
@@ -374,26 +348,17 @@ int config_libconfig_get(configmodule_interface_t *cfg, paramdef_t *cfgoptions,
switch(cfgoptions[i].type) {
case TYPE_STRING:
setting = config_lookup(&(libconfig_privdata.cfg), cfgpath);
if (setting != NULL) {
int type = config_setting_type(setting);
if (type == CONFIG_TYPE_STRING) {
const char *strng = config_setting_get_string(setting);
config_check_valptr(cfg, &cfgoptions[i], 1, strlen(strng) + 1);
if (strlen(strng) + 1 > cfgoptions[i].numelt)
fprintf(stderr,
"[LIBCONFIG] %s: %s exceeds maximum length of %i bytes, value truncated\n",
cfgpath,
strng,
cfgoptions[i].numelt);
snprintf(*cfgoptions[i].strptr, cfgoptions[i].numelt, "%s", strng);
printf_params(cfg, "[LIBCONFIG] %s: \"%s\"\n", cfgpath, *cfgoptions[i].strptr);
} else {
fprintf(stderr,"[LIBCONFIG] expected a string input for %s but got type %s\n", cfgpath, config_type_to_name(type));
fatalerror = 1;
}
} else
if ( config_lookup_string(&(libconfig_privdata.cfg), cfgpath, (const char**)&str)) {
config_check_valptr(cfg, &cfgoptions[i], 1, strlen(str) + 1);
if ( strlen(str)+1 > cfgoptions[i].numelt )
fprintf(stderr,"[LIBCONFIG] %s: %s exceeds maximum length of %i bytes, value truncated\n",
cfgpath,str,cfgoptions[i].numelt);
snprintf( *cfgoptions[i].strptr , cfgoptions[i].numelt, "%s", str);
printf_params(cfg, "[LIBCONFIG] %s: \"%s\"\n", cfgpath, *cfgoptions[i].strptr);
} else {
defval = config_common_getdefault(cfg, &cfgoptions[i], prefix);
}
break;
case TYPE_STRINGLIST:

View File

@@ -14,9 +14,12 @@ add_subdirectory(nr)
add_subdirectory(LOG)
add_subdirectory(threadPool)
add_subdirectory(time_manager)
add_library(utils utils.c system.c time_meas.c time_stat.c tuntap_if.c reverse_bits.c)
add_library(utils utils.c system.c time_meas.c time_stat.c tuntap_if.c)
target_include_directories(utils PUBLIC .)
target_link_libraries(utils PRIVATE ${T_LIB})
if (ENABLE_TESTS)
add_subdirectory(hashtable/tests)
endif()
add_subdirectory(barrier)
add_subdirectory(actor)
add_subdirectory(shm_iq_channel)

View File

@@ -29,8 +29,6 @@
#define SHUTDOWN_ACTOR(ptr) shutdown_actor((Actor_t *)ptr);
#define FLUSH_ACTOR(ptr) flush_actor((Actor_t *)ptr);
typedef struct Actor_t {
notifiedFIFO_t fifo;
bool terminate;

View File

@@ -2,8 +2,6 @@ add_library(ds OBJECT
byte_array.c
byte_array_producer.c
seq_arr.c
hashtable.c
obj_hashtable.c
)
target_include_directories(ds PUBLIC ${CMAKE_CURRENT_SOURCE_DIR})

View File

@@ -2,9 +2,3 @@ add_executable(test_seq_arr test_seq_array.c)
target_link_libraries(test_seq_arr ds alg)
add_dependencies(tests test_seq_arr)
add_test(NAME test_seq_arr COMMAND test_seq_arr) # no options required
add_executable(test_hashtable test_hashtable.cpp)
add_dependencies(tests test_hashtable)
target_link_libraries(test_hashtable PRIVATE ds GTest::gtest)
add_test(NAME test_hashtable
COMMAND ./test_hashtable)

View File

@@ -0,0 +1,5 @@
add_executable(test_hashtable test_hashtable.cpp)
add_dependencies(tests test_hashtable)
target_link_libraries(test_hashtable PRIVATE HASHTABLE GTest::gtest)
add_test(NAME test_hashtable
COMMAND ./test_hashtable)

View File

@@ -37,6 +37,7 @@
#include "nr_common.h"
#include <limits.h>
#include <math.h>
#include <simde/x86/gfni.h>
#define C_SRS_NUMBER (64)
#define B_SRS_NUMBER (4)
@@ -111,6 +112,46 @@ static const unsigned short srs_bandwidth_config[C_SRS_NUMBER][B_SRS_NUMBER][2]
/* 63 */ {{272, 1}, {16, 17}, {8, 2}, {4, 2}},
};
static const uint8_t bit_reverse_table_256[] = {
0x00, 0x80, 0x40, 0xC0, 0x20, 0xA0, 0x60, 0xE0, 0x10, 0x90, 0x50, 0xD0, 0x30, 0xB0, 0x70, 0xF0, 0x08, 0x88, 0x48, 0xC8,
0x28, 0xA8, 0x68, 0xE8, 0x18, 0x98, 0x58, 0xD8, 0x38, 0xB8, 0x78, 0xF8, 0x04, 0x84, 0x44, 0xC4, 0x24, 0xA4, 0x64, 0xE4,
0x14, 0x94, 0x54, 0xD4, 0x34, 0xB4, 0x74, 0xF4, 0x0C, 0x8C, 0x4C, 0xCC, 0x2C, 0xAC, 0x6C, 0xEC, 0x1C, 0x9C, 0x5C, 0xDC,
0x3C, 0xBC, 0x7C, 0xFC, 0x02, 0x82, 0x42, 0xC2, 0x22, 0xA2, 0x62, 0xE2, 0x12, 0x92, 0x52, 0xD2, 0x32, 0xB2, 0x72, 0xF2,
0x0A, 0x8A, 0x4A, 0xCA, 0x2A, 0xAA, 0x6A, 0xEA, 0x1A, 0x9A, 0x5A, 0xDA, 0x3A, 0xBA, 0x7A, 0xFA, 0x06, 0x86, 0x46, 0xC6,
0x26, 0xA6, 0x66, 0xE6, 0x16, 0x96, 0x56, 0xD6, 0x36, 0xB6, 0x76, 0xF6, 0x0E, 0x8E, 0x4E, 0xCE, 0x2E, 0xAE, 0x6E, 0xEE,
0x1E, 0x9E, 0x5E, 0xDE, 0x3E, 0xBE, 0x7E, 0xFE, 0x01, 0x81, 0x41, 0xC1, 0x21, 0xA1, 0x61, 0xE1, 0x11, 0x91, 0x51, 0xD1,
0x31, 0xB1, 0x71, 0xF1, 0x09, 0x89, 0x49, 0xC9, 0x29, 0xA9, 0x69, 0xE9, 0x19, 0x99, 0x59, 0xD9, 0x39, 0xB9, 0x79, 0xF9,
0x05, 0x85, 0x45, 0xC5, 0x25, 0xA5, 0x65, 0xE5, 0x15, 0x95, 0x55, 0xD5, 0x35, 0xB5, 0x75, 0xF5, 0x0D, 0x8D, 0x4D, 0xCD,
0x2D, 0xAD, 0x6D, 0xED, 0x1D, 0x9D, 0x5D, 0xDD, 0x3D, 0xBD, 0x7D, 0xFD, 0x03, 0x83, 0x43, 0xC3, 0x23, 0xA3, 0x63, 0xE3,
0x13, 0x93, 0x53, 0xD3, 0x33, 0xB3, 0x73, 0xF3, 0x0B, 0x8B, 0x4B, 0xCB, 0x2B, 0xAB, 0x6B, 0xEB, 0x1B, 0x9B, 0x5B, 0xDB,
0x3B, 0xBB, 0x7B, 0xFB, 0x07, 0x87, 0x47, 0xC7, 0x27, 0xA7, 0x67, 0xE7, 0x17, 0x97, 0x57, 0xD7, 0x37, 0xB7, 0x77, 0xF7,
0x0F, 0x8F, 0x4F, 0xCF, 0x2F, 0xAF, 0x6F, 0xEF, 0x1F, 0x9F, 0x5F, 0xDF, 0x3F, 0xBF, 0x7F, 0xFF};
void reverse_bits_u8(uint8_t const* in, size_t sz, uint8_t* out)
{
DevAssert(in != NULL);
DevAssert(out != NULL);
// Bit reversal implementation based on https://wunkolo.github.io/post/2020/11/gf2p8affineqb-bit-reversal/
#if defined(__GFNI__) && defined(__AVX512F__)
int simde_sz = 64;
int i = 0;
int simde_bound = sz - simde_sz;
for (; i <= simde_bound; i += simde_sz) {
__m512i input = _mm512_loadu_epi8(&in[i]);
__m512i reversed = _mm512_gf2p8affine_epi64_epi8(input, _mm512_set1_epi64(0x8040201008040201), 0);
_mm512_storeu_epi8(&out[i], reversed);
}
for (; i < sz; ++i) {
out[i] = bit_reverse_table_256[in[i]];
}
#else
for(size_t i = 0; i < sz; ++i)
out[i] = bit_reverse_table_256[in[i]];
#endif
}
/** @brief 3GPP TS 38.133 Table 10.1.6.1-1 mapping from dBm to RSRP index */
uint8_t get_rsrp_index(int rsrp_dBm)
{
@@ -122,6 +163,31 @@ uint8_t get_rsrp_index(int rsrp_dBm)
return (uint8_t)index;
}
// Reverse bits implementation based on http://graphics.stanford.edu/~seander/bithacks.html
uint64_t reverse_bits(uint64_t in, int n_bits)
{
// Reverse n_bits in uint64_t variable, example:
// n_bits: 10
// in: 10 0000 1111
// return: 11 1100 0001
AssertFatal(n_bits <= 64, "Maximum bits to reverse is 64, impossible to reverse %d bits!\n", n_bits);
uint64_t rev_bits = 0;
uint8_t *p = (uint8_t *)&in;
uint8_t *q = (uint8_t *)&rev_bits;
int n_bytes = n_bits >> 3;
for (int n = 0; n < n_bytes; n++) {
q[n_bytes - 1 - n] = bit_reverse_table_256[p[n]];
}
// Reverse remaining bits (not aligned with 8-bit)
rev_bits = rev_bits << (n_bits % 8);
for (int i = n_bytes * 8; i < n_bits; i++) {
rev_bits |= ((in >> i) & 0x1) << (n_bits - i - 1);
}
return rev_bits;
}
#define NUM_BW_ENTRIES 15
static const int tables_5_3_2[5][NUM_BW_ENTRIES] = {
@@ -1381,31 +1447,6 @@ unsigned short get_N_b_srs(int c_srs, int b_srs) {
return srs_bandwidth_config[c_srs][b_srs][1];
}
// TODO: Implement to b_SRS = 1 and b_SRS = 2
long rrc_get_max_nr_csrs(const int max_rbs, const long b_SRS)
{
if(b_SRS>0) {
LOG_E(NR_RRC,"rrc_get_max_nr_csrs(): Not implemented yet for b_SRS>0\n");
return 0; // This c_srs is always valid
}
const uint16_t m_SRS[64] = { 4, 8, 12, 16, 16, 20, 24, 24, 28, 32, 36, 40, 48, 48, 52, 56, 60, 64, 72, 72, 76, 80, 88,
96, 96, 104, 112, 120, 120, 120, 128, 128, 128, 132, 136, 144, 144, 144, 144, 152, 160,
160, 160, 168, 176, 184, 192, 192, 192, 192, 208, 216, 224, 240, 240, 240, 240, 256, 256,
256, 264, 272, 272, 272 };
long c_srs = 0;
uint16_t m = 4;
for(int c = 1; c<64; c++) {
if(m_SRS[c]>m && m_SRS[c]<max_rbs) {
c_srs = c;
m = m_SRS[c];
}
}
return c_srs;
}
frequency_range_t get_freq_range_from_freq(uint64_t freq)
{
// 3GPP TS 38.101-1 Version 19.0.0 Table 5.1-1: Definition of frequency ranges
@@ -1446,35 +1487,3 @@ float get_beta_dmrs(int num_cdm_groups_no_data, bool is_type2)
}
return beta_dmrs_pusch;
}
/** @brief Construct full 5G-S-TMSI from 5G-S-TMSI components
* @param amf_set_id AMF Set ID (10 bits)
* @param amf_pointer AMF Pointer (6 bits)
* @param m_tmsi 5G-TMSI (32 bits)
* @return Full 5G-S-TMSI (48 bits)
* @note The 5G-S-TMSI is constructed as a 48-bit value:
* - Bits 38-47: AMF Set ID (10 bits)
* - Bits 32-37: AMF Pointer (6 bits)
* - Bits 0-31: 5G-TMSI (32 bits)
* @ref 3GPP TS 23.003 */
uint64_t nr_construct_5g_s_tmsi(uint16_t amf_set_id, uint8_t amf_pointer, uint32_t m_tmsi)
{
// Construct full 5G-S-TMSI: <AMF Set ID (10 bits)><AMF Pointer (6 bits)><5G-TMSI (32 bits)>
return ((uint64_t)amf_set_id << 38) | ((uint64_t)amf_pointer << 32) | m_tmsi;
}
/** @brief Construct 5G-S-TMSI-Part1 from 5G-S-TMSI components
* @param amf_set_id AMF Set ID (10 bits)
* @param amf_pointer AMF Pointer (6 bits)
* @param m_tmsi 5G-TMSI (32 bits)
* @return 5G-S-TMSI-Part1 (rightmost 39 bits of the full 5G-S-TMSI)
* @note 5G-S-TMSI-Part1 is the rightmost 39 bits of the full 5G-S-TMSI:
* - Bits 32-37: AMF Pointer (6 bits)
* - Bits 0-31: 5G-TMSI (32 bits)
* @ref 3GPP TS 23.003 */
uint64_t nr_construct_5g_s_tmsi_part1(uint16_t amf_set_id, uint8_t amf_pointer, uint32_t m_tmsi)
{
// Construct full 5G-S-TMSI and extract Part1: rightmost 39 bits
uint64_t full_s_tmsi = nr_construct_5g_s_tmsi(amf_set_id, amf_pointer, m_tmsi);
return full_s_tmsi & ((1ULL << 39) - 1);
}

View File

@@ -286,6 +286,9 @@ static inline void warn_higher_threequarter_fs(const int n_rb, const int mu)
mu);
}
uint64_t reverse_bits(uint64_t in, int n_bits);
void reverse_bits_u8(uint8_t const* in, size_t sz, uint8_t* out);
uint64_t from_nrarfcn(int nr_bandP, uint8_t scs_index, uint32_t dl_nrarfcn);
uint32_t to_nrarfcn(int nr_bandP, uint64_t dl_CarrierFreq, uint8_t scs_index, uint32_t bw);
@@ -354,12 +357,6 @@ frequency_range_t get_freq_range_from_band(uint16_t band);
*/
float get_beta_dmrs(int num_cdm_groups_no_data, bool is_type2);
/** @brief Construct full 5G-S-TMSI from 5G-S-TMSI components */
uint64_t nr_construct_5g_s_tmsi(uint16_t amf_set_id, uint8_t amf_pointer, uint32_t m_tmsi);
/** @brief Construct 5G-S-TMSI-Part1 from 5G-S-TMSI components */
uint64_t nr_construct_5g_s_tmsi_part1(uint16_t amf_set_id, uint8_t amf_pointer, uint32_t m_tmsi);
#define CEILIDIV(a,b) ((a+b-1)/b)
#define ROUNDIDIV(a,b) (((a<<1)+b)/(b<<1))
#define BOUNDED_EVAL(a, b, c) (min(c, max(a, b)))

View File

@@ -1,92 +0,0 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
#include "reverse_bits.h"
// we avoid assertions.h as it necessitates othe dependencies (e.g., exit_function)
#include <assert.h>
#include <simde/x86/gfni.h>
static const uint8_t bit_reverse_table_256[] = {
0x00, 0x80, 0x40, 0xC0, 0x20, 0xA0, 0x60, 0xE0, 0x10, 0x90, 0x50, 0xD0, 0x30, 0xB0, 0x70, 0xF0, 0x08, 0x88, 0x48, 0xC8,
0x28, 0xA8, 0x68, 0xE8, 0x18, 0x98, 0x58, 0xD8, 0x38, 0xB8, 0x78, 0xF8, 0x04, 0x84, 0x44, 0xC4, 0x24, 0xA4, 0x64, 0xE4,
0x14, 0x94, 0x54, 0xD4, 0x34, 0xB4, 0x74, 0xF4, 0x0C, 0x8C, 0x4C, 0xCC, 0x2C, 0xAC, 0x6C, 0xEC, 0x1C, 0x9C, 0x5C, 0xDC,
0x3C, 0xBC, 0x7C, 0xFC, 0x02, 0x82, 0x42, 0xC2, 0x22, 0xA2, 0x62, 0xE2, 0x12, 0x92, 0x52, 0xD2, 0x32, 0xB2, 0x72, 0xF2,
0x0A, 0x8A, 0x4A, 0xCA, 0x2A, 0xAA, 0x6A, 0xEA, 0x1A, 0x9A, 0x5A, 0xDA, 0x3A, 0xBA, 0x7A, 0xFA, 0x06, 0x86, 0x46, 0xC6,
0x26, 0xA6, 0x66, 0xE6, 0x16, 0x96, 0x56, 0xD6, 0x36, 0xB6, 0x76, 0xF6, 0x0E, 0x8E, 0x4E, 0xCE, 0x2E, 0xAE, 0x6E, 0xEE,
0x1E, 0x9E, 0x5E, 0xDE, 0x3E, 0xBE, 0x7E, 0xFE, 0x01, 0x81, 0x41, 0xC1, 0x21, 0xA1, 0x61, 0xE1, 0x11, 0x91, 0x51, 0xD1,
0x31, 0xB1, 0x71, 0xF1, 0x09, 0x89, 0x49, 0xC9, 0x29, 0xA9, 0x69, 0xE9, 0x19, 0x99, 0x59, 0xD9, 0x39, 0xB9, 0x79, 0xF9,
0x05, 0x85, 0x45, 0xC5, 0x25, 0xA5, 0x65, 0xE5, 0x15, 0x95, 0x55, 0xD5, 0x35, 0xB5, 0x75, 0xF5, 0x0D, 0x8D, 0x4D, 0xCD,
0x2D, 0xAD, 0x6D, 0xED, 0x1D, 0x9D, 0x5D, 0xDD, 0x3D, 0xBD, 0x7D, 0xFD, 0x03, 0x83, 0x43, 0xC3, 0x23, 0xA3, 0x63, 0xE3,
0x13, 0x93, 0x53, 0xD3, 0x33, 0xB3, 0x73, 0xF3, 0x0B, 0x8B, 0x4B, 0xCB, 0x2B, 0xAB, 0x6B, 0xEB, 0x1B, 0x9B, 0x5B, 0xDB,
0x3B, 0xBB, 0x7B, 0xFB, 0x07, 0x87, 0x47, 0xC7, 0x27, 0xA7, 0x67, 0xE7, 0x17, 0x97, 0x57, 0xD7, 0x37, 0xB7, 0x77, 0xF7,
0x0F, 0x8F, 0x4F, 0xCF, 0x2F, 0xAF, 0x6F, 0xEF, 0x1F, 0x9F, 0x5F, 0xDF, 0x3F, 0xBF, 0x7F, 0xFF};
void reverse_bits_u8(uint8_t const* in, size_t sz, uint8_t* out)
{
assert(in != NULL);
assert(out != NULL);
// Bit reversal implementation based on https://wunkolo.github.io/post/2020/11/gf2p8affineqb-bit-reversal/
#if defined(__GFNI__) && defined(__AVX512F__)
int simde_sz = 64;
int i = 0;
int simde_bound = sz - simde_sz;
for (; i <= simde_bound; i += simde_sz) {
__m512i input = _mm512_loadu_epi8(&in[i]);
__m512i reversed = _mm512_gf2p8affine_epi64_epi8(input, _mm512_set1_epi64(0x8040201008040201), 0);
_mm512_storeu_epi8(&out[i], reversed);
}
for (; i < sz; ++i) {
out[i] = bit_reverse_table_256[in[i]];
}
#else
for(size_t i = 0; i < sz; ++i)
out[i] = bit_reverse_table_256[in[i]];
#endif
}
// Reverse bits implementation based on http://graphics.stanford.edu/~seander/bithacks.html
uint64_t reverse_bits(uint64_t in, int n_bits)
{
// Reverse n_bits in uint64_t variable, example:
// n_bits: 10
// in: 10 0000 1111
// return: 11 1100 0001
assert(n_bits <= 64); // Maximum bits to reverse is 64
uint64_t rev_bits = 0;
uint8_t *p = (uint8_t *)&in;
uint8_t *q = (uint8_t *)&rev_bits;
int n_bytes = n_bits >> 3;
for (int n = 0; n < n_bytes; n++) {
q[n_bytes - 1 - n] = bit_reverse_table_256[p[n]];
}
// Reverse remaining bits (not aligned with 8-bit)
rev_bits = rev_bits << (n_bits % 8);
for (int i = n_bytes * 8; i < n_bits; i++) {
rev_bits |= ((in >> i) & 0x1) << (n_bits - i - 1);
}
return rev_bits;
}

View File

@@ -1,31 +0,0 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
#ifndef REVERSE_BITS_H_
#define REVERSE_BITS_H_
#include <stddef.h>
#include <stdint.h>
uint64_t reverse_bits(uint64_t in, int n_bits);
void reverse_bits_u8(uint8_t const* in, size_t sz, uint8_t* out);
#endif /* REVERSE_BITS_H_ */

View File

@@ -168,7 +168,7 @@ int fetch_du_by_ue_id(char *buf, int debug, telnet_printfunc_t prnt)
nr_rrc_du_container_t *du = get_du_for_ue(RC.nrrrc[0], ue_id);
if (du) {
prnt("gNB_DU_id %ld is connected to ue_id %ld\n", du->gNB_DU_id, ue_id);
prnt("gNB_DU_id %d is connected to ue_id %ld\n", du->setup_req->gNB_DU_id, ue_id);
return 0;
} else {
ERROR_MSG_RET("No DU connected\n");

View File

@@ -229,7 +229,7 @@ In the `MACRLCs` section of the gNB/DU configuration file:
(see `ulsch_max_frame_inactivity`) or after scheduling request (SR)
* `identity_precoding_matrix` (default 0=false): flag to enable to use only
the identity precoding matrix in DL precoding
* `set_analog_beamforming` (default "none"): parameter to enable analog
* `set_analog_beamforming` (default 0=false): flag to enable analog
beamforming (for more information [`analog_beamforming.md`](../analog_beamforming.md))
* `beam_duration` (default 1): duration/number of consecutive slots for a given set of
beams, depending on hardware switching performance

View File

@@ -719,37 +719,7 @@ RU must be rebooted so the changes apply.
- The measured throughput was **520 Mbps DL** and **40 Mbps UL**.
- With newer OAI versions, throughput degrades. This issue is currently under investigation.
#### ProtO-RU
[ProtO-RU](https://github.com/NUS-CIR/ProtO-RU) is a software implementation of an O-RAN 7.2 RU using a NI USRP.
Different from other COTS RUs, ProtO-RU requires a larger DU delay profile which is larger than the TTI interval.
The OAI configuration file [`gnb.sa.band78.106prb.fhi72.1x1-proto-ru.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.106prb.fhi72.1x1-proto-ru.conf) corresponds to:
- TDD pattern `DDDSU`, 2.5ms
- Bandwidth 40MHz
- MTU 9216
- 1T1R
##### RU configuration
First, compile the RU as outlined in the [building ProtO-RU tutorial](https://github.com/NUS-CIR/ProtO-RU/tree/proto-ru?tab=readme-ov-file#building-proto-ru).
Then, ensure that both your DU and ProtO-RU host are PTP synchronized.
Next, use the RU config, [protoru-OAI-B210-TDD-n78-40MHz-1x1-30kHz.yml](https://github.com/NUS-CIR/ProtO-RU/blob/proto-ru/proto-ru/conf-files/protoru-OAI-B210-TDD-n78-40MHz-1x1-30kHz.yml), which corresponds to the above mentioned DU config file.
In addition, please adapt the DU MAC address and VLAN tag to your needs.
ProtO-RU was successfully tested with USRP B210.
If you are using a different SDR (e.g., N310), you will need to update the ProtO-RU and the DU configurations accordingly.
Launch ProtO-RU with the adapted configuration file with the command:
```bash
sudo ./ru_emulator -c <path-to/protoru-OAI-B210-TDD-n78-40MHz-1x1-30kHz.yml>
```
Finally, start the OAI gNB.
## Configure Network Interfaces and DPDK VFs
### Configure Network Interfaces and DPDK VFs
The 7.2 fronthaul uses the xran library, which requires DPDK. In this step, we
need to configure network interfaces to send data to the RU, and configure DPDK
@@ -1031,7 +1001,6 @@ Edit the sample OAI gNB configuration file and check following parameters:
* `prach_config`: PRACH-specific configuration
* `eAxC_offset`: PRACH antenna offset; if not set, default value of `N = max(Nrx,Ntx)` is used
* `kbar`: the PRACH guard interval, provided in RU
* `app_id`: `DU` or `RU`. Sets the application `id` value in xRAN. Use the default value: `DU`.
Layer mapping (eAxC offsets) happens as follows:
- For PUSCH/PDSCH, the layers are mapped to `[0,1,...,Nrx-1]/[0,1,...,Ntx-1]` where `Nrx/Ntx` is the
@@ -1492,7 +1461,6 @@ fhi_72 = {
* `dpdk_iova_mode`: [*]
* `owdm_enable`: [*]
* `fh_config`: only DU delay profile (`T1a` and `Ta4`)
* `app_id`: [*]
[*] see [Configure OAI gNB](#configure-oai-gnb) for more details

View File

@@ -44,7 +44,6 @@ There is some general information in the [OpenAirInterface Gitlab Wiki](https://
- [How to run a 4G setup using L1 simulator](./L1SIM.md) _Note: we recommend the RFsimulator_
- [How to use the L2 simulator](./L2NFAPI.md)
- [How to use the OAI channel simulator](../openair1/SIMULATION/TOOLS/DOC/channel_simulation.md)
- [How to use GPU-accelerated channel simulation](../openair1/SIMULATION/TOOLS/DOC/gpu_acceleration.md)
- [How to use multiple BWPs](./RUN_NR_multiple_BWPs.md)
- [How to run OAI-VNF and OAI-PNF](./nfapi.md): how to run the FAPI/nFAPI split,
including some general remarks on FAPI/nFAPI.
@@ -104,7 +103,7 @@ Some directories under `radio` contain READMEs:
- [RFsimulator](../radio/rfsimulator/README.md)
- [USRP](../radio/USRP/README.md)
- [BladeRF](../radio/BLADERF/README.md)
- [BladeRF](../radio/BLADERF/README)
- [IQPlayer](../radio/iqplayer/DOC/iqrecordplayer_usage.md), and [general documentation](./iqrecordplayer_usage.md)
- [fhi_72](../radio/fhi_72/README.md)
- [vrtsim](../radio/vrtsim/README.md)

View File

@@ -390,255 +390,13 @@ sequenceDiagram
## Structures
### DUs and Cells
### Cells
OAI 5G RRC is enabling support for multiple DUs, with each DU potentially
serving multiple cells (though currently each DU is limited to one cell in practice).
The architecture separates DU management from cell management to enable future
multi-cell per DU capability.
OAI 5G RRC does not actually handle multiple cells as of now, but multiple DUs,
each being limited to one cell.
#### DU Management
DU-related data is stored in `nr_rrc_du_container_t`, and kept in a red-black
tree indexed by the unique SCTP association ID (`assoc_id`). Each DU container stores:
- DU identity and name
- SCTP association ID for F1 interface communication
- RRC version information
- Sequential array of cell pointers (`cells`) - stores pointers to cells belonging to this DU (seq_arr_t)
Key Functions:
- `get_du_by_assoc_id()` - Lookup DU by SCTP association ID (O(log d) tree lookup)
- `get_du_for_ue()` - Get DU associated with a specific UE
- `find_target_du()` - Find a target DU for handover operations
#### Cell Management
Cell-related data is stored in `nr_rrc_cell_container_t`. Cells are stored in two data structures:
1. Global cell tree (`rrc->cells`): Red-black tree indexed by `cell_id`, containing all cells from all DUs. Used for efficient O(log N_CELL) lookups across all DUs. PCI reuse across the network is allowed and this is reflected in the tree.
2. DU cell array (`du->cells`): Sequential array (seq_arr_t) of cell pointers, storing only cells belonging to that specific DU. Used for DU-specific operations. PCI must be unique within a DU.
Each cell container stores:
- Cell identity (NR Cell ID) and PCI (Physical Cell ID)
- Link to serving DU via the unique `assoc_id`
- Cell-specific information (PLMN, TAC, frequency, mode TDD/FDD)
- MIB, SIB1, and MeasurementTimingConfiguration messages
Key Functions:
- `get_cell_by_cell_id()` - Lookup cell by NR Cell ID using global cell tree
- `rrc_get_cell_for_du()` - Lookup cell by cell_id within a specific DU's cell array
- `rrc_get_cell_by_pci_for_du()` - Lookup cell by PCI within DU's cells array
- `rrc_add_cell_to_du()` - Add cell to DU's sequential array
- `rrc_free_cell_container()` - Free cell container and associated ASN.1 structures
Architecture Notes:
- The `assoc_id` field (in cell and DUs containers) links cells to their serving DUs
- When a DU connects via F1 Setup, cells are added to both the global tree and the DU's array
- When a DU disconnects, cells are removed from both structures
- Global tree enables efficient cross-DU cell lookups (O(log N_CELL))
- DU array enables efficient per-DU cell iteration (O(k) where k=cells per DU)
- Each DU maintains a sequential array of cell pointers
##### DU and Cell Lifecycle
The following diagram shows the lifecycle of DUs and their associated cells, including the main F1AP messages and internal operations:
```mermaid
sequenceDiagram
participant CellTree as Cell Tree
participant DUTree as DU Tree
participant CU as CU-CP
participant DU as gNB-DU
participant UE as UE
Note over DU,CellTree: DU Connection & Cell Registration
DU->>CU: F1AP F1 Setup Request(DU ID, Cell Info, MIB/SIB1)
Note over CU: Validate: PLMN match with CU configuration
alt PLMN mismatch
CU->>DU: F1AP F1 Setup Failure (PLMN not served)
end
Note over CU: Validate: DU ID uniqueness (RB_FOREACH gNB_DU_id in DU tree)
alt DU ID already exists
CU->>DU: F1AP F1 Setup Failure (Unspecified)
end
Note over CU: Validate: Neighbour cell configuration (if configured)
alt Neighbour config invalid
CU->>DU: F1AP F1 Setup Failure (Unspecified)
end
Note over CU: Extract MIB/SIB1 from system info (if present)
alt System info extraction fails
CU->>DU: F1AP F1 Setup Failure (Semantic error)
end
alt All Validations Success
CU->>CU: Create cell container (nr_rrc_cell_container_t), set assoc_id, copy cell info, set MIB/SIB1
CU->>CellTree: rrc_add_cell(rrc, new) - RB_INSERT into global tree, increment rrc->num_cells
alt Duplicate cell_id (collision)
CU->>DU: F1AP F1 Setup Failure (Cell not available)
else Cell added to tree
CU->>CU: Create DU container (nr_rrc_du_container_t)
CU->>CU: seq_arr_init(&du->cells) - Initialize DU's cell array
CU->>DUTree: rrc_add_du(rrc, du) - RB_INSERT(du), increment rrc->num_dus
CU->>CU: rrc_add_cell_to_du(&du->cells, new) - Add cell to DU's array
Note over CU,UE: Cell available for UE association
CU->>CU: Encode CU SIBs (if configured)
CU->>DU: F1AP F1 Setup Response(Cells to Activate, CU SIBs)
Note over CU,CellTree: DU and cell now active
end
end
UE->>CU: RRC Setup Request
Note over CU: rrc_handle_RRCSetupRequest()
CU->>CU: get_cell_by_cell_id(&rrc->cells) - Use global tree
alt Cell not found
CU->>UE: RRC Reject
end
Note over CU: UE Cell Association
CU->>CU: rrc_add_ue_serving_cell(UE, cell, RRC_PCELL_INDEX)
Note over DU,CellTree: Optional: Cell Configuration Update
opt DU sends configuration update
DU->>CU: F1AP DU Configuration Update(Add/Modify/Delete cells)
Note over CU: get_du_by_assoc_id(assoc_id)
loop For each cell to add
CU->>CU: get_cell_by_cell_id(&rrc->cells) - Check cell_id uniqueness globally
alt Duplicate cell_id found
Note over CU: Reject and return
end
CU->>CU: rrc_get_cell_by_pci_for_du(&du->cells) - Check PCI unique within DU
alt Duplicate PCI in DU
Note over CU: Reject and return
end
end
loop Cell Modification
CU->>CU: get_cell_by_cell_id(cells, old_nr_cellid) - Find cell by old cell_id
CU->>CU: update_cell_info(rrc, old_nci, new_ci) - Update in place
Note over CU: If cell_id changes: RB_REMOVE then re-insert after update
Note over CU: Free old MTC if new measurement timing config provided
Note over CU: If sys_info present: extract MIB/SIB1 and set on cell
end
CU->>DU: F1AP DU Configuration Update Acknowledge
end
Note over DU,CellTree: DU Disconnection & Cell Cleanup
DU-->>CU: F1AP Lost Connection(SCTP connection lost)
Note over CU: rrc_CU_process_f1_lost_connection()
CU->>DUTree: RB_FIND(du) - Find DU by assoc_id using temporary struct
alt DU not found
Note over CU: Log warning and return
end
Note over CU: rrc_cleanup_du() then invalidate_du_connections()
CU->>CU: Iterate cells in DU's array (last to first)
loop For each cell in DU's array
CU->>CU: seq_arr_erase(&du->cells, cell_ptr) - Remove from DU's array
CU->>CellTree: rrc_rm_cell(): RB_REMOVE(cell), decrement num_cells, rrc_free_cell_container()
end
CU->>DUTree: rrc_rm_du(): RB_REMOVE(du) - Remove DU from tree
CU->>CU: Decrement rrc->num_dus counter
CU->>CU: seq_arr_free(&du->cells) - Free DU's cell array
CU->>CU: rrc_free_du_container() - Free DU container
Note over CU: invalidate_du_connections()
loop For each UE:
CU->>CU: rrc_remove_ue_scells_from_du() - Remove SCells from disconnected DU
alt UE belongs to disconnected DU
CU->>CU: Set du_assoc_id = 0 (mark DU offline)
CU->>CU: Trigger NGAP UE Context Release Request
end
end
Note over CU,CellTree: DU and all cells removed
```
Key Functions:
- `rrc_gNB_process_f1_setup_req()` - Handles F1 Setup Request, creates DU and cell containers.
Validates PLMN match, DU ID uniqueness, and cell_id/PCI uniqueness before creating containers.
- `rrc_gNB_process_f1_du_configuration_update()` - Handles cell configuration updates.
Currently supports cell modification (MIB/SIB1 updates) and validates cell additions, but cell addition
and deletion are not yet fully implemented.
- `rrc_CU_process_f1_lost_connection()` - Handles DU disconnection. Calls `rrc_cleanup_du()` to
remove all cells and the DU from their trees and free resources, then
`invalidate_du_connections()` to clean up UE associations (e.g. trigger NGAP UE Context Release Request for UEs on that DU).
#### UE Cell Association Management
The RRC maintains a per-UE association with serving cells, tracking which cells
a UE is currently using. This replaces the previous single-cell assumption and
enables proper multi-cell support where each UE can have multiple serving cells
(one PCell and up to 31 SCells). The servCellIndex (TS 38.331) is tracked per-UE
in the `ue_serving_cell_t` structure in the UE context (the same cell can have
different servCellIndex values for different UEs).
Data Structures:
- `ue_serving_cell_t`: Stores serving cell information (nci, servCellIndex, assoc_id)
- `gNB_RRC_UE_t.serving_cells`: Dynamic array (seq_arr_t) of serving cell entries. PCell is always at index 0.
Key Functions:
- `rrc_add_ue_serving_cell()` - Adds a new serving cell to UE's serving_cells array.
- `rrc_get_ue_serving_cell_by_id()` - Retrieves serving cell entry by servCellIndex.
- `ue_get_pcell_entry()` - Returns the PCell serving cell entry (first element in serving_cells).
- `rrc_remove_ue_scells_from_du()` - Removes all serving cells belonging to a specific DU via assoc_id (e.g. during handover or DU disconnection).
##### Handover and Cell Association Updates
During handover, the UE's serving cell list is updated so the PCell reflects the target cell and source-DU cells are removed.
###### F1 handover (inter-DU, same CU-CP)
Cell association is updated when the **source** DU sends F1AP UE Context Modification Response (after it has sent the RRC Reconfiguration to the UE). The CU-CP is a single RRC instance; both source DU and target DU are under the same CU.
```mermaid
sequenceDiagram
participant SourceDU as Source DU
participant CU as CU-CP
Note over CU,CU: F1 handover: cell association update on Context Modification Response
SourceDU->>CU: F1AP UE Context Modification Response
Note over CU: rrc_CU_process_ue_context_modification_response()
Note over CU: Check: ho_context && source && target (F1 HO)
alt F1 handover in progress
CU->>CU: nr_rrc_apply_target_context(UE)
Note over CU: F1 UE data: du_assoc_id = target DU, secondary_ue = target DU UE ID, RNTI = target RNTI
CU->>CU: nr_rrc_update_cell_assoc_after_ho(rrc, UE)
Note over CU: F1 branch (ho_context->source present):
CU->>CU: rrc_remove_ue_scells_from_du(UE, source_ctx->cell->assoc_id)
Note over CU: Remove all serving cells (incl. PCell) belonging to source DU
CU->>CU: rrc_add_ue_serving_cell(UE, target_ctx->cell, RRC_PCELL_INDEX)
Note over CU: Handover complete: PCell = target cell, source DU cells removed
end
```
###### N2 handover (inter-gNB: source CU vs target CU)
Cell association is updated only on the target CU-CP, when the target DU sends F1AP UE Context Setup Response. The UE context was created for handover, so there is no existing serving cell to remove. The flow is triggered inside the handover request acknowledge callback.
- Target CU-CP: Receives HANDOVER REQUEST, sets up bearer and F1 UE context on target DU; when the target DU sends F1AP UE Context Setup Response, the target CU runs the cell-association update and then sends HANDOVER REQUEST ACKNOWLEDGE.
```mermaid
sequenceDiagram
participant TargetDU as Target DU
participant TargetCU as Target CU-CP
Note over TargetCU: N2 handover: cell association update
Note over TargetCU: F1AP UE Context Setup Resp from target DU (in nr_rrc_n2_ho_acknowledge)
TargetDU->>TargetCU: F1AP UE Context Setup Response
Note over TargetCU: rrc_CU_process_ue_context_setup_response() then callback ho_req_ack()
Note over TargetCU: nr_rrc_n2_ho_acknowledge(rrc, UE)
TargetCU->>TargetCU: nr_rrc_apply_target_context(UE)
Note over TargetCU: F1 UE data: du_assoc_id = target DU, secondary_ue = target DU UE ID, RNTI = target RNTI
TargetCU->>TargetCU: nr_rrc_update_cell_assoc_after_ho(rrc, UE)
Note over TargetCU: N2 branch (ho_context->source NULL): no SCells to remove
TargetCU->>TargetCU: rrc_add_ue_serving_cell(UE, target_ctx->cell, RRC_PCELL_INDEX)
Note over TargetCU: Then: encode Handover Command, send NGAP HANDOVER REQUEST ACKNOWLEDGE
```
## UE Context
UE context information is stored in `gNB_RRC_UE_t`, which includes:
- Serving cells tracking: Dynamic array of serving cells (PCell + SCells)
- Security context: Keys, algorithms, and security state
- Radio bearers: SRB and DRB configurations
- PDU sessions: Active PDU session information
- Handover context: Temporary data during handover procedures
Cell-related data is stored in `nr_rrc_du_container_t`, and kept in a tree
indexed by the SCTP association ID.
### CU-UPs

View File

@@ -41,19 +41,15 @@ For each DU, it prints:
```
1 connected DUs
[1] DU ID 3584 (gNB-OAI) integrated DU-CU: 1 cell
[1] nrCellID 12345678, PCI 0, Mode TDD, SSB ARFCN 641280
TDD: band 78 ARFCN 640008 SCS 30 (kHz) PRB 106
[1] DU ID 3584 (gNB-OAI-DU) assoc_id 8: nrCellID 12345678, PCI 0, SSB ARFCN 641280
TDD: band 78 ARFCN 640008 SCS 30 (kHz) PRB 106
```
The output shows:
- Total number of connected DUs
- For each DU: an index (`[1]`), the DU ID and name, connection type (either `integrated DU-CU` for monolithic deployments or `assoc_id X` for split deployments), and the number of cells served by this DU
- For each cell served by the DU: a cell index (`[1]`), the NR Cell ID, Physical Cell ID (PCI), operating mode (TDD or FDD), and SSB ARFCN
- Cell-specific frequency information: for TDD mode, the band, Point A ARFCN, subcarrier spacing (SCS), and number of resource blocks (PRB); for FDD mode, separate DL and UL frequency information
The RRC enables the support of multiple cells per DU (though currently each DU
typically serves one cell in practice).
i.e., an index (`[1]`), the DU ID and it's name, the SCTP association ID
(`assoc_id 8`, cf. UE information), and DU specific information for the cell
(cell ID, physical cell identity/PCI, the SSB frequency in ARFCN notation, the
band and Point A ARFCN, subcarrier spacing/SCS, and the number of resource
blocks/PRB). Only one cell per DU is supported.
As of now, it does not print information about connected CU-UPs or AMFs.
@@ -88,7 +84,7 @@ the [MAC configuration](../MAC/mac-usage.md) as well for SIB configuration.
`0xffffff` is a reserved value and means "no SD"
Note that: SST=1, no SD is "eMBB"; SST=2, no SD is "URLLC"; SST=3, no SD
is "mMTC"
- `enable_sdap` (default: true): enable the use of the SDAP layer. If
- `enable_sdap` (default: false): enable the use of the SDAP layer. If
deactivated, a transparent SDAP header is prepended to packets, but no
further processing is being done.
- `cu_sibs` (default: `[]`) list of SIBs to give to the DU for transmission.
@@ -98,6 +94,8 @@ the [MAC configuration](../MAC/mac-usage.md) as well for SIB configuration.
- `um_on_default_drb` (default: false): use RLC UM instead of RLC AM on default
bearers
- `drbs` (default: 0): the number of DRBs to allocate for a UE, only useful for
do-ra or phy-test testing
#### Neighbor-gNB configuration

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@@ -544,7 +544,7 @@ sudo ./nr-uesoftmodem --do-ra
#### Run OAI with SDAP & Custom DRBs
SDAP is enabled by default. To disable SDAP, include `--gNBs.[0].enable_sdap 0` to the binary's arguments.
To run OAI gNB with SDAP, simply include `--gNBs.[0].enable_sdap 1` to the binary's arguments.
The DRB creation is dependent on the 5QI.
If the 5QI corresponds to a GBR Flow it assigns a dedicated data radio bearer.

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@@ -220,7 +220,7 @@ information on how the images are built.
~5G-NR
- 5G-NR SA test setup: OAI VNF + PNF/NVIDIA CUBB on gracehopper1-oai + Foxconn RU, up2 + COTS UE (Quectel RM520N), OAI CN5G
- container images for gNB deployment
- [RAN-SA-Multi-Antenna-CN5G](https://jenkins-oai.eurecom.fr/view/RAN/job/RAN-SA-Multi-Antenna-CN5G/)
- [RAN-SA-2x2-Module-CN5G](https://jenkins-oai.eurecom.fr/view/RAN/job/RAN-SA-2x2-Module-CN5G/)
~5G-NR
- matix + N310 (gNB), up2 + COTS UE (Quectel RM520N), OAI 5GC deployed in docker on matix
- NR performance tests: 2x2 configuration, 60 MHz and 100 MHz bandwidth
@@ -234,10 +234,6 @@ information on how the images are built.
- groot (CU+DU0) + B210, rocket (DU1) + B210, raspix (Quectel RM520N UE), OAI CN5G
- OpenShift cluster for CN deployment
- Attenuator (mini circuits RC4DAT-6G-60) - controlled from rocket
- [RAN-Channel-Simulation](https://jenkins-oai.eurecom.fr/job/RAN-Channel-Simulation/)
~5G-NR
- gracehopper1-oai
- run channel simulation on CPU and GPU using test_channel_scalability
### RAN-CI-NSA-Trigger

View File

@@ -19,12 +19,12 @@ Analog beamforming implementation also allows to enable distributed antenna syst
A set of parameters in configuration files controls the implementation of analog beamforming and instructs the scheduler on how to behave in such scenarios. Since most notably this technique in 5G is employed in FR2, the configuration file example currently available is a RFsim one for band 261. [Config file example](../ci-scripts/conf_files/gnb.sa.band257.u3.66prb.rfsim.conf)
In the `MACRLC` section of configuration files, there are three new parameters: `set_analog_beamforming`, `beam_duration` and `beams_per_period`. The explanation of these parameters is here provided:
- `set_analog_beamforming` can be set to "none", "preconfigured" or "lophy" (default value is "none")
- `set_analog_beamforming` can be set a value equal to 1 or 2 to activate or 0 to desactivate analog beamforming (default value is 0)
- `beam_duration` is the number of slots (currently minimum duration of a beam) the scheduler is tied to a beam (default value is 1)
- `beams_per_period` is the number of concurrent beams the RU can handle in the beam duration (default value is 1)
- `beam_weights` is a vector field containing the set of beam indices to be provided by the OAI L1 to the RU is also required. In current implementation, the number of beam indices should be equal to the number of SSBs transmitted
Setting analog beamforming to "preconfigured" or "lophy" changes the way FAPI beam index is treated. By setting "preconfigured", we instruct L1 to look up in Hi-PHY preconfigured DBM beam index. By setting "lophy", we instruct L2 to directly signal to Lo-PHY the beam index (e.g. over 7.2x fronthaul).
Setting analog beamforming to 1 or 2 changes the way FAPI beam index is treated. By setting 1, we instruct L1 to look up in Hi-PHY preconfigured DBM beam index. By setting 2, we instruct L2 to directly signal to Lo-PHY the beam index (e.g. over 7.2x fronthaul).
DAS is enabled by setting to 1 the parameter `enable_das` in the L1 section of the configuration file. In case of DAS enabled, the field `beam_weights` in `MACRLC` section can be omitted and the number of beams per period equals the total number of beams.
@@ -60,7 +60,7 @@ Therefore, in case of analog beamforming, L2 provides in each channel FAPI messa
## L1 implementation
To handle multiple concurrent beams, the buffers containing Tx and Rx data in frequency domain (`txdataF` and `rxdataF`) have been extended by one dimension to contain multiple concurrent beams to be transmitted/received.
The function `beam_index_allocation`, called by every L1 channel, is responsible to match the FAPI analog beam index to the RU beam index and to store the latter `beam_id` structure, which allocates the beams per symbol, despite L2 only supporting beam change at slot level. At the same time, the function returns the concurrent beam index, to be used to store data in frequency domain buffers. While doing so, the function also checks if there is room for current beam in the list of concurrent beams, which should always be the case, if L2 properly allocated the channels.
The function `beam_index_allocation` TODO is responsible to match the FAPI analog beam index to the RU beam index and to store the latter `beam_id` structure, which allocates the beams per symbol, despite L2 only supporting beam change at slot level. At the same time, the function returns the concurrent beam index, to be used to store data in frequency domain buffers. While doing so, the function also checks if there is room for current beam in the list of concurrent beams, which should always be the case, if L2 properly allocated the channels.
In case of DAS, since each beam corresponds to a specific antenna port, the `beam_index_allocation` function is simplified in the sense that the beam index corresponds to the antenna port index of the frequency domain buffers.

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@@ -26,7 +26,7 @@
#---------------------------------------------------------------------
FROM registry.redhat.io/ubi9/ubi:latest AS ran-base
FROM registry.access.redhat.com/ubi9/ubi:latest AS ran-base
LABEL MAINTAINER OpenAirInterface <contact@openairinterface.org>
ARG NEEDED_GIT_PROXY
ARG TARGETARCH

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@@ -86,4 +86,4 @@ COPY oaienv .
RUN /bin/sh oaienv && \
cd cmake_targets && \
mkdir -p log && \
./build_oai -I -w USRP -w BLADERF --install-optional-packages
./build_oai -I -w USRP --install-optional-packages

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@@ -42,15 +42,22 @@ RUN \
# Mount CPM package cache
--mount=type=cache,target=/root/.cache/cpm/ \
/bin/sh oaienv && \
mkdir -p cmake_targets/ran_build/build && \
cd cmake_targets/ran_build/build && \
cmake ../../../ -GNinja \
-DENABLE_TELNETSRV=ON -DENABLE_ENBSCOPE=ON -DENABLE_UESCOPE=ON -DENABLE_NRSCOPE=ON \
-DOAI_USRP=ON -DOAI_BLADERF=ON -DOAI_ETHERNET=ON -DOAI_VRTSIM_TAPS_CLIENT=ON \
-DE2_AGENT=ON -DKPM_VERSION=KPM_V3_00 -DE2AP_VERSION=E2AP_V3 \
-DAVX512=OFF && \
# -DCMAKE_C_FLAGS=-Werror -DCMAKE_CXX_FLAGS=-Werror && \
ninja
cd cmake_targets && \
mkdir -p log && \
./build_oai -c --ninja \
--eNB --gNB --RU --UE --nrUE \
--build-lib "telnetsrv enbscope uescope nrscope" \
-w USRP -t Ethernet \
--build-e2 --cmake-opt -DKPM_VERSION=$KPM_VERSION --cmake-opt -DE2AP_VERSION=$E2AP_VERSION \
--cmake-opt -DOAI_VRTSIM_TAPS_CLIENT=ON \
--noavx512 \
--build-tool-opt -k10 \
--cmake-opt -DCMAKE_C_FLAGS="-Werror" --cmake-opt -DCMAKE_CXX_FLAGS="-Werror" $BUILD_OPTION && \
# Mainly to see if the sanitize option was perfectly executed
echo "---- ldd on executables ----" && \
ldd ran_build/build/*softmodem* ran_build/build/nr-cuup ran_build/build/oairu && \
echo "---- ldd on shared libraries ----" && \
ldd ran_build/build/*.so
## Build FlexRIC for SM Models
RUN \

View File

@@ -31,7 +31,7 @@ FROM ran-build:latest AS enb-build
#start from scratch for target executable
FROM registry.redhat.io/ubi9/ubi:latest AS oai-enb
FROM registry.access.redhat.com/ubi9/ubi:latest AS oai-enb
ENV TZ=Europe/Paris
RUN dnf update -y && \

View File

@@ -38,7 +38,7 @@ RUN /bin/sh oaienv && \
./build_oai -w AW2SORI -t Ethernet
#start from scratch for target executable
FROM registry.redhat.io/ubi9/ubi:latest AS oai-gnb-aw2s
FROM registry.access.redhat.com/ubi9/ubi:latest AS oai-gnb-aw2s
ENV TZ=Europe/Paris
# Install EPEL for RHEL9

View File

@@ -30,7 +30,7 @@ FROM ran-base:latest AS gnb-base
FROM ran-build-fhi72:latest AS gnb-build
#start from scratch for target executable
FROM registry.redhat.io/ubi9/ubi:latest AS oai-gnb-fhi72
FROM registry.access.redhat.com/ubi9/ubi:latest AS oai-gnb-fhi72
ENV TZ=Europe/Paris
# Install EPEL for RHEL9

View File

@@ -31,7 +31,7 @@ FROM ran-build:latest AS gnb-build
#start from scratch for target executable
FROM registry.redhat.io/ubi9/ubi:latest AS oai-gnb
FROM registry.access.redhat.com/ubi9/ubi:latest AS oai-gnb
ENV TZ=Europe/Paris
# Install EPEL for RHEL9

View File

@@ -31,7 +31,7 @@ FROM ran-build:latest AS ru-build
#start from scratch for target executable
FROM registry.redhat.io/ubi9/ubi:latest AS oai-lte-ru
FROM registry.access.redhat.com/ubi9/ubi:latest AS oai-lte-ru
ENV TZ=Europe/Paris
RUN dnf update -y && \

View File

@@ -31,7 +31,7 @@ FROM ran-build:latest AS lte-ue-build
#start from scratch for target executable
FROM registry.redhat.io/ubi9/ubi:latest AS oai-lte-ue
FROM registry.access.redhat.com/ubi9/ubi:latest AS oai-lte-ue
ENV TZ=Europe/Paris
RUN dnf update -y && \

View File

@@ -32,7 +32,7 @@ FROM ran-build:latest AS gnb-build
RUN cp /oai-ran/docker/scripts/gnb_entrypoint.sh /oai-ran/docker/scripts/entrypoint.sh
#start from scratch for target executable
FROM registry.redhat.io/ubi9/ubi:latest AS oai-nr-cuup
FROM registry.access.redhat.com/ubi9/ubi:latest AS oai-nr-cuup
ENV TZ=Europe/Paris
# Install EPEL

View File

@@ -31,7 +31,7 @@ FROM ran-build:latest AS nr-ue-build
#start from scratch for target executable
FROM registry.redhat.io/ubi9/ubi:latest AS oai-nr-ue
FROM registry.access.redhat.com/ubi9/ubi:latest AS oai-nr-ue
ENV TZ=Europe/Paris
# Install EPEL for RHEL9

View File

@@ -46,7 +46,7 @@ RUN /bin/sh oaienv && \
ninja -k10 -j36
#start from scratch for target executable
FROM registry.redhat.io/ubi9/ubi:latest AS oai-physim
FROM registry.access.redhat.com/ubi9/ubi:latest AS oai-physim
RUN dnf update -y && \
dnf install -y \

View File

@@ -1,2 +0,0 @@
add_library(softmodem_common STATIC softmodem-common.c)
target_link_libraries(softmodem_common PUBLIC shlib_loader)

View File

@@ -33,6 +33,8 @@
#include "PHY/phy_extern.h"
#include "PHY/TOOLS/phy_scope_interface.h"
#include "common/utils/LOG/log.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
// #include "PHY/INIT/phy_init.h"
#include "openair2/ENB_APP/enb_paramdef.h"
#include "system.h"
#include "nfapi/oai_integration/vendor_ext.h"

View File

@@ -236,11 +236,11 @@ static size_t dump_L1_meas_stats(PHY_VARS_gNB *gNB, RU_t *ru, char *output, size
output += print_meas_log(&gNB->l1_tx_proc, "L1 Tx job", NULL, NULL, output, end - output);
output += print_meas_log(&gNB->l1_rx_proc, "L1 Rx job", NULL, NULL, output, end - output);
output += print_meas_log(&gNB->phy_proc_tx, "L1 Tx processing", NULL, NULL, output, end - output);
output += print_meas_log(&gNB->dlsch_encoding_stats, "DLSCH encoding", NULL, NULL, output, end - output);
output += print_meas_log(&gNB->dlsch_scrambling_stats, "DLSCH scrambling", NULL, NULL, output, end-output);
output += print_meas_log(&gNB->dlsch_modulation_stats, "DLSCH modulation", NULL, NULL, output, end - output);
output += print_meas_log(&gNB->dlsch_resource_mapping_stats, "DLSCH resource mapping", NULL, NULL, output,end-output);
output += print_meas_log(&gNB->dlsch_precoding_stats, "DLSCH precoding", NULL, NULL, output,end-output);
output += print_meas_log(&gNB->dlsch_stats.encoding, "DLSCH encoding", NULL, NULL, output, end - output);
output += print_meas_log(&gNB->dlsch_stats.scrambling, "DLSCH scrambling", NULL, NULL, output, end-output);
output += print_meas_log(&gNB->dlsch_stats.modulation, "DLSCH modulation", NULL, NULL, output, end - output);
output += print_meas_log(&gNB->dlsch_stats.resource_mapping, "DLSCH resource mapping", NULL, NULL, output,end-output);
output += print_meas_log(&gNB->dlsch_stats.precoding, "DLSCH precoding", NULL, NULL, output,end-output);
output += print_meas_log(&gNB->phy_proc_rx, "L1 Rx processing", NULL, NULL, output, end - output);
output += print_meas_log(&gNB->ts_deinterleave, "UL segment deinterleaving", NULL, NULL, output, end - output);
output += print_meas_log(&gNB->ts_rate_unmatch, "UL segment rate recovery", NULL, NULL, output, end - output);
@@ -301,7 +301,7 @@ void *nrL1_stats_thread(void *param) {
reset_meas(&gNB->l1_tx_proc);
reset_meas(&gNB->l1_rx_proc);
reset_meas(&gNB->phy_proc_tx);
reset_meas(&gNB->dlsch_encoding_stats);
reset_meas(&gNB->dlsch_stats.encoding);
reset_meas(&gNB->phy_proc_rx);
reset_meas(&gNB->ts_deinterleave);
reset_meas(&gNB->ts_rate_unmatch);
@@ -309,10 +309,10 @@ void *nrL1_stats_thread(void *param) {
reset_meas(&gNB->ul_indication_stats);
reset_meas(&gNB->slot_indication_stats);
reset_meas(&gNB->rx_pusch_stats);
reset_meas(&gNB->dlsch_scrambling_stats);
reset_meas(&gNB->dlsch_modulation_stats);
reset_meas(&gNB->dlsch_resource_mapping_stats);
reset_meas(&gNB->dlsch_precoding_stats);
reset_meas(&gNB->dlsch_stats.scrambling);
reset_meas(&gNB->dlsch_stats.modulation);
reset_meas(&gNB->dlsch_stats.resource_mapping);
reset_meas(&gNB->dlsch_stats.precoding);
while (!oai_exit) {
sleep(1);
if (ftruncate(fileno(fd), 0) != 0 || fseek(fd, 0, SEEK_SET) != 0) {

View File

@@ -48,6 +48,7 @@
#include "common/utils/LOG/log.h"
#include "common/utils/time_manager/time_manager.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include <executables/softmodem-common.h>
/* these variables have to be defined before including ENB_APP/enb_paramdef.h and GNB_APP/gnb_paramdef.h */
@@ -243,8 +244,9 @@ int connect_rau(RU_t *ru) {
/* Southbound Fronthaul functions, RCC/RAU */
// southbound IF5 fronthaul for 16-bit OAI format
void fh_if5_south_out(RU_t *ru, int frame, int slot, uint64_t timestamp)
{
void fh_if5_south_out(RU_t *ru, int frame, int slot, uint64_t timestamp) {
if (ru == RC.ru[0])
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST, ru->proc.timestamp_tx & 0xffffffff);
int offset = get_samples_slot_timestamp(ru->nr_frame_parms, slot);
void *buffs[ru->nb_tx];
for (int aid = 0; aid < ru->nb_tx; aid++)
@@ -264,8 +266,10 @@ void fh_if5_south_out(RU_t *ru, int frame, int slot, uint64_t timestamp)
}
// southbound IF4p5 fronthaul
void fh_if4p5_south_out(RU_t *ru, int frame, int slot, uint64_t timestamp)
{
void fh_if4p5_south_out(RU_t *ru, int frame, int slot, uint64_t timestamp) {
if (ru == RC.ru[0])
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST, ru->proc.timestamp_tx & 0xffffffff);
LOG_D(PHY,"Sending IF4p5 for frame %d subframe %d\n",ru->proc.frame_tx,ru->proc.tti_tx);
if ((nr_slot_select(&ru->config, ru->proc.frame_tx, ru->proc.tti_tx) & NR_DOWNLINK_SLOT) > 0)
@@ -277,10 +281,12 @@ void fh_if4p5_south_out(RU_t *ru, int frame, int slot, uint64_t timestamp)
// Synchronous if5 from south
void fh_if5_south_in(RU_t *ru, int *frame, int *tti)
{
void fh_if5_south_in(RU_t *ru,
int *frame,
int *tti) {
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
RU_proc_t *proc = &ru->proc;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_RECV_IF5, 1 );
start_meas(&ru->rx_fhaul);
ru->ifdevice.trx_read_func2(&ru->ifdevice, &proc->timestamp_rx, NULL, get_samples_per_slot(*tti, fp));
@@ -333,6 +339,9 @@ void fh_if5_south_in(RU_t *ru, int *frame, int *tti)
proc->first_rx,
ru->rx_fhaul.p_time / (cpu_freq_GHz * 1000.0),
rxmeas.tv_nsec);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TS, proc->timestamp_rx&0xffffffff );
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_RECV_IF5, 0 );
}
// Synchronous if4p5 from south
@@ -389,7 +398,15 @@ void fh_if4p5_south_in(RU_t *ru,
*slot = proc->tti_rx;
}
if (ru == RC.ru[0]) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_RU, f );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_RX0_RU, sl);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, proc->frame_tx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, proc->tti_tx );
}
proc->symbol_mask[proc->tti_rx] = 0;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TS, proc->timestamp_rx&0xffffffff );
LOG_D(PHY,"RU %d: fh_if4p5_south_in sleeping ...\n",ru->idx);
}
@@ -431,8 +448,7 @@ void fh_if4p5_south_asynch_in(RU_t *ru,int *frame,int *slot) {
// RRU IF4p5 TX fronthaul receiver. Assumes an if_device on input and if or rf device on output
// receives one subframe's worth of IF4p5 OFDM symbols and OFDM modulates
void fh_if4p5_north_in(RU_t *ru,int *frame,int *slot)
{
void fh_if4p5_north_in(RU_t *ru,int *frame,int *slot) {
uint32_t symbol_number=0;
uint32_t symbol_mask, symbol_mask_full;
uint16_t packet_type;
@@ -445,6 +461,12 @@ void fh_if4p5_north_in(RU_t *ru,int *frame,int *slot)
recv_IF4p5(ru, frame, slot, &packet_type, &symbol_number);
symbol_mask = symbol_mask | (1<<symbol_number);
} while (symbol_mask != symbol_mask_full);
// dump VCD output for first RU in list
if (ru == RC.ru[0]) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, *frame );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, *slot );
}
}
void fh_if5_north_asynch_in(RU_t *ru, int *frame, int *slot)
@@ -503,6 +525,12 @@ void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *slot) {
((uint64_t)frame_tx + proc->frame_tx_unwrap) * fp->samples_per_subframe * 10 + get_samples_slot_timestamp(fp, slot_tx);
LOG_D(PHY, "RU %d/%d TST %lu, frame %d, subframe %d\n", ru->idx, 0, proc->timestamp_tx, frame_tx, slot_tx);
// dump VCD output for first RU in list
if (ru == RC.ru[0]) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, frame_tx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, slot_tx );
}
if (ru->feptx_ofdm)
ru->feptx_ofdm(ru, frame_tx, slot_tx);
@@ -510,16 +538,18 @@ void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *slot) {
ru->fh_south_out(ru, frame_tx, slot_tx, proc->timestamp_tx);
}
void fh_if5_north_out(RU_t *ru)
{
void fh_if5_north_out(RU_t *ru) {
/// **** send_IF5 of rxdata to BBU **** ///
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_SEND_IF5, 1 );
AssertFatal(1 == 0, "Shouldn't get here\n");
}
// RRU IF4p5 northbound interface (RX)
void fh_if4p5_north_out(RU_t *ru)
{
void fh_if4p5_north_out(RU_t *ru) {
RU_proc_t *proc=&ru->proc;
if (ru->idx == 0)
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_RX0_RU, proc->tti_rx);
start_meas(&ru->tx_fhaul);
send_IF4p5(ru, proc->frame_rx, proc->tti_rx, IF4p5_PULFFT);
stop_meas(&ru->tx_fhaul);
@@ -539,12 +569,15 @@ static void rx_rf(RU_t *ru, int *frame, int *slot)
for (int i = 0; i < nb; i++)
rxp[i] = (void *)&ru->common.rxdata[i][get_samples_slot_timestamp(fp, *slot)];
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_READ, 1);
openair0_timestamp_t old_ts = proc->timestamp_rx;
LOG_D(PHY,"Reading %d samples for slot %d (%p)\n", samples_per_slot, *slot, rxp[0]);
openair0_timestamp_t ts;
unsigned int rxs;
rxs = ru->rfdevice.trx_read_func(&ru->rfdevice, &ts, rxp, samples_per_slot, nb);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_READ, 0 );
proc->timestamp_rx = ts-ru->ts_offset;
if (rxs != samples_per_slot)
@@ -584,6 +617,12 @@ static void rx_rf(RU_t *ru, int *frame, int *slot)
proc->tti_tx,
fp->slots_per_frame);
// dump VCD output for first RU in list
if (ru == RC.ru[0]) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_RU, proc->frame_rx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_RX0_RU, proc->tti_rx );
}
if (proc->first_rx == 0) {
if (proc->tti_rx != *slot) {
LOG_E(PHY,
@@ -614,6 +653,8 @@ static void rx_rf(RU_t *ru, int *frame, int *slot)
metadata mt = {.slot = *slot, .frame = *frame};
gNBscopeCopyWithMetadata(ru, gNbTimeDomainSamples, rxp[0], sizeof(c16_t), 1, samples_per_slot, 0, &mt);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TS, (proc->timestamp_rx+ru->ts_offset)&0xffffffff );
if (rxs != samples_per_slot) {
//exit_fun( "problem receiving samples" );
LOG_E(PHY, "problem receiving samples\n");
@@ -732,11 +773,17 @@ void tx_rf(RU_t *ru, int frame,int slot, uint64_t timestamp)
const int flags = flags_burst | (flags_gpio << 4);
proc->first_tx = 0;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_TRX_WRITE_FLAGS, flags);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, frame);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, slot);
int nt = ru->nb_tx * ru->num_beams_period;
void *txp[nt];
for (int i = 0; i < nt; i++)
txp[i] = (void *)&ru->common.txdata[i][get_samples_slot_timestamp(fp, slot)] - sf_extension * sizeof(int32_t);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST, (timestamp + ru->ts_offset) & 0xffffffff);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE, 1);
// prepare tx buffer pointers
uint32_t txs = ru->rfdevice.trx_write_func(&ru->rfdevice,
timestamp + ru->ts_offset - sf_extension,
@@ -757,6 +804,7 @@ void tx_rf(RU_t *ru, int frame,int slot, uint64_t timestamp)
siglen + sf_extension,
txs,
10 * log10((double)signal_energy(txp[0], siglen + sf_extension)));
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE, 0);
}
static void fill_rf_config(RU_t *ru, char *rf_config_file)
@@ -1160,8 +1208,10 @@ void *ru_thread(void *param)
// Do PRACH RU processing
prach_item_t *p = find_nr_prach(&gNB->prach_list, proc->frame_rx, proc->tti_rx, SEARCH_EXIST);
if (p) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_RU_PRACH_RX, 1 );
// need to extract RACH data for lqter processing by rx_nr_prach()
rx_nr_prach_ru(p, ru->common.rxdata, ru->nr_frame_parms, ru->N_TA_offset);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_RU_PRACH_RX, 0);
} // end if (prach_id >= 0)
} // end if (ru->feprx)
} // end if (slot_type == NR_UPLINK_SLOT || slot_type == NR_MIXED_SLOT) {

View File

@@ -675,28 +675,11 @@ int main( int argc, char **argv ) {
wait_nfapi_init("main?");
}
if (IS_SOFTMODEM_IMSCOPE_ENABLED || IS_SOFTMODEM_IMSCOPE_RECORD_ENABLED) {
sleep(1);
scopeParms_t p;
p.argc = &argc;
p.argv = argv;
p.gNB = RC.gNB[0];
p.ru = RC.ru[0];
if (IS_SOFTMODEM_IMSCOPE_ENABLED) {
load_softscope("im", &p);
}
AssertFatal(!(IS_SOFTMODEM_IMSCOPE_ENABLED && IS_SOFTMODEM_IMSCOPE_RECORD_ENABLED),
"Data recoding and ImScope cannot be enabled at the same time\n");
if (IS_SOFTMODEM_IMSCOPE_RECORD_ENABLED) {
load_module_shlib("imscope_record", NULL, 0, &p);
}
}
if (RC.nb_nr_L1_inst > 0) {
wait_RUs();
// once all RUs are ready initialize the rest of the gNBs ((dependence on final RU parameters after configuration)
if (IS_SOFTMODEM_DOSCOPE) {
if (IS_SOFTMODEM_DOSCOPE || IS_SOFTMODEM_IMSCOPE_ENABLED || IS_SOFTMODEM_IMSCOPE_RECORD_ENABLED) {
sleep(1);
scopeParms_t p;
p.argc = &argc;
@@ -706,6 +689,14 @@ int main( int argc, char **argv ) {
if (IS_SOFTMODEM_DOSCOPE) {
load_softscope("nr", &p);
}
if (IS_SOFTMODEM_IMSCOPE_ENABLED) {
load_softscope("im", &p);
}
AssertFatal(!(IS_SOFTMODEM_IMSCOPE_ENABLED && IS_SOFTMODEM_IMSCOPE_RECORD_ENABLED),
"Data recoding and ImScope cannot be enabled at the same time\n");
if (IS_SOFTMODEM_IMSCOPE_RECORD_ENABLED) {
load_module_shlib("imscope_record", NULL, 0, &p);
}
}
if (NFAPI_MODE != NFAPI_MODE_PNF && NFAPI_MODE != NFAPI_MODE_VNF && NFAPI_MODE != NFAPI_MODE_AERIAL) {

View File

@@ -511,7 +511,7 @@ static int handle_sync_req_from_mac(PHY_VARS_NR_UE *UE)
/* Clearing UE harq while DL actors are active causes race condition.
So we let the current execution to complete here.*/
for (int i = 0; i < get_nrUE_params()->num_dl_actors; i++) {
FLUSH_ACTOR(UE->dl_actors + i);
flush_actor(UE->dl_actors + i);
}
for (int i = 0; i < get_nrUE_params()->num_ul_actors; i++) {
flush_actor(UE->ul_actors + i);
@@ -612,8 +612,6 @@ void UE_dl_processing(void *arg) {
UE_nr_rxtx_proc_t *proc = &rxtxD->proc;
PHY_VARS_NR_UE *UE = rxtxD->UE;
nr_phy_data_t *phy_data = &rxtxD->phy_data;
void *workspace_buffer = rxtxD->workspace_buffer;
(void)workspace_buffer;
if (!UE->sl_mode)
pdsch_processing(UE, proc, phy_data);
@@ -1027,11 +1025,8 @@ void *UE_thread(void *arg)
if (ret != INT_MAX)
shiftForNextFrame = ret;
if (get_nrUE_params()->num_dl_actors > 0) {
int actor_index = (curMsg.proc.nr_slot_rx % get_nrUE_params()->num_dl_actors);
curMsgRx->workspace_buffer = UE->dl_actors[actor_index].workspace_buffer;
pushNotifiedFIFO(&UE->dl_actors[actor_index].actor.fifo, newRx);
pushNotifiedFIFO(&UE->dl_actors[curMsg.proc.nr_slot_rx % get_nrUE_params()->num_dl_actors].fifo, newRx);
} else {
curMsgRx->workspace_buffer = NULL; // This is a single threaded case, possibly just allocate the buffers
newRx->processingFunc(curMsgRx);
}

View File

@@ -20,7 +20,6 @@
*/
#include "platform_types.h"
#define _GNU_SOURCE /* See feature_test_macros(7) */
#include <sched.h>
#include <stdbool.h>
@@ -61,6 +60,7 @@ unsigned short config_frames[4] = {2,9,11,13};
#endif
#include "common/utils/LOG/log.h"
#include "common/utils/time_manager/time_manager.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "UTIL/OPT/opt.h"
#include "LAYER2/nr_pdcp/nr_pdcp_oai_api.h"
@@ -166,6 +166,8 @@ static void get_options(configmodule_interface_t *cfg)
paramdef_t cmdline_params[] = CMDLINE_NRUEPARAMS_DESC;
int numparams = sizeofArray(cmdline_params);
config_get(cfg, cmdline_params, numparams, NULL);
if (nrUE_params.vcdflag > 0)
ouput_vcd = 1;
AssertFatal(nrUE_params.extra_pdu_id == -1,
"Add additional PDU sessions in uicc.pdu_sessions array instead\n");
}
@@ -283,6 +285,9 @@ int main(int argc, char **argv)
int ret_loader = load_nrLDPC_coding_interface(NULL, &nrLDPC_coding_interface);
AssertFatal(ret_loader == 0, "error loading LDPC library\n");
if (ouput_vcd) {
vcd_signal_dumper_init("/tmp/openair_dump_nrUE.vcd");
}
// strdup to put the sring in the core file for post mortem identification
char *pckg = strdup(OAI_PACKAGE_VERSION);
LOG_I(HW, "Version: %s\n", pckg);
@@ -405,8 +410,7 @@ int main(int argc, char **argv)
if (get_nrUE_params()->num_dl_actors > 0) {
UE_CC->dl_actors = calloc_or_fail(get_nrUE_params()->num_dl_actors, sizeof(*UE_CC->dl_actors));
for (int i = 0; i < get_nrUE_params()->num_dl_actors; i++) {
INIT_ACTOR(&UE_CC->dl_actors[i], "DL_", -1);
UE_CC->dl_actors[i].workspace_buffer = malloc(sizeof(c16_t) * 1000);
init_actor(&UE_CC->dl_actors[i], "DL_", -1);
}
}
if (get_nrUE_params()->num_ul_actors > 0) {
@@ -475,6 +479,9 @@ int main(int argc, char **argv)
LOG_W(NR_PHY, "Returned from ITTI signal handler\n");
oai_exit = 1;
if (ouput_vcd)
vcd_signal_dumper_close();
if (PHY_vars_UE_g && PHY_vars_UE_g[0]) {
for (int CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
PHY_VARS_NR_UE *phy_vars = PHY_vars_UE_g[0][CC_id];
@@ -483,7 +490,7 @@ int main(int argc, char **argv)
shutdown_actor(&phy_vars->ul_actors[i]);
}
for (int i = 0; i < get_nrUE_params()->num_dl_actors; i++) {
SHUTDOWN_ACTOR(&phy_vars->dl_actors[i]);
shutdown_actor(&phy_vars->dl_actors[i]);
}
int ret = pthread_join(phy_vars->main_thread, NULL);
AssertFatal(ret == 0, "pthread_join error %d, errno %d (%s)\n", ret, errno, strerror(errno));

View File

@@ -63,10 +63,6 @@ char cpu_buf_recv[RECV_BUF_LEN];
uint16_t sfn = 0, slot = 0;
nv_ipc_t *ipc;
static nv_ipc_config_t nv_ipc_config;
static int cpu_msg_buf_size = 0;
static int cpu_data_buf_size = 0;
void nvIPC_Stop()
{
LOG_I(NR_MAC, "Received STOP.indication\n");
@@ -99,7 +95,7 @@ static int ipc_handle_rx_msg(nv_ipc_t *ipc, nv_ipc_msg_t *msg)
nfapi_vnf_config_t * vnf_config = get_config();
if (vnf_config != 0) {
// first, unpack the header
fapi_message_header_t fapi_msg;
fapi_phy_api_msg fapi_msg;
if (!(pull8(&pReadPackedMessage, &fapi_msg.num_msg, end) && pull8(&pReadPackedMessage, &fapi_msg.opaque_handle, end)
&& pull16(&pReadPackedMessage, &fapi_msg.message_id, end)
&& pull32(&pReadPackedMessage, &fapi_msg.message_length, end))) {
@@ -199,30 +195,83 @@ static int ipc_handle_rx_msg(nv_ipc_t *ipc, nv_ipc_msg_t *msg)
return 0;
}
int get_cpu_msg_buf_size()
int8_t buf[1024];
nv_ipc_config_t nv_ipc_config;
bool aerial_nr_send_p5_message(vnf_t *vnf, uint16_t p5_idx, nfapi_nr_p4_p5_message_header_t *msg, uint32_t msg_len)
{
return cpu_msg_buf_size;
}
int get_cpu_data_buf_size()
{
return cpu_data_buf_size;
nfapi_vnf_pnf_info_t *pnf = nfapi_vnf_pnf_list_find(&(vnf->_public), p5_idx);
if (pnf) {
uint8_t tx_messagebufferFAPI[sizeof(vnf->tx_message_buffer)];
int packedMessageLengthFAPI = -1;
packedMessageLengthFAPI =
vnf->_public.pack_func(msg, msg_len, tx_messagebufferFAPI, sizeof(tx_messagebufferFAPI), &vnf->_public.codec_config);
return aerial_send_P5_msg(tx_messagebufferFAPI, packedMessageLengthFAPI, msg) == 0;
} else {
NFAPI_TRACE(NFAPI_TRACE_INFO, "%s() cannot find pnf info for p5_idx:%d\n", __FUNCTION__, p5_idx);
return false;
}
}
bool allocate_msg(nv_ipc_msg_t *send_msg)
bool aerial_send_P5_msg(void *packedBuf, uint32_t packedMsgLength, nfapi_nr_p4_p5_message_header_t *header)
{
return ipc->tx_allocate(ipc, send_msg, 0) == 0;
}
void release_msg(nv_ipc_msg_t *send_msg)
{
ipc->tx_release(ipc, send_msg);
}
if (ipc == NULL) {
return false;
}
nv_ipc_msg_t send_msg = {0};
// look for the specific message
switch (header->message_id) {
case NFAPI_NR_PHY_MSG_TYPE_PARAM_REQUEST:
case NFAPI_NR_PHY_MSG_TYPE_PARAM_RESPONSE:
case NFAPI_NR_PHY_MSG_TYPE_CONFIG_REQUEST:
case NFAPI_NR_PHY_MSG_TYPE_CONFIG_RESPONSE:
case NFAPI_NR_PHY_MSG_TYPE_START_REQUEST:
case NFAPI_NR_PHY_MSG_TYPE_START_RESPONSE:
case NFAPI_NR_PHY_MSG_TYPE_STOP_REQUEST:
case NFAPI_NR_PHY_MSG_TYPE_STOP_RESPONSE:
break;
default: {
if (header->message_id >= NFAPI_VENDOR_EXT_MSG_MIN && header->message_id <= NFAPI_VENDOR_EXT_MSG_MAX) {
// if(config && config->pack_p4_p5_vendor_extension) {
// result = (config->pack_p4_p5_vendor_extension)(header, ppWritePackedMsg, end, config);
// } else {
// NFAPI_TRACE(NFAPI_TRACE_ERROR, "%s VE NFAPI message ID %d. No ve ecoder provided\n", __FUNCTION__, header->message_id);
// }
} else {
NFAPI_TRACE(NFAPI_TRACE_ERROR, "%s NFAPI Unknown message ID %d\n", __FUNCTION__, header->message_id);
}
} break;
}
send_msg.msg_id = header->message_id;
send_msg.cell_id = 0;
send_msg.msg_len = packedMsgLength + 8; // adding 8 to account for the size of the FAPI header
send_msg.data_len = 0;
send_msg.data_buf = NULL;
send_msg.data_pool = NV_IPC_MEMPOOL_CPU_MSG;
bool send_nvipc_msg(nv_ipc_msg_t *send_msg)
{
int send_retval = ipc->tx_send_msg(ipc, send_msg);
if (send_retval != 0) {
// procedure is allocate->fill->send
int alloc_retval = ipc->tx_allocate(ipc, &send_msg, 0);
if (alloc_retval != 0) {
LOG_E(NFAPI_VNF, "%s error: allocate TX buffer failed Error: %d\n", __FUNCTION__, alloc_retval);
ipc->tx_release(ipc, &send_msg);
return false;
}
memcpy(send_msg.msg_buf, packedBuf, send_msg.msg_len);
LOG_D(NFAPI_VNF,
"send: cell_id=%d msg_id=0x%02X msg_len=%d data_len=%d data_pool=%d\n",
send_msg.cell_id,
send_msg.msg_id,
send_msg.msg_len,
send_msg.data_len,
send_msg.data_pool);
// Send the message
int send_retval = ipc->tx_send_msg(ipc, &send_msg);
if (send_retval < 0) {
LOG_E(NFAPI_VNF, "%s error: send TX message failed Error: %d\n", __FUNCTION__, send_retval);
ipc->tx_release(ipc, send_msg);
ipc->tx_release(ipc, &send_msg);
return false;
}
@@ -230,45 +279,181 @@ bool send_nvipc_msg(nv_ipc_msg_t *send_msg)
return true;
}
bool aerial_nr_send_p5_message(vnf_t *vnf, uint16_t p5_idx, nfapi_nr_p4_p5_message_header_t *msg, uint32_t msg_len)
bool aerial_send_P7_msg(void *packedBuf, uint32_t packedMsgLength, nfapi_nr_p7_message_header_t *header)
{
nfapi_vnf_pnf_info_t *pnf = nfapi_vnf_pnf_list_find(&(vnf->_public), p5_idx);
if (pnf) {
// Create the message
nv_ipc_msg_t send_msg = {.msg_id = msg->message_id,
.cell_id = 0,
// For P5 we don't need CPU_DATA
.data_pool = NV_IPC_MEMPOOL_CPU_MSG,
.data_len = 0,
.data_buf = NULL};
// Allocate the message
if (!allocate_msg(&send_msg)) {
return false;
}
int packedMessageLengthFAPI = -1;
// Pack directly into it
if ((packedMessageLengthFAPI =
vnf->_public.pack_func(msg, msg_len, send_msg.msg_buf, get_cpu_msg_buf_size(), &vnf->_public.codec_config))
< 0) {
release_msg(&send_msg);
return false;
}
if (packedMessageLengthFAPI <= 0) {
LOG_E(NFAPI_VNF, "Error packing message 0x%02x\n", msg->message_id);
release_msg(&send_msg);
return false;
}
// Set the length
send_msg.msg_len = packedMessageLengthFAPI + 8; // adding 8 to account for the size of the FAPI header
// Send
return send_nvipc_msg(&send_msg);
} else {
NFAPI_TRACE(NFAPI_TRACE_INFO, "%s() cannot find pnf info for p5_idx:%d\n", __FUNCTION__, p5_idx);
if (ipc == NULL) {
return false;
}
nv_ipc_msg_t send_msg;
uint8_t *pPacketBodyField = &((uint8_t *)packedBuf)[8];
uint8_t *pPackMessageEnd = packedBuf + packedMsgLength + 8;
uint16_t present_sfn = 0;
uint16_t present_slot = 0;
pull16(&pPacketBodyField, &present_sfn, pPackMessageEnd);
pull16(&pPacketBodyField, &present_slot, pPackMessageEnd);
if (present_sfn != old_sfn || present_slot != old_slot) {
LOG_E(NFAPI_VNF,
"\n============================================================================\n"
"sfn slot doesn't match unpacked one! L2->L1 %d.%d vs L1->L2 %d.%d \n"
"============================================================================\n",
present_sfn,
present_slot,
old_sfn,
old_slot);
}
// look for the specific message
switch (header->message_id) {
case NFAPI_NR_PHY_MSG_TYPE_DL_TTI_REQUEST:
case NFAPI_NR_PHY_MSG_TYPE_UL_TTI_REQUEST:
case NFAPI_NR_PHY_MSG_TYPE_TX_DATA_REQUEST:
case NFAPI_NR_PHY_MSG_TYPE_UL_DCI_REQUEST:
case NFAPI_UE_RELEASE_REQUEST:
case NFAPI_UE_RELEASE_RESPONSE:
case NFAPI_NR_PHY_MSG_TYPE_SLOT_INDICATION:
case NFAPI_NR_PHY_MSG_TYPE_RX_DATA_INDICATION:
case NFAPI_NR_PHY_MSG_TYPE_CRC_INDICATION:
case NFAPI_NR_PHY_MSG_TYPE_UCI_INDICATION:
case NFAPI_NR_PHY_MSG_TYPE_SRS_INDICATION:
case NFAPI_NR_PHY_MSG_TYPE_RACH_INDICATION:
case NFAPI_NR_PHY_MSG_TYPE_DL_NODE_SYNC:
case NFAPI_NR_PHY_MSG_TYPE_UL_NODE_SYNC:
case NFAPI_TIMING_INFO:
case 0x8f:
break;
default: {
if (header->message_id >= NFAPI_VENDOR_EXT_MSG_MIN && header->message_id <= NFAPI_VENDOR_EXT_MSG_MAX) {
} else {
NFAPI_TRACE(NFAPI_TRACE_ERROR, "%s NFAPI Unknown message ID %d\n", __FUNCTION__, header->message_id);
}
} break;
}
send_msg.msg_id = header->message_id;
send_msg.cell_id = 0;
send_msg.msg_len = packedMsgLength + 8; // adding 8 to account for the size of the FAPI header
send_msg.data_len = 0;
send_msg.data_buf = NULL;
send_msg.data_pool = NV_IPC_MEMPOOL_CPU_MSG;
// procedure is allocate->fill->send
// Allocate buffer for TX message
int alloc_retval = ipc->tx_allocate(ipc, &send_msg, 0);
if (alloc_retval != 0) {
LOG_E(NFAPI_VNF, "%s error: allocate TX buffer failed Error: %d\n", __FUNCTION__, alloc_retval);
ipc->tx_release(ipc, &send_msg);
return false;
}
memcpy(send_msg.msg_buf, packedBuf, send_msg.msg_len);
LOG_D(NFAPI_VNF,
"send: cell_id=%d msg_id=0x%02X msg_len=%d data_len=%d data_pool=%d\n",
send_msg.cell_id,
send_msg.msg_id,
send_msg.msg_len,
send_msg.data_len,
send_msg.data_pool);
// Send the message
int send_retval = ipc->tx_send_msg(ipc, &send_msg);
if (send_retval < 0) {
LOG_E(NFAPI_VNF, "%s error: send TX message failed Error: %d\n", __FUNCTION__, send_retval);
ipc->tx_release(ipc, &send_msg);
return false;
}
ipc->notify(ipc, 1); // notify that there's 1 message in queue
return true;
}
bool aerial_send_P7_msg_with_data(void *packedBuf,
uint32_t packedMsgLength,
void *dataBuf,
uint32_t dataLength,
nfapi_nr_p7_message_header_t *header)
{
if (ipc == NULL) {
return false;
}
nv_ipc_msg_t send_msg;
uint8_t *pPacketBodyField = &((uint8_t *)packedBuf)[8];
uint8_t *pPackMessageEnd = packedBuf + packedMsgLength + 8;
uint16_t present_sfn = 0;
uint16_t present_slot = 0;
pull16(&pPacketBodyField, &present_sfn, pPackMessageEnd);
pull16(&pPacketBodyField, &present_slot, pPackMessageEnd);
if (present_sfn != old_sfn || present_slot != old_slot) {
LOG_E(NFAPI_VNF,
"\n============================================================================\n"
"sfn slot doesn't match unpacked one! L2->L1 %d.%d vs L1->L2 %d.%d \n"
"============================================================================\n",
present_sfn,
present_slot,
old_sfn,
old_slot);
}
// look for the specific message
switch (header->message_id) {
case NFAPI_NR_PHY_MSG_TYPE_DL_TTI_REQUEST:
case NFAPI_NR_PHY_MSG_TYPE_UL_TTI_REQUEST:
case NFAPI_NR_PHY_MSG_TYPE_TX_DATA_REQUEST:
case NFAPI_NR_PHY_MSG_TYPE_UL_DCI_REQUEST:
case NFAPI_UE_RELEASE_REQUEST:
case NFAPI_UE_RELEASE_RESPONSE:
case NFAPI_NR_PHY_MSG_TYPE_SLOT_INDICATION:
case NFAPI_NR_PHY_MSG_TYPE_RX_DATA_INDICATION:
case NFAPI_NR_PHY_MSG_TYPE_CRC_INDICATION:
case NFAPI_NR_PHY_MSG_TYPE_UCI_INDICATION:
case NFAPI_NR_PHY_MSG_TYPE_SRS_INDICATION:
case NFAPI_NR_PHY_MSG_TYPE_RACH_INDICATION:
case NFAPI_NR_PHY_MSG_TYPE_DL_NODE_SYNC:
case NFAPI_NR_PHY_MSG_TYPE_UL_NODE_SYNC:
case NFAPI_TIMING_INFO:
break;
default: {
if (header->message_id >= NFAPI_VENDOR_EXT_MSG_MIN && header->message_id <= NFAPI_VENDOR_EXT_MSG_MAX) {
} else {
NFAPI_TRACE(NFAPI_TRACE_ERROR, "%s NFAPI Unknown message ID %d\n", __FUNCTION__, header->message_id);
}
} break;
}
send_msg.msg_id = header->message_id;
send_msg.cell_id = 0;
send_msg.msg_len = packedMsgLength + 8; // adding 8 to account for the size of the FAPI header
send_msg.data_len = dataLength;
send_msg.data_pool = NV_IPC_MEMPOOL_CPU_DATA;
// procedure is allocate->fill->send
// Allocate buffer for TX message
int alloc_retval = ipc->tx_allocate(ipc, &send_msg, 0);
if (alloc_retval != 0) {
LOG_E(NFAPI_VNF, "%s error: allocate TX buffer failed Error: %d\n", __FUNCTION__, alloc_retval);
ipc->tx_release(ipc, &send_msg);
return false;
}
memcpy(send_msg.msg_buf, packedBuf, send_msg.msg_len);
memcpy(send_msg.data_buf, dataBuf, send_msg.data_len);
LOG_D(NFAPI_VNF,
"send: cell_id=%d msg_id=0x%02X msg_len=%d data_len=%d data_pool=%d\n",
send_msg.cell_id,
send_msg.msg_id,
send_msg.msg_len,
send_msg.data_len,
send_msg.data_pool);
// Send the message
int send_retval = ipc->tx_send_msg(ipc, &send_msg);
if (send_retval != 0) {
LOG_E(NFAPI_VNF, "%s error: send TX message failed Error: %d\n", __FUNCTION__, send_retval);
ipc->tx_release(ipc, &send_msg);
return false;
}
ipc->notify(ipc, 1); // notify that there's 1 message in queue
return true;
}
// Always allocate message buffer, but allocate data buffer only when data_len > 0
@@ -383,10 +568,6 @@ int nvIPC_Init(nvipc_params_t nvipc_params_s)
{
// Want to use transport SHM, type epoll, module secondary (reads the created shm from cuphycontroller)
load_hard_code_config(&nv_ipc_config, NV_IPC_MODULE_SECONDARY, NV_IPC_TRANSPORT_SHM);
// save the mempool sizes for later use in packing
cpu_msg_buf_size = nv_ipc_get_buf_size(&nv_ipc_config, NV_IPC_MEMPOOL_CPU_MSG);
cpu_data_buf_size = nv_ipc_get_buf_size(&nv_ipc_config, NV_IPC_MEMPOOL_CPU_DATA);
// Create nv_ipc_t instance
LOG_I(NFAPI_VNF, "%s: creating IPC interface with prefix %s\n", __func__, nvipc_params_s.nvipc_shm_prefix);
strcpy(nv_ipc_config.transport_config.shm.prefix, nvipc_params_s.nvipc_shm_prefix);
@@ -407,9 +588,10 @@ int oai_fapi_ul_tti_req(nfapi_nr_ul_tti_request_t *ul_tti_req)
ul_tti_req->header.phy_id = 1; // DJP HACK TODO FIXME - need to pass this around!!!!
ul_tti_req->header.message_id = NFAPI_NR_PHY_MSG_TYPE_UL_TTI_REQUEST;
bool retval = p7_config->send_p7_msg(get_p7_vnf(), &ul_tti_req->header);
// int retval = nfapi_vnf_p7_ul_tti_req(p7_config, ul_tti_req);
int retval = p7_config->send_p7_msg(get_p7_vnf(), &ul_tti_req->header);
if (!retval) {
if (retval != 0) {
LOG_E(PHY, "%s() Problem sending retval:%d\n", __FUNCTION__, retval);
} else {
// Reset number of PDUs so that it is not resent
@@ -426,9 +608,9 @@ int oai_fapi_ul_dci_req(nfapi_nr_ul_dci_request_t *ul_dci_req)
nfapi_vnf_p7_config_t *p7_config = get_p7_vnf_config();
ul_dci_req->header.phy_id = 1; // DJP HACK TODO FIXME - need to pass this around!!!!
ul_dci_req->header.message_id = NFAPI_NR_PHY_MSG_TYPE_UL_DCI_REQUEST;
bool retval = p7_config->send_p7_msg(get_p7_vnf(), &ul_dci_req->header);
if (!retval) {
// int retval = nfapi_vnf_p7_ul_dci_req(p7_config, ul_dci_req);
int retval = p7_config->send_p7_msg(get_p7_vnf(), &ul_dci_req->header);
if (retval != 0) {
LOG_E(PHY, "%s() Problem sending retval:%d\n", __FUNCTION__, retval);
} else {
ul_dci_req->numPdus = 0;
@@ -441,9 +623,10 @@ int oai_fapi_tx_data_req(nfapi_nr_tx_data_request_t *tx_data_req)
nfapi_vnf_p7_config_t *p7_config = get_p7_vnf_config();
tx_data_req->header.phy_id = 1; // DJP HACK TODO FIXME - need to pass this around!!!!
tx_data_req->header.message_id = NFAPI_NR_PHY_MSG_TYPE_TX_DATA_REQUEST;
bool retval = p7_config->send_p7_msg(get_p7_vnf(), &tx_data_req->header);
if (!retval) {
// LOG_D(PHY, "[VNF] %s() TX_REQ sfn_sf:%d number_of_pdus:%d\n", __FUNCTION__, NFAPI_SFNSF2DEC(tx_data_req->SFN),
// tx_data_req->Number_of_PDUs); int retval = nfapi_vnf_p7_tx_data_req(p7_config, tx_data_req);
int retval = p7_config->send_p7_msg(get_p7_vnf(), &tx_data_req->header);
if (retval != 0) {
LOG_E(PHY, "%s() Problem sending retval:%d\n", __FUNCTION__, retval);
} else {
tx_data_req->Number_of_PDUs = 0;
@@ -457,12 +640,11 @@ int oai_fapi_dl_tti_req(nfapi_nr_dl_tti_request_t *dl_config_req)
nfapi_vnf_p7_config_t *p7_config = get_p7_vnf_config();
dl_config_req->header.message_id = NFAPI_NR_PHY_MSG_TYPE_DL_TTI_REQUEST;
dl_config_req->header.phy_id = 1; // DJP HACK TODO FIXME - need to pass this around!!!!
bool retval = p7_config->send_p7_msg(get_p7_vnf(), &dl_config_req->header);
int retval = p7_config->send_p7_msg(get_p7_vnf(), &dl_config_req->header);
dl_config_req->dl_tti_request_body.nPDUs = 0;
dl_config_req->dl_tti_request_body.nGroup = 0;
if (!retval) {
if (retval != 0) {
LOG_E(PHY, "%s() Problem sending retval:%d\n", __FUNCTION__, retval);
}
return retval;
@@ -471,9 +653,8 @@ int oai_fapi_dl_tti_req(nfapi_nr_dl_tti_request_t *dl_config_req)
int oai_fapi_send_end_request(int cell, uint32_t frame, uint32_t slot){
nfapi_vnf_p7_config_t *p7_config = get_p7_vnf_config();
nfapi_nr_slot_indication_scf_t nr_slot_resp = {.header.message_id = 0x8F, .sfn = frame, .slot = slot};
bool retval = p7_config->send_p7_msg(get_p7_vnf(), &nr_slot_resp.header);
if (!retval) {
int retval = p7_config->send_p7_msg(get_p7_vnf(), &nr_slot_resp.header);
if (retval != 0) {
LOG_E(PHY, "%s() Problem sending retval:%d\n", __FUNCTION__, retval);
}
return retval;

View File

@@ -41,12 +41,22 @@
#include "openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h"
int get_cpu_msg_buf_size();
int get_cpu_data_buf_size();
bool allocate_msg(nv_ipc_msg_t* send_msg);
void release_msg(nv_ipc_msg_t* send_msg);
bool send_nvipc_msg(nv_ipc_msg_t* send_msg);
typedef struct {
uint8_t num_msg;
uint8_t opaque_handle;
uint16_t message_id;
uint32_t message_length;
} fapi_phy_api_msg;
bool aerial_nr_send_p5_message(vnf_t *vnf, uint16_t p5_idx, nfapi_nr_p4_p5_message_header_t *msg, uint32_t msg_len);
bool aerial_send_P5_msg(void *packedBuf, uint32_t packedMsgLength, nfapi_nr_p4_p5_message_header_t *header);
bool aerial_send_P7_msg(void *packedBuf, uint32_t packedMsgLength, nfapi_nr_p7_message_header_t *header);
bool aerial_send_P7_msg_with_data(void *packedBuf,
uint32_t packedMsgLength,
void *dataBuf,
uint32_t dataLength,
nfapi_nr_p7_message_header_t *header);
int nvIPC_Init(nvipc_params_t nvipc_params_s);
int oai_fapi_send_end_request(int cell_id, uint32_t frame, uint32_t slot);
int oai_fapi_ul_tti_req(nfapi_nr_ul_tti_request_t *ul_tti_req);

View File

@@ -114,10 +114,10 @@ static int32_t aerial_pack_tx_data_request(void *pMessageBuf,
void *pPackedBuf,
void *pDataBuf,
uint32_t packedBufLen,
int32_t dataBufLen,
uint32_t dataBufLen,
nfapi_p7_codec_config_t *config,
nfapi_vnf_p7_config_t *p7_config,
int32_t *data_len)
uint32_t *data_len)
{
if (pMessageBuf == NULL || pPackedBuf == NULL) {
NFAPI_TRACE(NFAPI_TRACE_ERROR, "P7 Pack supplied pointers are null\n");
@@ -130,7 +130,7 @@ static int32_t aerial_pack_tx_data_request(void *pMessageBuf,
uint8_t *pPackedDataField = &pDataPackedMessage[0];
uint8_t *pPackedDataFieldStart = &pDataPackedMessage[0];
uint8_t **ppWriteData = &pPackedDataField;
const int32_t dataBufLen32 = (dataBufLen + 3) / 4;
const uint32_t dataBufLen32 = (dataBufLen + 3) / 4;
nfapi_nr_tx_data_request_t *pNfapiMsg = (nfapi_nr_tx_data_request_t *)pMessageHeader;
// Actual payloads are packed in a separate buffer
for (int i = 0; i < pNfapiMsg->Number_of_PDUs; i++) {
@@ -180,67 +180,40 @@ static int32_t aerial_pack_tx_data_request(void *pMessageBuf,
return (int32_t)(pMessageHeader->message_length);
}
bool aerial_nr_send_p7_message(vnf_p7_t *vnf_p7, nfapi_nr_p7_message_header_t *header)
{
// Common to both cases, we can set it now
// In most cases we don't need the data pool, only the CPU_MSG
nv_ipc_msg_t send_msg = {.msg_id = header->message_id, .data_pool = NV_IPC_MEMPOOL_CPU_MSG, .cell_id = 0};
uint8_t FAPI_buffer[1024 * 64];
// Check if TX_DATA request, if true, need to pack to data_buf
if (header->message_id == NFAPI_NR_PHY_MSG_TYPE_TX_DATA_REQUEST) {
// for this we need the secondary CPU_DATA pool
send_msg.data_pool = NV_IPC_MEMPOOL_CPU_DATA;
// Allocate the message after setting the data pool
if (!allocate_msg(&send_msg)) {
LOG_E(NFAPI_VNF, "Error in allocating nvipc message\n");
return false;
}
nfapi_nr_tx_data_request_t *pNfapiMsg = (nfapi_nr_tx_data_request_t *)header;
uint64_t size = 0;
for (int i = 0; i < pNfapiMsg->Number_of_PDUs; ++i) {
size += pNfapiMsg->pdu_list[i].PDU_length;
}
AssertFatal(size <= get_cpu_data_buf_size(), "Message data larger than available buffer, tried to pack %" PRId64, size);
int32_t data_len = 0;
AssertFatal(size <= 1024 * 1024 * 2, "Message data larger than available buffer, tried to pack %" PRId64, size);
uint8_t FAPI_data_buffer[1024 * 1024 * 2]; // 2MB
uint32_t data_len = 0;
int32_t len_FAPI = aerial_pack_tx_data_request(header,
send_msg.msg_buf,
send_msg.data_buf,
get_cpu_msg_buf_size(),
get_cpu_data_buf_size(),
FAPI_buffer,
FAPI_data_buffer,
sizeof(FAPI_buffer),
sizeof(FAPI_data_buffer),
&vnf_p7->_public.codec_config,
((nfapi_vnf_p7_config_t *)vnf_p7),
&data_len);
// Set both lengths
send_msg.msg_len = len_FAPI + 8; // adding 8 to account for the size of the FAPI header
send_msg.data_len = data_len;
if (len_FAPI <= 0) {
LOG_E(NFAPI_VNF, "Problem packing TX_DATA_request\n");
release_msg(&send_msg);
return false;
} else {
return aerial_send_P7_msg_with_data(FAPI_buffer, len_FAPI, FAPI_data_buffer, data_len, header) == 0;
}
// Send
return send_nvipc_msg(&send_msg);
} else {
send_msg.data_len = 0;
send_msg.data_buf = NULL;
// Allocate the message
if (!allocate_msg(&send_msg)) {
LOG_E(NFAPI_VNF, "Error in allocating nvipc message\n");
return false;
}
// Pack directly into it
nfapi_vnf_p7_config_t* p7_config = (nfapi_vnf_p7_config_t *)vnf_p7;
int len_FAPI = p7_config->pack_func(header, send_msg.msg_buf, get_cpu_msg_buf_size(), &vnf_p7->_public.codec_config);
if (len_FAPI <= 0) {
LOG_E(NFAPI_VNF, "Problem packing message 0x%02x\n", header->message_id);
release_msg(&send_msg);
return false;
}
// Set the length
send_msg.msg_len = len_FAPI + 8; // adding 8 to account for the size of the FAPI header
// Send
return send_nvipc_msg(&send_msg);
// Create and send FAPI P7 message
int len_FAPI = ((nfapi_vnf_p7_config_t *)vnf_p7)->pack_func(header,
FAPI_buffer,
sizeof(FAPI_buffer),
&vnf_p7->_public.codec_config);
return aerial_send_P7_msg(FAPI_buffer, len_FAPI, header) == 0;
}
}

View File

@@ -716,13 +716,7 @@ typedef enum {
X(NFAPI_NR_PHY_API_MSG_TX_ERR, 0X8)
#ifdef ENABLE_AERIAL
// Error codes obtained from Aerial L1 file
// cuPHY-CP/scfl2adapter/lib/scf_5g_fapi/scf_5g_fapi.h
#define AERIAL_ERROR_LIST \
X(SCF_ERROR_CODE_MSG_INVALID_PHY_ID, 0x9) \
X(SCF_ERROR_CODE_MSG_UNINSTANTIATED_PHY, 0xA) \
X(SCF_ERROR_CODE_MSG_INVALID_DFE_Profile, 0xB) \
X(SCF_ERROR_CODE_MSG_PHY_PROFILE_SELECTION, 0xC) \
X(AERIAL_ERROR_CODE_FAPI_END, 0x32) \
X(AERIAL_ERROR_CODE_L1_PROC_OBJ_UNAVAILABLE_ERR, 0x33) \
X(AERIAL_ERROR_CODE_MSG_LATE_SLOT_ERR, 0x34) \
@@ -735,26 +729,7 @@ typedef enum {
X(AERIAL_ERROR_CODE_L1_P1_EXIT_ERROR, 0x3B) \
X(AERIAL_ERROR_CODE_L1_P2_EXIT_ERROR, 0x3C) \
X(AERIAL_ERROR_CODE_L1_DL_CH_ERROR, 0x3D) \
X(AERIAL_ERROR_CODE_L1_UL_CH_ERROR, 0x3E) \
X(SCF_ERROR_CODE_EARLY_HARQ_TIMING_ERROR, 0x3F) \
X(SCF_ERROR_CODE_SRS_CHEST_BUFF_BAD_STATE, 0x40) \
X(SCF_ERROR_CODE_BEAM_ID_OUT_OF_RANGE, 0x41) \
X(SCF_ERROR_CODE_PTP_SVC_ERROR, 0x42) \
X(SCF_ERROR_CODE_PTP_SYNCED, 0x43) \
X(SCF_ERROR_CODE_L1_MISSING_UL_IQ, 0x44) \
X(SCF_ERROR_CODE_MSG_CAPACITY_EXCEEDED, 0x45) \
X(SCF_ERROR_CODE_RHOCP_PTP_EVENTS_ERROR, 0x46) \
X(SCF_ERROR_CODE_RHOCP_PTP_EVENTS_SYNCED, 0x47) \
X(SCF_FAPI_SSB_PBCH_L1_LIMIT_EXCEEDED, 0x81) \
X(SCF_FAPI_PDCCH_L1_LIMIT_EXCEEDED, 0x82) \
X(SCF_FAPI_PDSCH_L1_LIMIT_EXCEEDED, 0x84) \
X(SCF_FAPI_CSIRS_L1_LIMIT_EXCEEDED, 0x88) \
X(SCF_FAPI_PUSCH_L1_LIMIT_EXCEEDED, 0xC1) \
X(SCF_FAPI_PUCCH_L1_LIMIT_EXCEEDED, 0xC2) \
X(SCF_FAPI_SRS_L1_LIMIT_EXCEEDED, 0xC4) \
X(SCF_FAPI_PRACH_L1_LIMIT_EXCEEDED, 0xC8) \
X(SCF_ERROR_CODE_RELEASED_HARQ_BUFFER_INFO, 0xD0)
X(AERIAL_ERROR_CODE_L1_UL_CH_ERROR, 0x3E)
#else
#define AERIAL_ERROR_LIST
#endif

View File

@@ -66,9 +66,5 @@ if (ENABLE_LDPC_CUDA)
add_dependencies(nr_dlschsim ldpc_cuda)
endif()
add_library(crc_byte OBJECT crc_byte.c)
add_subdirectory(nrLDPC_coding)
add_subdirectory(nrLDPC_decoder)
add_subdirectory(nrPolar_tools)
add_subdirectory(nrSmallBlock)

View File

@@ -5,7 +5,6 @@
#include "../nrLDPC_coding_interface.h"
#include "nrLDPC_coding_aal.h"
#include "PHY/sse_intrin.h"
#include "reverse_bits.h"
#include <common/utils/LOG/log.h>
#define NR_LDPC_ENABLE_PARITY_CHECK

View File

@@ -37,6 +37,7 @@
#include "PHY/NR_TRANSPORT/nr_dlsch.h"
#include "SCHED_NR/sched_nr.h"
#include "defs.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "common/utils/LOG/log.h"
#include <stdalign.h>

View File

@@ -34,6 +34,7 @@
#include "PHY/NR_TRANSPORT/nr_transport_common_proto.h"
#include "PHY/NR_TRANSPORT/nr_dlsch.h"
#include "SCHED_NR/sched_nr.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "common/utils/LOG/log.h"
#include "common/utils/nr/nr_common.h"
#include <openair2/UTIL/OPT/opt.h>

View File

@@ -40,6 +40,7 @@
#include "PHY/defs_gNB.h"
#include "SCHED_NR/sched_nr.h"
#include "common/utils/LOG/log.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "defs.h"
// #define DEBUG_ULSCH_DECODING
// #define gNB_DEBUG_TRACE

View File

@@ -1,15 +0,0 @@
add_library(polar STATIC
nr_polar_init.c
nr_bitwise_operations.c
nr_crc_byte.c
nr_polar_decoder.c
nr_polar_decoding_tools.c
nr_polar_encoder.c
nr_polar_interleaving_pattern.c
nr_polar_kernal_operation.c
nr_polar_kronecker_power_matrices.c
nr_polar_matrix_and_array.c
nr_polar_procedures.c
nr_polar_sequence_pattern.c
)
target_link_libraries(polar PRIVATE utils)

View File

@@ -30,8 +30,8 @@
* \warning
*/
#include "common/utils/nr/nr_common.h"
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
#include "reverse_bits.h"
#include <assert.h>
#include <stdlib.h>
#include <stdint.h>

View File

@@ -1 +0,0 @@
add_library(smallblock STATIC encodeSmallBlock.c decodeSmallBlock.c)

View File

@@ -228,6 +228,7 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
PHY_MEASUREMENTS_gNB *meas = &gNB->measurements;
free_and_zero(meas->n0_subband_power);
free_and_zero(meas->n0_subband_power_dB);
for (int id = 0; id < gNB->max_nb_srs; id++) {
for(int i=0; i<MAX_NUM_NR_SRS_AP; i++) {

View File

@@ -22,6 +22,7 @@
#include "phy_init.h"
#include "PHY/phy_extern.h"
#include "SCHED/sched_common.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "assertions.h"
#include <math.h>
#include "openair1/PHY/defs_RU.h"

View File

@@ -22,6 +22,7 @@
#include "nr_phy_init.h"
#include "openair1/PHY/defs_RU.h"
#include "openair1/PHY/impl_defs_nr.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "assertions.h"
#include "PHY/MODULATION/nr_modulation.h"
#include "PHY/NR_UE_TRANSPORT/nr_transport_ue.h"

View File

@@ -760,8 +760,6 @@ static inline __attribute__((always_inline)) int16x8_t cmac0_prec128(int16x8_t x
//
int16x8_t xr = vuzp1q_s16(x, x); // even lanes
int16x8_t xi = vuzp2q_s16(x, x); // odd lanes
#ifdef __ARM_FEATURE_QRDMX
// ARMv8.1-A: Use RDM instructions
// real = ar*br - ai*bi (Q15 scaling via high-half doubling muls)
int16x8_t real = vqdmulhq_s16(xr, wr); // ≈ round((2*xr*wr)/2^16)
real = vqrdmlshq_s16(real, xi, wi); // real -= round((2*xi*wi)/2^16)
@@ -769,21 +767,7 @@ static inline __attribute__((always_inline)) int16x8_t cmac0_prec128(int16x8_t x
// imag = ar*bi + ai*br
int16x8_t imag = vqdmulhq_s16(xr, wi);
imag = vqrdmlahq_s16(imag, xi, wr); // imag += round((2*xi*wr)/2^16)
#else
// ARMv8.0-A fallback: Use standard 32-bit multiply
int32x4_t real_lo = vmull_s16(vget_low_s16(xr), vget_low_s16(wr));
int32x4_t real_hi = vmull_s16(vget_high_s16(xr), vget_high_s16(wr));
real_lo = vmlsl_s16(real_lo, vget_low_s16(xi), vget_low_s16(wi));
real_hi = vmlsl_s16(real_hi, vget_high_s16(xi), vget_high_s16(wi));
int32x4_t imag_lo = vmull_s16(vget_low_s16(xr), vget_low_s16(wi));
int32x4_t imag_hi = vmull_s16(vget_high_s16(xr), vget_high_s16(wi));
imag_lo = vmlal_s16(imag_lo, vget_low_s16(xi), vget_low_s16(wr));
imag_hi = vmlal_s16(imag_hi, vget_high_s16(xi), vget_high_s16(wr));
int16x8_t real = vcombine_s16(vqrshrn_n_s32(real_lo, 15), vqrshrn_n_s32(real_hi, 15));
int16x8_t imag = vcombine_s16(vqrshrn_n_s32(imag_lo, 15), vqrshrn_n_s32(imag_hi, 15));
#endif
//
// Re-interleave [real, imag]
int16x8x2_t produ = vzipq_s16(real, imag);
return produ.val[0];

View File

@@ -105,47 +105,36 @@ void nr_est_srs_timing_advance_offset(uint16_t ofdm_symbol_size,
max_idx);
}
void dump_nr_I0_stats(FILE *fd, PHY_VARS_gNB *gNB)
{
int min_I0 = 1000, max_I0 = 0;
int amin = 0, amax = 0;
fprintf(fd, "Blacklisted PRBs %d/%d\n", gNB->num_ulprbbl, gNB->frame_parms.N_RB_UL);
for (int i = 0; i < gNB->frame_parms.N_RB_UL; i++) {
if (gNB->ulprbbl[i] > 0)
continue;
if (gNB->measurements.n0_subband_power_tot_dB[i] < min_I0) {
min_I0 = gNB->measurements.n0_subband_power_tot_dB[i];
amin = i;
}
if (gNB->measurements.n0_subband_power_tot_dB[i] > max_I0) {
max_I0 = gNB->measurements.n0_subband_power_tot_dB[i];
amax = i;
}
}
void dump_nr_I0_stats(FILE *fd,PHY_VARS_gNB *gNB) {
int min_I0=1000,max_I0=0;
int amin=0,amax=0;
fprintf(fd,"Blacklisted PRBs %d/%d\n",gNB->num_ulprbbl,gNB->frame_parms.N_RB_UL);
for (int i=0; i<gNB->frame_parms.N_RB_UL; i++) {
if (gNB->ulprbbl[i] > 0) continue;
if (gNB->measurements.n0_subband_power_tot_dB[i]<min_I0) {min_I0 = gNB->measurements.n0_subband_power_tot_dB[i]; amin=i;}
if (gNB->measurements.n0_subband_power_tot_dB[i]>max_I0) {max_I0 = gNB->measurements.n0_subband_power_tot_dB[i]; amax=i;}
}
for (int i=0; i<gNB->frame_parms.N_RB_UL; i++) {
if (gNB->ulprbbl[i] ==0) fprintf(fd,"%2d.",gNB->measurements.n0_subband_power_tot_dB[i]-gNB->measurements.n0_subband_power_avg_dB);
else fprintf(fd," X.");
if (i%25 == 24) fprintf(fd,"\n");
}
fprintf(fd,"\n");
fprintf(fd,"max_IO = %d (%d), min_I0 = %d (%d), avg_I0 = %d dB",max_I0,amax,min_I0,amin,gNB->measurements.n0_subband_power_avg_dB);
if (gNB->frame_parms.nb_antennas_rx>1) {
fprintf(fd,"(");
for (int aarx=0;aarx<gNB->frame_parms.nb_antennas_rx;aarx++)
fprintf(fd,"%d.",gNB->measurements.n0_subband_power_avg_perANT_dB[aarx]);
fprintf(fd,")");
}
fprintf(fd,"\nPRACH I0 = %d.%d dB\n",gNB->measurements.prach_I0/10,gNB->measurements.prach_I0%10);
for (int i = 0; i < gNB->frame_parms.N_RB_UL; i++) {
if (gNB->ulprbbl[i] == 0)
fprintf(fd, "%2d.", gNB->measurements.n0_subband_power_tot_dB[i] - gNB->measurements.n0_subband_power_avg_dB);
else
fprintf(fd, " X.");
if (i % 25 == 24)
fprintf(fd, "\n");
}
fprintf(fd, "\n");
fprintf(fd,
"max_IO = %d (%d), min_I0 = %d (%d), avg_I0 = %d dB",
max_I0,
amax,
min_I0,
amin,
gNB->measurements.n0_subband_power_avg_dB);
if (gNB->frame_parms.nb_antennas_rx > 1) {
fprintf(fd, "(");
for (int aarx = 0; aarx < gNB->frame_parms.nb_antennas_rx; aarx++)
fprintf(fd, "%d.", gNB->measurements.n0_subband_power_avg_perANT_dB[aarx]);
fprintf(fd, ")");
}
fprintf(fd, "\nPRACH I0 = %d.%d dB\n", gNB->measurements.prach_I0 / 10, gNB->measurements.prach_I0 % 10);
}
void gNB_I0_measurements(PHY_VARS_gNB *gNB, int slot, int first_symb, int num_symb, uint32_t rb_mask_ul[14][9])
@@ -155,8 +144,19 @@ void gNB_I0_measurements(PHY_VARS_gNB *gNB, int slot, int first_symb, int num_sy
PHY_MEASUREMENTS_gNB *measurements = &gNB->measurements;
int nb_symb[275]={0};
unsigned int tmp_n0_subband[frame_parms->nb_antennas_rx][frame_parms->N_RB_UL];
memset(tmp_n0_subband, 0, sizeof(tmp_n0_subband));
allocCast2D(n0_subband_power,
unsigned int,
gNB->measurements.n0_subband_power,
frame_parms->nb_antennas_rx,
frame_parms->N_RB_UL,
false);
clearArray(gNB->measurements.n0_subband_power, unsigned int);
allocCast2D(n0_subband_power_dB,
unsigned int,
gNB->measurements.n0_subband_power_dB,
frame_parms->nb_antennas_rx,
frame_parms->N_RB_UL,
false);
// TODO modify the measurements to take into account concurrent beams
for (int s = first_symb; s < first_symb + num_symb; s++) {
@@ -176,46 +176,39 @@ void gNB_I0_measurements(PHY_VARS_gNB *gNB, int slot, int first_symb, int num_sy
} else {
signal_energy = signal_energy_nodc(ul_ch, 12);
}
// noise power per antenna/RB, symbols summed up
tmp_n0_subband[aarx][rb] += signal_energy;
n0_subband_power[aarx][rb] += signal_energy;
LOG_D(NR_PHY,"slot %d symbol %d RB %d aarx %d n0_subband_power %d\n", slot, s, rb, aarx, signal_energy);
} //antenna
}
} //rb
} // symb
int nb_rb=0;
int64_t n0_subband_tot=0;
int32_t n0_subband_tot_perANT[frame_parms->nb_antennas_rx];
memset(n0_subband_tot_perANT, 0, sizeof(n0_subband_tot_perANT));
allocCast2D(n0_subband_power,
unsigned int,
measurements->n0_subband_power,
frame_parms->nb_antennas_rx,
frame_parms->N_RB_UL,
false);
memset(n0_subband_tot_perANT, 0, sizeof(n0_subband_tot_perANT));
for (int rb = 0 ; rb<frame_parms->N_RB_UL;rb++) {
int32_t n0_subband_tot_perPRB=0;
if (nb_symb[rb] > 0) {
for (int aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++) {
tmp_n0_subband[aarx][rb] /= nb_symb[rb];
// apply exponential moving average to smooth noise measurements
n0_subband_power[aarx][rb] = 0.9 * n0_subband_power[aarx][rb] + 0.1 * tmp_n0_subband[aarx][rb];
for (int aarx=0;aarx<frame_parms->nb_antennas_rx;aarx++) {
n0_subband_power[aarx][rb] /= nb_symb[rb];
n0_subband_power_dB[aarx][rb] = dB_fixed(n0_subband_power[aarx][rb]);
n0_subband_tot_perPRB += n0_subband_power[aarx][rb];
n0_subband_tot_perANT[aarx] += n0_subband_power[aarx][rb];
}
n0_subband_tot_perPRB /= frame_parms->nb_antennas_rx;
n0_subband_tot_perPRB/=frame_parms->nb_antennas_rx;
measurements->n0_subband_power_tot_dB[rb] = dB_fixed(n0_subband_tot_perPRB);
measurements->n0_subband_power_tot_dBm[rb] = measurements->n0_subband_power_tot_dB[rb] - gNB->rx_total_gain_dB - dB_fixed(frame_parms->N_RB_UL);
LOG_D(NR_PHY,"n0_subband_power_tot_dB[%d] => %d, over %d symbols\n",rb,measurements->n0_subband_power_tot_dB[rb],nb_symb[rb]);
n0_subband_tot += n0_subband_tot_perPRB;
nb_rb++;
}
}
if (nb_rb>0) {
int64_t n0_subband_tot = 0;
for (int aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++) {
measurements->n0_subband_power_avg_perANT_dB[aarx] = dB_fixed(n0_subband_tot_perANT[aarx] / nb_rb);
n0_subband_tot += n0_subband_tot_perANT[aarx];
}
measurements->n0_subband_power_avg_dB = dB_fixed(n0_subband_tot / nb_rb);
measurements->n0_subband_power_avg_dB = dB_fixed(n0_subband_tot/nb_rb);
for (int aarx=0;aarx<frame_parms->nb_antennas_rx;aarx++) {
measurements->n0_subband_power_avg_perANT_dB[aarx] = dB_fixed(n0_subband_tot_perANT[aarx]/nb_rb);
}
}
}

View File

@@ -992,8 +992,17 @@ int nr_srs_channel_estimation(int ant,
// Compute wideband SNR on the symbol 0
int tot_subcarriers = m_SRS_b * NR_NB_SC_PER_RB;
uint16_t subcarrier_abs = first_subcarrier + nr_srs_info->k_0_p[p_index][0];
*signal_power = signal_energy_nodc(&srs_estimated_channel_freq[subcarrier_abs], tot_subcarriers);
if (subcarrier_abs + tot_subcarriers < ofdm_symbol_size_half) {
*signal_power = signal_energy_nodc(&srs_estimated_channel_freq[subcarrier_abs], tot_subcarriers) / tot_subcarriers;
} else {
int size1 = ofdm_symbol_size_half - subcarrier_abs;
int size2 = tot_subcarriers - size1;
uint64_t signal_power_p1 = signal_energy_nodc(&srs_estimated_channel_freq[subcarrier_abs], size1) * size1;
uint64_t signal_power_p2 = signal_energy_nodc(&srs_estimated_channel_freq[ofdm_symbol_size_half], size2) * size2;
*signal_power = (signal_power_p1 + signal_power_p2) / tot_subcarriers;
}
if (*signal_power == 0) {
LOG_W(NR_PHY, "Received SRS signal power is 0\n");

View File

@@ -51,11 +51,11 @@ static void nr_pdcch_scrambling(uint32_t *in, uint32_t size, uint32_t Nid, uint3
out[i] = in[i] ^ seq[i];
}
void nr_generate_dci(PHY_VARS_gNB *gNB,
const nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
int txdataF_offset,
NR_DL_FRAME_PARMS *frame_parms,
int slot)
void nr_generate_dci(const nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
const NR_DL_FRAME_PARMS *frame_parms,
int slot,
uint16_t amp,
c16_t *txdataF)
{
// fill reg list per symbol
int reg_list[MAX_DCI_CORESET][NR_MAX_PDCCH_AGG_LEVEL * NR_NB_REG_PER_CCE];
@@ -83,14 +83,6 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
uint32_t cset_start_symb = pdcch_pdu_rel15->StartSymbolIndex;
uint32_t cset_nsymb = pdcch_pdu_rel15->DurationSymbols;
int dci_idx = 0;
// multi-beam number (for concurrent beams)
int bitmap = SL_to_bitmap(cset_start_symb, pdcch_pdu_rel15->DurationSymbols);
int beam_nb = beam_index_allocation(gNB->enable_analog_das,
dci_pdu->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx,
&gNB->common_vars,
slot,
frame_parms->symbols_per_slot,
bitmap);
LOG_D(NR_PHY_DCI, "pdcch: Coreset rb_offset %d, nb_rb %d BWP Start %d\n", rb_offset, n_rb, pdcch_pdu_rel15->BWPStart);
LOG_D(NR_PHY_DCI,
@@ -178,8 +170,6 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
#endif
/// Resource mapping
uint16_t amp = gNB->TX_AMP;
c16_t *txdataF = gNB->common_vars.txdataF[beam_nb][0] + txdataF_offset;
if (cset_start_sc >= frame_parms->ofdm_symbol_size)
cset_start_sc -= frame_parms->ofdm_symbol_size;

View File

@@ -26,11 +26,11 @@
#include "PHY/NR_REFSIG/nr_refsig.h"
#include "nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h"
void nr_generate_dci(PHY_VARS_gNB *gNB,
const nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
int txdataF_offset,
NR_DL_FRAME_PARMS *frame_parms,
int slot);
void nr_generate_dci(const nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
const NR_DL_FRAME_PARMS *frame_parms,
int slot,
uint16_t amp,
c16_t *txdataF);
int16_t find_nr_pdcch(int frame,int slot, PHY_VARS_gNB *gNB,find_type_t type);

View File

@@ -36,6 +36,7 @@
#include "PHY/MODULATION/nr_modulation.h"
#include "PHY/NR_REFSIG/dmrs_nr.h"
#include "PHY/NR_REFSIG/ptrs_nr.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "common/utils/nr/nr_common.h"
#include "executables/softmodem-common.h"
#include "SCHED_NR/sched_nr.h"
@@ -45,7 +46,7 @@
#include <simde/x86/avx512.h>
#define USE128BIT
static void nr_pdsch_codeword_scrambling(uint8_t *in, uint32_t size, uint8_t q, uint32_t Nid, uint32_t n_RNTI, uint32_t *out)
static void nr_pdsch_codeword_scrambling(const uint8_t *in, uint32_t size, uint8_t q, uint32_t Nid, uint32_t n_RNTI, uint32_t *out)
{
nr_codeword_scrambling(in, size, q, Nid, n_RNTI, out);
}
@@ -336,7 +337,7 @@ static inline void neg_dmrs(c16_t *in, c16_t *out, int sz)
*out++ = i % 2 ? (c16_t){-in[i].r, -in[i].i} : in[i];
}
static inline int do_onelayer(NR_DL_FRAME_PARMS *frame_parms,
static inline int do_onelayer(const NR_DL_FRAME_PARMS *frame_parms,
int slot,
const nfapi_nr_dl_tti_pdsch_pdu_rel15_t *rel15,
int layer,
@@ -452,16 +453,15 @@ static inline int do_onelayer(NR_DL_FRAME_PARMS *frame_parms,
return txl - txl_start;
}
static inline void do_txdataF(c16_t **txdataF,
static inline void do_txdataF(const nfapi_nr_config_request_scf_t *cfg,
c16_t **txdataF,
int symbol_sz,
c16_t txdataF_precoding[][symbol_sz],
PHY_VARS_gNB *gNB,
const nfapi_nr_dl_tti_pdsch_pdu_rel15_t *rel15,
int ant,
int start_sc,
int txdataF_offset_per_symbol)
{
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
int rb = 0;
uint16_t subCarrier = start_sc;
const nfapi_nr_tx_precoding_and_beamforming_t *pb = &rel15->precodingAndBeamforming;
@@ -503,9 +503,8 @@ static inline void do_txdataF(c16_t **txdataF,
subCarrier -= symbol_sz;
}
} else { // non-unitary Precoding
AssertFatal(frame_parms->nb_antennas_tx > 1, "No precoding can be done with a single antenna port\n");
// get the precoding matrix weights:
nfapi_nr_pm_pdu_t *pmi_pdu = &gNB->gNB_config.pmi_list.pmi_pdu[pmi - 1]; // pmi 0 is identity matrix
nfapi_nr_pm_pdu_t *pmi_pdu = &cfg->pmi_list.pmi_pdu[pmi - 1]; // pmi 0 is identity matrix
AssertFatal(pmi == pmi_pdu->pm_idx, "PMI %d doesn't match to the one in precoding matrix %d\n", pmi, pmi_pdu->pm_idx);
AssertFatal(ant < pmi_pdu->num_ant_ports,
"Antenna port index %d exceeds precoding matrix AP size %d\n",
@@ -547,13 +546,16 @@ static inline void do_txdataF(c16_t **txdataF,
rb += rb_step;
} // RB loop: while(rb < rel15->rbSize)
}
static int do_one_dlsch(unsigned char *input_ptr, PHY_VARS_gNB *gNB, NR_gNB_DLSCH_t *dlsch, int slot)
static int do_one_dlsch(const NR_DL_FRAME_PARMS *frame_parms,
const nfapi_nr_config_request_scf_t *cfg,
const unsigned char *input_ptr,
int amp,
NR_gNB_DLSCH_t *dlsch,
int slot,
c16_t **txdataF,
nr_dlsch_stats_t *stats)
{
const int16_t amp = gNB->TX_AMP;
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
time_stats_t *dlsch_scrambling_stats = &gNB->dlsch_scrambling_stats;
time_stats_t *dlsch_modulation_stats = &gNB->dlsch_modulation_stats;
const nfapi_nr_dl_tti_pdsch_pdu_rel15_t *rel15 = &dlsch->pdsch_pdu->pdsch_pdu_rel15;
const int layerSz = frame_parms->N_RB_DL * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB;
const int symbol_sz=frame_parms->ofdm_symbol_size;
@@ -609,7 +611,7 @@ static int do_one_dlsch(unsigned char *input_ptr, PHY_VARS_gNB *gNB, NR_gNB_DLSC
c16_t mod_symbs[rel15->NrOfCodewords][encoded_length] __attribute__((aligned(64)));
for (int codeWord = 0; codeWord < rel15->NrOfCodewords; codeWord++) {
/// scrambling
start_meas(dlsch_scrambling_stats);
start_meas(&stats->scrambling);
uint32_t scrambled_output[(encoded_length >> 5) + 4]; // modulator acces by 4 bytes in some cases
memset(scrambled_output, 0, sizeof(scrambled_output));
nr_pdsch_codeword_scrambling(input_ptr, encoded_length, codeWord, rel15->dataScramblingId, rel15->rnti, scrambled_output);
@@ -623,11 +625,12 @@ static int do_one_dlsch(unsigned char *input_ptr, PHY_VARS_gNB *gNB, NR_gNB_DLSC
}
#endif
stop_meas(dlsch_scrambling_stats);
stop_meas(&stats->scrambling);
/// Modulation
start_meas(dlsch_modulation_stats);
start_meas(&stats->modulation);
nr_modulation(scrambled_output, encoded_length, Qm, (int16_t *)mod_symbs[codeWord]);
stop_meas(dlsch_modulation_stats);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_PDSCH_MODULATION, 0);
stop_meas(&stats->modulation);
#ifdef DEBUG_DLSCH
printf("PDSCH Modulation: Qm %d(%d)\n", Qm, nb_re);
for (int i = 0; i < nb_re; i += 8) {
@@ -639,7 +642,7 @@ static int do_one_dlsch(unsigned char *input_ptr, PHY_VARS_gNB *gNB, NR_gNB_DLSC
#endif
}
start_meas(&gNB->dlsch_pdsch_generation_stats);
start_meas(&stats->pdsch_generation);
/// Resource mapping
// Non interleaved VRB to PRB mapping
uint16_t start_sc = frame_parms->first_carrier_offset + (rel15->rbStart + rel15->BWPStart) * NR_NB_SC_PER_RB;
@@ -661,34 +664,16 @@ static int do_one_dlsch(unsigned char *input_ptr, PHY_VARS_gNB *gNB, NR_gNB_DLSC
c16_t mod_dmrs[(n_dmrs+63)&~63] __attribute__((aligned(64)));
unsigned int re_beginning_of_symbol = 0;
start_meas(&gNB->dlsch_layer_mapping_stats);
start_meas(&stats->layer_mapping);
int layerSz2 = (layerSz + 63) & ~63;
c16_t tx_layers[rel15->nrOfLayers][layerSz2] __attribute__((aligned(64)));
memset(tx_layers, 0, sizeof(tx_layers));
nr_layer_mapping(rel15->NrOfCodewords, encoded_length, mod_symbs, rel15->nrOfLayers, layerSz2, nb_re, tx_layers);
/// Layer Precoding and Antenna port mapping
// tx_layers 1-8 are mapped on antenna ports 1000-1007
// The precoding info is supported by nfapi such as num_prgs, prg_size, prgs_list and pm_idx
// The same precoding matrix is applied on prg_size RBs, Thus
// pmi = prgs_list[rbidx/prg_size].pm_idx, rbidx =0,...,rbSize-1
// The Precoding matrix:
// The Codebook Type I
const nfapi_nr_tx_precoding_and_beamforming_t *pb = &rel15->precodingAndBeamforming;
// beam number in multi-beam scenario (concurrent beams)
int bitmap = SL_to_bitmap(rel15->StartSymbolIndex, rel15->NrOfSymbols);
int beam_nb = beam_index_allocation(gNB->enable_analog_das,
pb->prgs_list[0].dig_bf_interface_list[0].beam_idx,
&gNB->common_vars,
slot,
frame_parms->symbols_per_slot,
bitmap);
c16_t **txdataF = gNB->common_vars.txdataF[beam_nb];
stop_meas(&gNB->dlsch_layer_mapping_stats);
stop_meas(&stats->layer_mapping);
// Loop Over OFDM symbols:
for (int l_symbol = rel15->StartSymbolIndex; l_symbol < rel15->StartSymbolIndex + rel15->NrOfSymbols; l_symbol++) {
start_meas(&gNB->dlsch_resource_mapping_stats);
start_meas(&stats->resource_mapping);
int l_prime = 0; // single symbol layer 0
int l_overline = get_l0(rel15->dlDmrsSymbPos);
@@ -753,16 +738,16 @@ static int do_one_dlsch(unsigned char *input_ptr, PHY_VARS_gNB *gNB, NR_gNB_DLSC
mod_dmrs + dmrs_idx);
} // layer loop
re_beginning_of_symbol += layer_sz;
stop_meas(&gNB->dlsch_resource_mapping_stats);
stop_meas(&stats->resource_mapping);
start_meas(&gNB->dlsch_precoding_stats);
start_meas(&stats->precoding);
for (int ant = 0; ant < frame_parms->nb_antennas_tx; ant++) {
const size_t txdataF_offset_per_symbol = l_symbol * symbol_sz + txdataF_offset;
do_txdataF(txdataF, symbol_sz, txdataF_precoding, gNB, rel15, ant, start_sc, txdataF_offset_per_symbol);
do_txdataF(cfg, txdataF, symbol_sz, txdataF_precoding, rel15, ant, start_sc, txdataF_offset_per_symbol);
}
stop_meas(&gNB->dlsch_precoding_stats);
stop_meas(&stats->precoding);
}
stop_meas(&gNB->dlsch_pdsch_generation_stats);
stop_meas(&stats->pdsch_generation);
/* output and its parts for each dlsch should be aligned on 64 bytes (or 8 * 64 bits)
* should remain a multiple of 8 * 64 with enough offset to fit each dlsch
*/
@@ -772,15 +757,9 @@ static int do_one_dlsch(unsigned char *input_ptr, PHY_VARS_gNB *gNB, NR_gNB_DLSC
void nr_generate_pdsch(PHY_VARS_gNB *gNB, int n_dlsch, NR_gNB_DLSCH_t *dlsch_array, int frame, int slot)
{
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
time_stats_t *dlsch_encoding_stats = &gNB->dlsch_encoding_stats;
time_stats_t *tinput = &gNB->tinput;
time_stats_t *tprep = &gNB->tprep;
time_stats_t *tparity = &gNB->tparity;
time_stats_t *toutput = &gNB->toutput;
time_stats_t *dlsch_rate_matching_stats = &gNB->dlsch_rate_matching_stats;
time_stats_t *dlsch_interleaving_stats = &gNB->dlsch_interleaving_stats;
time_stats_t *dlsch_segmentation_stats = &gNB->dlsch_segmentation_stats;
const NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
const nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
nr_dlsch_stats_t *stats = &gNB->dlsch_stats;
size_t size_output = 0;
@@ -825,29 +804,18 @@ void nr_generate_pdsch(PHY_VARS_gNB *gNB, int n_dlsch, NR_gNB_DLSCH_t *dlsch_arr
unsigned char output[size_output >> 3] __attribute__((aligned(64)));
bzero(output, sizeof(output));
start_meas(dlsch_encoding_stats);
if (nr_dlsch_encoding(gNB,
n_dlsch,
dlsch_array,
frame,
slot,
frame_parms,
output,
tinput,
tprep,
tparity,
toutput,
dlsch_rate_matching_stats,
dlsch_interleaving_stats,
dlsch_segmentation_stats)
== -1) {
start_meas(&stats->encoding);
nrLDPC_coding_encoder_t *enc = gNB->nrLDPC_coding_interface.nrLDPC_coding_encoder;
if (nr_dlsch_encoding(enc, &gNB->threadPool, n_dlsch, dlsch_array, frame, slot, frame_parms, output, stats) == -1) {
return;
}
stop_meas(dlsch_encoding_stats);
stop_meas(&stats->encoding);
unsigned char *output_ptr = output;
int beam_nb = 0; // TODO
c16_t **txdataF = gNB->common_vars.txdataF[beam_nb];
for (int i = 0; i < n_dlsch; i++) {
output_ptr += do_one_dlsch(output_ptr, gNB, &dlsch_array[i], slot);
output_ptr += do_one_dlsch(frame_parms, cfg, output_ptr, gNB->TX_AMP, &dlsch_array[i], slot, txdataF, stats);
}
}

View File

@@ -37,20 +37,15 @@
void nr_generate_pdsch(PHY_VARS_gNB *gNB, int n_dlsch, NR_gNB_DLSCH_t *dlsch_array, int frame, int slot);
int nr_dlsch_encoding(PHY_VARS_gNB *gNB,
int nr_dlsch_encoding(nrLDPC_coding_encoder_t *encoder,
tpool_t *threadPool,
int n_dlsch,
NR_gNB_DLSCH_t *dlsch_array,
int frame,
uint8_t slot,
NR_DL_FRAME_PARMS *frame_parms,
const NR_DL_FRAME_PARMS *frame_parms,
unsigned char *output,
time_stats_t *tinput,
time_stats_t *tprep,
time_stats_t *tparity,
time_stats_t *toutput,
time_stats_t *dlsch_rate_matching_stats,
time_stats_t *dlsch_interleaving_stats,
time_stats_t *dlsch_segmentation_stats);
nr_dlsch_stats_t *stats);
void dump_pdsch_stats(FILE *fd,PHY_VARS_gNB *gNB);

View File

@@ -33,6 +33,7 @@
#include "PHY/NR_TRANSPORT/nr_transport_common_proto.h"
#include "PHY/NR_TRANSPORT/nr_dlsch.h"
#include "SCHED_NR/sched_nr.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "common/utils/LOG/log.h"
#include "common/utils/nr/nr_common.h"
#include <syscall.h>
@@ -102,21 +103,18 @@ NR_gNB_DLSCH_t new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms, uint16_t N_RB)
return (dlsch);
}
int nr_dlsch_encoding(PHY_VARS_gNB *gNB,
int nr_dlsch_encoding(nrLDPC_coding_encoder_t encoder,
tpool_t *threadPool,
int n_dlsch,
NR_gNB_DLSCH_t *dlsch_array,
int frame,
uint8_t slot,
NR_DL_FRAME_PARMS *frame_parms,
const NR_DL_FRAME_PARMS *frame_parms,
unsigned char *output,
time_stats_t *tinput,
time_stats_t *tprep,
time_stats_t *tparity,
time_stats_t *toutput,
time_stats_t *dlsch_rate_matching_stats,
time_stats_t *dlsch_interleaving_stats,
time_stats_t *dlsch_segmentation_stats)
nr_dlsch_stats_t *stats)
{
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_DLSCH_ENCODING, VCD_FUNCTION_IN);
nrLDPC_TB_encoding_parameters_t TBs[n_dlsch];
memset(TBs, 0, sizeof(TBs));
@@ -146,8 +144,10 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB,
}
NR_gNB_PHY_STATS_t *phy_stats = NULL;
/* TODO
if (rel15->rnti != 0xFFFF)
phy_stats = get_phy_stats(gNB, rel15->rnti);
*/
if (phy_stats) {
phy_stats->frame = frame;
@@ -187,7 +187,7 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB,
TB_parameters->harq_unique_pid = i;
TB_parameters->BG = rel15->maintenance_parms_v3.ldpcBaseGraph;
TB_parameters->A = A;
start_meas(dlsch_segmentation_stats);
start_meas(&stats->segmentation);
TB_parameters->Kb = nr_segmentation(dlsch->b,
dlsch->c,
B,
@@ -196,7 +196,7 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB,
&TB_parameters->Z,
&TB_parameters->F,
TB_parameters->BG);
stop_meas(dlsch_segmentation_stats);
stop_meas(&stats->segmentation);
if (TB_parameters->C > MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER * rel15->nrOfLayers) {
LOG_E(PHY, "nr_segmentation.c: too many segments %d, B %d\n", TB_parameters->C, B);
@@ -271,22 +271,24 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB,
nrLDPC_slot_encoding_parameters_t slot_parameters = {.frame = frame,
.slot = slot,
.nb_TBs = n_dlsch,
.threadPool = &gNB->threadPool,
.tinput = tinput,
.tprep = tprep,
.tparity = tparity,
.toutput = toutput,
.threadPool = threadPool,
.tinput = &stats->tinput,
.tprep = &stats->tprep,
.tparity = &stats->tparity,
.toutput = &stats->toutput,
.TBs = TBs};
gNB->nrLDPC_coding_interface.nrLDPC_coding_encoder(&slot_parameters);
encoder(&slot_parameters);
for (int i = 0; i < n_dlsch; i++) {
nrLDPC_TB_encoding_parameters_t *TB_parameters = &TBs[i];
for (int r = 0; r < TB_parameters->C; r++) {
nrLDPC_segment_encoding_parameters_t *segment_parameters = &TB_parameters->segments[r];
merge_meas(dlsch_interleaving_stats, &segment_parameters->ts_interleave);
merge_meas(dlsch_rate_matching_stats, &segment_parameters->ts_rate_match);
merge_meas(&stats->interleaving, &segment_parameters->ts_interleave);
merge_meas(&stats->rate_matching, &segment_parameters->ts_rate_match);
// merge_meas(, &segment_parameters->ts_ldpc_encode);
}
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_DLSCH_ENCODING, VCD_FUNCTION_OUT);
return 0;
}

View File

@@ -35,7 +35,6 @@
#include "PHY/NR_TRANSPORT/nr_transport_proto.h"
#include "PHY/sse_intrin.h"
#include "executables/softmodem-common.h"
#include "reverse_bits.h"
#include "openair1/PHY/NR_REFSIG/nr_refsig_common.h"
#include "openair1/PHY/NR_REFSIG/nr_mod_table.h"
#include "openair1/PHY/TOOLS/tools_defs.h"
@@ -52,8 +51,8 @@ void nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
c16_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_scf_t *config,
NR_DL_FRAME_PARMS *frame_parms)
const nfapi_nr_config_request_scf_t *config,
const NR_DL_FRAME_PARMS *frame_parms)
{
int k,l;
//int16_t a;
@@ -229,14 +228,15 @@ uint32_t nr_pbch_extra_byte_generation(int sfn, int n_hf, int ssb_index, int ssb
return extra_byte;
}
void nr_generate_pbch(PHY_VARS_gNB *gNB,
void nr_generate_pbch(int16_t amp,
const uint8_t *interleaver,
const nfapi_nr_dl_tti_ssb_pdu *ssb_pdu,
c16_t *txdataF,
uint8_t ssb_start_symbol,
uint8_t n_hf,
int sfn,
nfapi_nr_config_request_scf_t *config,
NR_DL_FRAME_PARMS *frame_parms)
const nfapi_nr_config_request_scf_t *config,
const NR_DL_FRAME_PARMS *frame_parms)
{
LOG_D(PHY, "PBCH generation started\n");
///Payload generation
@@ -262,7 +262,6 @@ void nr_generate_pbch(PHY_VARS_gNB *gNB,
// Payload interleaving
uint32_t pbch_a_interleaved = 0;
uint8_t *interleaver = gNB->nr_pbch_interleaver;
for (int i = 0; i < NR_POLAR_PBCH_PAYLOAD_BITS; i++) {
pbch_a_interleaved |= ((pbch_a >> i) & 1) << (*(interleaver + i));
}
@@ -337,7 +336,6 @@ void nr_generate_pbch(PHY_VARS_gNB *gNB,
int k = frame_parms->first_carrier_offset + frame_parms->ssb_start_subcarrier;
int l = ssb_start_symbol + 1;
int m = 0;
int16_t amp = gNB->TX_AMP;
for (int ssb_sc_idx = 0; ssb_sc_idx < 240; ssb_sc_idx++) {
if ((ssb_sc_idx&3) == nushift) { //skip DMRS

View File

@@ -30,11 +30,13 @@
* \warning
*/
#include "PHY/sse_intrin.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "PHY/impl_defs_nr.h"
#include "PHY/defs_nr_UE.h"
#include "PHY/NR_TRANSPORT/nr_prach.h"
#include "PHY/NR_TRANSPORT/nr_transport_common_proto.h"
#include "common/utils/LOG/log.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "T.h"
/* Extended Euclidean Algorithm to compute modulo inverse */
@@ -87,6 +89,9 @@ void compute_nr_prach_seq(uint8_t short_sequence, uint8_t num_sequences, uint8_t
int N_ZC;
const uint16_t* prach_root_sequence_map;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_UE_COMPUTE_PRACH, VCD_FUNCTION_IN);
LOG_D(PHY,"compute_prach_seq: prach short sequence %x, num_sequences %d, rootSequenceIndex %d\n", short_sequence, num_sequences, rootSequenceIndex);
N_ZC = (short_sequence) ? NR_PRACH_SEQ_LEN_S : NR_PRACH_SEQ_LEN_L;
@@ -127,4 +132,6 @@ void compute_nr_prach_seq(uint8_t short_sequence, uint8_t num_sequences, uint8_t
X_u[i][k] = ru;
}
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_UE_COMPUTE_PRACH, VCD_FUNCTION_OUT);
}

View File

@@ -27,8 +27,8 @@
int nr_generate_pss( c16_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_scf_t* config,
NR_DL_FRAME_PARMS *frame_parms)
const nfapi_nr_config_request_scf_t* config,
const NR_DL_FRAME_PARMS *frame_parms)
{
int16_t x[NR_PSS_LENGTH];
const int x_initial[7] = {0, 1, 1 , 0, 1, 1, 1};

View File

@@ -21,9 +21,10 @@
#include "nr_transport_common_proto.h"
#include "PHY/NR_REFSIG/nr_refsig.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#define DEBUG_SCRAMBLING(a)
//#define DEBUG_SCRAMBLING(a) a
void nr_codeword_scrambling(uint8_t *in,
void nr_codeword_scrambling(const uint8_t *in,
uint32_t size,
uint8_t q,
uint32_t Nid,

View File

@@ -26,8 +26,8 @@
int nr_generate_sss( c16_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_scf_t* config,
NR_DL_FRAME_PARMS *frame_parms)
const nfapi_nr_config_request_scf_t* config,
const NR_DL_FRAME_PARMS *frame_parms)
{
int16_t x0[NR_SSS_LENGTH];
int16_t x1[NR_SSS_LENGTH];

View File

@@ -69,7 +69,7 @@ void compute_nr_prach_seq(uint8_t short_sequence, uint8_t num_sequences, uint8_t
void nr_fill_du(uint16_t N_ZC, const uint16_t *prach_root_sequence_map, uint16_t nr_du[NR_PRACH_SEQ_LEN_L - 1]);
void nr_codeword_scrambling(uint8_t *in,
void nr_codeword_scrambling(const uint8_t *in,
uint32_t size,
uint8_t q,
uint32_t Nid,

View File

@@ -56,8 +56,8 @@ int nr_generate_prs(int slot,
int nr_generate_pss(c16_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_scf_t *config,
NR_DL_FRAME_PARMS *frame_parms);
const nfapi_nr_config_request_scf_t *config,
const NR_DL_FRAME_PARMS *frame_parms);
/*!
\fn int nr_generate_sss
@@ -68,8 +68,8 @@ int nr_generate_pss(c16_t *txdataF,
int nr_generate_sss(c16_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_scf_t *config,
NR_DL_FRAME_PARMS *frame_parms);
const nfapi_nr_config_request_scf_t *config,
const NR_DL_FRAME_PARMS *frame_parms);
/*!
\fn void nr_generate_pbch_dmrs
@@ -80,22 +80,23 @@ void nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
c16_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_scf_t *config,
NR_DL_FRAME_PARMS *frame_parms);
const nfapi_nr_config_request_scf_t *config,
const NR_DL_FRAME_PARMS *frame_parms);
/*!
\fn void nr_generate_pbch
\brief Generation of the PBCH
@param
*/
void nr_generate_pbch(PHY_VARS_gNB *gNB,
void nr_generate_pbch(int16_t amp,
const uint8_t *interleaver,
const nfapi_nr_dl_tti_ssb_pdu *ssb_pdu,
c16_t *txdataF,
uint8_t ssb_start_symbol,
uint8_t n_hf,
int sfn,
nfapi_nr_config_request_scf_t *config,
NR_DL_FRAME_PARMS *frame_parms);
const nfapi_nr_config_request_scf_t *config,
const NR_DL_FRAME_PARMS *frame_parms);
/*!
\fn int nr_generate_pbch

View File

@@ -74,6 +74,8 @@ void nr_ulsch_layer_demapping(int16_t *llr_cw, uint8_t Nl, uint8_t mod_order, ui
void dump_pusch_stats(FILE *fd,PHY_VARS_gNB *gNB);
void dump_nr_I0_stats(FILE *fd,PHY_VARS_gNB *gNB);
NR_gNB_SCH_STATS_t *get_ulsch_stats(PHY_VARS_gNB *gNB,NR_gNB_ULSCH_t *ulsch);
#endif /* NR_ULSCH_H_ */

View File

@@ -36,6 +36,7 @@
#include "PHY/NR_TRANSPORT/nr_dlsch.h"
#include "SCHED_NR/sched_nr.h"
#include "defs.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "common/utils/LOG/log.h"
#include <syscall.h>
// #define DEBUG_ULSCH_DECODING
@@ -114,6 +115,8 @@ int nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
uint8_t *ULSCH_ids,
int nb_pusch)
{
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_gNB_ULSCH_DECODING, 1);
nrLDPC_TB_decoding_parameters_t TBs[nb_pusch];
memset(TBs, 0, sizeof(TBs));
nrLDPC_slot_decoding_parameters_t slot_parameters = {.frame = frame,

View File

@@ -1164,11 +1164,12 @@ int nr_rx_pusch_tp(PHY_VARS_gNB *gNB,
int max_ch = 0;
uint32_t nvar = 0;
int end_symbol = rel15_ul->start_symbol_index + rel15_ul->nr_of_symbols;
for (uint8_t symbol = rel15_ul->start_symbol_index; symbol < end_symbol; symbol++) {
for(uint8_t symbol = rel15_ul->start_symbol_index; symbol < end_symbol; symbol++) {
uint8_t dmrs_symbol_flag = (rel15_ul->ul_dmrs_symb_pos >> symbol) & 0x01;
LOG_D(PHY, "symbol %d, dmrs_symbol_flag :%d\n", symbol, dmrs_symbol_flag);
if (dmrs_symbol_flag == 1) {
for (int nl = 0; nl < rel15_ul->nrOfLayers; nl++) {
uint32_t nvar_tmp = 0;
nr_pusch_channel_estimation(gNB,
@@ -1186,54 +1187,56 @@ int nr_rx_pusch_tp(PHY_VARS_gNB *gNB,
pusch_ch_est_dmrs_pos_slot_mem);
nvar += nvar_tmp;
}
allocCast2D(n0_subband_power,
unsigned int,
gNB->measurements.n0_subband_power,
frame_parms->nb_antennas_rx,
frame_parms->N_RB_UL,
false);
for (int aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++) {
if (symbol == rel15_ul->start_symbol_index) {
pusch_vars->ulsch_power[aarx] = 0;
pusch_vars->ulsch_noise_power[aarx] = 0;
}
int64_t symb_energy = 0;
int start_sc = (rel15_ul->bwp_start + rel15_ul->rb_start) * NR_NB_SC_PER_RB;
int middle_sc = frame_parms->ofdm_symbol_size - frame_parms->first_carrier_offset;
int end_sc = (start_sc + rel15_ul->rb_size * NR_NB_SC_PER_RB - 1) % frame_parms->ofdm_symbol_size;
for (int s = rel15_ul->start_symbol_index; s < (rel15_ul->start_symbol_index + rel15_ul->nr_of_symbols); s++) {
int offset0 = ((slot % RU_RX_SLOT_DEPTH) * frame_parms->symbols_per_slot + s) * frame_parms->ofdm_symbol_size;
int offset = offset0 + (frame_parms->first_carrier_offset + start_sc) % frame_parms->ofdm_symbol_size;
c16_t *ul_ch = &gNB->common_vars.rxdataF[beam_nb][aarx][offset];
if (end_sc < start_sc) {
int64_t symb_energy_aux = signal_energy_nodc(ul_ch, middle_sc - start_sc) * (middle_sc - start_sc);
ul_ch = &gNB->common_vars.rxdataF[beam_nb][aarx][offset0];
symb_energy_aux += (signal_energy_nodc(ul_ch, end_sc + 1) * (end_sc + 1));
symb_energy += symb_energy_aux / (rel15_ul->rb_size * NR_NB_SC_PER_RB);
} else {
symb_energy += signal_energy_nodc(ul_ch, rel15_ul->rb_size * NR_NB_SC_PER_RB);
}
}
pusch_vars->ulsch_power[aarx] += (symb_energy / rel15_ul->nr_of_symbols);
pusch_vars->ulsch_noise_power[aarx] +=
average_u32(&n0_subband_power[aarx][rel15_ul->bwp_start + rel15_ul->rb_start], rel15_ul->rb_size);
LOG_D(PHY,
"aa %d, bwp_start%d, rb_start %d, rb_size %d: ulsch_power %d, ulsch_noise_power %d\n",
aarx,
rel15_ul->bwp_start,
rel15_ul->rb_start,
rel15_ul->rb_size,
pusch_vars->ulsch_power[aarx],
pusch_vars->ulsch_noise_power[aarx]);
}
}
}
nvar /= (rel15_ul->nr_of_symbols * rel15_ul->nrOfLayers * frame_parms->nb_antennas_rx);
allocCast2D(n0_subband_power,
unsigned int,
gNB->measurements.n0_subband_power,
frame_parms->nb_antennas_rx,
frame_parms->N_RB_UL,
false);
int start_sc = (rel15_ul->bwp_start + rel15_ul->rb_start) * NR_NB_SC_PER_RB;
int middle_sc = frame_parms->ofdm_symbol_size - frame_parms->first_carrier_offset;
int end_sc = (start_sc + rel15_ul->rb_size * NR_NB_SC_PER_RB - 1) % frame_parms->ofdm_symbol_size;
for (int aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++) {
pusch_vars->ulsch_power[aarx] = 0;
pusch_vars->ulsch_noise_power[aarx] = 0;
int64_t symb_energy = 0;
for (uint8_t symbol = rel15_ul->start_symbol_index; symbol < end_symbol; symbol++) {
int offset0 = ((slot % RU_RX_SLOT_DEPTH) * frame_parms->symbols_per_slot + symbol) * frame_parms->ofdm_symbol_size;
int offset = offset0 + (frame_parms->first_carrier_offset + start_sc) % frame_parms->ofdm_symbol_size;
c16_t *ul_ch = &gNB->common_vars.rxdataF[beam_nb][aarx][offset];
if (end_sc < start_sc) {
int64_t symb_energy_aux = signal_energy_nodc(ul_ch, middle_sc - start_sc) * (middle_sc - start_sc);
ul_ch = &gNB->common_vars.rxdataF[beam_nb][aarx][offset0];
symb_energy_aux += (signal_energy_nodc(ul_ch, end_sc + 1) * (end_sc + 1));
symb_energy += symb_energy_aux / (rel15_ul->rb_size * NR_NB_SC_PER_RB);
} else {
symb_energy += signal_energy_nodc(ul_ch, rel15_ul->rb_size * NR_NB_SC_PER_RB);
}
}
pusch_vars->ulsch_power[aarx] += (symb_energy / rel15_ul->nr_of_symbols);
pusch_vars->ulsch_noise_power[aarx] +=
average_u32(&n0_subband_power[aarx][rel15_ul->bwp_start + rel15_ul->rb_start], rel15_ul->rb_size);
LOG_D(PHY,
"aa %d, bwp_start%d, rb_start %d, rb_size %d: ulsch_power %d, ulsch_noise_power %d\n",
aarx,
rel15_ul->bwp_start,
rel15_ul->rb_start,
rel15_ul->rb_size,
pusch_vars->ulsch_power[aarx],
pusch_vars->ulsch_noise_power[aarx]);
}
// averaging time domain channel estimates
if (gNB->chest_time == 1)
nr_chest_time_domain_avg(frame_parms,

View File

@@ -46,10 +46,10 @@
#include "PHY/NR_TRANSPORT/nr_transport_proto.h"
#include "PHY/NR_REFSIG/nr_refsig.h"
#include "common/utils/LOG/log.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "nfapi/oai_integration/vendor_ext.h"
#include "nfapi/oai_integration/vendor_ext.h"
#include "SCHED_NR/sched_nr.h"
#include "reverse_bits.h"
#include "T.h"
#include "nr_phy_common.h"

View File

@@ -25,6 +25,7 @@
#include "PHY/impl_defs_top.h"
#include "executables/nr-uesoftmodem.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
//#define DEBUG_PHY
@@ -43,6 +44,8 @@ int nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms,
{
int max_val = 0, max_pos = 0;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_ADJUST_SYNCH, VCD_FUNCTION_IN);
// search for maximum position within the cyclic prefix
for (int i = -frame_parms->nb_prefix_samples; i < frame_parms->nb_prefix_samples; i++) {
int temp = 0;
@@ -92,5 +95,6 @@ int nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms,
ue->max_pos_iir += -round(sampleShift * PID_P) * 32768;
ue->max_pos_acc += max_pos;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_ADJUST_SYNCH, VCD_FUNCTION_OUT);
return sample_shift;
}

View File

@@ -22,6 +22,7 @@
/*! \file PHY/NR_UE_TRANSPORT/nr_dlsch_decoding_slot.c
*/
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "PHY/defs_nr_UE.h"
#include "SCHED_NR_UE/harq_nr.h"
#include "PHY/CODING/coding_extern.h"
@@ -143,6 +144,8 @@ void nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
TB_parameters->Qm,
Coderate);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_SEGMENTATION, VCD_FUNCTION_IN);
if (harq_process->first_rx == 1) {
// This is a new packet, so compute quantities regarding segmentation
nr_segmentation(NULL,
@@ -177,6 +180,8 @@ void nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
}
max_num_segments = max(max_num_segments, TB_parameters->C);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_SEGMENTATION, VCD_FUNCTION_OUT);
if (LOG_DEBUGFLAG(DEBUG_DLSCH_DECOD))
LOG_I(PHY, "Segmentation: C %d, K %d\n", harq_process->C, harq_process->K);

View File

@@ -35,6 +35,7 @@
#include "nr_transport_proto_ue.h"
#include "PHY/NR_UE_ESTIMATION/nr_estimation.h"
#include "SCHED_NR_UE/defs.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "common/utils/nr/nr_common.h"
#include "common_lib.h"
@@ -482,6 +483,7 @@ nr_initial_sync_t nr_initial_sync(UE_nr_rxtx_proc_t *proc,
if (ue->if_inst && ue->if_inst->dl_indication)
ue->if_inst->dl_indication(&dl_indication);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_NR_INITIAL_UE_SYNC, VCD_FUNCTION_IN);
LOG_D(PHY, "nr_initial sync ue RB_DL %d\n", fp->N_RB_DL);
@@ -552,6 +554,7 @@ nr_initial_sync_t nr_initial_sync(UE_nr_rxtx_proc_t *proc,
LOG_A(PHY, "Initial sync successful, PCI: %d\n", fp->Nid_cell);
}
// exit_fun("debug exit");
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_NR_INITIAL_UE_SYNC, VCD_FUNCTION_OUT);
if (res)
return res->syncRes;
else

View File

@@ -38,7 +38,6 @@
#include <openair1/PHY/TOOLS/phy_scope_interface.h>
#include "openair1/PHY/NR_REFSIG/nr_refsig_common.h"
#include "PHY/nr_phy_common/inc/nr_phy_common.h"
#include "reverse_bits.h"
#include "instrumentation.h"
//#define DEBUG_PBCH
//#define DEBUG_PBCH_ENCODING

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