fix / remove the warning in llr_computing

move layer de-mapping and unscrambling into symbol processing

CMakeLists.txt

@@ -148,21 +148,20 @@ add_list_string_option(CMAKE_BUILD_TYPE "RelWithDebInfo" "Choose the type of bui
 # in case /proc/cpuinfo exists we want to inspect available Intrinsics
 # -so not to go always through SIMDE emulation
 # -so to avoid AVX512 instructions generation by gcc   
-execute_process(COMMAND uname -m OUTPUT_VARIABLE CPUARCH OUTPUT_STRIP_TRAILING_WHITESPACE)
-message(STATUS "CPUARCH ${CPUARCH}")
 if(EXISTS "/proc/cpuinfo")
   file(STRINGS "/proc/cpuinfo" CPUFLAGS REGEX flags LIMIT_COUNT 1)
 else()
   message(WARNING "did not find /proc/cpuinfo -- not setting any x86-specific compilation variables")
 endif()
-
+ 
 eval_boolean(AUTODETECT_AVX512 DEFINED CPUFLAGS AND CPUFLAGS MATCHES "avx512")
 add_boolean_option(AVX512 ${AUTODETECT_AVX512} "Whether AVX512 intrinsics is available on the host processor" ON)
 
 eval_boolean(AUTODETECT_AVX2 DEFINED CPUFLAGS AND CPUFLAGS MATCHES "avx2")
 add_boolean_option(AVX2 ${AUTODETECT_AVX2} "Whether AVX2 intrinsics is available on the host processor" ON)
 
-if(${CPUARCH} STREQUAL "x86_64" AND DEFINED CPUFLAGS)
+message(STATUS "CPU architecture is ${CMAKE_SYSTEM_PROCESSOR}")
+if(CMAKE_SYSTEM_PROCESSOR STREQUAL "x86_64")
   # The following intrinsics are assumed to be available on any x86 system
   # (avx, f16c, fma, gnfi, mmx, pclmul, sse, sse2, sse3, xop)
   set(C_FLAGS_PROCESSOR "${C_FLAGS_PROCESSOR} -DSIMDE_X86_AVX_NATIVE -DSIMDE_X86_AVX_NATIVE -DSIMDE_X86_F16C_NATIVE -DSIMDE_X86_FMA_NATIVE -DSIMDE_X86_GFNI_NATIVE -DSIMDE_X86_MMX_NATIVE -DSIMDE_X86_PCLMUL_NATIVE -DSIMDE_X86_SSE2_NATIVE -DSIMDE_X86_SSE3_NATIVE -DSIMDE_X86_SSE_NATIVE -DSIMDE_X86_XOP_HAVE_COM_ -DSIMDE_X86_XOP_NATIVE")
@@ -185,26 +184,25 @@ if(${CPUARCH} STREQUAL "x86_64" AND DEFINED CPUFLAGS)
   if(CPUINFO MATCHES "ssse3")
     set(C_FLAGS_PROCESSOR "${C_FLAGS_PROCESSOR} -DSIMDE_X86_SSSE3_NATIVE")
   endif()
-elseif(${CPUARCH} NOT STREQUAL "x86_64")
-  message(FATAL_ERROR "Cannot compile for CPU architecture ${CPUARCH}")
+elseif (CMAKE_SYSTEM_PROCESSOR STREQUAL "armv7l")
+  set(C_FLAGS_PROCESSOR "${C_FLAGS_PROCESSOR} -gdwarf-2 -mfloat-abi=hard -mfpu=neon -lgcc -lrt")
+elseif (CMAKE_SYSTEM_PROCESSOR STREQUAL "aarch64")
+  set(C_FLAGS_PROCESSOR "${C_FLAGS_PROCESSOR} -gdwarf-2 -lgcc -lrt")
+else()
+  message(FATAL_ERROR "compile for CPU architecture ${CPUARCH}, CMAKE_SYSTEM_PROCESSOR ${CMAKE_SYSTEM_PROCESSOR}")
 endif()
 
-set(C_FLAGS_PROCESSOR "${C_FLAGS_PROCESSOR} -march=native")
+set(C_FLAGS_PROCESSOR "${C_FLAGS_PROCESSOR} -fno-var-tracking-assignments -march=native")
 
 # add autotools definitions that were maybe used!
 add_definitions("-DSTDC_HEADERS=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_MEMORY_H=1 -DHAVE_STRINGS_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_UNISTD_H=1 -DHAVE_FCNTL_H=1 -DHAVE_ARPA_INET_H=1 -DHAVE_SYS_TIME_H=1 -DHAVE_SYS_SOCKET_H=1 -DHAVE_STRERROR=1 -DHAVE_SOCKET=1 -DHAVE_MEMSET=1 -DHAVE_GETTIMEOFDAY=1 -DHAVE_STDLIB_H=1 -DHAVE_MALLOC=1 -DHAVE_LIBSCTP")
 
-set(commonOpts "-pipe -fPIC -Wall -fno-strict-aliasing")
-# GNU C/C++ Compiler might throw many warnings without packed-bitfield-compat, see man page
-# also, we need -rdynamic to incorporate all symbols in shared objects, again, see man page
-if(CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_CXX_COMPILER_ID STREQUAL "GNU")
-  set(commonOpts "${commonOpts} -Wno-packed-bitfield-compat -rdynamic")
-endif()
+set(commonOpts "-pipe -Wno-packed-bitfield-compat -fPIC -Wall -fno-strict-aliasing -rdynamic")
 
 set(CMAKE_C_FLAGS
-  "${CMAKE_C_FLAGS} ${C_FLAGS_PROCESSOR} ${commonOpts} -std=gnu11 -funroll-loops")
+  "${CMAKE_C_FLAGS} ${C_FLAGS_PROCESSOR} ${commonOpts} -std=gnu11 -funroll-loops -fopenmp")
 set(CMAKE_CXX_FLAGS
-  "${CMAKE_CXX_FLAGS} ${C_FLAGS_PROCESSOR}  ${commonOpts} -std=c++11")
+  "${CMAKE_CXX_FLAGS} ${C_FLAGS_PROCESSOR}  ${commonOpts} -std=c++11 -fopenmp")
 
 
 add_boolean_option(SANITIZE_ADDRESS False "enable the address sanitizer (ASan)" ON)
@@ -531,7 +529,7 @@ set(HWLIB_AW2SORI_SOURCE
   ${OPENAIR_DIR}/radio/AW2SORI/oaiori.c
   )
 add_library(aw2sori_transpro MODULE ${HWLIB_AW2SORI_SOURCE})
-target_compile_options(aw2sori_transpro PRIVATE -shared -fPIC -msse4 -g -ggdb -DLITE_COMPILATION)
+target_compile_options(aw2sori_transpro PRIVATE -shared -fPIC -march=native -g -ggdb -DLITE_COMPILATION)
 target_link_libraries(aw2sori_transpro libori.so)
 
 include_directories("${OPENAIR_DIR}/radio/IRIS/USERSPACE/LIB/")
@@ -1006,7 +1004,7 @@ target_link_libraries(ldpc PRIVATE ldpc_gen_HEADERS)
 
 add_library(coding MODULE ${PHY_TURBOSRC} )
 
-add_library(dfts MODULE ${OPENAIR1_DIR}/PHY/TOOLS/oai_dfts.c )
+add_library(dfts MODULE ${OPENAIR1_DIR}/PHY/TOOLS/oai_dfts.c ${OPENAIR1_DIR}/PHY/TOOLS/oai_dfts_neon.c)
 
 
 set(PHY_SRC_COMMON
@@ -1056,6 +1054,7 @@ set(PHY_SRC_COMMON
   ${OPENAIR1_DIR}/PHY/TOOLS/dB_routines.c
   ${OPENAIR1_DIR}/PHY/TOOLS/sqrt.c
   ${OPENAIR1_DIR}/PHY/TOOLS/lut.c
+  ${OPENAIR1_DIR}/PHY/TOOLS/simde_operations.c
   )
 
 set(PHY_SRC
@@ -1180,6 +1179,7 @@ set(PHY_SRC_UE
   ${OPENAIR1_DIR}/PHY/NR_REFSIG/ptrs_nr.c
   ${OPENAIR1_DIR}/PHY/NR_UE_ESTIMATION/filt16a_32.c
   ${OPENAIR1_DIR}/PHY/NR_ESTIMATION/nr_ul_channel_estimation.c
+  ${OPENAIR1_DIR}/PHY/NR_ESTIMATION/nr_freq_equalization.c
   ${OPENAIR1_DIR}/PHY/NR_ESTIMATION/nr_measurements_gNB.c
   ${OPENAIR1_DIR}/PHY/TOOLS/file_output.c
   ${OPENAIR1_DIR}/PHY/TOOLS/cadd_vv.c
@@ -1192,6 +1192,7 @@ set(PHY_SRC_UE
   ${OPENAIR1_DIR}/PHY/TOOLS/dB_routines.c
   ${OPENAIR1_DIR}/PHY/TOOLS/sqrt.c
   ${OPENAIR1_DIR}/PHY/TOOLS/lut.c
+  ${OPENAIR1_DIR}/PHY/TOOLS/simde_operations.c
   ${PHY_POLARSRC}
   ${PHY_SMALLBLOCKSRC}
   ${PHY_NR_CODINGIF}
@@ -1245,6 +1246,7 @@ set(PHY_SRC_UE
   ${OPENAIR1_DIR}/PHY/TOOLS/dB_routines.c
   ${OPENAIR1_DIR}/PHY/TOOLS/sqrt.c
   ${OPENAIR1_DIR}/PHY/TOOLS/lut.c
+  ${OPENAIR1_DIR}/PHY/TOOLS/simde_operations.c
   ${OPENAIR1_DIR}/PHY/INIT/nr_init_ue.c
   #  ${OPENAIR1_DIR}/SIMULATION/NR_UE_PHY/unit_tests/src/pucch_uci_test.c
   ${PHY_POLARSRC}
@@ -1258,7 +1260,7 @@ if (${SMBV})
 endif  (${SMBV})
 
 set(PHY_SRC_UE ${PHY_SRC_UE} ${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation_avx2.c)
-set(PHY_NR_UE_SRC ${PHY_NR_UE_SRC} ${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation_avx2.c)
+# set(PHY_NR_UE_SRC ${PHY_NR_UE_SRC} ${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation_avx2.c)
 
 add_library(PHY_COMMON ${PHY_SRC_COMMON})
 add_dependencies(PHY_COMMON dfts)
@@ -1295,6 +1297,7 @@ set(PHY_MEX_UE
   ${OPENAIR1_DIR}/PHY/TOOLS/cmult_vv.c
   ${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation_avx2.c
   ${OPENAIR1_DIR}/PHY/TOOLS/signal_energy.c
+  ${OPENAIR1_DIR}/PHY/TOOLS/simde_operations.c
   ${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_ue_measurements.c
   ${OPENAIR_DIR}/common/utils/LOG/log.c
   ${OPENAIR_DIR}/common/utils/T/T.c
@@ -1518,7 +1521,6 @@ set (MAC_NR_SRC_UE
   ${NR_UE_MAC_DIR}/nr_ue_scheduler.c
   ${NR_UE_MAC_DIR}/nr_ue_dci_configuration.c
   ${NR_UE_MAC_DIR}/nr_ra_procedures.c
-  ${NR_UE_MAC_DIR}/nr_ue_power_procedures.c
 )
 
 set (ENB_APP_SRC
@@ -2016,6 +2018,7 @@ set (SIMUSRC
   ${OPENAIR1_DIR}/SIMULATION/RF/adc.c
 )
 add_library(SIMU STATIC ${SIMUSRC} )
+target_link_libraries(SIMU PRIVATE cblas)
 target_include_directories(SIMU PUBLIC ${OPENAIR1_DIR}/SIMULATION/TOOLS ${OPENAIR1_DIR}/SIMULATION/RF)
 
 # Qt-based scope
@@ -2243,6 +2246,14 @@ add_executable(nr-softmodem
   ${nr_rrc_h}
   ${s1ap_h}
 #  ${OPENAIR_BIN_DIR}/messages_xml.h
+
+   ${OPENAIR_DIR}/common/utils/thread_pool/task_manager.c
+  ${OPENAIR_DIR}/common/utils/thread_pool/notification_queue.c
+  ${OPENAIR_DIR}/common/utils/thread_pool/seq_ring_task.c
+
+
+
+
   ${OPENAIR_DIR}/executables/nr-gnb.c
   ${OPENAIR_DIR}/executables/nr-ru.c
   ${OPENAIR_DIR}/executables/nr-softmodem.c
@@ -2417,6 +2428,14 @@ add_executable(nr_dlschsim
   ${OPENAIR1_DIR}/SIMULATION/NR_PHY/dlschsim.c
   ${OPENAIR1_DIR}/SIMULATION/NR_PHY/nr_dummy_functions.c
   ${OPENAIR_DIR}/common/utils/nr/nr_common.c
+
+  ${OPENAIR_DIR}/common/utils/thread_pool/task_manager.c
+  ${OPENAIR_DIR}/common/utils/thread_pool/notification_queue.c
+  ${OPENAIR_DIR}/common/utils/thread_pool/seq_ring_task.c
+
+
+
+  #${OPENAIR_DIR}/executables/softmodem-common.c
   ${T_SOURCE}
   ${SHLIB_LOADER_SOURCES}
   )
@@ -2430,6 +2449,11 @@ add_executable(nr_pbchsim
   ${OPENAIR1_DIR}/SIMULATION/NR_PHY/pbchsim.c
   ${OPENAIR1_DIR}/SIMULATION/NR_PHY/nr_dummy_functions.c
   ${OPENAIR_DIR}/common/utils/nr/nr_common.c
+
+  ${OPENAIR_DIR}/common/utils/thread_pool/task_manager.c
+  ${OPENAIR_DIR}/common/utils/thread_pool/notification_queue.c
+  ${OPENAIR_DIR}/common/utils/thread_pool/seq_ring_task.c
+
   ${T_SOURCE}
   ${SHLIB_LOADER_SOURCES}
   )
@@ -2442,6 +2466,11 @@ target_link_libraries(nr_pbchsim PRIVATE asn1_nr_rrc_hdrs asn1_lte_rrc_hdrs)
 
 #PUCCH ---> Prashanth
 add_executable(nr_pucchsim
+
+  ${OPENAIR_DIR}/common/utils/thread_pool/task_manager.c
+  ${OPENAIR_DIR}/common/utils/thread_pool/notification_queue.c
+  ${OPENAIR_DIR}/common/utils/thread_pool/seq_ring_task.c
+
   ${OPENAIR1_DIR}/SIMULATION/NR_PHY/pucchsim.c
   ${OPENAIR1_DIR}/SIMULATION/NR_PHY/nr_dummy_functions.c
   ${OPENAIR_DIR}/common/utils/nr/nr_common.c
@@ -2455,6 +2484,12 @@ target_link_libraries(nr_pucchsim PRIVATE
 target_link_libraries(nr_pucchsim PRIVATE asn1_nr_rrc_hdrs asn1_lte_rrc_hdrs)
 
 add_executable(nr_dlsim
+
+  ${OPENAIR_DIR}/common/utils/thread_pool/task_manager.c
+  ${OPENAIR_DIR}/common/utils/thread_pool/notification_queue.c
+  ${OPENAIR_DIR}/common/utils/thread_pool/seq_ring_task.c
+
+
   ${OPENAIR1_DIR}/SIMULATION/NR_PHY/dlsim.c
   ${OPENAIR1_DIR}/SIMULATION/NR_PHY/nr_dummy_functions.c
   ${OPENAIR_DIR}/common/utils/nr/nr_common.c
@@ -2474,6 +2509,12 @@ target_link_libraries(nr_dlsim PRIVATE
 target_link_libraries(nr_dlsim PRIVATE asn1_nr_rrc_hdrs asn1_lte_rrc_hdrs)
 
 add_executable(nr_prachsim
+
+  ${OPENAIR_DIR}/common/utils/thread_pool/task_manager.c
+  ${OPENAIR_DIR}/common/utils/thread_pool/notification_queue.c
+  ${OPENAIR_DIR}/common/utils/thread_pool/seq_ring_task.c
+
+
   ${OPENAIR1_DIR}/SIMULATION/NR_PHY/prachsim.c
   ${OPENAIR1_DIR}/SIMULATION/NR_PHY/nr_dummy_functions.c
   ${OPENAIR_DIR}/common/utils/nr/nr_common.c
@@ -2488,6 +2529,13 @@ add_executable(nr_ulschsim
   ${OPENAIR1_DIR}/SIMULATION/NR_PHY/ulschsim.c
   ${OPENAIR1_DIR}/SIMULATION/NR_PHY/nr_dummy_functions.c
   ${OPENAIR_DIR}/common/utils/nr/nr_common.c
+
+  ${OPENAIR_DIR}/common/utils/thread_pool/task_manager.c
+  ${OPENAIR_DIR}/common/utils/thread_pool/notification_queue.c
+  ${OPENAIR_DIR}/common/utils/thread_pool/seq_ring_task.c
+
+
+  #${OPENAIR_DIR}/executables/softmodem-common.c
   ${PHY_INTERFACE_DIR}/queue_t.c
   ${T_SOURCE}
   ${SHLIB_LOADER_SOURCES}
@@ -2502,7 +2550,13 @@ add_executable(nr_ulsim
   ${OPENAIR1_DIR}/SIMULATION/NR_PHY/ulsim.c
   ${OPENAIR1_DIR}/SIMULATION/NR_PHY/nr_dummy_functions.c
   ${OPENAIR_DIR}/common/utils/nr/nr_common.c
-  ${OPENAIR_DIR}/executables/softmodem-common.c
+  #  ${OPENAIR_DIR}/executables/softmodem-common.c
+
+  ${OPENAIR_DIR}/common/utils/thread_pool/task_manager.c
+  ${OPENAIR_DIR}/common/utils/thread_pool/notification_queue.c
+  ${OPENAIR_DIR}/common/utils/thread_pool/seq_ring_task.c
+
+
   ${OPENAIR2_DIR}/RRC/NAS/nas_config.c
   ${NR_UE_RRC_DIR}/rrc_nsa.c
   ${NFAPI_USER_DIR}/nfapi.c

ci-scripts/Jenkinsfile-GitLab-Container

@@ -405,26 +405,6 @@ pipeline {
             }
           }
         }
-        stage ("SA-AW2S-CN5G") {
-          when { expression {do5Gtest} }
-          steps {
-            script {
-              triggerSlaveJob ('RAN-SA-AW2S-CN5G', 'SA-AW2S-CN5G')
-            }
-          }
-          post {
-            always {
-              script {
-                finalizeSlaveJob('RAN-SA-AW2S-CN5G')
-              }
-            }
-            failure {
-              script {
-                currentBuild.result = 'FAILURE'
-              }
-            }
-          }
-        }
 
         //avra is offline, re-enable once it is available
         //stage ("T1-Offload-Test") {

ci-scripts/Jenkinsfile-physim-deploy

@@ -211,16 +211,10 @@ pipeline {
         script {
           dir ('ci-scripts') {
             // Zipping all archived log files
-              sh "mkdir test_logs"
-              sh "mv *.log* test_logs || true"
-              sh "zip -r -qq test_logs_${env.BUILD_ID}.zip *test_log*/"
-              sh "rm -rf *test_log*/"
-              if (fileExists("test_logs_${env.BUILD_ID}.zip")) {
-                archiveArtifacts artifacts: "test_logs_${env.BUILD_ID}.zip"
-              }
-              if (fileExists("test_logs_CN.zip")){
-                sh "mv test_logs_CN.zip test_logs_CN_${env.BUILD_ID}.zip"
-                archiveArtifacts artifacts: "test_logs_CN_${env.BUILD_ID}.zip"
+            sh "zip -r -qq physim_deploytest_logs_${env.BUILD_ID}.zip physim_test_logs_*/*"
+            sh "rm -rf physim_test_logs_*/"
+            if (fileExists("physim_deploytest_logs_${env.BUILD_ID}.zip")) {
+              archiveArtifacts artifacts: "physim_deploytest_logs_${env.BUILD_ID}.zip"
             }
             if (fileExists("test_results.html")) {
               sh "mv test_results.html test_results-${env.JOB_NAME}.html"

ci-scripts/args_parse.py

@@ -197,7 +197,6 @@ def ArgsParse(argvs,CiTestObj,RAN,HTML,EPC,ldpc,CONTAINERS,HELP,SCA,PHYSIM,CLUST
                 SCA.eNBSourceCodePath=matchReg.group(1)
                 PHYSIM.eNBSourceCodePath=matchReg.group(1)
                 CLUSTER.eNBSourceCodePath=matchReg.group(1)
-                EPC.eNBSourceCodePath=matchReg.group(1)
             elif re.match('^\-\-eNB1SourceCodePath=(.+)$', myArgv, re.IGNORECASE):
                 matchReg = re.match('^\-\-eNB1SourceCodePath=(.+)$', myArgv, re.IGNORECASE)
                 RAN.eNB1SourceCodePath=matchReg.group(1)
@@ -220,10 +219,10 @@ def ArgsParse(argvs,CiTestObj,RAN,HTML,EPC,ldpc,CONTAINERS,HELP,SCA,PHYSIM,CLUST
             EPC.SourceCodePath=matchReg.group(1)
         elif re.match('^\-\-EPCType=(.+)$', myArgv, re.IGNORECASE):
             matchReg = re.match('^\-\-EPCType=(.+)$', myArgv, re.IGNORECASE)
-            if re.match('OAI', matchReg.group(1), re.IGNORECASE) or re.match('ltebox', matchReg.group(1), re.IGNORECASE) or re.match('OAI-Rel14-CUPS', matchReg.group(1), re.IGNORECASE) or re.match('OAI-Rel14-Docker', matchReg.group(1), re.IGNORECASE) or re.match('OC-OAI-CN5G', matchReg.group(1), re.IGNORECASE):
+            if re.match('OAI', matchReg.group(1), re.IGNORECASE) or re.match('ltebox', matchReg.group(1), re.IGNORECASE) or re.match('OAI-Rel14-CUPS', matchReg.group(1), re.IGNORECASE) or re.match('OAI-Rel14-Docker', matchReg.group(1), re.IGNORECASE):
                 EPC.Type=matchReg.group(1)
             else:
-                sys.exit('Invalid EPC Type: ' + matchReg.group(1) + ' -- (should be OAI or ltebox or OAI-Rel14-CUPS or OAI-Rel14-Docker or OC-OAI-CN5G)')
+                sys.exit('Invalid EPC Type: ' + matchReg.group(1) + ' -- (should be OAI or ltebox or OAI-Rel14-CUPS or OAI-Rel14-Docker)')
         elif re.match('^\-\-EPCContainerPrefix=(.+)$', myArgv, re.IGNORECASE):
             matchReg = re.match('^\-\-EPCContainerPrefix=(.+)$', myArgv, re.IGNORECASE)
             EPC.ContainerPrefix=matchReg.group(1)
@@ -261,17 +260,14 @@ def ArgsParse(argvs,CiTestObj,RAN,HTML,EPC,ldpc,CONTAINERS,HELP,SCA,PHYSIM,CLUST
             matchReg = re.match('^\-\-OCUserName=(.+)$', myArgv, re.IGNORECASE)
             PHYSIM.OCUserName = matchReg.group(1)
             CLUSTER.OCUserName = matchReg.group(1)
-            EPC.OCUserName = matchReg.group(1)
         elif re.match('^\-\-OCPassword=(.+)$', myArgv, re.IGNORECASE):
             matchReg = re.match('^\-\-OCPassword=(.+)$', myArgv, re.IGNORECASE)
             PHYSIM.OCPassword = matchReg.group(1)
             CLUSTER.OCPassword = matchReg.group(1)
-            EPC.OCPassword = matchReg.group(1)
         elif re.match('^\-\-OCProjectName=(.+)$', myArgv, re.IGNORECASE):
             matchReg = re.match('^\-\-OCProjectName=(.+)$', myArgv, re.IGNORECASE)
             PHYSIM.OCProjectName = matchReg.group(1)
             CLUSTER.OCProjectName = matchReg.group(1)
-            EPC.OCProjectName = matchReg.group(1)
         elif re.match('^\-\-OCUrl=(.+)$', myArgv, re.IGNORECASE):
             matchReg = re.match('^\-\-OCUrl=(.+)$', myArgv, re.IGNORECASE)
             CLUSTER.OCUrl = matchReg.group(1)

ci-scripts/as_ue/aw2s-asue.cfg

@@ -1,183 +0,0 @@
-/* UE simulator configuration file version 2021-06-17
- * LTE / 5G Non StandAlone
- * Copyright (C) 2019-2021 Amarisoft
- */
-{
-#define N_ANTENNA_DL 1
-#define TDD 1
-
-log_options: "all.level=warn,all.max_size=0,nas.level=debug,nas.max_size=1,rrc.level=debug,rrc.max_size=1",
-log_filename: "/tmp/ue1.log",
-
-/* Enable remote API and Web interface */
-com_addr: "0.0.0.0:9002",
-
-include "rf_driver/1chan.cfg",
-
-/* If true, allow the simulation of several UEs at the same time and
-allow dynamic UE creation from remote API */
-                    
-cell_groups: [{
-    group_type: "nr",
-    multi_ue: true,
-    cells: [{
-      rf_port: 0,
-      bandwidth: 20,
-#if TDD == 1
-      band: 78,
-      dl_nr_arfcn:627360,
-      ssb_nr_arfcn:627360,
-#else
-      band: 7,
-      dl_nr_arfcn: 536020,
-      ssb_nr_arfcn: 535930,
-      ssb_subcarrier_spacing: 15,
-#endif
-      subcarrier_spacing: 30,
-      n_antenna_dl: N_ANTENNA_DL,
-      n_antenna_ul: 1,
-      rx_to_tx_latency:2,
-    }],
-  }],
-       
-  ue_list: [
-    {
-      /* UE capabilities */
-      /* USIM data */
-      "ue_id" : 1,
-      "imsi": "001010000000100",
-      "K": "fec86ba6eb707ed08905757b1bb44b8f",
-      "sim_algo":"milenage",
-      "op": "1006020f0a478bf6b699f15c062e42b3",
-
-      as_release: 15,
-      ue_category: "nr",
-      apn:"oai",
-      attach_pdn_type:"ipv4",
-      default_nssai: [ { sst: 1, }, ],
-      default_pdu_session_snssai: { sst: 1, },
-
-      /* Enable it to create a TUN interface for each UE PDN */
-      tun_setup_script: "ue-ifup",
-    },
-    {
-      /* UE capabilities */
-      /* USIM data */
-      "ue_id" : 2,
-      "imsi": "001010000000101",
-      "K": "fec86ba6eb707ed08905757b1bb44b8f",
-      "sim_algo":"milenage",
-      "op": "1006020f0a478bf6b699f15c062e42b3",
-
-      as_release: 15,
-      ue_category: "nr",
-      apn:"oai",
-      attach_pdn_type:"ipv4",
-      default_nssai: [ { sst: 1, }, ],
-      default_pdu_session_snssai: { sst: 1, },
-
-      /* Enable it to create a TUN interface for each UE PDN */
-      tun_setup_script: "ue-ifup",
-    },
-    {
-      /* UE capabilities */
-      /* USIM data */
-      "ue_id" : 3,
-      "imsi": "001010000000102",
-      "K": "fec86ba6eb707ed08905757b1bb44b8f",
-      "sim_algo":"milenage",
-      "op": "1006020f0a478bf6b699f15c062e42b3",
-
-      as_release: 15,
-      ue_category: "nr",
-      apn:"oai",
-      attach_pdn_type:"ipv4",
-      default_nssai: [ { sst: 1, sd: 66051, }, ],
-      default_pdu_session_snssai: { sst: 1, sd: 66051, },
-
-      /* Enable it to create a TUN interface for each UE PDN */
-      tun_setup_script: "ue-ifup",
-    },
-    {
-      /* UE capabilities */
-      /* USIM data */
-      "ue_id" : 4,
-      "imsi": "001010000000103",
-      "K": "fec86ba6eb707ed08905757b1bb44b8f",
-      "sim_algo":"milenage",
-      "op": "1006020f0a478bf6b699f15c062e42b3",
-
-      as_release: 15,
-      ue_category: "nr",
-      apn:"oai",
-      attach_pdn_type:"ipv4",
-      default_nssai: [ { sst: 1, sd: 66051, }, ],
-      default_pdu_session_snssai: { sst: 1, sd: 66051, },
-
-      /* Enable it to create a TUN interface for each UE PDN */
-      tun_setup_script: "ue-ifup",
-    },
-    {
-      /* UE capabilities */
-      /* USIM data */
-      "ue_id" : 5,
-      "imsi": "001010000000104",
-      "K": "fec86ba6eb707ed08905757b1bb44b8f",
-      "sim_algo":"milenage",
-      "op": "1006020f0a478bf6b699f15c062e42b3",
-
-      as_release: 15,
-      ue_category: "nr",
-      apn:"oai",
-      attach_pdn_type:"ipv4",
-      default_nssai: [ { sst: 1, sd: 66051, }, ],
-      default_pdu_session_snssai: { sst: 1, sd: 66051, },
-
-      /* Enable it to create a TUN interface for each UE PDN */
-      tun_setup_script: "ue-ifup",
-    },
-    {
-      /* UE capabilities */
-      /* USIM data */
-      "ue_id" : 6,
-      "imsi": "001010000000105",
-      "K": "fec86ba6eb707ed08905757b1bb44b8f",
-      "sim_algo":"milenage",
-      "op": "1006020f0a478bf6b699f15c062e42b3",
-
-      as_release: 15,
-      ue_category: "nr",
-      apn:"oai",
-      attach_pdn_type:"ipv4",
-      default_nssai: [ { sst: 1, sd: 66051, }, ],
-      default_pdu_session_snssai: { sst: 1, sd: 66051, },
-
-      /* Enable it to create a TUN interface for each UE PDN */
-      tun_setup_script: "ue-ifup",
-    },
-    {
-      /* UE capabilities */
-   
-      /* USIM data */
-      "ue_id" : 7,
-      "imsi": "001010000000106",
-      "K": "fec86ba6eb707ed08905757b1bb44b8f",
-      "sim_algo":"milenage",
-      "op": "1006020f0a478bf6b699f15c062e42b3",
-
-      as_release: 15,
-      ue_category: "nr",
-      apn:"oai",
-      attach_pdn_type:"ipv4",
-      default_nssai: [ { sst: 1, sd: 66051, }, ],
-      default_pdu_session_snssai: { sst: 1, sd: 66051, },
-
-
-      /* Enable it to allow sim_events to be handled remotely */
-      //rue_addr: "127.1.0.0",
-      /* Enable it to create a TUN interface for each UE PDN */
-      tun_setup_script: "ue-ifup",
-    },
-  ],
-}
-

ci-scripts/as_ue/oaicicd-3xue-noPing-SATest.cfg

@@ -0,0 +1,172 @@
+/* UE simulator configuration */
+
+
+/* UE simulator configuration file version 2021-06-17
+ * LTE / 5G Non StandAlone
+ * Copyright (C) 2019-2021 Amarisoft
+ */
+{
+#define N_ANTENNA_DL 1
+#define TDD 1
+#define CELL_BANDWIDTH 40
+#define UE_COUNT 3 // number of simulated UEs 208970100001127, 208970100001128, 208970100001129
+
+
+log_options: "all.level=error,all.max_size=0,nas.level=debug,nas.max_size=1,rrc.level=debug,rrc.max_size=1",
+log_filename: "/tmp/ue0.log",
+
+/* Enable remote API and Web interface */
+com_addr: "0.0.0.0:9002",
+
+include "rf_driver/1chan.cfg",
+
+/* If true, allow the simulation of several UEs at the same time and allow dynamic UE creation from remote API */
+                    
+cell_groups: [{
+    group_type: "nr",
+    multi_ue: true,
+    cells: [{
+      rf_port: 0,
+      bandwidth: CELL_BANDWIDTH,
+#if TDD == 1
+      band: 78,
+      dl_nr_arfcn:621312,
+      ssb_nr_arfcn:621312,
+
+      //band: 41,
+      //dl_nr_arfcn:517020,
+      //ssb_nr_arfcn:516990,
+#else
+      band: 7,
+      dl_nr_arfcn: 536020,
+      ssb_nr_arfcn: 535930,
+      ssb_subcarrier_spacing: 15,
+#endif
+      subcarrier_spacing: 30,
+      n_antenna_dl: N_ANTENNA_DL,
+      n_antenna_ul: 1,
+      rx_to_tx_latency:2,
+    }],
+}],
+
+    
+/* Enable it to allow sim_events to be handled remotely */
+//rue_bind_addr: "127.0.10.11",
+
+
+
+ue_list: [
+  {
+    /* UE capabilities */ 
+    /* USIM data */    
+    "ue_id" : 0,
+    "imsi": "208970100001127",
+    "K": "fec86ba6eb707ed08905757b1bb44b8f",
+    "sim_algo":"milenage",
+    "op": "1006020f0a478bf6b699f15c062e42b3",
+    as_release: 15,
+    ue_category: "nr",
+    apn:"oai",
+    attach_pdn_type:"ipv4",
+    default_nssai: [
+      {
+      sst: 1,
+      sd: 66051,
+      },
+    ],
+    default_pdu_session_snssai: {
+      sst: 1,
+      sd: 66051,
+    },
+    /* Enable it to allow sim_events to be handled remotely */
+    //rue_addr: "127.1.0.0",
+    /* Enable it to create a TUN interface for each UE PDN */
+    tun_setup_script: "ue-ifup",
+    sim_events: [
+      {
+        event: "power_on",
+        start_time: 5,
+      }, 
+      {
+        event: "power_off",
+        start_time: 30,
+      }
+    ] /*end sim events */
+  }, /*end UE object 0*/
+  {
+    /* UE capabilities */ 
+    /* USIM data */  
+    "ue_id" : 1, 
+    "imsi": "208970100001128",
+    "K": "fec86ba6eb707ed08905757b1bb44b8f",
+    "sim_algo":"milenage",
+    "op": "1006020f0a478bf6b699f15c062e42b3",
+    as_release: 15,
+    ue_category: "nr",
+    apn:"oai",
+    attach_pdn_type:"ipv4",
+    default_nssai: [
+      {
+      sst: 1,
+      sd: 66051,
+      },
+    ],
+    default_pdu_session_snssai: {
+      sst: 1,
+      sd: 66051,
+    },
+    /* Enable it to allow sim_events to be handled remotely */
+    //rue_addr: "127.1.0.0",
+    /* Enable it to create a TUN interface for each UE PDN */
+    tun_setup_script: "ue-ifup",
+    sim_events: [
+      {
+        event: "power_on",
+        start_time: 5,
+      }, 
+      {
+        event: "power_off",
+        start_time: 30,
+      }
+    ] /*end sim events */
+  }, /*end UE object 1*/
+  {
+    /* UE capabilities */
+    /* USIM data */
+    "ue_id" : 2,
+    "imsi": "208970100001129",
+    "K": "fec86ba6eb707ed08905757b1bb44b8f",
+    "sim_algo":"milenage",
+    "op": "1006020f0a478bf6b699f15c062e42b3",
+    as_release: 15,
+    ue_category: "nr",
+    apn:"oai",
+    attach_pdn_type:"ipv4",
+    default_nssai: [
+      {
+      sst: 1,
+      sd: 66051,
+      },
+    ],
+    default_pdu_session_snssai: {
+      sst: 1,
+      sd: 66051,
+    },
+    /* Enable it to allow sim_events to be handled remotely */
+    //rue_addr: "127.1.0.0",
+    /* Enable it to create a TUN interface for each UE PDN */
+    tun_setup_script: "ue-ifup",
+    sim_events: [
+      {
+        event: "power_on",
+        start_time: 5,
+      },
+      {
+        event: "power_off",
+        start_time: 30,
+      }
+    ] /*end sim events */
+  } /*end UE object 2*/
+  ],/*end UE list*/
+}/*end json*/
+

ci-scripts/as_ue/oaicicd-multi-ue-1xPing-SATest.cfg

@@ -0,0 +1,142 @@
+/* UE simulator configuration */
+
+
+/* UE simulator configuration file version 2021-06-17
+ * LTE / 5G Non StandAlone
+ * Copyright (C) 2019-2021 Amarisoft
+ */
+{
+#define N_ANTENNA_DL 1
+#define TDD 1
+#define CELL_BANDWIDTH 40
+#define UE_COUNT 2 // number of simulated UEs 208970100001127, 208970100001128, 208970100001129
+
+
+log_options: "all.level=error,all.max_size=0,nas.level=debug,nas.max_size=1,rrc.level=debug,rrc.max_size=1",
+log_filename: "/tmp/ue0.log",
+
+/* Enable remote API and Web interface */
+com_addr: "0.0.0.0:9002",
+
+include "rf_driver/1chan.cfg",
+
+/* If true, allow the simulation of several UEs at the same time and allow dynamic UE creation from remote API */
+                    
+cell_groups: [{
+    group_type: "nr",
+    multi_ue: true,
+    cells: [{
+      rf_port: 0,
+      bandwidth: CELL_BANDWIDTH,
+#if TDD == 1
+      band: 78,
+      dl_nr_arfcn:621312,
+      ssb_nr_arfcn:621312,
+
+      //band: 41,
+      //dl_nr_arfcn:517020,
+      //ssb_nr_arfcn:516990,
+#else
+      band: 7,
+      dl_nr_arfcn: 536020,
+      ssb_nr_arfcn: 535930,
+      ssb_subcarrier_spacing: 15,
+#endif
+      subcarrier_spacing: 30,
+      n_antenna_dl: N_ANTENNA_DL,
+      n_antenna_ul: 1,
+      rx_to_tx_latency:2,
+    }],
+}],
+
+    
+/* Enable it to allow sim_events to be handled remotely */
+//rue_bind_addr: "127.0.10.11",
+
+
+
+ue_list: [
+  {
+    /* UE capabilities */ 
+    /* USIM data */    
+    "ue_id" : 1,
+    "imsi": "208970100001127",
+    "K": "fec86ba6eb707ed08905757b1bb44b8f",
+    "sim_algo":"milenage",
+    "op": "1006020f0a478bf6b699f15c062e42b3",
+    as_release: 15,
+    ue_category: "nr",
+    apn:"oai",
+    attach_pdn_type:"ipv4",
+    default_nssai: [
+      {
+      sst: 1,
+      sd: 66051,
+      },
+    ],
+    default_pdu_session_snssai: {
+      sst: 1,
+      sd: 66051,
+    },
+    /* Enable it to allow sim_events to be handled remotely */
+    //rue_addr: "127.1.0.0",
+    /* Enable it to create a TUN interface for each UE PDN */
+    tun_setup_script: "ue-ifup",
+    sim_events: [
+      {
+        event: "power_on",
+        start_time: 5,
+      }, 
+      {
+        event: "power_off",
+        start_time: 30,
+      }
+    ] /*end sim events */
+  }, /*end UE object 0*/
+  {
+    /* UE capabilities */ 
+    /* USIM data */  
+    "ue_id" : 2, 
+    "imsi": "208970100001128",
+    "K": "fec86ba6eb707ed08905757b1bb44b8f",
+    "sim_algo":"milenage",
+    "op": "1006020f0a478bf6b699f15c062e42b3",
+    as_release: 15,
+    ue_category: "nr",
+    apn:"oai",
+    attach_pdn_type:"ipv4",
+    default_nssai: [
+      {
+      sst: 1,
+      sd: 66051,
+      },
+    ],
+    default_pdu_session_snssai: {
+      sst: 1,
+      sd: 66051,
+    },
+    /* Enable it to allow sim_events to be handled remotely */
+    //rue_addr: "127.1.0.0",
+    /* Enable it to create a TUN interface for each UE PDN */
+    tun_setup_script: "ue-ifup",
+    sim_events: [
+      {
+        event: "power_on",
+        start_time: 5,
+      }, 
+      {
+       "tag": "ping",
+       "prog":"oai_ext_app.sh",
+        start_time: 15,
+        end_time: 25,
+        "args":["ping 192.168.70.136"],
+        "event":"ext_app"              
+      },
+      {
+        event: "power_off",
+        start_time: 30,
+      }
+    ] /*end sim events */
+  } /*end UE object 1*/
+  ],/*end UE list*/
+}/*end json*/

ci-scripts/as_ue/oaicicd-multi-ue-2xPing-SATest.cfg

@@ -0,0 +1,150 @@
+/* UE simulator configuration */
+
+
+/* UE simulator configuration file version 2021-06-17
+ * LTE / 5G Non StandAlone
+ * Copyright (C) 2019-2021 Amarisoft
+ */
+{
+#define N_ANTENNA_DL 1
+#define TDD 1
+#define CELL_BANDWIDTH 40
+#define UE_COUNT 2 // number of simulated UEs 208970100001127, 208970100001128, 208970100001129
+
+
+log_options: "all.level=error,all.max_size=0,nas.level=debug,nas.max_size=1,rrc.level=debug,rrc.max_size=1",
+log_filename: "/tmp/ue0.log",
+
+/* Enable remote API and Web interface */
+com_addr: "0.0.0.0:9002",
+
+include "rf_driver/1chan.cfg",
+
+/* If true, allow the simulation of several UEs at the same time and allow dynamic UE creation from remote API */
+                    
+cell_groups: [{
+    group_type: "nr",
+    multi_ue: true,
+    cells: [{
+      rf_port: 0,
+      bandwidth: CELL_BANDWIDTH,
+#if TDD == 1
+      band: 78,
+      dl_nr_arfcn:621312,
+      ssb_nr_arfcn:621312,
+
+      //band: 41,
+      //dl_nr_arfcn:517020,
+      //ssb_nr_arfcn:516990,
+#else
+      band: 7,
+      dl_nr_arfcn: 536020,
+      ssb_nr_arfcn: 535930,
+      ssb_subcarrier_spacing: 15,
+#endif
+      subcarrier_spacing: 30,
+      n_antenna_dl: N_ANTENNA_DL,
+      n_antenna_ul: 1,
+      rx_to_tx_latency:2,
+    }],
+}],
+
+    
+/* Enable it to allow sim_events to be handled remotely */
+//rue_bind_addr: "127.0.10.11",
+
+
+
+ue_list: [
+  {
+    /* UE capabilities */ 
+    /* USIM data */    
+    "ue_id" : 1,
+    "imsi": "208970100001127",
+    "K": "fec86ba6eb707ed08905757b1bb44b8f",
+    "sim_algo":"milenage",
+    "op": "1006020f0a478bf6b699f15c062e42b3",
+    as_release: 15,
+    ue_category: "nr",
+    apn:"oai",
+    attach_pdn_type:"ipv4",
+    default_nssai: [
+      {
+      sst: 1,
+      sd: 66051,
+      },
+    ],
+    default_pdu_session_snssai: {
+      sst: 1,
+      sd: 66051,
+    },
+    /* Enable it to allow sim_events to be handled remotely */
+    //rue_addr: "127.1.0.0",
+    /* Enable it to create a TUN interface for each UE PDN */
+    tun_setup_script: "ue-ifup",
+    sim_events: [
+      {
+        event: "power_on",
+        start_time: 5,
+      }, 
+      {
+       "tag": "ping",
+       "prog":"oai_ext_app.sh",
+        start_time: 15,
+        end_time: 25,
+        "args":["ping 192.168.70.136"],
+        "event":"ext_app"              
+      },
+      {
+        event: "power_off",
+        start_time: 30,
+      }
+    ] /*end sim events */
+  }, /*end UE object 0*/
+  {
+    /* UE capabilities */ 
+    /* USIM data */  
+    "ue_id" : 2, 
+    "imsi": "208970100001128",
+    "K": "fec86ba6eb707ed08905757b1bb44b8f",
+    "sim_algo":"milenage",
+    "op": "1006020f0a478bf6b699f15c062e42b3",
+    as_release: 15,
+    ue_category: "nr",
+    apn:"oai",
+    attach_pdn_type:"ipv4",
+    default_nssai: [
+      {
+      sst: 1,
+      sd: 66051,
+      },
+    ],
+    default_pdu_session_snssai: {
+      sst: 1,
+      sd: 66051,
+    },
+    /* Enable it to allow sim_events to be handled remotely */
+    //rue_addr: "127.1.0.0",
+    /* Enable it to create a TUN interface for each UE PDN */
+    tun_setup_script: "ue-ifup",
+    sim_events: [
+      {
+        event: "power_on",
+        start_time: 5,
+      }, 
+      {
+       "tag": "ping",
+       "prog":"oai_ext_app.sh",
+        start_time: 15,
+        end_time: 25,
+        "args":["ping 192.168.70.136"],
+        "event":"ext_app"              
+      },
+      {
+        event: "power_off",
+        start_time: 30,
+      }
+    ] /*end sim events */
+  } /*end UE object 1*/
+  ],/*end UE list*/
+}/*end json*/

ci-scripts/as_ue/oaicicd-multi-ue-2xPingSeq-SATest.cfg

@@ -0,0 +1,150 @@
+/* UE simulator configuration */
+
+
+/* UE simulator configuration file version 2021-06-17
+ * LTE / 5G Non StandAlone
+ * Copyright (C) 2019-2021 Amarisoft
+ */
+{
+#define N_ANTENNA_DL 1
+#define TDD 1
+#define CELL_BANDWIDTH 40
+#define UE_COUNT 2 // number of simulated UEs 208970100001127, 208970100001128, 208970100001129
+
+
+log_options: "all.level=error,all.max_size=0,nas.level=debug,nas.max_size=1,rrc.level=debug,rrc.max_size=1",
+log_filename: "/tmp/ue0.log",
+
+/* Enable remote API and Web interface */
+com_addr: "0.0.0.0:9002",
+
+include "rf_driver/1chan.cfg",
+
+/* If true, allow the simulation of several UEs at the same time and allow dynamic UE creation from remote API */
+                    
+cell_groups: [{
+    group_type: "nr",
+    multi_ue: true,
+    cells: [{
+      rf_port: 0,
+      bandwidth: CELL_BANDWIDTH,
+#if TDD == 1
+      band: 78,
+      dl_nr_arfcn:621312,
+      ssb_nr_arfcn:621312,
+
+      //band: 41,
+      //dl_nr_arfcn:517020,
+      //ssb_nr_arfcn:516990,
+#else
+      band: 7,
+      dl_nr_arfcn: 536020,
+      ssb_nr_arfcn: 535930,
+      ssb_subcarrier_spacing: 15,
+#endif
+      subcarrier_spacing: 30,
+      n_antenna_dl: N_ANTENNA_DL,
+      n_antenna_ul: 1,
+      rx_to_tx_latency:2,
+    }],
+}],
+
+    
+/* Enable it to allow sim_events to be handled remotely */
+//rue_bind_addr: "127.0.10.11",
+
+
+
+ue_list: [
+  {
+    /* UE capabilities */ 
+    /* USIM data */    
+    "ue_id" : 1,
+    "imsi": "208970100001127",
+    "K": "fec86ba6eb707ed08905757b1bb44b8f",
+    "sim_algo":"milenage",
+    "op": "1006020f0a478bf6b699f15c062e42b3",
+    as_release: 15,
+    ue_category: "nr",
+    apn:"oai",
+    attach_pdn_type:"ipv4",
+    default_nssai: [
+      {
+      sst: 1,
+      sd: 66051,
+      },
+    ],
+    default_pdu_session_snssai: {
+      sst: 1,
+      sd: 66051,
+    },
+    /* Enable it to allow sim_events to be handled remotely */
+    //rue_addr: "127.1.0.0",
+    /* Enable it to create a TUN interface for each UE PDN */
+    tun_setup_script: "ue-ifup",
+    sim_events: [
+      {
+        event: "power_on",
+        start_time: 5,
+      },
+      {
+       "tag": "ping",
+       "prog":"oai_ext_app.sh",
+        start_time: 20,
+        end_time: 30,
+        "args":["ping 192.168.70.136"],
+        "event":"ext_app"
+      },
+      {
+        event: "power_off",
+        start_time: 60,
+      }
+    ] /*end sim events */
+  }, /*end UE object 0*/
+  {
+    /* UE capabilities */ 
+    /* USIM data */  
+    "ue_id" : 2, 
+    "imsi": "208970100001128",
+    "K": "fec86ba6eb707ed08905757b1bb44b8f",
+    "sim_algo":"milenage",
+    "op": "1006020f0a478bf6b699f15c062e42b3",
+    as_release: 15,
+    ue_category: "nr",
+    apn:"oai",
+    attach_pdn_type:"ipv4",
+    default_nssai: [
+      {
+      sst: 1,
+      sd: 66051,
+      },
+    ],
+    default_pdu_session_snssai: {
+      sst: 1,
+      sd: 66051,
+    },
+    /* Enable it to allow sim_events to be handled remotely */
+    //rue_addr: "127.1.0.0",
+    /* Enable it to create a TUN interface for each UE PDN */
+    tun_setup_script: "ue-ifup",
+    sim_events: [
+      {
+        event: "power_on",
+        start_time: 5,
+      }, 
+      {
+       "tag": "ping",
+       "prog":"oai_ext_app.sh",
+        start_time: 40,
+        end_time: 50,
+        "args":["ping 192.168.70.136"],
+        "event":"ext_app"              
+      },
+      {
+        event: "power_off",
+        start_time: 60,
+      }
+    ] /*end sim events */
+  } /*end UE object 1*/
+  ],/*end UE list*/
+}/*end json*/

ci-scripts/as_ue/oaicicd-ue-Ping-SATest.cfg

@@ -0,0 +1,113 @@
+/* UE simulator configuration */
+
+
+
+/* UE simulator configuration file version 2021-06-17
+ * LTE / 5G Non StandAlone
+ * Copyright (C) 2019-2021 Amarisoft
+ */
+{
+#define N_ANTENNA_DL 1
+#define TDD 1
+#define CELL_BANDWIDTH 40
+
+
+  log_options: "all.level=error,all.max_size=0,nas.level=debug,nas.max_size=1,rrc.level=debug,rrc.max_size=1",
+  log_filename: "/tmp/ue1.log",
+
+  /* Enable remote API and Web interface */
+  com_addr: "0.0.0.0:9002",
+
+  include "rf_driver/1chan.cfg",
+
+      /* If true, allow the simulation of several UEs at the same time and
+         allow dynamic UE creation from remote API */
+                    
+cell_groups: [{
+    group_type: "nr",
+    multi_ue: false,
+    cells: [{
+      rf_port: 0,
+      bandwidth: CELL_BANDWIDTH,
+#if TDD == 1
+      band: 78,
+      dl_nr_arfcn:621312,
+      ssb_nr_arfcn:621312,
+
+      //band: 41,
+      //dl_nr_arfcn:517020,
+      //ssb_nr_arfcn:516990,
+#else
+      band: 7,
+      dl_nr_arfcn: 536020,
+      ssb_nr_arfcn: 535930,
+      ssb_subcarrier_spacing: 15,
+#endif
+      subcarrier_spacing: 30,
+      n_antenna_dl: N_ANTENNA_DL,
+      n_antenna_ul: 1,
+      rx_to_tx_latency:2,
+    }],
+  }],
+
+
+
+       
+  /* Enable it to allow sim_events to be handled remotely */
+  //rue_bind_addr: "127.0.10.11",
+
+  ue_list: [
+    {
+      /* UE capabilities */
+   
+    /* USIM data */
+
+
+    "imsi": "208970100001127",
+    "K": "fec86ba6eb707ed08905757b1bb44b8f",
+    "sim_algo":"milenage",
+    "op": "1006020f0a478bf6b699f15c062e42b3",
+
+
+    as_release: 15,
+    ue_category: "nr",
+    apn:"oai",
+    attach_pdn_type:"ipv4",
+    default_nssai: [
+    {
+    sst: 1,
+    sd: 66051,
+    },
+    ],
+
+    default_pdu_session_snssai: {
+    sst: 1,
+    sd: 66051,
+    },
+
+
+      /* Enable it to allow sim_events to be handled remotely */
+      //rue_addr: "127.1.0.0",
+
+      /* Enable it to create a TUN interface for each UE PDN */
+      tun_setup_script: "ue-ifup",
+
+      sim_events: [{
+        event: "power_on",
+        start_time: 5,
+      }, {
+       "tag": "ping",
+       "prog":"oai_ext_app.sh",
+        start_time: 15,
+        end_time: 25,
+        "args":["ping 192.168.70.136"],
+        "event":"ext_app"
+              
+      },
+      {
+        event: "power_off",
+        start_time: 30,
+      }]
+    }
+  ],
+}

ci-scripts/as_ue/oaicicd-ue-iperf-SATest.cfg

@@ -0,0 +1,109 @@
+/* UE simulator configuration */
+
+
+
+/* UE simulator configuration file version 2021-06-17
+ * LTE / 5G Non StandAlone
+ * Copyright (C) 2019-2021 Amarisoft
+ */
+{
+#define N_ANTENNA_DL 1
+#define TDD 1
+#define CELL_BANDWIDTH 20
+
+
+  log_options: "all.level=error,all.max_size=0,nas.level=debug,nas.max_size=1,rrc.level=debug,rrc.max_size=1",
+  log_filename: "/tmp/ue0.log",
+
+  /* Enable remote API and Web interface */
+  com_addr: "0.0.0.0:9002",
+
+  include "rf_driver/1chan.cfg",
+
+      /* If true, allow the simulation of several UEs at the same time and
+         allow dynamic UE creation from remote API */
+                    
+cell_groups: [{
+    group_type: "nr",
+    multi_ue: false,
+    cells: [{
+      rf_port: 0,
+      bandwidth: CELL_BANDWIDTH,
+#if TDD == 1
+     // band: 78,
+     // dl_nr_arfcn:621312,
+     // ssb_nr_arfcn:621312,*/
+
+      band: 41,
+      dl_nr_arfcn:517020,
+      ssb_nr_arfcn:516990,
+#else
+      band: 7,
+      dl_nr_arfcn: 536020,
+      ssb_nr_arfcn: 535930,
+      ssb_subcarrier_spacing: 15,
+#endif
+      subcarrier_spacing: 30,
+      n_antenna_dl: N_ANTENNA_DL,
+      n_antenna_ul: 1,
+      rx_to_tx_latency:2,
+    }],
+  }],
+
+
+
+       
+  /* Enable it to allow sim_events to be handled remotely */
+  //rue_bind_addr: "127.0.10.11",
+
+  ue_list: [
+    {
+      /* UE capabilities */
+   
+    /* USIM data */
+     
+    "imsi": "208970100001127",
+    "K": "fec86ba6eb707ed08905757b1bb44b8f",
+    "sim_algo":"milenage",
+    "op": "1006020f0a478bf6b699f15c062e42b3",
+
+
+    as_release: 15,
+    ue_category: "nr",
+    apn:"oai",
+    attach_pdn_type:"ipv4",
+    default_nssai: [
+    {
+    sst: 1,
+    sd: 1,
+    },
+    ],
+
+    default_pdu_session_snssai: {
+    sst: 1,
+    sd: 1,
+    },
+
+
+      /* Enable it to allow sim_events to be handled remotely */
+      //rue_addr: "127.1.0.0",
+
+      /* Enable it to create a TUN interface for each UE PDN */
+      tun_setup_script: "ue-ifup",
+
+      sim_events: [{
+        event: "power_on",
+        start_time: 5,
+      }, {
+        event: "ext_app",
+        start_time: 15,
+        end_time: 25,
+        prog: "ext_app.sh",
+        args: ["iperf", " -c  172.21.10.5", " -u"," -b 1M"," -i 1"," -t 10"]
+      }, {
+        event: "power_off",
+        start_time: 30,
+      }]
+    }
+  ],
+}

ci-scripts/ci_ueinfra.yaml

@@ -49,75 +49,75 @@ adb_ue_2:
 
 amarisoft_ue:
   Host: amariue
-  InitScript: /root/NV18-06-2022/lteue-linux-2023-03-17/lteue /root/oaicicd/ran_sa_aw2s_asue/aw2s-asue.cfg &
-  TermScript: /root/NV18-06-2022/lteue-linux-2023-03-17/doc/ws.js 127.0.0.1:9002 '{"message":"quit"}'
+  InitScript: nohup /root/NV18-06-2022/ue/lteue /root/NV18-06-2022/ue/config/oaicicd-ue-ci-test.cfg &
+  TermScript: /root/NV18-06-2022/lteue-linux-2022-06-18/doc/ws.js 127.0.0.1:9002 '{"message":"quit"}'
 amarisoft_ue_1:
   Host: amariue
-  AttachScript: /root/NV18-06-2022/lteue-linux-2023-03-17/doc/ws.js 127.0.0.1:9002 '{"message":"power_on","ue_id":1}'
-  DetachScript: /root/NV18-06-2022/lteue-linux-2023-03-17/doc/ws.js 127.0.0.1:9002 '{"message":"power_off","ue_id":1}'
+  AttachScript: /root/NV18-06-2022/lteue-linux-2022-06-18/doc/ws.js 127.0.0.1:9002 '{"message":"power_on","ue_id":1}'
+  DetachScript: /root/NV18-06-2022/lteue-linux-2022-06-18/doc/ws.js 127.0.0.1:9002 '{"message":"power_off","ue_id":1}'
   UENetworkScript: ip netns exec ue1 ip a show dev pdn0
   CmdPrefix: ip netns exec ue1
   MTU: 1500
 amarisoft_ue_2:
   Host: amariue
-  AttachScript: /root/NV18-06-2022/lteue-linux-2023-03-17/doc/ws.js 127.0.0.1:9002 '{"message":"power_on","ue_id":2}'
-  DetachScript: /root/NV18-06-2022/lteue-linux-2023-03-17/doc/ws.js 127.0.0.1:9002 '{"message":"power_off","ue_id":2}'
+  AttachScript: /root/NV18-06-2022/lteue-linux-2022-06-18/doc/ws.js 127.0.0.1:9002 '{"message":"power_on","ue_id":2}'
+  DetachScript: /root/NV18-06-2022/lteue-linux-2022-06-18/doc/ws.js 127.0.0.1:9002 '{"message":"power_off","ue_id":2}'
   UENetworkScript: ip netns exec ue2 ip a show dev pdn0
   CmdPrefix: ip netns exec ue2
   MTU: 1500
 amarisoft_ue_3:
   Host: amariue
-  AttachScript: /root/NV18-06-2022/lteue-linux-2023-03-17/doc/ws.js 127.0.0.1:9002 '{"message":"power_on","ue_id":3}'
-  DetachScript: /root/NV18-06-2022/lteue-linux-2023-03-17/doc/ws.js 127.0.0.1:9002 '{"message":"power_off","ue_id":3}'
+  AttachScript: /root/NV18-06-2022/lteue-linux-2022-06-18/doc/ws.js 127.0.0.1:9002 '{"message":"power_on","ue_id":3}'
+  DetachScript: /root/NV18-06-2022/lteue-linux-2022-06-18/doc/ws.js 127.0.0.1:9002 '{"message":"power_off","ue_id":3}'
   UENetworkScript: ip netns exec ue3 ip a show dev pdn0
   CmdPrefix: ip netns exec ue3
   MTU: 1500
 amarisoft_ue_4:
   Host: amariue
-  AttachScript: /root/NV18-06-2022/lteue-linux-2023-03-17/doc/ws.js 127.0.0.1:9002 '{"message":"power_on","ue_id":4}'
-  DetachScript: /root/NV18-06-2022/lteue-linux-2023-03-17/doc/ws.js 127.0.0.1:9002 '{"message":"power_off","ue_id":4}'
+  AttachScript: /root/NV18-06-2022/lteue-linux-2022-06-18/doc/ws.js 127.0.0.1:9002 '{"message":"power_on","ue_id":4}'
+  DetachScript: /root/NV18-06-2022/lteue-linux-2022-06-18/doc/ws.js 127.0.0.1:9002 '{"message":"power_off","ue_id":4}'
   UENetworkScript: ip netns exec ue4 ip a show dev pdn0
   CmdPrefix: ip netns exec ue4
   MTU: 1500
 amarisoft_ue_5:
   Host: amariue
-  AttachScript: /root/NV18-06-2022/lteue-linux-2023-03-17/doc/ws.js 127.0.0.1:9002 '{"message":"power_on","ue_id":5}'
-  DetachScript: /root/NV18-06-2022/lteue-linux-2023-03-17/doc/ws.js 127.0.0.1:9002 '{"message":"power_off","ue_id":5}'
+  AttachScript: /root/NV18-06-2022/lteue-linux-2022-06-18/doc/ws.js 127.0.0.1:9002 '{"message":"power_on","ue_id":5}'
+  DetachScript: /root/NV18-06-2022/lteue-linux-2022-06-18/doc/ws.js 127.0.0.1:9002 '{"message":"power_off","ue_id":5}'
   UENetworkScript: ip netns exec ue5 ip a show dev pdn0
   CmdPrefix: ip netns exec ue5
   MTU: 1500
 amarisoft_ue_6:
   Host: amariue
-  AttachScript: /root/NV18-06-2022/lteue-linux-2023-03-17/doc/ws.js 127.0.0.1:9002 '{"message":"power_on","ue_id":6}'
-  DetachScript: /root/NV18-06-2022/lteue-linux-2023-03-17/doc/ws.js 127.0.0.1:9002 '{"message":"power_off","ue_id":6}'
+  AttachScript: /root/NV18-06-2022/lteue-linux-2022-06-18/doc/ws.js 127.0.0.1:9002 '{"message":"power_on","ue_id":6}'
+  DetachScript: /root/NV18-06-2022/lteue-linux-2022-06-18/doc/ws.js 127.0.0.1:9002 '{"message":"power_off","ue_id":6}'
   UENetworkScript: ip netns exec ue6 ip a show dev pdn0
   CmdPrefix: ip netns exec ue6
   MTU: 1500
 amarisoft_ue_7:
   Host: amariue
-  AttachScript: /root/NV18-06-2022/lteue-linux-2023-03-17/doc/ws.js 127.0.0.1:9002 '{"message":"power_on","ue_id":7}'
-  DetachScript: /root/NV18-06-2022/lteue-linux-2023-03-17/doc/ws.js 127.0.0.1:9002 '{"message":"power_off","ue_id":7}'
+  AttachScript: /root/NV18-06-2022/lteue-linux-2022-06-18/doc/ws.js 127.0.0.1:9002 '{"message":"power_on","ue_id":7}'
+  DetachScript: /root/NV18-06-2022/lteue-linux-2022-06-18/doc/ws.js 127.0.0.1:9002 '{"message":"power_off","ue_id":7}'
   UENetworkScript: ip netns exec ue7 ip a show dev pdn0
   CmdPrefix: ip netns exec ue7
   MTU: 1500
 amarisoft_ue_8:
   Host: amariue
-  AttachScript: /root/NV18-06-2022/lteue-linux-2023-03-17/doc/ws.js 127.0.0.1:9002 '{"message":"power_on","ue_id":8}'
-  DetachScript: /root/NV18-06-2022/lteue-linux-2023-03-17/doc/ws.js 127.0.0.1:9002 '{"message":"power_off","ue_id":8}'
+  AttachScript: /root/NV18-06-2022/lteue-linux-2022-06-18/doc/ws.js 127.0.0.1:9002 '{"message":"power_on","ue_id":8}'
+  DetachScript: /root/NV18-06-2022/lteue-linux-2022-06-18/doc/ws.js 127.0.0.1:9002 '{"message":"power_off","ue_id":8}'
   UENetworkScript: ip netns exec ue8 ip a show dev pdn0
   CmdPrefix: ip netns exec ue8
   MTU: 1500
 amarisoft_ue_9:
   Host: amariue
-  AttachScript: /root/NV18-06-2022/lteue-linux-2023-03-17/doc/ws.js 127.0.0.1:9002 '{"message":"power_on","ue_id":9}'
-  DetachScript: /root/NV18-06-2022/lteue-linux-2023-03-17/doc/ws.js 127.0.0.1:9002 '{"message":"power_off","ue_id":9}'
+  AttachScript: /root/NV18-06-2022/lteue-linux-2022-06-18/doc/ws.js 127.0.0.1:9002 '{"message":"power_on","ue_id":9}'
+  DetachScript: /root/NV18-06-2022/lteue-linux-2022-06-18/doc/ws.js 127.0.0.1:9002 '{"message":"power_off","ue_id":9}'
   UENetworkScript: ip netns exec ue9 ip a show dev pdn0
   CmdPrefix: ip netns exec ue9
   MTU: 1500
 amarisoft_ue_10:
   Host: amariue
-  AttachScript: /root/NV18-06-2022/lteue-linux-2023-03-17/doc/ws.js 127.0.0.1:9002 '{"message":"power_on","ue_id":10}'
-  DetachScript: /root/NV18-06-2022/lteue-linux-2023-03-17/doc/ws.js 127.0.0.1:9002 '{"message":"power_off","ue_id":10}'
+  AttachScript: /root/NV18-06-2022/lteue-linux-2022-06-18/doc/ws.js 127.0.0.1:9002 '{"message":"power_on","ue_id":10}'
+  DetachScript: /root/NV18-06-2022/lteue-linux-2022-06-18/doc/ws.js 127.0.0.1:9002 '{"message":"power_off","ue_id":10}'
   UENetworkScript: ip netns exec ue10 ip a show dev pdn0
   CmdPrefix: ip netns exec ue10
   MTU: 1500

ci-scripts/cls_cluster.py

@@ -40,29 +40,6 @@ import cls_cmd
 
 IMAGE_REGISTRY_SERVICE_NAME = "image-registry.openshift-image-registry.svc"
 NAMESPACE = "oaicicd-ran"
-OCUrl = "https://api.oai.cs.eurecom.fr:6443"
-OCRegistry = "default-route-openshift-image-registry.apps.oai.cs.eurecom.fr/"
-
-
-def OC_login(cmd, ocUserName, ocPassword, ocProjectName):
-	if ocUserName == '' or ocPassword == '' or ocProjectName == '':
-		HELP.GenericHelp(CONST.Version)
-		sys.exit('Insufficient Parameter: no OC Credentials')
-	if OCRegistry.startswith("http") and not self.OCRegistry.endswith("/"):
-		sys.exit(f'ocRegistry {OCRegistry} should not start with http:// or https:// and end on a slash /')
-	ret = cmd.run(f'oc login -u {ocUserName} -p {ocPassword} --server {OCUrl}')
-	if ret.returncode != 0:
-		logging.error('\u001B[1m OC Cluster Login Failed\u001B[0m')
-		return False
-	ret = cmd.run(f'oc project {ocProjectName}')
-	if ret.returncode != 0:
-		logging.error(f'\u001B[1mUnable to access OC project {ocProjectName}\u001B[0m')
-		OC_logout(cmd)
-		return False
-	return True
-
-def OC_logout(cmd):
-	cmd.run(f'oc logout')
 
 class Cluster:
 	def __init__(self):
@@ -80,7 +57,7 @@ class Cluster:
 		self.ranAllowMerge = False
 		self.ranTargetBranch = ""
 		self.cmd = None
-		self.imageToPull = ''
+
 
 	def _recreate_entitlements(self):
 		# recreating entitlements, don't care if deletion fails
@@ -193,47 +170,11 @@ class Cluster:
 	def _undeploy_pod(self, filename):
 		self.cmd.run(f'oc delete -f {filename}')
 
-	def PullClusterImage(self, HTML, RAN):
-		if self.imageToPull == '':
-			HELP.GenericHelp(CONST.Version)
-			HELP.EPCSrvHelp(self.imageToPull)
-			sys.exit('Insufficient eNB Parameters')
-		lIpAddr = self.eNBIPAddress
-		self.testCase_id = HTML.testCase_id
-		cmd = cls_cmd.getConnection(lIpAddr)
-		succeeded = OC_login(cmd, self.OCUserName, self.OCPassword, self.OCProjectName)
-		if not succeeded:
-			logging.error('\u001B[1m OC Cluster Login Failed\u001B[0m')
-			HTML.CreateHtmlTestRow('N/A', 'KO', CONST.OC_LOGIN_FAIL)
-			return False
-		ret = cmd.run(f'oc whoami -t | docker login -u oaicicd --password-stdin {self.OCRegistry}')
-		if ret.returncode != 0:
-			logging.error(f'\u001B[1m Unable to access OC project {ocProjectName}\u001B[0m')
-			OC_logout(cmd)
-			cmd.close()
-			HTML.CreateHtmlTestRow('N/A', 'KO', CONST.OC_LOGIN_FAIL)
-			return False
-		for image in self.imageToPull:
-			imagePrefix = f'{self.OCRegistry}{self.OCProjectName}'
-			imageTag = cls_containerize.ImageTagToUse(image, self.ranCommitID, self.ranBranch, self.ranAllowMerge)
-			ret = cmd.run(f'docker pull {imagePrefix}/{imageTag}')
-			if ret.returncode != 0:
-				logging.error(f'Could not pull {image} from local registry : {self.OCRegistry}')
-				OC_logout(cmd)
-				cmd.close()
-				HTML.CreateHtmlTestRow('msg', 'KO', CONST.ALL_PROCESSES_OK)
-				return False
-			cmd.run(f'docker tag {imagePrefix}/{imageTag} oai-ci/{imageTag}')
-			cmd.run(f'docker rmi {imagePrefix}/{imageTag}')
-		OC_logout(cmd)
-		cmd.close()
-		HTML.CreateHtmlTestRow('N/A', 'OK', CONST.ALL_PROCESSES_OK)
-		return True
-
 	def BuildClusterImage(self, HTML):
 		if self.ranRepository == '' or self.ranBranch == '' or self.ranCommitID == '':
 			HELP.GenericHelp(CONST.Version)
 			sys.exit(f'Insufficient Parameter: ranRepository {self.ranRepository} ranBranch {ranBranch} ranCommitID {self.ranCommitID}')
+
 		lIpAddr = self.eNBIPAddress
 		lSourcePath = self.eNBSourceCodePath
 		if lIpAddr == '' or lSourcePath == '':
@@ -263,6 +204,7 @@ class Cluster:
 
 		baseTag = 'develop'
 		forceBaseImageBuild = False
+		imageTag = 'develop'
 		if self.ranAllowMerge: # merging MR branch into develop -> temporary image
 			imageTag = f'{self.ranBranch}-{self.ranCommitID[0:8]}'
 			if self.ranTargetBranch == 'develop':
@@ -272,7 +214,6 @@ class Cluster:
 					forceBaseImageBuild = True
 					baseTag = 'ci-temp'
 		else:
-			imageTag = f'develop-{self.ranCommitID[0:8]}'
 			forceBaseImageBuild = True
 
 		# logging to OC Cluster and then switch to corresponding project
@@ -332,18 +273,11 @@ class Cluster:
 			ranbuild_job = self._start_build('ran-build')
 			attemptedImages += ['ran-build']
 
-			self._recreate_is_tag('oai-clang', imageTag, 'openshift/oai-clang-is.yaml')
-			self._recreate_bc('oai-clang', imageTag, 'openshift/oai-clang-bc.yaml')
-			self._retag_image_statement('ran-base', 'image-registry.openshift-image-registry.svc:5000/oaicicd-ran/ran-base', baseTag, 'docker/Dockerfile.clang.rhel8.2')
-			clang_job = self._start_build('oai-clang')
-			attemptedImages += ['oai-clang']
-
-			wait = ranbuild_job is not None and physim_job is not None and clang_job is not None and self._wait_build_end([ranbuild_job, physim_job, clang_job], 1200)
-			if not wait: logging.error('error during build of ranbuild_job or physim_job or clang_job')
+			wait = ranbuild_job is not None and physim_job is not None and self._wait_build_end([ranbuild_job, physim_job], 1200)
+			if not wait: logging.error('error during build of ranbuild_job or physim_job')
 			status = status and wait
 			self.cmd.run(f'oc logs {ranbuild_job} &> cmake_targets/log/ran-build.log')
 			self.cmd.run(f'oc logs {physim_job} &> cmake_targets/log/oai-physim.log')
-			self.cmd.run(f'oc logs {clang_job} &> cmake_targets/log/oai-clang.log')
 			self.cmd.run(f'oc get pods.metrics.k8s.io &>> cmake_targets/log/build-metrics.log', '\$', 10)
 
 		if status:

ci-scripts/cls_containerize.py

@@ -31,8 +31,8 @@
 #-----------------------------------------------------------
 # Import
 #-----------------------------------------------------------
-import sys	      # arg
-import re	       # reg
+import sys              # arg
+import re               # reg
 import logging
 import os
 import shutil
@@ -47,7 +47,6 @@ from zipfile import ZipFile
 #-----------------------------------------------------------
 # OAI Testing modules
 #-----------------------------------------------------------
-import cls_cluster as OC
 import cls_cmd
 import sshconnection as SSH
 import helpreadme as HELP
@@ -91,15 +90,6 @@ def CreateWorkspace(sshSession, sourcePath, ranRepository, ranCommitID, ranTarge
 		logging.debug(f'Merging with the target branch: {ranTargetBranch}')
 		sshSession.command(f'git merge --ff origin/{ranTargetBranch} -m "Temporary merge for CI"', '\$', 30)
 
-def ImageTagToUse(imageName, ranCommitID, ranBranch, ranAllowMerge):
-	shortCommit = ranCommitID[0:8]
-	if ranAllowMerge:
-		tagToUse = f'{ranBranch}-{shortCommit}'
-	else:
-		tagToUse = f'develop-{shortCommit}'
-	fullTag = f'{imageName}:{tagToUse}'
-	return fullTag
-
 def CopyLogsToExecutor(cmd, sourcePath, log_name):
 	cmd.cd(f'{sourcePath}/cmake_targets')
 	cmd.run(f'rm -f {log_name}.zip')
@@ -316,6 +306,7 @@ class Containerize():
 		self.registrySvrId = ''
 		self.testSvrId = ''
 		self.imageToPull = []
+
 		#checkers from xml
 		self.ran_checkers={}
 
@@ -392,7 +383,7 @@ class Containerize():
 	
 		CreateWorkspace(cmd, lSourcePath, self.ranRepository, self.ranCommitID, self.ranTargetBranch, self.ranAllowMerge)
 
-		# if asterix, copy the entitlement and subscription manager configurations
+ 		# if asterix, copy the entitlement and subscription manager configurations
 		if self.host == 'Red Hat':
 			cmd.run('mkdir -p ./etc-pki-entitlement ./rhsm-conf ./rhsm-ca')
 			cmd.run('cp /etc/rhsm/rhsm.conf ./rhsm-conf/')
@@ -658,6 +649,15 @@ class Containerize():
 		HTML.CreateHtmlTestRow('commit ' + tag, 'OK', CONST.ALL_PROCESSES_OK)
 		HTML.CreateHtmlNextTabHeaderTestRow(collectInfo, allImagesSize)
 
+	def ImageTagToUse(self, imageName):
+		shortCommit = self.ranCommitID[0:8]
+		if self.ranAllowMerge:
+			tagToUse = f'{self.ranBranch}-{shortCommit}'
+		else:
+			tagToUse = f'develop-{shortCommit}'
+		fullTag = f'porcepix.sboai.cs.eurecom.fr/{imageName}:{tagToUse}'
+		return fullTag
+
 	def Push_Image_to_Local_Registry(self, HTML):
 		if self.registrySvrId == '0':
 			lIpAddr = self.eNBIPAddress
@@ -680,8 +680,8 @@ class Containerize():
 		logging.debug('Pushing images from server: ' + lIpAddr)
 		mySSH = SSH.SSHConnection()
 		mySSH.open(lIpAddr, lUserName, lPassWord)
-		imagePrefix = 'porcepix.sboai.cs.eurecom.fr'
-		mySSH.command(f'docker login -u oaicicd -p oaicicd {imagePrefix}', '\$', 5)
+
+		mySSH.command('docker login -u oaicicd -p oaicicd porcepix.sboai.cs.eurecom.fr', '\$', 5)
 		if re.search('Login Succeeded', mySSH.getBefore()) is None:
 			msg = 'Could not log into local registry'
 			logging.error(msg)
@@ -694,9 +694,9 @@ class Containerize():
 			orgTag = 'ci-temp'
 		imageNames = ['oai-enb', 'oai-gnb', 'oai-lte-ue', 'oai-nr-ue', 'oai-lte-ru', 'oai-nr-cuup']
 		for image in imageNames:
-			tagToUse = ImageTagToUse(image, self.ranCommitID, self.ranBranch, self.ranAllowMerge)
-			mySSH.command(f'docker image tag {image}:{orgTag} {imagePrefix}/{tagToUse}', '\$', 5)
-			mySSH.command(f'docker push {imagePrefix}/{tagToUse}', '\$', 120)
+			tagToUse = self.ImageTagToUse(image)
+			mySSH.command(f'docker image tag {image}:{orgTag} {tagToUse}', '\$', 5)
+			mySSH.command(f'docker push {tagToUse}', '\$', 120)
 			if re.search(': digest:', mySSH.getBefore()) is None:
 				logging.debug(mySSH.getBefore())
 				msg = f'Could not push {image} to local registry : {tagToUse}'
@@ -704,9 +704,9 @@ class Containerize():
 				mySSH.close()
 				HTML.CreateHtmlTestRow(msg, 'KO', CONST.ALL_PROCESSES_OK)
 				return False
-			mySSH.command(f'docker rmi {imagePrefix}/{tagToUse} {image}:{orgTag}', '\$', 30)
+			mySSH.command(f'docker rmi {tagToUse} {image}:{orgTag}', '\$', 30)
 
-		mySSH.command(f'docker logout {imagePrefix}', '\$', 5)
+		mySSH.command('docker logout porcepix.sboai.cs.eurecom.fr', '\$', 5)
 		if re.search('Removing login credentials', mySSH.getBefore()) is None:
 			msg = 'Could not log off from local registry'
 			logging.error(msg)
@@ -739,18 +739,25 @@ class Containerize():
 		if lIpAddr == '' or lUserName == '' or lPassWord == '' or lSourcePath == '':
 			HELP.GenericHelp(CONST.Version)
 			sys.exit('Insufficient Parameter')
-		myCmd = cls_cmd.getConnection(lIpAddr)
-		imagePrefix = 'porcepix.sboai.cs.eurecom.fr'
-		response = myCmd.run(f'docker login -u oaicicd -p oaicicd {imagePrefix}')
+		if lIpAddr != 'none':
+			logging.debug('Pulling images onto server: ' + lIpAddr)
+			myCmd = cls_cmd.RemoteCmd(lIpAddr)
+		else:
+			logging.debug('Pulling images locally')
+			myCmd = cls_cmd.LocalCmd()
+
+		cmd = 'docker login -u oaicicd -p oaicicd porcepix.sboai.cs.eurecom.fr'
+		response = myCmd.run(cmd)
 		if response.returncode != 0:
 			msg = 'Could not log into local registry'
 			logging.error(msg)
 			myCmd.close()
 			HTML.CreateHtmlTestRow(msg, 'KO', CONST.ALL_PROCESSES_OK)
 			return False
+
 		for image in self.imageToPull:
-			tagToUse = ImageTagToUse(image, self.ranCommitID, self.ranBranch, self.ranAllowMerge)
-			cmd = f'docker pull {imagePrefix}/{tagToUse}'
+			tagToUse = self.ImageTagToUse(image)
+			cmd = f'docker pull {tagToUse}'
 			response = myCmd.run(cmd, timeout=120)
 			if response.returncode != 0:
 				logging.debug(response)
@@ -759,15 +766,16 @@ class Containerize():
 				myCmd.close()
 				HTML.CreateHtmlTestRow('msg', 'KO', CONST.ALL_PROCESSES_OK)
 				return False
-			myCmd.run(f'docker tag {imagePrefix}/{tagToUse} oai-ci/{tagToUse}')
-			myCmd.run(f'docker rmi {imagePrefix}/{tagToUse}')
-		response = myCmd.run(f'docker logout {imagePrefix}')
+
+		cmd = 'docker logout porcepix.sboai.cs.eurecom.fr'
+		response = myCmd.run(cmd)
 		if response.returncode != 0:
 			msg = 'Could not log off from local registry'
 			logging.error(msg)
 			myCmd.close()
 			HTML.CreateHtmlTestRow(msg, 'KO', CONST.ALL_PROCESSES_OK)
 			return False
+
 		myCmd.close()
 		HTML.CreateHtmlTestRow('N/A', 'OK', CONST.ALL_PROCESSES_OK)
 		return True
@@ -802,8 +810,7 @@ class Containerize():
 
 		imageNames = ['oai-enb', 'oai-gnb', 'oai-lte-ue', 'oai-nr-ue', 'oai-lte-ru', 'oai-nr-cuup']
 		for image in imageNames:
-			imageTag = ImageTagToUse(image, self.ranCommitID, self.ranBranch, self.ranAllowMerge)
-			cmd = f'docker rmi oai-ci/{imageTag}'
+			cmd = f'docker rmi {self.ImageTagToUse(image)}'
 			myCmd.run(cmd, reportNonZero=False)
 
 		myCmd.close()
@@ -838,10 +845,10 @@ class Containerize():
 
 		mySSH.command('cd ' + lSourcePath + '/' + self.yamlPath[self.eNB_instance], '\$', 5)
 		mySSH.command('cp docker-compose.y*ml ci-docker-compose.yml', '\$', 5)
-		imagesList = ['oai-enb', 'oai-gnb', 'oai-nr-cuup', 'oai-gnb-aw2s']
+		imagesList = ['oai-enb', 'oai-gnb', 'oai-nr-cuup']
 		for image in imagesList:
-			imageTag = ImageTagToUse(image, self.ranCommitID, self.ranBranch, self.ranAllowMerge)
-			mySSH.command(f'sed -i -e "s#image: {image}:latest#image: oai-ci/{imageTag}#" ci-docker-compose.yml', '\$', 2)
+			imageToUse = self.ImageTagToUse(image)
+			mySSH.command(f'sed -i -e "s#image: {image}:latest#image: {imageToUse}#" ci-docker-compose.yml', '\$', 2)
 		localMmeIpAddr = EPC.MmeIPAddress
 		mySSH.command('sed -i -e "s/CI_MME_IP_ADDR/' + localMmeIpAddr + '/" ci-docker-compose.yml', '\$', 2)
 
@@ -959,7 +966,6 @@ class Containerize():
 		logging.debug('\u001B[1m Undeploying OAI Object from server: ' + lIpAddr + '\u001B[0m')
 		mySSH = SSH.SSHConnection()
 		mySSH.open(lIpAddr, lUserName, lPassWord)
-
 		mySSH.command('cd ' + lSourcePath + '/' + self.yamlPath[self.eNB_instance], '\$', 5)
 
 		svcName = self.services[self.eNB_instance]
@@ -975,7 +981,7 @@ class Containerize():
 		for s in allServices:
 			mySSH.command(f'docker-compose -f ci-docker-compose.yml ps --all -- {s}', '\$', 5, silent=False)
 			running = mySSH.getBefore().split('\r\n')[2:-1]
-			logging.debug(f'running services: {running}')
+			#logging.debug(f'running services: {running}')
 			if len(running) > 0: # something is running for that service
 				services.append(s)
 		logging.info(f'stopping services {services}')
@@ -1044,12 +1050,13 @@ class Containerize():
 			myCmd.close()
 			HTML.CreateHtmlTestRow('SVC not Found', 'KO', CONST.ALL_PROCESSES_OK)
 			return
+
 		cmd = 'cp docker-compose.y*ml docker-compose-ci.yml'
 		myCmd.run(cmd, silent=self.displayedNewTags)
 		imageNames = ['oai-enb', 'oai-gnb', 'oai-lte-ue', 'oai-nr-ue', 'oai-lte-ru', 'oai-nr-cuup']
 		for image in imageNames:
-			tagToUse = ImageTagToUse(image, self.ranCommitID, self.ranBranch, self.ranAllowMerge)
-			cmd = f'sed -i -e "s@oaisoftwarealliance/{image}:develop@oai-ci/{tagToUse}@" docker-compose-ci.yml'
+			tagToUse = self.ImageTagToUse(image)
+			cmd = f'sed -i -e "s@oaisoftwarealliance/{image}:develop@{tagToUse}@" docker-compose-ci.yml'
 			myCmd.run(cmd, silent=self.displayedNewTags)
 		self.displayedNewTags = True
 
@@ -1186,12 +1193,13 @@ class Containerize():
 		ymlPath = self.yamlPath[0].split('/')
 		logPath = '../cmake_targets/log/' + ymlPath[1]
 		myCmd = cls_cmd.LocalCmd(d = self.yamlPath[0])
+
 		cmd = 'cp docker-compose.y*ml docker-compose-ci.yml'
 		myCmd.run(cmd, silent=self.displayedNewTags)
 		imageNames = ['oai-enb', 'oai-gnb', 'oai-lte-ue', 'oai-nr-ue', 'oai-lte-ru', 'oai-nr-cuup']
 		for image in imageNames:
-			tagToUse = ImageTagToUse(image, self.ranCommitID, self.ranBranch, self.ranAllowMerge)
-			cmd = f'sed -i -e "s@oaisoftwarealliance/{image}:develop@oai-ci/{tagToUse}@" docker-compose-ci.yml'
+			tagToUse = self.ImageTagToUse(image)
+			cmd = f'sed -i -e "s@oaisoftwarealliance/{image}:develop@{tagToUse}@" docker-compose-ci.yml'
 			myCmd.run(cmd, silent=self.displayedNewTags)
 		self.displayedNewTags = True
 

ci-scripts/cls_oaicitest.py

@@ -605,8 +605,6 @@ class OaiCiTest():
 					Target = EPC.MmeIPAddress
 				elif re.match('OAICN5G', EPC.Type, re.IGNORECASE):
 					Target = EPC.MmeIPAddress
-				elif re.match('OC-OAI-CN5G', EPC.Type, re.IGNORECASE):
-					Target = "172.21.6.100"
 				else:
 					Target = EPC.IPAddress
 				#ping from module NIC rather than IP address to make sure round trip is over the air	

ci-scripts/cls_physim1.py

@@ -114,7 +114,7 @@ class PhySim:
 				logging.debug('Merging with the target branch: ' + self.ranTargetBranch)
 				mySSH.command('git merge --ff origin/' + self.ranTargetBranch + ' -m "Temporary merge for CI"', '\$', 30)
 		else:
-			imageTag = f'develop-{self.ranCommitID[0:8]}'
+			imageTag = "develop"
 
 		# logging to OC Cluster and then switch to corresponding project
 		mySSH.command(f'oc login -u {ocUserName} -p {ocPassword} --server https://api.oai.cs.eurecom.fr:6443', '\$', 30)

ci-scripts/conf_files/gnb.sa.band78.51prb.aw2s.ddsuu.conf

@@ -1,281 +0,0 @@
-Active_gNBs = ( "gNB-Eurecom-n78_20");
-# Asn1_verbosity, choice in: none, info, annoying
-Asn1_verbosity = "none";
-
-#device :{
-# name = "aw2sori_transpro";
-#}
-
-gNBs =
-(
- {
-    ////////// Identification parameters:
-    gNB_CU_ID = 0xe00;
-
-    gNB_name  =  "gNB-Eurecom-n78_20";
-
-    // Tracking area code, 0x0000 and 0xfffe are reserved values
-    tracking_area_code  =  0x1;
-    plmn_list = ({ mcc = 001; mnc = 01; mnc_length = 2; snssaiList = ({ sst =0x1; }) });
-
-    nr_cellid = 12345678L
-
-    ////////// Physical parameters:
-    pdsch_AntennaPorts_XP                                     = 2;
-    pusch_AntennaPorts                                        = 2;
-    do_CSIRS                                                  = 1;
-    do_SRS                                                    = 0;
-
-    pdcch_ConfigSIB1 = (
-      {
-        controlResourceSetZero = 11;
-        searchSpaceZero = 0;
-      }
-    );
-
-    servingCellConfigCommon = (
-    {
- #spCellConfigCommon
-
-      physCellId                                                    = 0;
-
-#  downlinkConfigCommon
-    #frequencyInfoDL
-      # this is 3410.4 MHz => 301 REs from PointA 25 PRBs + 1 RE
-      absoluteFrequencySSB                                             = 627360;
-      dl_frequencyBand                                                 = 78;
-      # this is 3410.4 - (51*12*30e-3/2) = 3401.22 MHz
-      dl_absoluteFrequencyPointA                                       = 626748;
-      #scs-SpecificCarrierList
-        dl_offstToCarrier                                              = 0;
-# subcarrierSpacing
-# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
-        dl_subcarrierSpacing                                           = 1;
-        dl_carrierBandwidth                                            = 51;
-     #initialDownlinkBWP
-      #genericParameters
-        # this is RBstart=0,L=50 (275*(L-1))+RBstart
-        initialDLBWPlocationAndBandwidth                                        = 13750;
-# subcarrierSpacing
-# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
-        initialDLBWPsubcarrierSpacing                                           = 1;
-      #pdcch-ConfigCommon
-        initialDLBWPcontrolResourceSetZero                                      = 11; # this means shift of 14, so Coreset is in PRBs 1..48, SSB starts at PRB 15
-        initialDLBWPsearchSpaceZero                                             = 0;
-      #pdsch-ConfigCommon
-
-  #uplinkConfigCommon
-     #frequencyInfoUL
-      ul_frequencyBand                                                 = 78;
-      #scs-SpecificCarrierList
-      ul_offstToCarrier                                              = 0;
-# subcarrierSpacing
-# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
-      ul_subcarrierSpacing                                           = 1;
-      ul_carrierBandwidth                                            = 51;
-      pMax                                                          = 20;
-     #initialUplinkBWP
-      #genericParameters
-        initialULBWPlocationAndBandwidth                                        = 13750;
-# subcarrierSpacing
-# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
-        initialULBWPsubcarrierSpacing                                           = 1;
-      #rach-ConfigCommon
-        #rach-ConfigGeneric
-          prach_ConfigurationIndex                                  = 98;
-#prach_msg1_FDM
-#0 = one, 1=two, 2=four, 3=eight
-          prach_msg1_FDM                                            = 0;
-          prach_msg1_FrequencyStart                                 = 0;
-          zeroCorrelationZoneConfig                                 = 15;
-          preambleReceivedTargetPower                               = -104;
-#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
-          preambleTransMax                                          = 6;
-#powerRampingStep
-# 0=dB0,1=dB2,2=dB4,3=dB6
-        powerRampingStep                                            = 1;
-#ra_ReponseWindow
-#1,2,4,8,10,20,40,80
-        ra_ResponseWindow                                           = 4;
-#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
-#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen
-        ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR                = 3;
-#oneHalf (0..15) 4,8,12,16,...60,64
-        ssb_perRACH_OccasionAndCB_PreamblesPerSSB                   = 15;
-#ra_ContentionResolutionTimer
-#(0..7) 8,16,24,32,40,48,56,64
-        ra_ContentionResolutionTimer                                = 7;
-        rsrp_ThresholdSSB                                           = 19;
-#prach-RootSequenceIndex_PR
-#1 = 839, 2 = 139
-        prach_RootSequenceIndex_PR                                  = 2;
-        prach_RootSequenceIndex                                     = 1;
-        # SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
-        #
-        msg1_SubcarrierSpacing                                      = 1,
-# restrictedSetConfig
-# 0=unrestricted, 1=restricted type A, 2=restricted type B
-        restrictedSetConfig                                         = 0,
-
-        msg3_DeltaPreamble                                          = 1;
-        p0_NominalWithGrant                                         =-96;
-
-# pucch-ConfigCommon setup :
-# pucchGroupHopping
-# 0 = neither, 1= group hopping, 2=sequence hopping
-        pucchGroupHopping                                           = 0;
-        hoppingId                                                   = 40;
-        p0_nominal                                                  = -96;
-# ssb_PositionsInBurs_BitmapPR
-# 1=short, 2=medium, 3=long
-      ssb_PositionsInBurst_PR                                       = 2;
-      ssb_PositionsInBurst_Bitmap                                   = 1;
-
-# ssb_periodicityServingCell
-# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
-      ssb_periodicityServingCell                                    = 2;
-
-# dmrs_TypeA_position
-# 0 = pos2, 1 = pos3
-      dmrs_TypeA_Position                                           = 0;
-
-# subcarrierSpacing
-# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
-      subcarrierSpacing                                             = 1;
-
-
-  #tdd-UL-DL-ConfigurationCommon
-# subcarrierSpacing
-# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
-      referenceSubcarrierSpacing                                    = 1;
-      # pattern1
-      # dl_UL_TransmissionPeriodicity
-      # 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
-      dl_UL_TransmissionPeriodicity                                 = 5;
-      nrofDownlinkSlots                                             = 2;
-      nrofDownlinkSymbols                                           = 6;
-      nrofUplinkSlots                                               = 2;
-      nrofUplinkSymbols                                             = 4;
-
-  ssPBCH_BlockPower                                             = -10;
-  }
-
-  );
-
-
-    # ------- SCTP definitions
-    SCTP :
-    {
-        # Number of streams to use in input/output
-        SCTP_INSTREAMS  = 2;
-        SCTP_OUTSTREAMS = 2;
-    };
-
-
-    ////////// AMF parameters:
-    amf_ip_address      = ( { ipv4       = "172.21.6.100";
-                              ipv6       = "192:168:30::17";
-                              active     = "yes";
-                              preference = "ipv4";
-                            }
-                          );
-
-    NETWORK_INTERFACES :
-    {
-
-        GNB_INTERFACE_NAME_FOR_NG_AMF            = "eno33np0";
-        GNB_IPV4_ADDRESS_FOR_NG_AMF              = "172.21.16.124/20";
-        GNB_INTERFACE_NAME_FOR_NGU               = "eno33np0";
-        GNB_IPV4_ADDRESS_FOR_NGU                 = "172.21.16.124/20";
-        GNB_PORT_FOR_S1U                         = 2152; # Spec 2152
-    };
-  }
-);
-
-MACRLCs = (
-  {
-    num_cc           = 1;
-    tr_s_preference  = "local_L1";
-    tr_n_preference  = "local_RRC";
-    pusch_TargetSNRx10 = 200;
-    pucch_TargetSNRx10 = 200;
-    ulsch_max_frame_inactivity = 10;
-    ul_max_mcs         = 15;
-  }
-);
-
-L1s = (
-        {
-        num_cc = 1;
-        tr_n_preference = "local_mac";
-        prach_dtx_threshold = 120;
-        pucch0_dtx_threshold = 50;
-        pusch_dtx_threshold = 10;
-        }
-);
-
-RUs = (
-    {
-        local_if_name  = "ens7f3";
-        remote_address = "192.168.80.239";
-        local_address  = "192.168.80.24";
-        local_portc    = 50000;
-        remote_portc   = 55444;
-        local_portd    = 52001;
-        remote_portd   = 52183;
-        local_rf       = "no"
-        tr_preference  = "udp_ecpri_if5"
-        nb_tx          = 2
-        nb_rx          = 2
-        att_tx         = 16
-        att_rx         = 0;
-        num_tp_cores   = 4;
-        rxfh_core_id   = 9;
-        txfh_core_id   = 10;
-        tp_cores       = [11,12,13,14];
-        nr_flag        = 1;
-        eNB_instances  = [0];
-        bands          = [78];
-        sl_ahead       = 5;
-        ##beamforming 1x2 matrix: 1 layer x 2 antennas
-        bf_weights = [0x00007fff, 0x0000];
-        ##beamforming 1x4 matrix: 1 layer x 4 antennas
-        #bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
-        ## beamforming 2x2 matrix:
-        # bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
-        ## beamforming 4x4 matrix:
-        #bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
-    }
-);
-
-THREAD_STRUCT = (
-  {
-    #three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
-    parallel_config    = "PARALLEL_SINGLE_THREAD";
-    #two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
-    worker_config      = "WORKER_ENABLE";
-  }
-);
-
-     log_config :
-     {
-       global_log_level                      ="info";
-       global_log_verbosity                  ="medium";
-       hw_log_level                          ="info";
-       hw_log_verbosity                      ="medium";
-       phy_log_level                         ="info";
-       phy_log_verbosity                     ="medium";
-       mac_log_level                         ="info";
-       mac_log_verbosity                     ="high";
-       rlc_log_level                         ="info";
-       rlc_log_verbosity                     ="medium";
-       pdcp_log_level                        ="info";
-       pdcp_log_verbosity                    ="medium";
-       rrc_log_level                         ="info";
-       rrc_log_verbosity                     ="medium";
-       f1ap_log_level                         ="debug";
-       f1ap_log_verbosity                     ="medium";
-       ngap_log_level                         ="debug";
-       ngap_log_verbosity                     ="medium";
-    };
-

ci-scripts/epc.py

@@ -31,8 +31,8 @@
 #-----------------------------------------------------------
 # Import
 #-----------------------------------------------------------
-import sys	      # arg
-import re	       # reg
+import sys              # arg
+import re               # reg
 import logging
 import os
 import time
@@ -46,13 +46,10 @@ from multiprocessing import Process, Lock, SimpleQueue
 import sshconnection as SSH
 import helpreadme as HELP
 import constants as CONST
-import cls_cluster as OC
-import cls_cmd
+
 #-----------------------------------------------------------
 # Class Declaration
 #-----------------------------------------------------------
-
-
 class EPCManagement():
 
 	def __init__(self):
@@ -71,13 +68,7 @@ class EPCManagement():
 		self.isMagmaUsed = False
 		self.cfgDeploy = '--type start-mini --scenario 1 --capture /tmp/oai-cn5g-v1.5.pcap' #from xml, 'mini' is default normal for docker-network.py
 		self.cfgUnDeploy = '--type stop-mini --scenario 1' #from xml, 'mini' is default normal for docker-network.py
-		self.OCUrl = "https://api.oai.cs.eurecom.fr:6443"
-		self.OCRegistry = "default-route-openshift-image-registry.apps.oai.cs.eurecom.fr/"
-		self.OCUserName = ''
-		self.OCPassword = ''
-		self.OCProjectName = ''
-		self.imageToPull = ''
-		self.eNBSourceCodePath = ''
+
 
 #-----------------------------------------------------------
 # EPC management functions
@@ -244,7 +235,8 @@ class EPCManagement():
 			HELP.GenericHelp(CONST.Version)
 			HELP.EPCSrvHelp(self.IPAddress, self.UserName, self.Password, self.SourceCodePath, self.Type)
 			sys.exit('Insufficient EPC Parameters')
-		mySSH = cls_cmd.getConnection(self.IPAddress)
+		mySSH = SSH.SSHConnection()
+		mySSH.open(self.IPAddress, self.UserName, self.Password)
 		html_cell = ''
 		if re.match('ltebox', self.Type, re.IGNORECASE):
 			logging.debug('Using the SABOX simulated HSS')
@@ -294,40 +286,6 @@ class EPCManagement():
 					if res4 is not None:
 						html_cell += '(' + res4.group('date') + ')'
 					html_cell += '\n'
-		elif re.match('OC-OAI-CN5G', self.Type, re.IGNORECASE):
-			self.testCase_id = HTML.testCase_id
-			imageNames = ["oai-nrf", "oai-amf", "oai-smf", "oai-spgwu-tiny", "oai-ausf", "oai-udm", "oai-udr", "mysql","oai-traffic-server"]
-			logging.debug('Deploying OAI CN5G on Openshift Cluster')
-			lIpAddr = self.IPAddress
-			lSourcePath = self.SourceCodePath
-			succeeded = OC.OC_login(mySSH, self.OCUserName, self.OCPassword, self.OCProjectName)
-			if not succeeded:
-				logging.error('\u001B[1m OC Cluster Login Failed\u001B[0m')
-				HTML.CreateHtmlTestRow('N/A', 'KO', CONST.OC_LOGIN_FAIL)
-				return False
-			for ii in imageNames:
-					mySSH.run(f'helm uninstall {ii}', reportNonZero=False)
-			mySSH.run(f'helm spray {lSourcePath}/ci-scripts/charts/oai-5g-basic/.')
-			ret = mySSH.run(f'oc get pods', silent=True)
-			if ret.stdout.count('Running') != 9:
-				logging.error('\u001B[1m Deploying 5GCN Failed using helm chart on OC Cluster\u001B[0m')
-				for ii in imageNames:
-					mySSH.run('helm uninstall '+ ii)
-				ret = mySSH.run(f'oc get pods')
-				if re.search('No resources found', ret.stdout):
-					logging.debug('All pods uninstalled')
-					OC.OC_logout(mySSH)
-					mySSH.close()
-					HTML.CreateHtmlTestRow('N/A', 'KO', CONST.OC_PROJECT_FAIL)
-					return False
-			ret = mySSH.run(f'oc get pods', silent=True)
-			for line in ret.stdout.split('\n')[1:]:
-				columns = line.strip().split()
-				name = columns[0]
-				status = columns[2]
-				html_cell += status + '    ' + name
-				html_cell += '\n'
-			OC.OC_logout(mySSH)
 		else:
 			logging.error('This option should not occur!')
 		mySSH.close()
@@ -353,10 +311,6 @@ class EPCManagement():
 			else:
 				logging.error('no container with name oai-amf found, could not retrieve AMF IP address')
 			mySSH.close()
-		elif re.match('OC-OAI-CN5G', self.Type, re.IGNORECASE):
-			mySSH = SSH.SSHConnection()
-			mySSH.open(self.IPAddress, self.UserName, self.Password)
-			response=mySSH.command3('oc pods ls -f name=oai-amf', 10)
 
 	def CheckHSSProcess(self, status_queue):
 		try:
@@ -559,9 +513,8 @@ class EPCManagement():
 		HTML.CreateHtmlTestRow('N/A', 'OK', CONST.ALL_PROCESSES_OK)
 
 	def Terminate5GCN(self, HTML):
-		imageNames = ["mysql", "oai-nrf", "oai-amf", "oai-smf", "oai-spgwu-tiny", "oai-ausf", "oai-udm", "oai-udr", "oai-traffic-server"]
-		containerInPods = ["", "-c nrf", "-c amf", "-c smf", "-c spgwu", "-c ausf", "-c udm", "-c udr", ""]
-		mySSH = cls_cmd.getConnection(self.IPAddress)
+		mySSH = SSH.SSHConnection()
+		mySSH.open(self.IPAddress, self.UserName, self.Password)
 		message = ''
 		if re.match('ltebox', self.Type, re.IGNORECASE):
 			logging.debug('Terminating SA BOX')
@@ -592,37 +545,6 @@ class EPCManagement():
 			else:
 				message = 'No Tracking area update request'
 			logging.debug(message)
-		elif re.match('OC-OAI-CN5G', self.Type, re.IGNORECASE):
-			logging.debug('Terminating OAI CN5G on Openshift Cluster')
-			lIpAddr = self.IPAddress
-			lSourcePath = self.SourceCodePath
-			mySSH.run(f'rm -Rf {lSourcePath}/logs')
-			mySSH.run(f'mkdir -p {lSourcePath}/logs')
-			logging.debug('OC OAI CN5G - Collecting Log files to workspace')
-			succeeded = OC.OC_login(mySSH, self.OCUserName, self.OCPassword, self.OCProjectName)
-			if not succeeded:
-				logging.error('\u001B[1m OC Cluster Login Failed\u001B[0m')
-				HTML.CreateHtmlTestRow('N/A', 'KO', CONST.OC_LOGIN_FAIL)
-				return False
-			mySSH.run(f'oc describe pod &> {lSourcePath}/logs/describe-pods-post-test.log')
-			mySSH.run(f'oc get pods.metrics.k8s &> {lSourcePath}/logs/nf-resource-consumption.log')
-			for ii, ci in zip(imageNames, containerInPods):
-			       podName = mySSH.run(f"oc get pods | grep {ii} | awk \'{{print $1}}\'").stdout.strip()
-			       if not podName:
-				       logging.debug(f'{ii} pod not found!')
-				       HTML.CreateHtmlTestRow(self.Type, 'KO', CONST.INVALID_PARAMETER)
-				       HTML.CreateHtmlTabFooter(False)
-			       mySSH.run(f'oc logs -f {podName} {ci} &> {lSourcePath}/logs/{ii}.log &')
-			       mySSH.run(f'helm uninstall {ii}')
-			       podName = ''
-			mySSH.run(f'cd {lSourcePath}/logs && zip -r -qq test_logs_CN.zip *.log')
-			mySSH.copyin(f'{lSourcePath}/logs/test_logs_CN.zip','test_logs_CN.zip')
-			ret = mySSH.run(f'oc get pods', silent=True)
-			res = re.search('No resources found in oaicicd-ran namespace.', ret.stdout)
-			if res is not None:
-			       logging.debug('OC OAI CN5G components uninstalled')
-			       message = 'OC OAI CN5G components uninstalled'
-			OC.OC_logout(mySSH)
 		else:
 			logging.error('This should not happen!')
 		mySSH.close()
@@ -862,8 +784,6 @@ class EPCManagement():
 				mySSH.command('zip hss.log.zip hss_check_run.*', '\$', 60)
 		elif re.match('OAICN5G', self.Type, re.IGNORECASE):
 			logging.debug('LogCollect is bypassed for that variant')
-		elif re.match('OC-OAI-CN5G', self.Type, re.IGNORECASE):
-			logging.debug('LogCollect is bypassed for that variant')
 		elif re.match('OAI', self.Type, re.IGNORECASE) or re.match('OAI-Rel14-CUPS', self.Type, re.IGNORECASE):
 			mySSH.command('zip hss.log.zip hss*.log', '\$', 60)
 			mySSH.command('echo ' + self.Password + ' | sudo -S rm hss*.log', '\$', 5)
@@ -878,13 +798,10 @@ class EPCManagement():
 		mySSH.close()
 
 	def LogCollectMME(self):
-		if self.Type != 'OC-OAI-CN5G':
-			mySSH = SSH.SSHConnection()
-			mySSH.open(self.IPAddress, self.UserName, self.Password)
-			mySSH.command('cd ' + self.SourceCodePath + '/scripts', '\$', 5)
-			mySSH.command('rm -f mme.log.zip', '\$', 5)
-		else:
-			mySSH = cls_cmd.getConnection(self.IPAddress)
+		mySSH = SSH.SSHConnection()
+		mySSH.open(self.IPAddress, self.UserName, self.Password)
+		mySSH.command('cd ' + self.SourceCodePath + '/scripts', '\$', 5)
+		mySSH.command('rm -f mme.log.zip', '\$', 5)
 		if re.match('OAI-Rel14-Docker', self.Type, re.IGNORECASE):
 			mySSH.command('docker inspect prod-oai-mme', '\$', 10)
 			result = re.search('No such object', mySSH.getBefore())
@@ -902,10 +819,6 @@ class EPCManagement():
 			mySSH.command('cp -f /tmp/oai-cn5g-v1.5.pcap .','\$', 30)
 			mySSH.command('zip mme.log.zip oai-amf.log oai-nrf.log oai-cn5g*.pcap','\$', 30)
 			mySSH.command('mv mme.log.zip ' + self.SourceCodePath + '/scripts','\$', 30)
-		elif re.match('OC-OAI-CN5G', self.Type, re.IGNORECASE):
-			mySSH.run('cd ' + self.SourceCodePath + '/logs')
-			mySSH.run('zip mme.log.zip oai-amf.log oai-nrf.log oai-cn5g*.pcap')
-			mySSH.run('mv mme.log.zip ' + self.SourceCodePath + '/scripts')
 		elif re.match('OAI', self.Type, re.IGNORECASE) or re.match('OAI-Rel14-CUPS', self.Type, re.IGNORECASE):
 			mySSH.command('zip mme.log.zip mme*.log', '\$', 60)
 			mySSH.command('echo ' + self.Password + ' | sudo -S rm mme*.log', '\$', 5)
@@ -939,10 +852,6 @@ class EPCManagement():
 			mySSH.command('cd ' + self.SourceCodePath + '/logs','\$', 5)
 			mySSH.command('zip spgw.log.zip oai-smf.log oai-spgwu.log','\$', 30)
 			mySSH.command('mv spgw.log.zip ' + self.SourceCodePath + '/scripts','\$', 30)
-		elif re.match('OC-OAI-CN5G', self.Type, re.IGNORECASE):
-			mySSH.command('cd ' + self.SourceCodePath + '/logs','\$', 5)
-			mySSH.command('zip spgw.log.zip oai-smf.log oai-spgwu.log','\$', 30)
-			mySSH.command('mv spgw.log.zip ' + self.SourceCodePath + '/scripts','\$', 30)
 		elif re.match('OAI', self.Type, re.IGNORECASE) or re.match('OAI-Rel14-CUPS', self.Type, re.IGNORECASE):
 			mySSH.command('zip spgw.log.zip spgw*.log', '\$', 60)
 			mySSH.command('echo ' + self.Password + ' | sudo -S rm spgw*.log', '\$', 5)

ci-scripts/main.py

@@ -38,12 +38,12 @@ import helpreadme as HELP
 import constants as CONST
 
 
-import cls_oaicitest		 #main class for OAI CI test framework
-import cls_physim		 #class PhySim for physical simulators build and test
-import cls_containerize	 #class Containerize for all container-based operations on RAN/UE objects
-import cls_static_code_analysis  #class for static code analysis
-import cls_physim1		 #class PhySim for physical simulators deploy and run
-import cls_cluster		 # class for building/deploying on cluster
+import cls_oaicitest            #main class for OAI CI test framework
+import cls_physim               #class PhySim for physical simulators build and test
+import cls_containerize         #class Containerize for all container-based operations on RAN/UE objects
+import cls_static_code_analysis #class for static code analysis
+import cls_physim1          #class PhySim for physical simulators deploy and run
+import cls_cluster              # class for building/deploying on cluster
 
 import sshconnection 
 import epc
@@ -430,11 +430,7 @@ def GetParametersFromXML(action):
 		RAN.node = test.findtext('node')
 		RAN.command = test.findtext('command')
 		RAN.command_fail = test.findtext('command_fail') in ['True', 'true', 'Yes', 'yes']
-	elif action == 'Pull_Cluster_Image':
-		# CLUSTER.imageToPull.clear()
-		string_field = test.findtext('images_to_pull')
-		if (string_field is not None):
-			CLUSTER.imageToPull = string_field.split()
+
 	else:
 		logging.warning(f"unknown action {action} from option-parsing point-of-view")
 
@@ -833,9 +829,6 @@ elif re.match('^TesteNB$', mode, re.IGNORECASE) or re.match('^TestUE$', mode, re
 					HTML=ldpc.Run_NRulsimTest(HTML,CONST,id)
 					if ldpc.exitStatus==1:
 						RAN.prematureExit = True
-				elif action == 'Pull_Cluster_Image':
-					if not CLUSTER.PullClusterImage(HTML,RAN):
-						RAN.prematureExit = True
 				elif action == 'Build_Cluster_Image':
 					if not CLUSTER.BuildClusterImage(HTML):
 						RAN.prematureExit = True

ci-scripts/xml_class_list.yml

@@ -1,6 +1,5 @@
   - Build_Proxy
   - Build_Cluster_Image
-  - Pull_Cluster_Image
   - Build_PhySim
   - Run_LDPCTest
   - Run_LDPCt1Test

ci-scripts/xml_files/container_sa_aw2s_asue.xml

@@ -1,122 +0,0 @@
-<!--
-
- Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
- contributor license agreements.  See the NOTICE file distributed with
- this work for additional information regarding copyright ownership.
- The OpenAirInterface Software Alliance licenses this file to You under
- the OAI Public License, Version 1.1  (the "License"); you may not use this file
- except in compliance with the License.
- You may obtain a copy of the License at
-
-      http://www.openairinterface.org/?page_id=698
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-
- For more information about the OpenAirInterface (OAI) Software Alliance:
-      contact@openairinterface.org
-
--->
-<testCaseList>
-  <htmlTabRef>TEST-5G-AW2S</htmlTabRef>
-  <htmlTabName>20 MHz TDD SA</htmlTabName>
-  <htmlTabIcon>tasks</htmlTabIcon>
-  <repeatCount>1</repeatCount>
-  <TestCaseRequestedList>
-    010000
-    001000
-    020000
-    002000
-    002002
-    000100
-    000200
-    003000
-    004000
-    000002
-    030000
-  </TestCaseRequestedList>
-  <TestCaseExclusionList></TestCaseExclusionList>
-
-  <testCase id="010000">
-    <class>Pull_Cluster_Image</class>
-    <desc>Pull Images from Cluster</desc>
-    <images_to_pull>oai-gnb-aw2s</images_to_pull>
-  </testCase>
-
-  <testCase id="020000">
-    <class>Deploy_Object</class>
-    <desc>Deploy gNB (TDD/Band78/20MHz/aw2s) in a container</desc>
-    <yaml_path>ci-scripts/yaml_files/sa_aw2s_gnb</yaml_path>
-    <eNB_instance>0</eNB_instance>
-    <eNB_serverId>0</eNB_serverId>
-  </testCase>
-
-  <testCase id="001000">
-    <class>Initialize_UE</class>
-    <desc>Initialize Amarisoft UE</desc>
-    <id>amarisoft_ue</id>
-  </testCase>
-
-  <testCase id="002000">
-    <class>Attach_UE</class>
-    <desc>Attach UE</desc>
-    <id>amarisoft_ue_1</id>
-  </testCase>
-
-  <testCase id="002002">
-    <class>Attach_UE</class>
-    <desc>Attach UE</desc>
-    <id>amarisoft_ue_2</id>
-  </testCase>
-
-  <testCase id="000100">
-    <class>Ping</class>
-    <desc>Ping: 20pings in 20sec</desc>
-    <id>amarisoft_ue_1 amarisoft_ue_2</id>
-    <ping_args>-c 20</ping_args>
-    <ping_packetloss_threshold>1</ping_packetloss_threshold>
-    <ping_rttavg_threshold>15</ping_rttavg_threshold>
-  </testCase>
-
-  <testCase id="000200">
-    <class>Ping</class>
-    <desc>Ping: 100pings in 20sec</desc>
-    <id>amarisoft_ue_1 amarisoft_ue_2</id>
-    <ping_args>-c 100 -i 0.2</ping_args>
-    <ping_packetloss_threshold>1</ping_packetloss_threshold>
-    <ping_rttavg_threshold>15</ping_rttavg_threshold>
-  </testCase>
-
-  <testCase id="003000">
-    <class>Detach_UE</class>
-    <desc>Detach UE</desc>
-    <id>amarisoft_ue_1 amarisoft_ue_2</id>
-  </testCase>
-
-  <testCase id="004000">
-    <class>Terminate_UE</class>
-    <desc>Terminate UE</desc>
-    <id>amarisoft_ue</id>
-  </testCase>
-
-  <testCase id="000002">
-    <class>IdleSleep</class>
-    <desc>Sleep</desc>
-    <idle_sleep_time_in_sec>5</idle_sleep_time_in_sec>
-  </testCase>
-
-  <testCase id="030000">
-    <class>Undeploy_Object</class>
-    <desc>Undeploy gNB</desc>
-    <yaml_path>ci-scripts/yaml_files/sa_aw2s_gnb</yaml_path>
-    <eNB_instance>0</eNB_instance>
-    <eNB_serverId>0</eNB_serverId>
-    <d_retx_th>20,100,100,100</d_retx_th>
-    <u_retx_th>20,100,100,100</u_retx_th>
-  </testCase>
-
-</testCaseList>
-

ci-scripts/yaml_files/sa_aw2s_gnb/docker-compose.yml

@@ -1,18 +0,0 @@
-version: '3.8'
-services:
-    oai-gnb:
-        image: oai-gnb-aw2s:latest
-        privileged: true
-        network_mode: "host"
-        container_name: oai-gnb-aw2s
-        environment:
-            TZ: Europe/Paris
-            USE_VOLUMED_CONF: 'yes'
-            USE_ADDITIONAL_OPTIONS: --sa
-        volumes:
-            - ../../conf_files/gnb.sa.band78.51prb.aw2s.ddsuu.conf:/opt/oai-gnb-aw2s/etc/mounted.conf
-        healthcheck:
-            test: /bin/bash -c "pgrep nr-softmodem"
-            interval: 10s
-            timeout: 5s
-            retries: 5

cmake_targets/at_commands/CMakeLists.txt

@@ -82,7 +82,7 @@ endif()
 set_property(CACHE CMAKE_BUILD_TYPE PROPERTY STRINGS Debug Release RelWithDebInfo MinSizeRel)
 
 #
-set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -msse4.2 -std=gnu99 -Wall -Wstrict-prototypes -fno-strict-aliasing -rdynamic -funroll-loops")
+set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -msse4.2 -std=gnu99 -Wall -Wstrict-prototypes -fno-strict-aliasing -rdynamic -funroll-loops -Wno-packed-bitfield-compat ")
 set(CMAKE_C_FLAGS_DEBUG "${CMAKE_C_FLAGS_DEBUG} -ggdb -DMALLOC_CHECK_=3")
 set(CMAKE_C_FLAGS_RELWITHDEBINFO "${CMAKE_C_FLAGS_RELWITHDEBINFO} -ggdb -DMALLOC_CHECK_=3 -O2")
 

cmake_targets/autotests/test_case_list.xml

@@ -289,13 +289,11 @@
                                     (Test10: Format 2 9-bit 2/106 PRB),
                                     (Test11: Format 2 10-bit 2/106 PRB),
                                     (Test12: Format 2 11-bit 2/106 PRB),
-                                    (Test13: Format 2 12-bit 4/106 PRB),
-                                    (Test14: Format 2 19-bit 4/106 PRB),
-                                    (Test15: Format 2 12-bit 8/106 PRB),
-                                    (Test16: Format 2 19-bit 8/106 PRB),
-                                    (Test17: Format 2 32-bit 8/106 PRB),
-                                    (Test18: Format 2 32-bit 16/106 PRB),
-                                    (Test19: Format 2 64-bit 16/106 PRB)</desc>
+                                    (Test13: Format 2 12-bit 8/106 PRB),
+                                    (Test14: Format 2 19-bit 8/106 PRB),
+                                    (Test15: Format 2 32-bit 8/106 PRB),
+                                    (Test16: Format 2 32-bit 16/106 PRB),
+                                    (Test17: Format 2 64-bit 16/106 PRB)</desc>
       <main_exec>nr_pucchsim</main_exec>
       <main_exec_args>-R 106 -i 1 -P 0 -b 1 -s-2 -n1000
                       -R 106 -i 1 -P 0 -b 2 -s-2 -n1000
@@ -309,14 +307,12 @@
                       -R 106 -i 1 -P 2 -b 9 -s5 -n1000
                       -R 106 -i 1 -P 2 -b 10 -s6 -n1000
                       -R 106 -i 1 -P 2 -b 11 -s6 -n1000
-                      -R 106 -i 1 -P 2 -q4 -b 12 -s-3 -n1000
-                      -R 106 -i 1 -P 2 -q4 -b 19 -s-3 -n1000
                       -R 106 -i 1 -P 2 -q8 -b 12 -s-3 -n1000
                       -R 106 -i 1 -P 2 -q8 -b 19 -s-3 -n1000
                       -R 106 -i 1 -P 2 -q8 -b 32 -s-3 -n1000
                       -R 106 -i 1 -P 2 -q16 -b 32 -s-3 -n1000
                       -R 106 -i 1 -P 2 -q16 -b 64 -s-3 -n1000</main_exec_args>
-      <tags>test1 test2 test3 test4 test5 test6 test7 test8 test9 test10 test11 test12 test13 test14 test15 test16 test17 test18 test19</tags>
+      <tags>test1 test2 test3 test4 test5 test6 test7 test8 test9 test10 test11 test12 test13 test14 test15 test16 test17</tags>
       <search_expr_true>PUCCH test OK</search_expr_true>
       <search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
       <nruns>3</nruns>
@@ -355,24 +351,22 @@
     </testCase>
 
     <testCase id="nr_ulsim.misc">
-      <desc>nr_ulsim Test cases. (Test1: MCS 9 106 PRBs),
-                                 (Test2: MCS 16 50 PRBs),
-                                 (Test3: MCS 28 50 PRBs),
-                                 (Test4: MCS 27 50 PRBs 256QAM),
-                                 (Test5: MCS 9 217 PRBs),
-                                 (Test6: MCS 9 273 PRBs),
-                                 (Test7: PUSCH Type A, 2 DMRS Symbols),
-                                 (Test8: PUSCH Type A, 3 DMRS, 4 PTRS, 5 Interpolated Symbols),
-                                 (Test9: PUSCH Type B, 3 DMRS, 2 PTRS, 7 Interpolated Symbols),
-                                 (Test10: PUSCH Type B, 3 DMRS, 2 PTRS, 3 Interpolated Symbols),
-                                 (Test11: 25 PRBs, 15 kHz SCS),
-                                 (Test12: MCS 0, low SNR performance)
-                                 (Test13: MCS 28, 106 PRBs, Time shift 8)</desc>
+      <desc>nr_ulsim Test cases. (Test1: MCS 9, 106 PRBs),
+                                 (Test2: MCS 16, 50 PRBs),
+                                 (Test3: MCS 28, 50 PRBs),
+                                 (Test4: MCS 9, 217 PRBs),
+                                 (Test5: MCS 9, 273 PRBs),
+                                 (Test6: PUSCH Type A, 2 DMRS Symbols),
+                                 (Test7: PUSCH Type A, 3 DMRS, 4 PTRS, 5 Interpolated Symbols),
+                                 (Test8: PUSCH Type B, 3 DMRS, 2 PTRS, 7 Interpolated Symbols),
+                                 (Test9: PUSCH Type B, 3 DMRS, 2 PTRS, 3 Interpolated Symbols),
+                                 (Test10: 25 PRBs, 15 kHz SCS),
+                                 (Test11: MCS 0, low SNR performance)
+                                 (Test12: MCS 28, 106 PRBs, Time shift 8)</desc>
       <main_exec>nr_ulsim</main_exec>
       <main_exec_args>-n100 -m9 -r106 -s5
                       -n100 -m16 -s10
                       -n100 -m28 -s20
-                      -n100 -m27 -s25 -q1
                       -n100 -m9 -R217 -r217 -s5
                       -n100 -m9 -R273 -r273 -s5
                       -n100 -s5 -U 0,1,1,1
@@ -382,7 +376,7 @@
                       -n100 -u0 -m0 -R25 -r25 -i 1,0
                       -n100 -m0 -S -0.6 -i 1,0
                       -n100 -m 28 -R106 -r106 -t90 -s24 -S24 -d 8</main_exec_args>
-      <tags>test1 test2 test3 test4 test5 test6 test7 test8 test9 test10 test11 test12 test13</tags>
+      <tags>test1 test2 test3 test4 test5 test6 test7 test8 test9 test10 test11 test12</tags>
       <search_expr_true>PUSCH test OK</search_expr_true>
       <search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
       <nruns>3</nruns>
@@ -449,10 +443,7 @@
                                  (Test22: 3GPP G-FR1-A5-14, PUSCH Type B, 100 MHz BW, 30 kHz SCS, 2 RX Antennas Requirements Test),
                                  (Test23: 3GPP G-FR1-A5-14, PUSCH Type B, 100 MHz BW, 30 kHz SCS, 4 RX Antennas Requirements Test),
                                  (Test24: 3GPP G-FR1-A5-14, PUSCH Type B, 100 MHz BW, 30 kHz SCS, 8 RX Antennas Requirements Test),
-                                 (Test25: 3GPP G-FR1-A3-27, PUSCH Type B, 40 MHz BW, 30 kHz SCS, 2 RX Antennas Requirements Test, 2 layers),
-                                 (Test26: 3GPP G-FR1-A3-27, PUSCH Type B, 40 MHz BW, 30 kHz SCS, 4 RX Antennas Requirements Test, 2 layers),
-                                 (Test27: 3GPP G-FR1-A4-27, PUSCH Type B, 40 MHz BW, 30 kHz SCS, 2 RX Antennas Requirements Test, 2 layers),
-                                 (Test28: 3GPP G-FR1-A4-27, PUSCH Type B, 40 MHz BW, 30 kHz SCS, 4 RX Antennas Requirements Test, 2 layers)</desc>
+                                 (Test25: 3GPP G-FR1-A4-27, PUSCH Type B, 40 MHz BW, 30 kHz SCS, 2 RX Antennas Requirements Test, 2 layers)</desc>
       <main_exec>nr_ulsim</main_exec>
       <main_exec_args>-n100 -b14 -I7 -i 0,1 -g A,l,10 -t70 -u 1 -m20 -R106 -r106 -U 0,1,1,2 -z2 -s12.4 -S12.4
                       -n100 -b14 -I7 -i 0,1 -g A,l,10 -t70 -u 1 -m20 -R106 -r106 -U 0,1,1,2 -z4 -s8.5 -S8.5
@@ -478,11 +469,8 @@
                       -n100 -b14 -I7 -i 0,1 -g A,l,10 -t70 -u 1 -m20 -R273 -r273 -U 1,1,1,2 -z2 -s13.1 -S13.1
                       -n100 -b14 -I7 -i 0,1 -g A,l,10 -t70 -u 1 -m20 -R273 -r273 -U 1,1,1,2 -z4 -s9.2 -S9.2
                       -n100 -b14 -I8 -i 0,1 -g A,l,10 -t70 -u 1 -m20 -R273 -r273 -U 1,1,1,2 -z8 -s5.9 -S5.9
-                      -n100 -b14 -I15 -i 0,1 -g B,l -t70 -u 1 -m2 -R106 -r106 -U 1,1,1,2 -W2 -y2 -z2 -s1.7 -S1.7
-                      -n100 -b14 -I15 -i 0,1 -g B,l -t70 -u 1 -m2 -R106 -r106 -U 1,1,1,2 -W2 -y2 -z4 -s-2.1 -S-2.1
-                      -n100 -b14 -I15 -i 0,1 -g C,l -t70 -u 1 -m16 -R106 -r106 -U 1,1,1,2 -W2 -y2 -z2 -s18.7 -S18.7
-                      -n100 -b14 -I15 -i 0,1 -g C,l -t70 -u 1 -m16 -R106 -r106 -U 1,1,1,2 -W2 -y2 -z4 -s11.2 -S11.2</main_exec_args>
-      <tags>test1 test2 test3 test4 test5 test6 test7 test8 test9 test10 test11 test12 test13 test14 test15 test16 test17 test18 test19 test20 test21 test22 test23 test24 test25 test26 test27 test28</tags>
+                      -n100 -b14 -I15 -i 0,1 -g C,l -t70 -u 1 -m16 -R106 -r106 -U 1,1,1,2 -W2 -y2 -z2 -s18.7 -S18.7</main_exec_args>
+      <tags>test1 test2 test3 test4 test5 test6 test7 test8 test9 test10 test11 test12 test13 test14 test15 test16 test17 test18 test19 test20 test21 test22 test23 test24 test25</tags>
       <search_expr_true>PUSCH test OK</search_expr_true>
       <search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
       <nruns>3</nruns>

cmake_targets/nas_sim_tools/CMakeLists.txt

@@ -10,7 +10,7 @@ add_definitions(-std=gnu99)
 ENABLE_LANGUAGE(C)
 
 set(CMAKE_C_FLAGS
-  "${CMAKE_C_FLAGS} ${C_FLAGS_PROCESSOR} -Werror -Wall -Wstrict-prototypes -g")
+  "${CMAKE_C_FLAGS} ${C_FLAGS_PROCESSOR} -Werror -Wall -Wstrict-prototypes -Wno-packed-bitfield-compat -g")
 
 set(OPENAIR_DIR     $ENV{OPENAIR_DIR})
 set(OPENAIR3_DIR    $ENV{OPENAIR_DIR}/openair3)

cmake_targets/phy_simulators/CMakeLists.txt

@@ -0,0 +1,22 @@
+cmake_minimum_required(VERSION 2.8)
+project (OpenAirInterface)
+set ( CMAKE_BUILD_TYPE  )
+set ( CFLAGS_PROCESSOR_USER "" )
+set ( UE_EXPANSION False )
+set ( PRE_SCD_THREAD False )
+set ( ENABLE_VCD_FIFO False )
+set ( RF_BOARD "None")
+set ( TRANSP_PRO "None")
+set ( PACKAGE_NAME "")
+set ( DEADLINE_SCHEDULER "False" )
+set ( CPU_AFFINITY "False" )
+set ( T_TRACER True )
+set ( UE_AUTOTEST_TRACE False )
+set ( UE_DEBUG_TRACE False )
+set ( UE_TIMING_TRACE False )
+set ( USRP_REC_PLAY False )
+set ( NOAVX512 False )
+set ( SKIP_SHARED_LIB_FLAG False )
+set ( PHYSIM True)
+set ( RU 0)
+include(${CMAKE_CURRENT_SOURCE_DIR}/../CMakeLists.txt)

cmake_targets/tools/build_helper

@@ -694,6 +694,7 @@ install_simde_from_source(){
     $SUDO rm -rf /tmp/simde
     git clone https://github.com/simd-everywhere/simde-no-tests.git /tmp/simde
     cd /tmp/simde
+    git checkout v0.7.2
     # brute force copy into /usr/include
     $SUDO \cp -rv ../simde /usr/include
 }

common/platform_constants.h

@@ -81,7 +81,7 @@
 #define RLC_TX_MAXSIZE       10000000
 #define RLC_RX_MAXSIZE       10000000
 #define SEND_MRW_ON 240
-#define MAX_ANT 8
+
 // CBA constant
 #define NUM_MAX_CBA_GROUP 4
 

common/utils/LOG/log.c

@@ -50,7 +50,11 @@
 
 // Fixme: a better place to be shure it is called 
 void read_cpu_hardware (void) __attribute__ ((constructor));
-void read_cpu_hardware (void) {__builtin_cpu_init(); }
+#if !defined(__arm__) && !defined(__aarch64__) 
+  void read_cpu_hardware (void) {__builtin_cpu_init(); }
+#else 
+  void read_cpu_hardware (void) {}
+#endif
 
 log_mem_cnt_t log_mem_d[2];
 int log_mem_flag=0;

common/utils/nr/nr_common.c

@@ -36,21 +36,21 @@
 
 const char *duplex_mode[]={"FDD","TDD"};
 
-int tables_5_3_2[5][12] = {
-  {25, 52, 79, 106, 133, 160, 216, 270, -1, -1, -1, -1}, // 15 FR1
-  {11, 24, 38, 51, 65, 78, 106, 133, 162, 217, 245, 273},// 30 FR1
-  {-1, 11, 18, 24, 31, 38, 51, 65, 79, 107, 121, 135},   // 60 FR1
-  {66, 132, 264, -1 , -1, -1, -1, -1, -1, -1, -1, -1},   // 60 FR2
-  {32, 66, 132, 264, -1, -1, -1, -1, -1, -1, -1, -1}     // 120FR2
+int tables_5_3_2[5][11] = {
+  {25, 52, 79, 106, 133, 160, 216, 270, -1, -1, -1}, // 15 FR1
+  {11, 24, 38, 51, 65, 78, 106, 133, 162, 217, 273}, // 30 FR1
+  {-1, 11, 18, 24, 31, 38, 51, 65, 79, 107, 135},    // 60 FR1
+  {66, 132, 264, -1 , -1, -1, -1, -1, -1, -1, -1},   // 60 FR2
+  {32, 66, 132, 264, -1, -1, -1, -1, -1, -1, -1}     // 120FR2
 };
 
-int get_supported_band_index(int scs, int band, int n_rbs)
-{
+int get_supported_band_index(int scs, int band, int n_rbs){
+
   int scs_index = scs;
-  if (band > 256)
+  if (band>256)
     scs_index++;
-  for (int i = 0; i < 12; i++) {
-    if(n_rbs == tables_5_3_2[scs_index][i])
+  for (int i=0; i<11; i++) {
+    if(n_rbs == tables_5_3_2[scs][i])
       return i;
   }
   return (-1); // not found
@@ -130,66 +130,6 @@ const nr_bandentry_t nr_bandtable[] = {
   {261,27500040,28350000,27500040,28350000,  2,2070833, 120}
 };
 
-int get_supported_bw_mhz(frequency_range_t frequency_range, int bw_index)
-{
-  if (frequency_range == FR1) {
-    switch (bw_index) {
-      case 0 :
-        return 5; // 5MHz
-      case 1 :
-        return 10;
-      case 2 :
-        return 15;
-      case 3 :
-        return 20;
-      case 4 :
-        return 25;
-      case 5 :
-        return 30;
-      case 6 :
-        return 40;
-      case 7 :
-        return 50;
-      case 8 :
-        return 60;
-      case 9 :
-        return 80;
-      case 10 :
-        return 90;
-      case 11 :
-        return 100;
-      default :
-        AssertFatal(false, "Invalid band index for FR1 %d\n", bw_index);
-    }
-  }
-  else {
-    switch (bw_index) {
-      case 0 :
-        return 50; // 50MHz
-      case 1 :
-        return 100;
-      case 2 :
-        return 200;
-      case 3 :
-        return 400;
-      default :
-        AssertFatal(false, "Invalid band index for FR2 %d\n", bw_index);
-    }
-  }
-}
-
-bool compare_relative_ul_channel_bw(int nr_band, int scs, int nb_ul, frame_type_t frame_type)
-{
-  // 38.101-1 section 6.2.2
-  // Relative channel bandwidth <= 4% for TDD bands and <= 3% for FDD bands
-  int index = get_nr_table_idx(nr_band, scs);
-  int bw_index = get_supported_band_index(scs, nr_band, nb_ul);
-  int band_size_khz = get_supported_bw_mhz(nr_band > 256 ? FR2 : FR1, bw_index) * 1000;
-  float limit = frame_type == TDD ? 0.04 : 0.03;
-  float rel_bw = (float) (2 * band_size_khz) / (float) (nr_bandtable[index].ul_max + nr_bandtable[index].ul_min);
-  return rel_bw <= limit;
-}
-
 uint16_t get_band(uint64_t downlink_frequency, int32_t delta_duplex)
 {
   const int64_t dl_freq_khz = downlink_frequency / 1000;
@@ -382,6 +322,118 @@ int32_t get_delta_duplex(int nr_bandP, uint8_t scs_index)
   return delta_duplex;
 }
 
+uint16_t config_bandwidth(int mu, int nb_rb, int nr_band)
+{
+
+  if (nr_band < 100)  { //FR1
+   switch(mu) {
+    case 0 :
+      if (nb_rb<=25)
+        return 5;
+      if (nb_rb<=52)
+        return 10;
+      if (nb_rb<=79)
+        return 15;
+      if (nb_rb<=106)
+        return 20;
+      if (nb_rb<=133)
+        return 25;
+      if (nb_rb<=160)
+        return 30;
+      if (nb_rb<=216)
+        return 40;
+      if (nb_rb<=270)
+        return 50;
+      AssertFatal(1==0,"Number of DL resource blocks %d undefined for mu %d and band %d\n", nb_rb, mu, nr_band);
+      break;
+    case 1 :
+      if (nb_rb<=11)
+        return 5;
+      if (nb_rb<=24)
+        return 10;
+      if (nb_rb<=38)
+        return 15;
+      if (nb_rb<=51)
+        return 20;
+      if (nb_rb<=65)
+        return 25;
+      if (nb_rb<=78)
+        return 30;
+      if (nb_rb<=106)
+        return 40;
+      if (nb_rb<=133)
+        return 50;
+      if (nb_rb<=162)
+        return 60;
+      if (nb_rb<=189)
+        return 70;
+      if (nb_rb<=217)
+        return 80;
+      if (nb_rb<=245)
+        return 90;
+      if (nb_rb<=273)
+        return 100;
+      AssertFatal(1==0,"Number of DL resource blocks %d undefined for mu %d and band %d\n", nb_rb, mu, nr_band);
+      break;
+    case 2 :
+      if (nb_rb<=11)
+        return 10;
+      if (nb_rb<=18)
+        return 15;
+      if (nb_rb<=24)
+        return 20;
+      if (nb_rb<=31)
+        return 25;
+      if (nb_rb<=38)
+        return 30;
+      if (nb_rb<=51)
+        return 40;
+      if (nb_rb<=65)
+        return 50;
+      if (nb_rb<=79)
+        return 60;
+      if (nb_rb<=93)
+        return 70;
+      if (nb_rb<=107)
+        return 80;
+      if (nb_rb<=121)
+        return 90;
+      if (nb_rb<=135)
+        return 100;
+      AssertFatal(1==0,"Number of DL resource blocks %d undefined for mu %d and band %d\n", nb_rb, mu, nr_band);
+      break;
+    default:
+      AssertFatal(1==0,"Numerology %d undefined for band %d in FR1\n", mu,nr_band);
+   }
+  }
+  else {
+   switch(mu) {
+    case 2 :
+      if (nb_rb<=66)
+        return 50;
+      if (nb_rb<=132)
+        return 100;
+      if (nb_rb<=264)
+        return 200;
+      AssertFatal(1==0,"Number of DL resource blocks %d undefined for mu %d and band %d\n", nb_rb, mu, nr_band);
+      break;
+    case 3 :
+      if (nb_rb<=32)
+        return 50;
+      if (nb_rb<=66)
+        return 100;
+      if (nb_rb<=132)
+        return 200;
+      if (nb_rb<=264)
+        return 400;
+      AssertFatal(1==0,"Number of DL resource blocks %d undefined for mu %d and band %d\n", nb_rb, mu, nr_band);
+      break;
+    default:
+      AssertFatal(1==0,"Numerology %d undefined for band %d in FR1\n", mu,nr_band);
+   }
+  }
+}
+
 // Returns the corresponding row index of the NR table
 int get_nr_table_idx(int nr_bandP, uint8_t scs_index) {
   int scs_khz = 15 << scs_index;

common/utils/nr/nr_common.h

@@ -76,6 +76,7 @@ int get_first_ul_slot(int nrofDownlinkSlots, int nrofDownlinkSymbols, int nrofUp
 int cce_to_reg_interleaving(const int R, int k, int n_shift, const int C, int L, const int N_regs);
 int get_SLIV(uint8_t S, uint8_t L);
 void get_coreset_rballoc(uint8_t *FreqDomainResource,int *n_rb,int *rb_offset);
+uint16_t config_bandwidth(int mu, int nb_rb, int nr_band);
 int get_nr_table_idx(int nr_bandP, uint8_t scs_index);
 int32_t get_delta_duplex(int nr_bandP, uint8_t scs_index);
 frame_type_t get_frame_type(uint16_t nr_bandP, uint8_t scs_index);
@@ -92,8 +93,6 @@ int get_nb_periods_per_frame(uint8_t tdd_period);
 int get_supported_band_index(int scs, int band, int n_rbs);
 long rrc_get_max_nr_csrs(const int max_rbs, long b_SRS);
 void get_K1_K2(int N1, int N2, int *K1, int *K2);
-bool compare_relative_ul_channel_bw(int nr_band, int scs, int nb_ul, frame_type_t frame_type);
-int get_supported_bw_mhz(frequency_range_t frequency_range, int bw_index);
 void get_samplerate_and_bw(int mu,
                            int n_rb,
                            int8_t threequarter_fs,

common/utils/ocp_itti/intertask_interface.h

@@ -64,9 +64,6 @@ typedef struct itti_lte_time_s {
 
 
 typedef struct IttiMsgEmpty_s {
-  // This dummy element is to avoid CLANG warning: empty struct has size 0 in C, size 1 in C++
-  // To be removed if the structure is filled
-  uint32_t dummy;
 } IttiMsgEmpty;
 
 typedef struct IttiMsgText_s {

common/utils/telnetsrv/telnetsrv_5Gue_measurements.c

@@ -96,7 +96,10 @@ void measurcmd_display_phyta(telnet_printfunc_t prnt)
   PHY_VARS_NR_UE *UE = PHY_vars_UE_g[0][0];
   prnt("%s PHY TA stats\n", HDR);
   prnt("N_TA_offset %d\n", UE->N_TA_offset);
-  prnt("TA command %d\n", UE->ta_command);
+  for (int i = 0; i < UE->n_connected_gNB; ++i) {
+    NR_UL_TIME_ALIGNMENT_t *ta = &UE->ul_time_alignment[i];
+    prnt("gNB %d TA command %d TA total %d TAG ID %d\n", i, ta->ta_command, ta->ta_total, ta->tag_id);
+  }
   prnt("timing_advance %d (samples)\n", UE->timing_advance);
 }
 /*

common/utils/threadPool/measurement_display.c

@@ -52,8 +52,9 @@ int main(int argc, char *argv[]) {
 
   while ( 1 ) {
     if ( read(fd,&doneRequest, sizeof(doneRequest)) ==  sizeof(doneRequest)) {
-      printf("%lu" SEP "%lu" SEP "%lu" SEP "%lu" "\n",
+      printf("%lu" SEP "%d" SEP "%lu" SEP "%lu" SEP "%lu" "\n",
              doneRequest.key,
+             doneRequest.cpuid,
              (doneRequest.startProcessingTime-doneRequest.creationTime)/cpuCyclesMicroSec,
              (doneRequest.endProcessingTime-doneRequest.startProcessingTime)/cpuCyclesMicroSec,
              (doneRequest.returnTime-doneRequest.endProcessingTime)/cpuCyclesMicroSec

common/utils/threadPool/thread-pool.c

@@ -81,7 +81,7 @@ void *one_thread(void *arg) {
       break;
     }
 
-    if (tp->measurePerf) elt->startProcessingTime=rdtsc_oai();
+    if (tp->measurePerf) {elt->cpuid=sched_getcpu(); elt->startProcessingTime=rdtsc_oai();}
 
     elt->processingFunc(NotifiedFifoData(elt));
 

common/utils/threadPool/thread-pool.h

@@ -32,6 +32,7 @@
 #include "assertions.h"
 #include "common/utils/time_meas.h"
 #include "common/utils/system.h"
+#define USE_SLEEP 1
 
 #ifdef DEBUG
   #define THREADINIT   PTHREAD_ERRORCHECK_MUTEX_INITIALIZER_NP
@@ -47,6 +48,11 @@
 #define mutextrylock(mutex)   pthread_mutex_trylock(&mutex)
 #define mutexunlock(mutex) {int ret=pthread_mutex_unlock(&mutex); \
                             AssertFatal(ret==0,"ret=%d\n",ret);}
+#ifdef USE_SLEEP
+  #undef mutexlock
+  #define mutexlock(mutex) {int ret=mutextrylock(mutex); \
+                            while (ret!=0) {usleep(1); ret=mutextrylock(mutex);}}
+#endif
 #define condwait(condition, mutex) {int ret=pthread_cond_wait(&condition, &mutex); \
                                     AssertFatal(ret==0,"ret=%d\n",ret);}
 #define condbroadcast(signal) {int ret=pthread_cond_broadcast(&signal); \
@@ -64,6 +70,7 @@ typedef struct notifiedFIFO_elt_s {
   oai_cputime_t startProcessingTime;
   oai_cputime_t endProcessingTime;
   oai_cputime_t returnTime;
+  int      cpuid;
   void *msgData;
 }  notifiedFIFO_elt_t;
 
@@ -129,6 +136,7 @@ static inline void pushNotifiedFIFO_nothreadSafe(notifiedFIFO_t *nf, notifiedFIF
   nf->inF = msg;
 }
 
+
 static inline void pushNotifiedFIFO(notifiedFIFO_t *nf, notifiedFIFO_elt_t *msg) {
   mutexlock(nf->lockF);
   if (!nf->abortFIFO) {

common/utils/thread_pool/README.md

@@ -0,0 +1,2 @@
+Thread Pool implemented in C following the talk of Sean Parent "Better Code: Concurrency" from 2016
+

common/utils/thread_pool/main.c

@@ -0,0 +1,29 @@
+#include <assert.h>
+#include <stdlib.h>
+#include "task_manager.h"
+#include "../common_task.h"
+
+int main()
+{
+  task_manager_t man;
+  init_task_manager(&man, NUM_THREADS);
+
+  pair_t* arr = calloc(NUM_JOBS, sizeof(pair_t));
+  assert(arr != NULL);
+
+//  wake_and_spin_task_manager(&man);
+
+  for(int i = 0; i < NUM_JOBS; ++i){
+    arr[i] = fill_pair(i); 
+    task_t t = {.args = &arr[i], t.func = do_work};
+    async_task_manager(&man, t);
+  }
+
+//  stop_spin_task_manager(&man);
+  wait_all_spin_task_manager(&man); 
+  free(arr);
+  free_task_manager(&man, NULL);
+
+  return EXIT_SUCCESS;
+}
+

common/utils/thread_pool/notification_queue.c

@@ -0,0 +1,188 @@
+#include "notification_queue.h"
+
+#include <assert.h>
+#include <errno.h>
+#include <stdatomic.h>
+#include <string.h>
+
+void init_not_q(not_q_t* q)
+{
+  assert(q != NULL);
+
+  q->done = 0;
+  init_seq_ring_task(&q->r);
+
+  pthread_mutexattr_t attr = {0};
+#ifdef _DEBUG
+  int const rc_mtx = pthread_mutexattr_settype(&attr, PTHREAD_MUTEX_ERRORCHECK);
+  assert(rc_mtx == 0);
+#endif
+  int rc = pthread_mutex_init(&q->mtx, &attr);
+  assert(rc == 0 && "Error while creating the mtx");
+
+  pthread_condattr_t* c_attr = NULL; 
+  rc = pthread_cond_init(&q->cv, c_attr);
+  assert(rc == 0);
+  q->spin = false;
+}
+
+void free_not_q(not_q_t* q, void (*clean)(task_t*) )
+{
+  assert(q != NULL);
+  assert(q->done == 1);
+
+  free_seq_ring_task(&q->r, clean);
+
+  int rc = pthread_mutex_destroy(&q->mtx);
+  assert(rc == 0);
+
+  rc = pthread_cond_destroy(&q->cv);
+  assert(rc == 0);
+}
+
+bool try_push_not_q(not_q_t* q, task_t t)
+{
+  assert(q != NULL);
+  assert(q->done == 0 || q->done ==1);
+  assert(t.func != NULL);
+  assert(t.args != NULL);
+
+  if(pthread_mutex_trylock(&q->mtx ) != 0)
+    return false;
+
+  push_back_seq_ring_task(&q->r, t);
+
+  int rc = pthread_mutex_unlock(&q->mtx);
+  assert(rc == 0);
+
+  pthread_cond_signal(&q->cv);
+
+  return true;
+}
+
+void push_not_q(not_q_t* q, task_t t)
+{
+  assert(q != NULL);
+  assert(q->done == 0 || q->done ==1);
+  assert(t.func != NULL);
+  //assert(t.args != NULL);
+
+  int rc = pthread_mutex_lock(&q->mtx);
+  assert(rc == 0);
+
+  push_back_seq_ring_task(&q->r, t);
+
+  pthread_mutex_unlock(&q->mtx);
+
+  pthread_cond_signal(&q->cv);
+}
+
+ret_try_t try_pop_not_q(not_q_t* q)
+{
+  assert(q != NULL);
+
+  ret_try_t ret = {.success = false}; 
+
+  int rc = pthread_mutex_trylock(&q->mtx);
+  assert(rc == 0 || rc == EBUSY);
+
+  if(rc == EBUSY)
+    return ret;
+
+  assert(q->done == 0 || q->done ==1);
+
+  size_t sz = size_seq_ring_task(&q->r); 
+  if(sz == 0){
+    rc = pthread_mutex_unlock(&q->mtx);
+    assert(rc == 0);
+
+    return ret;
+  }
+
+  ret.t = pop_seq_ring_task(&q->r);
+
+  rc = pthread_mutex_unlock(&q->mtx);
+  assert(rc == 0);
+  ret.success = true; 
+
+  return ret;
+}
+
+bool pop_not_q(not_q_t* q, ret_try_t* out)
+{
+  assert(q != NULL);
+  assert(out != NULL);
+
+  int rc = pthread_mutex_lock(&q->mtx);
+  assert(rc == 0);
+  assert(q->done == 0 || q->done ==1);
+
+label:
+  while(size_seq_ring_task(&q->r) == 0 && q->done == 0 && q->spin == false)
+    pthread_cond_wait(&q->cv , &q->mtx);
+
+  if(q->done == 1){
+    int const rc = pthread_mutex_unlock(&q->mtx);
+    assert(rc == 0);
+    return false;
+  }
+
+  if(q->spin){
+    int rc = pthread_mutex_unlock(&q->mtx);
+    assert(rc == 0);
+
+   // Wait for lock to be released without generating cache misses
+    while (atomic_load_explicit(&q->spin, memory_order_relaxed)){
+      // Issue X86 PAUSE or ARM YIELD instruction to reduce contention between
+      // hyper-threads
+      pause_or_yield();
+    }
+
+    rc = pthread_mutex_lock(&q->mtx);
+    assert(rc == 0);
+  }
+
+  if(size_seq_ring_task(&q->r) == 0)
+    goto label;
+
+  out->t = pop_seq_ring_task(&q->r);
+
+  rc = pthread_mutex_unlock(&q->mtx);
+  assert(rc == 0);
+
+  return true;
+}
+
+void done_not_q(not_q_t* q)
+{
+  assert(q != NULL);
+
+  int rc = pthread_mutex_lock(&q->mtx);
+  assert(rc == 0);
+  
+  q->done = 1;
+
+  rc = pthread_mutex_unlock(&q->mtx);
+  assert(rc == 0);
+
+  rc = pthread_cond_signal(&q->cv);
+  assert(rc == 0);
+}
+
+void wake_spin_not_q(not_q_t* q)
+{
+  assert(q != NULL);
+
+  // spin until acquired i.e., q->spin == true
+  while(atomic_exchange_explicit(&q->spin, true, memory_order_acquire)); 
+
+  pthread_cond_signal(&q->cv);
+}
+
+void stop_spin_not_q(not_q_t* q)
+{
+  assert(q != NULL);
+
+  atomic_store_explicit(&q->spin, false, memory_order_release);
+}
+

common/utils/thread_pool/notification_queue.h

@@ -0,0 +1,44 @@
+#ifndef NOTIFICATION_QUEUE_THREAD_POOL_H
+#define NOTIFICATION_QUEUE_THREAD_POOL_H 
+
+#include "task.h"
+#include "seq_ring_task.h"
+
+#include <pthread.h>
+#include <stdbool.h>
+
+typedef struct {
+  pthread_mutex_t mtx;
+  pthread_cond_t cv;
+  seq_ring_task_t r;
+  int done;
+
+  _Atomic bool spin;
+} not_q_t;
+
+typedef struct{
+  task_t t;
+  bool success;
+} ret_try_t;
+
+void init_not_q(not_q_t* q);
+
+void free_not_q(not_q_t* q, void (*clean)(task_t*) );
+
+bool try_push_not_q(not_q_t* q, task_t t);
+
+void push_not_q(not_q_t* q, task_t t);
+
+ret_try_t try_pop_not_q(not_q_t* q);
+
+bool pop_not_q(not_q_t* q, ret_try_t* out);
+
+void done_not_q(not_q_t* q);
+
+void wake_spin_not_q(not_q_t* q);
+
+void stop_spin_not_q(not_q_t* q);
+
+
+#endif
+

common/utils/thread_pool/seq_ring_task.c

@@ -0,0 +1,121 @@
+/*
+MIT License
+
+Copyright (c) 2021 Mikel Irazabal
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in all
+copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+SOFTWARE.
+*/
+
+
+#include "seq_ring_task.h"
+
+#include <assert.h>
+#include <stdlib.h>
+#include <string.h>
+#include <stdio.h>
+
+// For working correctly, maintain the default elements to a multiple of 2
+#define DEFAULT_ELM 32
+
+inline static
+uint32_t mask(uint32_t cap, uint32_t val)
+{
+
+  return val & (cap-1);
+}
+
+static 
+bool full(seq_ring_task_t* r)
+{
+  return size_seq_ring_task(r) == r->cap -1;
+}
+
+static
+void enlarge_buffer(seq_ring_task_t* r)
+{
+  assert(r != NULL);
+  assert(full(r));
+
+  const uint32_t factor = 2;
+  task_t* tmp_buffer = calloc(r->cap * factor, sizeof(task_t) );
+  assert(tmp_buffer != NULL);
+
+  const uint32_t head_pos = mask(r->cap, r->head);
+  const uint32_t tail_pos = mask(r->cap, r->tail);
+
+  if(head_pos > tail_pos){
+    memcpy(tmp_buffer, r->array + tail_pos , (head_pos-tail_pos)*sizeof(task_t) );
+  } else {
+    memcpy(tmp_buffer, r->array + tail_pos, (r->cap-tail_pos)*sizeof(task_t));
+    memcpy(tmp_buffer + (r->cap-tail_pos), r->array, head_pos*sizeof(task_t));
+  }
+  r->cap *= factor;
+  free(r->array);
+  r->array = tmp_buffer;
+  r->tail = 0;
+  r->head = r->cap/2 - 1;
+}
+
+void init_seq_ring_task(seq_ring_task_t* r)
+{
+  assert(r != NULL);
+  task_t* tmp_buffer = calloc(DEFAULT_ELM, sizeof(task_t)); 
+  assert(tmp_buffer != NULL);
+  seq_ring_task_t tmp = {.array = tmp_buffer, .head = 0, .tail = 0, .cap = DEFAULT_ELM};
+  memcpy(r, &tmp, sizeof(seq_ring_task_t));
+}
+
+void free_seq_ring_task(seq_ring_task_t* r, seq_free_func fp)
+{
+  assert(r != NULL);
+  assert(fp == NULL);
+  free(r->array);
+}
+
+
+void push_back_seq_ring_task(seq_ring_task_t* r, task_t t)
+{
+  assert(r != NULL);
+
+  if(full(r))
+    enlarge_buffer(r);
+  
+  const uint32_t pos = mask(r->cap, r->head);
+  r->array[pos] = t;
+  r->head += 1;
+}
+
+task_t pop_seq_ring_task(seq_ring_task_t* r )
+{
+  assert(r != NULL);
+  assert(size_seq_ring_task(r) > 0);
+
+  const uint32_t pos = mask(r->cap, r->tail);
+  task_t t = r->array[pos];
+  r->tail += 1; 
+  return t;
+}
+
+size_t size_seq_ring_task(seq_ring_task_t* r)
+{
+  assert(r != NULL);
+
+  return r->head - r->tail;
+}
+

common/utils/thread_pool/seq_ring_task.h

@@ -0,0 +1,77 @@
+/*
+MIT License
+
+Copyright (c) 2021 Mikel Irazabal
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in all
+copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+SOFTWARE.
+*/
+
+
+#ifndef SEQ_CIRCULAR_BUFFER_TASK_H
+#define SEQ_CIRCULAR_BUFFER_TASK_H
+
+#include <stdbool.h>
+#include <stddef.h>
+#include <stdint.h>
+#include "task.h"
+
+typedef struct seq_ring_buf_s
+{
+//  const size_t elt_size;
+  task_t* array;
+
+  size_t cap;
+  uint32_t head;
+  uint32_t tail;
+} seq_ring_task_t;
+
+typedef void (*seq_free_func)(task_t*); 
+
+void init_seq_ring_task(seq_ring_task_t*);
+
+void free_seq_ring_task(seq_ring_task_t*, seq_free_func);
+
+void push_back_seq_ring_task(seq_ring_task_t* arr, task_t t);
+
+task_t pop_seq_ring_task(seq_ring_task_t* arr);
+
+size_t size_seq_ring_task(seq_ring_task_t* r);
+
+/*
+void seq_ring_erase(seq_ring_t*, void*, void*);
+
+void seq_ring_swap(seq_ring_t*, void*, void*);
+
+size_t seq_ring_size(seq_ring_t*);
+
+void* seq_ring_front(seq_ring_t*);
+
+void* seq_ring_next(seq_ring_t*, void*);
+
+void* seq_ring_end(seq_ring_t*);
+
+void* seq_ring_at(seq_ring_t* , uint32_t );
+
+int32_t seq_ring_dist(seq_ring_t*, void*, void*);
+
+bool seq_ring_equal(void*,void*);
+*/
+
+#endif
+

common/utils/thread_pool/task.h

@@ -0,0 +1,18 @@
+#ifndef TASK_WORK_STEALING_THREAD_POOL_H
+#define TASK_WORK_STEALING_THREAD_POOL_H 
+
+#if defined (__i386__) || defined(__x86_64__)
+  #define pause_or_yield  __builtin_ia32_pause
+#elif __aarch64__
+  #define pause_or_yield() asm volatile("yield" ::: "memory")
+#else
+    static_assert(0!=0, "Unknown CPU architecture");
+#endif
+
+typedef struct{
+  void* args;
+  void (*func)(void* args);
+} task_t;
+
+#endif
+

common/utils/thread_pool/task_manager.c

@@ -0,0 +1,192 @@
+#include "task_manager.h"
+
+#include <assert.h> 
+#include <stdlib.h>
+
+typedef struct{
+  task_manager_t* man;
+  int idx;
+} task_thread_args_t;
+
+static
+void* worker_thread(void* arg)
+{
+  assert(arg != NULL);
+
+  task_thread_args_t* args = (task_thread_args_t*)arg; 
+  int const idx = args->idx;
+  task_manager_t* man = args->man;
+
+  uint32_t const len = man->len_thr;
+  uint32_t const num_it = 2*(man->len_thr + idx); 
+
+  for(;;){
+
+    ret_try_t ret = {.success = false}; 
+
+    for(uint32_t i = idx; i < num_it; ++i){
+      ret = try_pop_not_q(&man->q_arr[i%len]);
+      if(ret.success == true){
+        break;
+      } 
+    }
+
+    if(ret.success == false && pop_not_q(&man->q_arr[idx], &ret) == false)
+      break;
+
+    //int64_t now = time_now_us();
+    //printf("Before func %ld id %lu \n", now , pthread_self() );
+    ret.t.func(ret.t.args); 
+    //printf("After func %ld id %lu elapsed %ld \n", time_now_us(), pthread_self(), time_now_us()-now );
+
+    atomic_fetch_sub(&man->num_task, 1); 
+
+    if(man->num_task < 1 && man->waiting != 0){
+
+        pthread_mutex_lock(&man->wait_mtx);
+       
+        man->waiting = 0;
+        pthread_cond_signal(&man->wait_cv); 
+        
+        pthread_mutex_unlock(&man->wait_mtx);
+    }
+
+  }
+
+  free(args);
+  return NULL;
+}
+
+void init_task_manager(task_manager_t* man, uint32_t num_threads)
+{
+  assert(man != NULL);
+  assert(num_threads > 0 && num_threads < 33 && "Do you have zero or more than 32 processors??");
+
+  man->q_arr = calloc(num_threads, sizeof(not_q_t));
+  assert(man->q_arr != NULL && "Memory exhausted");
+    
+  for(uint32_t i = 0; i < num_threads; ++i){
+    init_not_q(&man->q_arr[i]);   
+  }
+
+  man->index = 0;
+
+  // Waiting all
+  man->waiting = 0;
+
+  pthread_mutexattr_t attr = {0};
+#ifdef _DEBUG
+  int const rc_mtx = pthread_mutexattr_settype(&attr, PTHREAD_MUTEX_ERRORCHECK);
+  assert(rc_mtx == 0);
+#endif
+  int rc = pthread_mutex_init(&man->wait_mtx, &attr);
+  assert(rc == 0 && "Error while creating the mtx");
+
+  pthread_condattr_t* c_attr = NULL; 
+  rc = pthread_cond_init(&man->wait_cv, c_attr);
+  assert(rc == 0);
+
+  man->t_arr = calloc(num_threads, sizeof(pthread_t));
+  assert(man->t_arr != NULL && "Memory exhausted" );
+  man->len_thr = num_threads;
+
+  for(uint32_t i = 0; i < num_threads; ++i){
+    task_thread_args_t* args = malloc(sizeof(task_thread_args_t) ); 
+    args->idx = i;
+    args->man = man;
+
+    int rc = pthread_create(&man->t_arr[i], NULL, worker_thread, args);
+    assert(rc == 0);
+  }
+
+}
+
+void free_task_manager(task_manager_t* man, void (*clean)(task_t*))
+{
+  for(uint32_t i = 0; i < man->len_thr; ++i){
+    done_not_q(&man->q_arr[i]);
+  }
+
+  for(uint32_t i = 0; i < man->len_thr; ++i){
+    pthread_join(man->t_arr[i], NULL); 
+  }
+
+  for(uint32_t i = 0; i < man->len_thr; ++i){
+    free_not_q(&man->q_arr[i], clean); 
+  }
+
+  free(man->q_arr);
+
+  free(man->t_arr);
+
+  int rc = pthread_mutex_destroy(&man->wait_mtx);
+  assert(rc == 0);
+
+  rc = pthread_cond_destroy(&man->wait_cv);
+  assert(rc == 0);
+}
+
+void async_task_manager(task_manager_t* man, task_t t)
+{
+  assert(man != NULL);
+  assert(t.func != NULL);
+  //assert(t.args != NULL);
+
+  uint64_t const index = man->index++;
+  const int32_t len_thr = man->len_thr;
+  for(int32_t i = 0; i < len_thr ; ++i){
+    if(try_push_not_q(&man->q_arr[(i+index) % len_thr], t)){
+      atomic_fetch_add(&man->num_task, 1); 
+      return;
+    }
+  }
+
+  push_not_q(&man->q_arr[index%len_thr], t);
+  atomic_fetch_add(&man->num_task, 1); 
+}
+
+void wait_all_task_manager(task_manager_t* man)
+{
+  assert(man != NULL);
+
+  pthread_mutex_lock(&man->wait_mtx);
+  man->waiting = 1;
+
+  while(man->num_task > 0 && man->waiting != 0) 
+    pthread_cond_wait(&man->wait_cv, &man->wait_mtx);
+
+  pthread_mutex_unlock(&man->wait_mtx);
+}
+
+void wait_all_spin_task_manager(task_manager_t* man)
+{
+  assert(man != NULL);
+
+  // Wait without generating cache misses
+  while (atomic_load_explicit(&man->num_task, memory_order_relaxed)){
+    // Issue X86 PAUSE or ARM YIELD instruction to reduce contention between
+    // hyper-threads
+    pause_or_yield();
+  }
+}
+
+void wake_and_spin_task_manager(task_manager_t* man)
+{
+  assert(man != NULL);
+
+  const int32_t len_thr = man->len_thr;
+  for(int i = 0; i < len_thr; ++i){
+     wake_spin_not_q(&man->q_arr[i]);
+  }
+}
+
+void stop_spin_task_manager(task_manager_t* man)
+{
+  assert(man != NULL);
+
+  const int32_t len_thr = man->len_thr;
+  for(int i =0; i < len_thr; ++i){
+    stop_spin_not_q(&man->q_arr[i]);
+  }
+}
+

common/utils/thread_pool/task_manager.h

@@ -0,0 +1,49 @@
+#ifndef TASK_MANAGER_WORKING_STEALING_H
+#define TASK_MANAGER_WORKING_STEALING_H 
+
+#define TASK_MANAGER
+//#define FIBONACCI
+//#define OMP_TP 1
+
+#include "task.h"
+#include "notification_queue.h"
+
+#include <pthread.h>
+#include <stdatomic.h>
+#include <stdint.h>
+
+typedef struct {
+
+  pthread_t* t_arr;
+  size_t len_thr;
+  
+  atomic_uint_fast64_t index;
+
+  not_q_t* q_arr;
+
+  atomic_int_fast64_t num_task;
+
+  pthread_cond_t wait_cv; 
+  pthread_mutex_t wait_mtx;
+
+  _Atomic int waiting; // 1 cv, 2 spin
+                       //
+  //_Atomic bool waiting;
+} task_manager_t;
+
+void init_task_manager(task_manager_t* man, uint32_t num_threads);
+
+void free_task_manager(task_manager_t* man, void (*clean)(task_t* args) );
+
+void async_task_manager(task_manager_t* man, task_t t);
+
+void wait_all_task_manager(task_manager_t* man);
+
+void wait_all_spin_task_manager(task_manager_t* man);
+
+void wake_and_spin_task_manager(task_manager_t* man);
+
+void stop_spin_task_manager(task_manager_t* man);
+
+#endif
+

common/utils/time_meas.c

@@ -38,7 +38,7 @@ static time_stats_t  **measur_table;
 notifiedFIFO_t measur_fifo;
 double get_cpu_freq_GHz(void)
 {
-  if (cpu_freq_GHz <1 ) {
+  if (cpu_freq_GHz <0.01 ) {
     time_stats_t ts = {0};
     reset_meas(&ts);
     ts.trials++;
@@ -46,8 +46,7 @@ double get_cpu_freq_GHz(void)
     sleep(1);
     ts.diff = (rdtsc_oai()-ts.in);
     cpu_freq_GHz = (double)ts.diff/1000000000;
-    printf("CPU Freq is %f \n", cpu_freq_GHz);
-  }
+  } 
   return cpu_freq_GHz;
 }
 

common/utils/time_meas.h

@@ -106,8 +106,16 @@ static inline unsigned long long rdtsc_oai(void) {
   __asm__ volatile ("rdtsc" : "=a" (a), "=d" (d));
   return (d<<32) | a;
 }
+#elif defined(__aarch64__)
+static inline uint64_t rdtsc_oai(void) __attribute__((always_inline));
+static inline uint64_t rdtsc_oai(void)
+{
+	  uint64_t r = 0;
+	    asm volatile("mrs %0, cntvct_el0" : "=r"(r));
+	      return r;
+}
 
-#elif defined(__arm__) || defined(__aarch64__)
+#elif defined(__arm__) 
 static inline uint32_t rdtsc_oai(void) __attribute__((always_inline));
 static inline uint32_t rdtsc_oai(void) {
   uint32_t r = 0;
@@ -153,17 +161,15 @@ static inline void start_meas(time_stats_t *ts) {
 static inline void stop_meas(time_stats_t *ts) {
   if (opp_enabled) {
     long long out = rdtsc_oai();
-    if (ts->in) {
-      ts->diff += (out - ts->in);
-      /// process duration is the difference between two clock points
-      ts->p_time = (out - ts->in);
-      ts->diff_square += ((double)out - ts->in) * ((double)out - ts->in);
+    ts->diff += (out-ts->in);
+    /// process duration is the difference between two clock points
+    ts->p_time = (out-ts->in);
+    ts->diff_square += ((double)out-ts->in)*((double)out-ts->in);
 
-      if ((out - ts->in) > ts->max)
-        ts->max = out - ts->in;
+    if ((out-ts->in) > ts->max)
+      ts->max = out-ts->in;
 
-      ts->meas_flag = 0;
-    }
+    ts->meas_flag=0;
   }
 }
 

common/utils/utils.c

@@ -118,12 +118,6 @@ char *itoa(int i) {
   return strdup(buffer);
 }
 
-void *memcpy1(void *dst,const void *src,size_t n) {
-
-  void *ret=dst;
-  asm volatile("rep movsb" : "+D" (dst) : "c"(n), "S"(src) : "cc","memory");
-  return(ret);
-}
 
 void set_priority(int priority)
 {

doc/FEATURE_SET.md

@@ -259,7 +259,6 @@ The following features are valid for the gNB and the 5G-NR UE.
    - PTRS support
    - Support for 1, 2 and 4 TX antennas
    - Support for up to 2 layers (currently limited to DMRS configuration type 2)
-   - Support for 256 QAM
 *  NR-CSIRS Generation of sequence at PHY
 *  NR-PUSCH (including Segmentation, LDPC encoding, rate matching, scrambling, modulation, RB mapping, etc).
    - PUSCH mapping type A and B
@@ -268,7 +267,6 @@ The following features are valid for the gNB and the 5G-NR UE.
    - PTRS support
    - Support for up to 2 RX antenna
    - Support for up to 2 layers
-   - Support for 256 QAM
 *  NR-PUCCH 
    - Format 0 (2 bits, for ACK/NACK and SR)
    - Format 2 (up to 11 bits, mainly for CSI feedback)

doc/NR_SA_Tutorial_OAI_CN5G.md

@@ -71,13 +71,13 @@ docker build --target ims --tag asterisk-ims:latest --file ~/oai-cn5g/Dockerfile
 ## 3.1 Start OAI CN5G
 ```bash
 cd ~/oai-cn5g
-docker-compose up -d
+docker compose up -d
 ```
 
 ## 3.2 Stop OAI CN5G
 ```bash
 cd ~/oai-cn5g
-docker-compose down
+docker compose down
 ```
 
 # 4. Run 5G NR SA end-to-end setup with OAI gNB
@@ -87,4 +87,4 @@ Please check this link:
 
 ## 4.2 Testing with OAI nrUE
 Please check this link:
-[Testing with OAI gNB and OAI nrUE](NR_SA_Tutorial_OAI_nrUE.md)
+[Testing with OAI gNB and OAI nrUE](NR_SA_Tutorial_OAI_nrUE.md)

doc/README.md

@@ -88,7 +88,7 @@ Some directories under `radio` contain READMEs:
 - [RFsimulator](../radio/rfsimulator/README.md)
 - [USRP](../radio/USRP/README.md)
 - [BladeRF](../radio/BLADERF/README)
-- [IQPlayer](../radio/iqplayer/DOC/iqrecordplayer_usage.md), and [general documentation](./iqrecordplayer_usage.md)
+- [IQPlayer](../radio/iqplayer/DOC/iqrecordplayer_usage.md)
 
 The other SDRs (AW2S, LimeSDR, ...) have no READMEs.
 

doc/SW_archi.md

@@ -340,6 +340,8 @@ At Rx side, pdcp_data_ind() is the entry point that receives the data from RLC.
 
 nr_pdcp_config_set_security(): sets the keys for AS security of a UE
 
+nr_DRB_preconfiguration(): the mac layer calls this for configuration in phy-test/do-ra mode
+
 nr_pdcp_add_srbs() adds UE SRBs in pdcp, nr_pdcp_remove_UE() removes it
 nr_pdcp_add_drbs() adds UE DRBs in pdcp, nr_pdcp_remove_UE() removes it
 

doc/TESTBenches.md

@@ -21,7 +21,6 @@
 | starsky       | 172.21.18.45    | CI-Starsky-Legacy-TDD-eNB       | eNB (B40)  | b200mini (30A3E3C)                                  |
 | carabe        | 172.21.18.47    | CI-Carabe-Legacy-FDD-OAI-LTE-UE | UE (B7UE)  | B200mini (30AE8C9)                                  |
 | nokiabox      | 172.21.19.39    | _None_                | gNB (Nokia), 5GC   | _Nokia RF integrated_                                 |
-| avra          | 172.21.16.124   | CI-Avra-Usage         | gNB (n78)          | AW2S Jaguar (192.168.80.239)                          |
 
 Note: The available resources, and their current usage, is indicated here:
 - [Lockable resources of jenkins-oai](https://jenkins-oai.eurecom.fr/lockable-resources/):
@@ -57,9 +56,8 @@ Note: The available resources, and their current usage, is indicated here:
 
 **Purpose**: AW2S tests with Amarisoft
 
-![5G AW2S Testbench](testbenches_doc_resources/5g-aw2s-bench.png)
+Picture: TBD
 
-[PDF version](testbenches_doc_resources/5g-aw2s-bench.pdf) | [LaTeX/TikZ version](testbenches_doc_resources/5g-aw2s-bench.tex) if you want to modify to reflect your setup
 
 ### 4G Testbench(es)
 
@@ -69,6 +67,7 @@ Note: The available resources, and their current usage, is indicated here:
 
 [PDF version](testbenches_doc_resources/4g-faraday-bench.pdf) | [LaTeX/TikZ version](testbenches_doc_resources/4g-faraday-bench.tex) if you want to modify to reflect your setup
 
+
 ## Pipelines
 
 ### [RAN-Container-Parent](https://jenkins-oai.eurecom.fr/job/RAN-Container-Parent/)
@@ -116,9 +115,6 @@ Webhook
   - basic SA test (20 MHz TDD), F1, reestablishment, ...
 - [RAN-Ubuntu20-Image-Builder](https://jenkins-oai.eurecom.fr/job/RAN-Ubuntu18-Image-Builder/)
   - obelix: Ubuntu 20 image build using docker (Note: builds U20 images while pipeline is named U18!)
-- [RAN-SA-AW2S-CN5G](https://jenkins-oai.eurecom.fr/job/RAN-SA-AW2S-CN5G/)
-  - 5G-NR SA test setup: Avra(RHEL9.1)/Manarola(U22PRO) + AW2S, Amarisoft UE x1, OAI CN5G
-  - uses OpenShift cluster for CN deployment and container images for gNB deployment
 
 ### RAN-CI-NSA-Trigger
 

doc/iqrecordplayer_usage.md

@@ -1,66 +0,0 @@
-# I/Q record-replay
-## using the iq record-replay
-
-This feature provides I/Q record-replay as initially presented in the 4th OAI workshop for LTE
-(https://www.openairinterface.org/docs/workshop/4_OAI_Workshop_20171107/Talks/MONGAZON_Nokia-Bell-Labs-OAI-IQ.pdf)
-The current implementation has been temporarily disrupted for LTE and only works for 5G SA
-nr-uesoftmodem executable.
-
-The I/Q record-replay feature is briefly described hereafter, it allows you to:
-* record slots received by the USRP board in a file while the system is operating.
-  For example you can record a full nrUE connection/traffic/disconnection sequence.
-  Today the OAI USRP device is the only one supporting the recording feature. 
-* replay slots from a previously recorded file to operate the system,
-  possibly in multiple loops if the recorded sequence is convenient from the logical point of view. 
-
-The record-replay features are activated and configured using OAI configuration parameters
-
-### Record mode
-options for record mode are:
-* `subframes-record` Activate record mode
-* `subframes-file`   Path of the file used for slots recording (default is `/tmp/iqfile`)
-* `subframes-max`    Maximum count of slots to be recorded in a file (default is 120000)
-
-Note that the value of `--subframes-max` parameter needs to be tuned according to your RAM capabilities.
-The default value is 120000, which allows for 120 seconds of record-replay but will require ~20GB of RAM and disk space. 
-If RAM does not allow for the parameter value, an error message will be displayed and the run will be aborted.
-In record mode, to minimize performance impacts of operating software, slots are always saved into memory and
-written to disk when the process terminates.
-When you estimate the recorded sequence is achieved, you can terminate the nr-uesoftmodem by typing `CTRL-C`.
-At that time, up to the value of `--subframes-max` slots will be written on disk.
-The nr-uesoftmodem will indicate the exact count of slots written to disk, which may be less (but not higher)
-than the value of `--subframes-max` parameter.
-
->Recording session example:
-```bash
-./nr-uesoftmodem -O /home/oaitests/mediatek_sim.conf --sa --nokrnmod 1 --numerology 1 -r 106 -C 3649440000 --band 78 -E --ue-fo-compensation --device.recplay.subframes-record 1 --device.recplay.subframes-file /home/iqs/oai-nrUE-17042023.dat --device.recplay.use-mmap 1 --device.recplay.subframes-max 30000
-............................................
-............................................
-............................................
-^C
-[HW]   Writing file header to /home/iqs/oai-nrUE-17042023.dat 
-[HW]   Writing 4565 subframes to /home/iqs/oai-nrUE-17042023.dat 
-[HW]   File /home/iqs/oai-nrUE-17042023.dat closed
-[HW]   releasing USRP
-
-### Replay mode
-Replaying I/Q works only for nr-uesoftmodem at 40MHz bandwidth 3/4 sampling.
-Mismatch between file content and run time parameters might lead to unpredictable results.
-options for replay mode are:
-* `subframes-replay` Activate replay mode
-* `subframes-file`   Path of the file used for slots replay (default is `/tmp/iqfile`)
-* `subframes-loops`  Number of iterations to replay the entire slots file (default is 5)
-* `use-mmap`         Boolean, set to 1 (true) by default, iq file is map to memory if true, otherwise iq's are read from file. 
-
->Replay mode session example:
-```bash
-./nr-uesoftmodem -O /home/oaitests/mediatek_sim.conf --sa --nokrnmod 1 --numerology 1 -r 106 -C 3649440000 --band 78 -E --ue-fo-compensation --device.recplay.subframes-replay 1 --device.recplay.subframes-file /home/iqs/oai-nrUE-17042023.dat --device.recplay.use-mmap 1 --device.recplay.subframes-loops 1
-..................................
-..................................
-[HW]   Replay iqs from USRP B200 device, bandwidth 4.000000e+07
-[HW]   Loaded 4565 subframes.
-[HW]   iqplayer device initialized, replay /home/iqs/oai-nrUE-17042023.dat for 1 iteration(s)
-..................................
-..................................
-
-[OAI Wikis home](https://gitlab.eurecom.fr/oai/openairinterface5g/wikis/home)

doc/testbenches_doc_resources/5g-aw2s-bench.tex

@@ -1,32 +0,0 @@
-\documentclass{standalone}
-
-\usepackage{tikz}
-\usetikzlibrary{backgrounds, positioning, shapes.symbols}
-\usepackage{helvet}
-\renewcommand*{\rmdefault}{\sfdefault}
-
-\begin{document}
-\begin{tikzpicture}
-  [
-    font=\footnotesize,
-    faraday/.style={minimum size=3cm, draw, dashed},
-    duplexer/.style={draw,fill=white},
-  ]
-
-  \node[label=above:avra] (avra)
-    {\includegraphics[width=1.2cm]{server}};
-  \node[right=0.5cm of avra, label=above:AW2S] (aw2s)
-    {\includegraphics[width=1.2cm]{aw2s}} edge (avra);
-  \node[right=.2cm of aw2s, duplexer] (b78o) {n78} edge (aw2s);
-  \node[above right=-0.7cm and 0.35cm of b78o.east] (anto1)
-    {\includegraphics[width=0.3cm]{antenna}} edge (b78o);
-  \node[below right=-0.7cm and 0.35cm of b78o.east] (anto2)
-    {\includegraphics[width=0.3cm]{antenna}} edge (b78o);
-
-  \node[right=4cm of aw2s, label=above:Amarisoft UE] (amariue)
-    {\includegraphics[width=0.7cm]{amariue}};
-  \node[right=3cm of aw2s] (anto3)
-    {\includegraphics[width=0.3cm]{antenna}} edge (amariue);
-
-\end{tikzpicture}
-\end{document}

docker/Dockerfile.clang.rhel8.2

@@ -1,43 +0,0 @@
-#/*
-# * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
-# * contributor license agreements.  See the NOTICE file distributed with
-# * this work for additional information regarding copyright ownership.
-# * The OpenAirInterface Software Alliance licenses this file to You under
-# * the OAI Public License, Version 1.1  (the "License"); you may not use this file
-# * except in compliance with the License.
-# * You may obtain a copy of the License at
-# *
-# *      http://www.openairinterface.org/?page_id=698
-# *
-# * Unless required by applicable law or agreed to in writing, software
-# * distributed under the License is distributed on an "AS IS" BASIS,
-# * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# * See the License for the specific language governing permissions and
-# * limitations under the License.
-# *-------------------------------------------------------------------------------
-# * For more information about the OpenAirInterface (OAI) Software Alliance:
-# *      contact@openairinterface.org
-# */
-#---------------------------------------------------------------------
-#
-# Dockerfile for the Open-Air-Interface BUILD service
-#   Valid for RHEL8
-#
-#---------------------------------------------------------------------
-
-FROM ran-base:latest AS oai-clang
-
-RUN rm -Rf /oai-ran
-WORKDIR /oai-ran
-COPY . .
-
-#only install LLVM (clang, ...) for this container, the others don't need it
-RUN yum install -y llvm-toolset
-
-#run build_oai to build the target image
-RUN /bin/sh oaienv && \
-    cd cmake_targets && \
-    mkdir -p log && \
-    export CC=/usr/bin/clang && \
-    export CXX=/usr/bin/clang++ && \
-    ./build_oai --phy_simulators --gNB --eNB --nrUE --UE --ninja --verbose-ci --noavx512 -c --cmake-opt -DCMAKE_C_FLAGS=-Werror --cmake-opt -DCMAKE_CXX_FLAGS=-Werror

docker/Dockerfile.gNB.aw2s.rhel8.2

@@ -84,7 +84,6 @@ COPY --from=gnb-base \
     /lib64/
 
 RUN ln -s /usr/local/lib/libaw2sori_transpro.so /usr/local/lib/libthirdparty_transpro.so && \
-    ln -s /usr/local/lib/liboai_eth_transpro.so /usr/local/lib/liboai_transpro.so && \
     ldconfig
 
 WORKDIR /opt/oai-gnb-aw2s

docker/Dockerfile.phySim.rhel8.2

@@ -31,14 +31,14 @@ RUN rm -Rf /oai-ran
 WORKDIR /oai-ran
 COPY . .
 
-#only install address and undefined behavior sanitizer for this container, the others don't need it
-RUN yum install -y libasan libubsan
+#only install address sanitizer for this container, the others don't need it
+RUN yum install -y libasan
 
 #run build_oai to build the target image
 RUN /bin/sh oaienv && \ 
     cd cmake_targets && \
     mkdir -p log && \
-    ./build_oai --phy_simulators --ninja --verbose-ci --sanitize --noavx512 -c --cmake-opt -DCMAKE_C_FLAGS=-Werror --cmake-opt -DCMAKE_CXX_FLAGS=-Werror
+    ./build_oai --phy_simulators --ninja --verbose-ci --sanitize-address --noavx512 -c
 
 #start from scratch for target executable
 FROM registry.access.redhat.com/ubi8/ubi:latest as oai-physim
@@ -87,7 +87,6 @@ COPY --from=phy-sim-build \
     /lib64/libexslt.so.0 \
     /lib64/libxslt.so.1 \
     /usr/lib64/libasan.so.5 \
-    /usr/lib64/libubsan.so.1 \
     /oai-ran/cmake_targets/ran_build/build/libdfts.so \
     /oai-ran/cmake_targets/ran_build/build/libldpc.so \
     /oai-ran/cmake_targets/ran_build/build/libldpc_orig.so \

executables/lte-enb.c

@@ -206,7 +206,7 @@ static inline int rxtx(PHY_VARS_eNB *eNB,
   T(T_ENB_PHY_DL_TICK, T_INT(eNB->Mod_id), T_INT(proc->frame_tx), T_INT(proc->subframe_tx));
 
   // if this is IF5 or 3GPP_eNB
-  if (eNB->RU_list[0] && eNB->RU_list[0]->function < NGFI_RAU_IF4p5) {
+  if (eNB->RU_list && eNB->RU_list[0] && eNB->RU_list[0]->function < NGFI_RAU_IF4p5) {
     wakeup_prach_eNB(eNB,NULL,proc->frame_rx,proc->subframe_rx);
     wakeup_prach_eNB_br(eNB,NULL,proc->frame_rx,proc->subframe_rx);
   }

executables/lte-ru.c

@@ -1126,7 +1126,7 @@ static void do_ru_synch(RU_t *ru) {
 
 
 int check_sync(RU_t *ru, RU_t *ru_master, int subframe) {
-  if (labs(ru_master->proc.t[subframe].tv_nsec - ru->proc.t[subframe].tv_nsec) > 500000)
+  if (fabs(ru_master->proc.t[subframe].tv_nsec - ru->proc.t[subframe].tv_nsec) > 500000)
     return 0;
 
   return 1;
@@ -1178,12 +1178,12 @@ void wakeup_L1s(RU_t *ru) {
 
     if (ru->is_slave == 0 && ( (proc->RU_mask[ru->proc.tti_rx]&(1<<i)) == 1 ) && eNB->RU_list[i]->state == RU_RUN) { //This is master & the RRU has already been received
       if (check_sync(eNB->RU_list[i],eNB->RU_list[0],ru->proc.tti_rx) == 0)
-        LOG_E(PHY,"RU %d is not SYNC, subframe %d, time  %ld this is master\n",
-              eNB->RU_list[i]->idx, ru->proc.tti_rx, labs(eNB->RU_list[i]->proc.t[ru->proc.tti_rx].tv_nsec - eNB->RU_list[0]->proc.t[ru->proc.tti_rx].tv_nsec));
+        LOG_E(PHY,"RU %d is not SYNC, subframe %d, time  %f this is master\n",
+              eNB->RU_list[i]->idx, ru->proc.tti_rx, fabs(eNB->RU_list[i]->proc.t[ru->proc.tti_rx].tv_nsec - eNB->RU_list[0]->proc.t[ru->proc.tti_rx].tv_nsec));
     } else if (ru->is_slave == 1 && ru->state == RU_RUN && ( (proc->RU_mask[ru->proc.tti_rx]&(1<<0)) == 1)) { // master already received. TODO: we assume that RU0 is master.
       if (check_sync(ru,eNB->RU_list[0],ru->proc.tti_rx) == 0)
-        LOG_E(PHY,"RU %d is not SYNC time, subframe %d, time  %ld\n",
-              ru->idx, ru->proc.tti_rx, labs(ru->proc.t[ru->proc.tti_rx].tv_nsec - eNB->RU_list[0]->proc.t[ru->proc.tti_rx].tv_nsec));
+        LOG_E(PHY,"RU %d is not SYNC time, subframe %d, time  %f\n",
+              ru->idx, ru->proc.tti_rx, fabs(ru->proc.t[ru->proc.tti_rx].tv_nsec - eNB->RU_list[0]->proc.t[ru->proc.tti_rx].tv_nsec));
     }
   }
 

executables/lte-softmodem.h

@@ -41,13 +41,13 @@
 /*   optname                     helpstr                paramflags        XXXptr                      defXXXval           type      numelt  */
 /*------------------------------------------------------------------------------------------------------------------------------------------*/
 #define CMDLINE_UEMODEPARAMS_DESC {  \
-    {"calib-ue-rx",              CONFIG_HLP_CALUER,     0,                .iptr=&rx_input_level_dBm,   .defintval=0,        TYPE_INT,   0},    \
-    {"calib-ue-rx-med",          CONFIG_HLP_CALUERM,    0,                .iptr=&rx_input_level_dBm,   .defintval=0,        TYPE_INT,   0},    \
-    {"calib-ue-rx-byp",          CONFIG_HLP_CALUERB,    0,                .iptr=&rx_input_level_dBm,   .defintval=0,        TYPE_INT,   0},    \
-    {"debug-ue-prach",           CONFIG_HLP_DBGUEPR,    PARAMFLAG_BOOL,   .uptr=NULL,                  .defuintval=1,       TYPE_INT,   0},    \
-    {"no-L2-connect",            CONFIG_HLP_NOL2CN,     PARAMFLAG_BOOL,   .uptr=NULL,                  .defuintval=1,       TYPE_INT,   0},    \
-    {"calib-prach-tx",           CONFIG_HLP_CALPRACH,   PARAMFLAG_BOOL,   .uptr=NULL,                  .defuintval=1,       TYPE_INT,   0},    \
-    {"ue-dump-frame",            CONFIG_HLP_DUMPFRAME,  PARAMFLAG_BOOL,   .iptr=&dumpframe,            .defintval=0,        TYPE_INT,   0},    \
+    {"calib-ue-rx",              CONFIG_HLP_CALUER,     0,                iptr:&rx_input_level_dBm,   defintval:0,        TYPE_INT,   0},    \
+    {"calib-ue-rx-med",          CONFIG_HLP_CALUERM,    0,                iptr:&rx_input_level_dBm,   defintval:0,        TYPE_INT,   0},    \
+    {"calib-ue-rx-byp",          CONFIG_HLP_CALUERB,    0,                iptr:&rx_input_level_dBm,   defintval:0,        TYPE_INT,   0},    \
+    {"debug-ue-prach",           CONFIG_HLP_DBGUEPR,    PARAMFLAG_BOOL,   uptr:NULL,                  defuintval:1,       TYPE_INT,   0},    \
+    {"no-L2-connect",            CONFIG_HLP_NOL2CN,     PARAMFLAG_BOOL,   uptr:NULL,                  defuintval:1,       TYPE_INT,   0},    \
+    {"calib-prach-tx",           CONFIG_HLP_CALPRACH,   PARAMFLAG_BOOL,   uptr:NULL,                  defuintval:1,       TYPE_INT,   0},    \
+    {"ue-dump-frame",            CONFIG_HLP_DUMPFRAME,  PARAMFLAG_BOOL,   iptr:&dumpframe,            defintval:0,        TYPE_INT,   0},    \
   }
 #define CMDLINE_CALIBUERX_IDX                   0
 #define CMDLINE_CALIBUERXMED_IDX                1
@@ -90,25 +90,25 @@
 /*-------------------------------------------------------------------------------------------------------------------------------------------------------*/
 // clang-format off
 #define CMDLINE_UEPARAMS_DESC {  \
-    {"U",                 CONFIG_HLP_NUMUE,       0,               .iptr=&NB_UE_INST,                   .defuintval=1,         TYPE_INT,      0},   \
-    {"ue-rxgain",         CONFIG_HLP_UERXG,       0,               .dblptr=&(rx_gain[0][0]),            .defdblval=130,        TYPE_DOUBLE,   0},   \
-    {"ue-rxgain-off",     CONFIG_HLP_UERXGOFF,    0,               .dblptr=&rx_gain_off,                .defdblval=0,          TYPE_DOUBLE,   0},   \
-    {"ue-txgain",         CONFIG_HLP_UETXG,       0,               .dblptr=&(tx_gain[0][0]),            .defdblval=0,          TYPE_DOUBLE,   0},   \
-    {"ue-nb-ant-rx",      CONFIG_HLP_UENANTR,     0,               .u8ptr=&nb_antenna_rx,               .defuintval=1,         TYPE_UINT8,    0},   \
-    {"ue-nb-ant-tx",      CONFIG_HLP_UENANTT,     0,               .u8ptr=&nb_antenna_tx,               .defuintval=1,         TYPE_UINT8,    0},   \
-    {"ue-scan-carrier",   CONFIG_HLP_UESCAN,      PARAMFLAG_BOOL,  .iptr=&UE_scan_carrier,              .defintval=0,          TYPE_INT,      0},   \
-    {"ue-max-power",      NULL,                   0,               .iptr=&(tx_max_power[0]),            .defintval=23,         TYPE_INT,      0},   \
-    {"emul-iface",        CONFIG_HLP_EMULIFACE,   0,               .strptr=&emul_iface,                 .defstrval="lo",       TYPE_STRING, 100},   \
-    {"L2-emul",           NULL,                   0,               .u8ptr=&nfapi_mode,                  .defuintval=3,         TYPE_UINT8,    0},   \
-    {"num-ues",           NULL,                   0,               .iptr=&(NB_UE_INST),                 .defuintval=1,         TYPE_INT,      0},   \
-    {"r"  ,               CONFIG_HLP_PRB,         0,               .u8ptr=&(frame_parms[0]->N_RB_DL),   .defintval=25,         TYPE_UINT8,    0},   \
-    {"dlsch-demod-shift", CONFIG_HLP_DLSHIFT,     0,               .iptr=(int32_t *)&dlsch_demod_shift, .defintval=0,          TYPE_INT,      0},   \
-    {"usrp-args",         CONFIG_HLP_USRP_ARGS,   0,               .strptr=&usrp_args,         .defstrval="type=b200",TYPE_STRING,   0},   \
-    {"mmapped-dma",       CONFIG_HLP_DMAMAP,      PARAMFLAG_BOOL,  .uptr=&mmapped_dma,                  .defintval=0,          TYPE_INT,      0},   \
-    {"T" ,                CONFIG_HLP_TDD,         PARAMFLAG_BOOL,  .iptr=&tddflag,                      .defintval=0,          TYPE_INT,      0},   \
-    {"A",                 CONFIG_HLP_TADV,        0,               .iptr=&(timingadv),                  .defintval=0,          TYPE_INT,      0},   \
-    {"ue-idx-standalone", NULL,                   0,               .u16ptr=&ue_idx_standalone,          .defuintval=0xFFFF,    TYPE_UINT16,   0},   \
-    {"node-number",       NULL,                   0,               .u16ptr=&node_number,                .defuintval=2,         TYPE_UINT16,   0},   \
+    {"U",                 CONFIG_HLP_NUMUE,       0,               iptr:&NB_UE_INST,                   defuintval:1,         TYPE_INT,      0},   \
+    {"ue-rxgain",         CONFIG_HLP_UERXG,       0,               dblptr:&(rx_gain[0][0]),            defdblval:130,        TYPE_DOUBLE,   0},   \
+    {"ue-rxgain-off",     CONFIG_HLP_UERXGOFF,    0,               dblptr:&rx_gain_off,                defdblval:0,          TYPE_DOUBLE,   0},   \
+    {"ue-txgain",         CONFIG_HLP_UETXG,       0,               dblptr:&(tx_gain[0][0]),            defdblval:0,          TYPE_DOUBLE,   0},   \
+    {"ue-nb-ant-rx",      CONFIG_HLP_UENANTR,     0,               u8ptr:&nb_antenna_rx,               defuintval:1,         TYPE_UINT8,    0},   \
+    {"ue-nb-ant-tx",      CONFIG_HLP_UENANTT,     0,               u8ptr:&nb_antenna_tx,               defuintval:1,         TYPE_UINT8,    0},   \
+    {"ue-scan-carrier",   CONFIG_HLP_UESCAN,      PARAMFLAG_BOOL,  iptr:&UE_scan_carrier,              defintval:0,          TYPE_INT,      0},   \
+    {"ue-max-power",      NULL,                   0,               iptr:&(tx_max_power[0]),            defintval:23,         TYPE_INT,      0},   \
+    {"emul-iface",        CONFIG_HLP_EMULIFACE,   0,               strptr:&emul_iface,                 defstrval:"lo",       TYPE_STRING, 100},   \
+    {"L2-emul",           NULL,                   0,               u8ptr:&nfapi_mode,                  defuintval:3,         TYPE_UINT8,    0},   \
+    {"num-ues",           NULL,                   0,               iptr:&(NB_UE_INST),                 defuintval:1,         TYPE_INT,      0},   \
+    {"r"  ,               CONFIG_HLP_PRB,         0,               u8ptr:&(frame_parms[0]->N_RB_DL),   defintval:25,         TYPE_UINT8,    0},   \
+    {"dlsch-demod-shift", CONFIG_HLP_DLSHIFT,     0,               iptr:(int32_t *)&dlsch_demod_shift, defintval:0,          TYPE_INT,      0},   \
+    {"usrp-args",         CONFIG_HLP_USRP_ARGS,   0,               strptr:&usrp_args,         defstrval:"type=b200",TYPE_STRING,   0},   \
+    {"mmapped-dma",       CONFIG_HLP_DMAMAP,      PARAMFLAG_BOOL,  uptr:&mmapped_dma,                  defintval:0,          TYPE_INT,      0},   \
+    {"T" ,                CONFIG_HLP_TDD,         PARAMFLAG_BOOL,  iptr:&tddflag,                      defintval:0,          TYPE_INT,      0},   \
+    {"A",                 CONFIG_HLP_TADV,        0,               iptr:&(timingadv),                  defintval:0,          TYPE_INT,      0},   \
+    {"ue-idx-standalone", NULL,                   0,               u16ptr:&ue_idx_standalone,          defuintval:0xFFFF,    TYPE_UINT16,   0},   \
+    {"node-number",       NULL,                   0,               u16ptr:&node_number,                defuintval:2,         TYPE_UINT16,   0},   \
   }
 // clang-format on
 

executables/lte-uesoftmodem.c

@@ -482,7 +482,7 @@ void init_openair0(LTE_DL_FRAME_PARMS *frame_parms,int rxgain) {
 void terminate_task(task_id_t task_id, module_id_t mod_id) {
   LOG_I(ENB_APP, "sending TERMINATE_MESSAGE to task %s (%d)\n", itti_get_task_name(task_id), task_id);
   MessageDef *msg;
-  msg = itti_alloc_new_message (TASK_ENB_APP, 0, TERMINATE_MESSAGE);
+  msg = itti_alloc_new_message (ENB_APP, 0, TERMINATE_MESSAGE);
   itti_send_msg_to_task (task_id, ENB_MODULE_ID_TO_INSTANCE(mod_id), msg);
 }
 

executables/nr-cuup.c

@@ -84,11 +84,21 @@ int nr_rlc_get_available_tx_space(const rnti_t rntiP, const logical_chan_id_t ch
   return 0;
 }
 
+void nr_rlc_bearer_init(NR_RLC_BearerConfig_t *RLC_BearerConfig, NR_RLC_BearerConfig__servedRadioBearer_PR rb_type)
+{
+  abort();
+}
+
 void rrc_gNB_generate_dedicatedRRCReconfiguration(const protocol_ctxt_t *const ctxt_pP, rrc_gNB_ue_context_t *ue_context_pP, NR_CellGroupConfig_t *cell_groupConfig_from_DU)
 {
   abort();
 }
 
+void nr_rlc_bearer_init_ul_spec(struct NR_LogicalChannelConfig *mac_LogicalChannelConfig)
+{
+  abort();
+}
+
 void nr_rlc_add_drb(int rnti, int drb_id, const NR_RLC_BearerConfig_t *rlc_BearerConfig)
 {
   abort();
@@ -100,6 +110,11 @@ int nr_rrc_gNB_process_GTPV1U_CREATE_TUNNEL_RESP(const protocol_ctxt_t *const ct
   return 0;
 }
 
+void nr_drb_config(struct NR_RLC_Config *rlc_Config, NR_RLC_Config_PR rlc_config_pr)
+{
+  abort();
+}
+
 void prepare_and_send_ue_context_modification_f1(rrc_gNB_ue_context_t *ue_context_p, e1ap_bearer_setup_resp_t *e1ap_resp)
 {
   abort();

executables/nr-ue.c

@@ -154,6 +154,7 @@ void init_nr_ue_vars(PHY_VARS_NR_UE *ue,
   int nb_connected_gNB = 1;
 
   ue->Mod_id      = UE_id;
+  ue->mac_enabled = 1;
   ue->if_inst     = nr_ue_if_module_init(0);
   ue->dci_thres   = 0;
   ue->target_Nid_cell = -1;
@@ -258,6 +259,8 @@ static void *NRUE_phy_stub_standalone_pnf_task(void *arg)
   reset_queue(&nr_ul_dci_req_queue);
   reset_queue(&nr_ul_tti_req_queue);
 
+  NR_UL_TIME_ALIGNMENT_t ul_time_alignment;
+  memset(&ul_time_alignment, 0, sizeof(ul_time_alignment));
   int last_sfn_slot = -1;
   uint16_t sfn_slot = 0;
 
@@ -302,7 +305,7 @@ static void *NRUE_phy_stub_standalone_pnf_task(void *arg)
 
     if (get_softmodem_params()->sa && mac->mib == NULL) {
       LOG_D(NR_MAC, "We haven't gotten MIB. Lets see if we received it\n");
-      nr_ue_dl_indication(&mac->dl_info);
+      nr_ue_dl_indication(&mac->dl_info, &ul_time_alignment);
       process_queued_nr_nfapi_msgs(mac, sfn_slot);
     }
     if (mac->scc == NULL && mac->scc_SIB == NULL) {
@@ -344,7 +347,7 @@ static void *NRUE_phy_stub_standalone_pnf_task(void *arg)
       mac->dl_info.slot = slot;
       mac->dl_info.dci_ind = NULL;
       mac->dl_info.rx_ind = NULL;
-      nr_ue_dl_indication(&mac->dl_info);
+      nr_ue_dl_indication(&mac->dl_info, &ul_time_alignment);
     }
 
     if (pthread_mutex_unlock(&mac->mutex_dl_info)) abort();
@@ -353,8 +356,9 @@ static void *NRUE_phy_stub_standalone_pnf_task(void *arg)
                       mac->scc->tdd_UL_DL_ConfigurationCommon :
                       mac->scc_SIB->tdd_UL_DL_ConfigurationCommon,
                       ul_info.slot_tx, mac->frame_type)) {
-      LOG_D(NR_MAC, "Slot %d. calling nr_ue_ul_ind()\n", ul_info.slot_tx);
+      LOG_D(NR_MAC, "Slot %d. calling nr_ue_ul_ind() and nr_ue_pucch_scheduler() from %s\n", ul_info.slot_tx, __FUNCTION__);
       nr_ue_ul_scheduler(&ul_info);
+      nr_ue_pucch_scheduler(mod_id, ul_info.frame_tx, ul_info.slot_tx, NULL);
     }
     process_queued_nr_nfapi_msgs(mac, sfn_slot);
   }
@@ -625,7 +629,7 @@ nr_phy_data_t UE_dl_preprocessing(PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
     if(UE->if_inst != NULL && UE->if_inst->dl_indication != NULL) {
       nr_downlink_indication_t dl_indication;
       nr_fill_dl_indication(&dl_indication, NULL, NULL, proc, UE, &phy_data);
-      UE->if_inst->dl_indication(&dl_indication);
+      UE->if_inst->dl_indication(&dl_indication, NULL);
     }
 
     uint64_t a=rdtsc_oai();

nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_constants.h

@@ -50,8 +50,7 @@
 #define FAPI_NR_DL_CONFIG_TYPE_P_DLSCH 0x05
 #define FAPI_NR_DL_CONFIG_TYPE_CSI_RS 0x06
 #define FAPI_NR_DL_CONFIG_TYPE_CSI_IM 0x07
-#define FAPI_NR_CONFIG_TA_COMMAND 0x08
-#define FAPI_NR_DL_CONFIG_TYPES 0x08
+#define FAPI_NR_DL_CONFIG_TYPES 0x07
 
 #define FAPI_NR_CCE_REG_MAPPING_TYPE_INTERLEAVED 0x01
 #define FAPI_NR_CCE_REG_MAPPING_TYPE_NON_INTERLEAVED 0x02

nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h

@@ -526,11 +526,6 @@ typedef struct {
   fapi_nr_dl_config_csiim_pdu_rel15_t csiim_config_rel15;
 } fapi_nr_dl_config_csiim_pdu;
 
-typedef struct {
- int ta_frame;
- int ta_slot;
- int ta_command;
-} fapi_nr_ta_command_pdu;
 
 typedef struct {
   uint8_t pdu_type;
@@ -539,7 +534,6 @@ typedef struct {
     fapi_nr_dl_config_dlsch_pdu dlsch_config_pdu;
     fapi_nr_dl_config_csirs_pdu csirs_config_pdu;
     fapi_nr_dl_config_csiim_pdu csiim_config_pdu;
-    fapi_nr_ta_command_pdu ta_command_pdu;
   };
 } fapi_nr_dl_config_request_pdu_t;
 

nfapi/open-nFAPI/nfapi/public_inc/nfapi_interface.h

@@ -1897,9 +1897,6 @@ typedef struct {
 } nfapi_ul_config_periodic_cqi_pmi_ri_report_re13_t;
 
 typedef struct {
-  // This dummy element is to avoid CLANG warning: empty struct has size 0 in C, size 1 in C++
-  // To be removed if the structure is filled
-  uint32_t dummy;
 } nfapi_ul_config_aperiodic_cqi_pmi_ri_report_re13_t;
 
 typedef struct {
@@ -3023,15 +3020,9 @@ typedef struct {
 #define NFAPI_LBT_DL_INDICATION_BODY_TAG 0x2058
 
 typedef struct {
-  // This dummy element is to avoid CLANG warning: empty struct has size 0 in C, size 1 in C++
-  // To be removed if the structure is filled
-  uint32_t dummy;
 } nfapi_error_indication_msg_invalid_state;
 
 typedef struct {
-  // This dummy element is to avoid CLANG warning: empty struct has size 0 in C, size 1 in C++
-  // To be removed if the structure is filled
-  uint32_t dummy;
 } nfapi_error_indication_msg_bch_missing;
 
 typedef struct {

openair1/PHY/CODING/3gpplte_turbo_decoder_sse_16bit.c

@@ -1297,7 +1297,7 @@ uint8_t phy_threegpplte_turbo_decoder16(int16_t *y,
         // Mask64 = 2^b0 + 2^b1 + 2^b2 + 2^b3 + 2^b4 + 2^b5 + 2^b6 + 2^b7
         uint64x2_t Mask   = vpaddlq_u32(vpaddlq_u16(vandq_u16(vcgtq_s16(tmp,zeros), Powers)));
         uint64x1_t Mask64 = vget_high_u64(Mask)+vget_low_u64(Mask);
-        decoded_bytes[i] = (uint8_t)Mask64;
+        decoded_bytes[i] = *(uint8_t*)&Mask64;
 #endif
 #ifdef DEBUG_LOGMAP
         print_shorts("tmp",(int16_t *)&tmp);

openair1/PHY/CODING/TESTBENCH/coding_unitary_defs.h

@@ -34,9 +34,9 @@ void exit_function(const char* file, const char* function, const int line, const
   exit(-1);
 }
 
-signed char quantize(double D, double x, unsigned char B) {
+int8_t quantize(double D, double x, uint8_t B) {
   double qxd;
-  short maxlev;
+  int16_t maxlev;
   qxd = floor(x / D);
   maxlev = 1 << (B - 1); //(char)(pow(2,B-1));
 
@@ -45,7 +45,7 @@ signed char quantize(double D, double x, unsigned char B) {
   else if (qxd >= maxlev)
     qxd = maxlev - 1;
 
-  return ((char) qxd);
+  return ((int8_t) qxd);
 }
 
 

openair1/PHY/CODING/TESTBENCH/ldpctest.c

@@ -23,6 +23,7 @@
 #include <math.h>
 #include <stdio.h>
 #include <string.h>
+#include <stdint.h>
 #include "assertions.h"
 #include "SIMULATION/TOOLS/sim.h"
 #include "common/utils/load_module_shlib.h"
@@ -43,7 +44,7 @@
 #define NR_LDPC_ENABLE_PARITY_CHECK
 
 // 4-bit quantizer
-char quantize4bit(double D,double x)
+int8_t quantize4bit(double D,double x)
 {
   double qxd;
   qxd = floor(x/D);
@@ -54,13 +55,13 @@ char quantize4bit(double D,double x)
   else if (qxd > 7)
     qxd = 7;
 
-  return((char)qxd);
+  return((int8_t)qxd);
 }
 
-char quantize8bit(double D,double x)
+int8_t quantize8bit(double D,double x)
 {
   double qxd;
-  //char maxlev;
+  //int8_t maxlev;
   qxd = floor(x/D);
 
   //maxlev = 1<<(B-1);
@@ -72,7 +73,7 @@ char quantize8bit(double D,double x)
   else if (qxd >= 128)
     qxd = 127;
 
-  return((char)qxd);
+  return((int8_t)qxd);
 }
 
 typedef struct {
@@ -92,7 +93,7 @@ int test_ldpc(short max_iterations,
               int nom_rate,
               int denom_rate,
               double SNR,
-              unsigned char qbits,
+              uint8_t qbits,
               short block_length,
               unsigned int ntrials,
               int n_segments,
@@ -117,15 +118,15 @@ int test_ldpc(short max_iterations,
   sigma = 1.0/sqrt(2*SNR);
   opp_enabled=1;
   //short test_input[block_length];
-  unsigned char *test_input[MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER*NR_MAX_NB_LAYERS]={NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL};;
+  uint8_t *test_input[MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER*NR_MAX_NB_LAYERS]={NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL};;
   //short *c; //padded codeword
-  unsigned char estimated_output[MAX_NUM_DLSCH_SEGMENTS][block_length];
+  uint8_t estimated_output[MAX_NUM_DLSCH_SEGMENTS][block_length];
   memset(estimated_output, 0, sizeof(estimated_output));
-  unsigned char *channel_input[MAX_NUM_DLSCH_SEGMENTS];
-  unsigned char *channel_input_optim[MAX_NUM_DLSCH_SEGMENTS];
+  uint8_t *channel_input[MAX_NUM_DLSCH_SEGMENTS];
+  uint8_t *channel_input_optim[MAX_NUM_DLSCH_SEGMENTS];
   //double channel_output[68 * 384];
   double modulated_input[MAX_NUM_DLSCH_SEGMENTS][68 * 384] = { 0 };
-  char channel_output_fixed[MAX_NUM_DLSCH_SEGMENTS][68  * 384] = { 0 };
+  int8_t channel_output_fixed[MAX_NUM_DLSCH_SEGMENTS][68  * 384] = { 0 };
   short BG=0,nrows=0;//,ncols;
   int no_punctured_columns,removed_bit;
   int i1,Zc,Kb=0;
@@ -149,12 +150,12 @@ int test_ldpc(short max_iterations,
 
   // generate input block
   for(int j=0;j<MAX_NUM_DLSCH_SEGMENTS;j++) {
-    test_input[j]=(unsigned char *)malloc16(sizeof(unsigned char) * block_length/8);
-    memset(test_input[j], 0, sizeof(unsigned char) * block_length / 8);
-    channel_input[j] = (unsigned char *)malloc16(sizeof(unsigned char) * 68*384);
-    memset(channel_input[j], 0, sizeof(unsigned char) * 68 * 384);
-    channel_input_optim[j] = (unsigned char *)malloc16(sizeof(unsigned char) * 68*384);
-    memset(channel_input_optim[j], 0, sizeof(unsigned char) * 68 * 384);
+    test_input[j]=(uint8_t *)malloc16(sizeof(uint8_t) * block_length/8);
+    memset(test_input[j], 0, sizeof(uint8_t) * block_length / 8);
+    channel_input[j] = (uint8_t *)malloc16(sizeof(uint8_t) * 68*384);
+    memset(channel_input[j], 0, sizeof(uint8_t) * 68 * 384);
+    channel_input_optim[j] = (uint8_t *)malloc16(sizeof(uint8_t) * 68*384);
+    memset(channel_input_optim[j], 0, sizeof(uint8_t) * 68 * 384);
   }
 
   reset_meas(&time);
@@ -179,7 +180,7 @@ int test_ldpc(short max_iterations,
 
   for (int j=0;j<MAX_NUM_DLSCH_SEGMENTS;j++) {
     for (int i=0; i<block_length/8; i++) {
-      test_input[j][i]=(unsigned char) rand();
+      test_input[j][i]=(uint8_t) rand();
       //test_input[j][i]=j%256;
       //test_input[j][i]=252;
     }
@@ -246,7 +247,7 @@ int test_ldpc(short max_iterations,
 		  printf("Not supported");
   else
 	  printf("Not supported");
-
+/*
   //find minimum value in all sets of lifting size
   Zc=0;
 
@@ -259,16 +260,23 @@ int test_ldpc(short max_iterations,
       break;
     }
   }
+*/
+  int C,K,F;
+  nr_segmentation(NULL,NULL, block_length,&C,&K,&Zc,&F,BG);
 
-  printf("ldpc_test: codeword_length %d, n_segments %d, block_length %d, BG %d, Zc %d, Kb %d\n",n_segments *block_length, n_segments, block_length, BG, Zc, Kb);
+printf("ldpc_test: codeword_length %d, n_segments %d, block_length %d, K %d, F %d, BG %d, Zc %d, Kb %d\n",n_segments *block_length, n_segments, block_length, K, F, BG, Zc, Kb);
   no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*(1/((float)nom_rate/(float)denom_rate)))/Zc;
   //  printf("puncture:%d\n",no_punctured_columns);
   removed_bit=(nrows-no_punctured_columns-2) * Zc+block_length-(int)(block_length/((float)nom_rate/(float)denom_rate));
   encoder_implemparams_t impp=INIT0_LDPCIMPLEMPARAMS;
 
+#if defined(__arm__) || defined(__aarch64__)  
+  impp.gen_code=2;
+#else
   impp.gen_code=1;
+#endif  
   if (ntrials==0)
-    encoder_orig(test_input,channel_input, Zc, BG, block_length, BG, &impp);
+    encoder_orig(test_input,channel_input, Zc, BG, K, BG, &impp);
   impp.gen_code=0;
   for (int trial=0; trial < ntrials; trial++)
   {
@@ -276,7 +284,7 @@ int test_ldpc(short max_iterations,
     //// encoder
     start_meas(&time);
     for(int j=0;j<n_segments;j++) {
-      encoder_orig(&(test_input[j]), &(channel_input[j]),Zc,Kb,block_length,BG,&impp);
+      encoder_orig(&(test_input[j]), &(channel_input[j]),Zc,Kb,K,BG,&impp);
     }
     stop_meas(&time);
 
@@ -290,13 +298,13 @@ int test_ldpc(short max_iterations,
     for(int j=0;j<(n_segments/8+1);j++) {
     	start_meas(time_optim);
     	impp.macro_num=j;
-    	nrLDPC_encoder(test_input,channel_input_optim,Zc,Kb,block_length, BG, &impp);
+    	nrLDPC_encoder(test_input,channel_input_optim,Zc,Kb,K, BG, &impp);
     	stop_meas(time_optim);
     }
     
     if (ntrials==1)    
       for (int j=0;j<n_segments;j++)
-        for (int i = 0; i < block_length+(nrows-no_punctured_columns) * Zc - removed_bit; i++)
+        for (int i = 0; i < K/*block_length+(nrows-no_punctured_columns) * Zc - removed_bit*/; i++)
           if (channel_input[j][i]!=channel_input_optim[j][i]) {
             printf("differ in seg %u pos %u (%u,%u)\n", j, i, channel_input[j][i], channel_input_optim[j][i]);
             return (-1);
@@ -326,21 +334,21 @@ int test_ldpc(short max_iterations,
             modulated_input[j][i]=-1.0;///sqrt(2);
 
           ///channel_output[i] = modulated_input[i] + gaussdouble(0.0,1.0) * 1/sqrt(2*SNR);
-          //channel_output_fixed[i] = (char) ((channel_output[i]*128)<0?(channel_output[i]*128-0.5):(channel_output[i]*128+0.5)); //fixed point 9-7
+          //channel_output_fixed[i] = (int8_t) ((channel_output[i]*128)<0?(channel_output[i]*128-0.5):(channel_output[i]*128+0.5)); //fixed point 9-7
           //printf("llr[%d]=%d\n",i,channel_output_fixed[i]);
 
-          //channel_output_fixed[i] = (char)quantize(sigma/4.0,(2.0*modulated_input[i]) - 1.0 + sigma*gaussdouble(0.0,1.0),qbits);
-          channel_output_fixed[j][i] = (char)quantize(sigma/4.0/4.0,modulated_input[j][i] + sigma*gaussdouble(0.0,1.0),qbits);
-          //channel_output_fixed[i] = (char)quantize8bit(sigma/4.0,(2.0*modulated_input[i]) - 1.0 + sigma*gaussdouble(0.0,1.0));
+          //channel_output_fixed[i] = (int8_t)quantize(sigma/4.0,(2.0*modulated_input[i]) - 1.0 + sigma*gaussdouble(0.0,1.0),qbits);
+          channel_output_fixed[j][i] = (int8_t)quantize(sigma/4.0/4.0,modulated_input[j][i] + sigma*gaussdouble(0.0,1.0),qbits);
+          //channel_output_fixed[i] = (int8_t)quantize8bit(sigma/4.0,(2.0*modulated_input[i]) - 1.0 + sigma*gaussdouble(0.0,1.0));
           //printf("llr[%d]=%d\n",i,channel_output_fixed[i]);
           //printf("channel_output_fixed[%d]: %d\n",i,channel_output_fixed[i]);
 
 
           //Uncoded BER
-          unsigned char channel_output_uncoded = channel_output_fixed[j][i]<0 ? 1 /* QPSK demod */ : 0;
+          uint8_t channel_output_uncoded = channel_output_fixed[j][i]<0 ? 1 /* QPSK demod */ : 0;
 
           if (channel_output_uncoded != channel_input_optim[j][i-2*Zc])
-      *errors_bit_uncoded = (*errors_bit_uncoded) + 1;
+            *errors_bit_uncoded = (*errors_bit_uncoded) + 1;
 
         }
      
@@ -354,7 +362,7 @@ int test_ldpc(short max_iterations,
         decParams[j].R=code_rate_vec[R_ind];//13;
         decParams[j].numMaxIter=max_iterations;
         decParams[j].outMode = nrLDPC_outMode_BIT;
-        decParams[j].block_length=block_length;
+        decParams[j].block_length=K;
         nrLDPC_initcall(&decParams[j], (int8_t*)channel_output_fixed[j], (int8_t*)estimated_output[j]);
       }
       for(int j=0;j<n_segments;j++) {
@@ -362,13 +370,13 @@ int test_ldpc(short max_iterations,
         n_iter = nrLDPC_decoder(&decParams[j], (int8_t*)channel_output_fixed[j], (int8_t*)estimated_output[j], &decoder_profiler);
         stop_meas(time_decoder);
         //count errors
-        if ( memcmp(estimated_output[j], test_input[j], block_length/8 ) != 0 ) {
+        if ( memcmp(estimated_output[j], test_input[j], K/8 ) != 0 ) {
           segment_bler++;
         }
-        for (int i=0; i<block_length; i++)
+        for (int i=0; i<K; i++)
         {
-          unsigned char estoutputbit = (estimated_output[j][i/8]&(1<<(i&7)))>>(i&7);
-          unsigned char inputbit = (test_input[j][i/8]&(1<<(i&7)))>>(i&7); // Further correct for multiple segments
+          uint8_t estoutputbit = (estimated_output[j][i/8]&(1<<(i&7)))>>(i&7);
+          uint8_t inputbit = (test_input[j][i/8]&(1<<(i&7)))>>(i&7); // Further correct for multiple segments
           if (estoutputbit != inputbit)
             *errors_bit = (*errors_bit) + 1;
         }
@@ -423,13 +431,13 @@ int test_ldpc(short max_iterations,
   return *errors;
 }
 
-int main(int argc, char *argv[])
+int main(int argc, int8_t *argv[])
 {
 
   unsigned int errors, errors_bit, crc_misses;
   double errors_bit_uncoded;
   short block_length=8448; // decoder supports length: 1201 -> 1280, 2401 -> 2560
-  char *ldpc_version=NULL; /* version of the ldpc decoder library to use (XXX suffix to use when loading libldpc_XXX.so */
+  int8_t *ldpc_version=NULL; /* version of the ldpc decoder library to use (XXX suffix to use when loading libldpc_XXX.so */
   short max_iterations=5;
   int n_segments=1;
   //double rate=0.333;
@@ -437,7 +445,7 @@ int main(int argc, char *argv[])
   int nom_rate=1;
   int denom_rate=3;
   double SNR0=-2.0,SNR,SNR_lin;
-  unsigned char qbits=8;
+  uint8_t qbits=8;
   unsigned int decoded_errors[10000]; // initiate the size of matrix equivalent to size of SNR
   int c,i=0, i1 = 0;
 

openair1/PHY/CODING/TESTBENCH/polartest.c

@@ -29,6 +29,7 @@ int main(int argc, char *argv[])
   uint32_t decoderState=0, blockErrorState=0; //0 = Success, -1 = Decoding failed, 1 = Block Error.
   uint16_t testLength = NR_POLAR_PBCH_PAYLOAD_BITS, coderLength = NR_POLAR_PBCH_E;
   uint16_t blockErrorCumulative=0, bitErrorCumulative=0;
+  double timeEncoderCumulative = 0, timeDecoderCumulative = 0;
   uint8_t aggregation_level = 8, decoderListSize = 8, logFlag = 0;
   uint16_t rnti=0;
 
@@ -127,7 +128,7 @@ int main(int argc, char *argv[])
   time_t currentTime;
   char fileName[512], currentTimeInfo[25];
   char folderName[] = ".";
-  FILE *logFile = NULL;
+  FILE *logFile;
   /*folderName=getenv("HOME");
     strcat(folderName,"/Desktop/polartestResults");*/
 
@@ -325,6 +326,8 @@ int main(int argc, char *argv[])
 #endif
 
       //Iteration times are in microseconds.
+      timeEncoderCumulative+=(timeEncoder.diff/(get_cpu_freq_GHz()*1000.0));
+      timeDecoderCumulative+=(timeDecoder.diff/(get_cpu_freq_GHz()*1000.0));
       if (logFlag) fprintf(logFile,",%f,%d,%u,%f,%f\n", SNR, nBitError, blockErrorState, (timeEncoder.diff/(get_cpu_freq_GHz()*1000.0)), (timeDecoder.diff/(get_cpu_freq_GHz()*1000.0)));
 
       if (nBitError<0) {
@@ -348,11 +351,14 @@ int main(int argc, char *argv[])
            decoderListSize, SNR, ((double)blockErrorCumulative/iterations),
            ((double)bitErrorCumulative / (iterations*testLength)),
            (double)timeEncoder.diff/timeEncoder.trials/(get_cpu_freq_GHz()*1000.0),(double)timeDecoder.diff/timeDecoder.trials/(get_cpu_freq_GHz()*1000.0));
+    //(timeEncoderCumulative/iterations),timeDecoderCumulative/iterations);
 
     if (blockErrorCumulative==0 && bitErrorCumulative==0) break;
 
     blockErrorCumulative = 0;
     bitErrorCumulative = 0;
+    timeEncoderCumulative = 0;
+    timeDecoderCumulative = 0;
   }
 
   print_meas(&timeEncoder,"polar_encoder",NULL,NULL);

openair1/PHY/CODING/crc.h

@@ -39,9 +39,6 @@
 
 #ifndef __CRC_H__
 #define __CRC_H__
-
-#include <x86intrin.h>
-
 #include "crcext.h"
 #include "types.h"
 #include "PHY/sse_intrin.h"
@@ -305,14 +302,21 @@ uint32_t crc32_calc_slice4(const uint8_t *data,
  * @return New 16 byte folded data
  */
 __forceinline
-__m128i crc32_folding_round(const __m128i data_block,
-                            const __m128i k1_k2,
-                            const __m128i fold)
+simde__m128i crc32_folding_round(const simde__m128i data_block,
+                            const simde__m128i k1_k2,
+                            const simde__m128i fold)
 {
+#ifdef __x86_64__ 
         __m128i tmp = _mm_clmulepi64_si128(fold, k1_k2, 0x11);
 
         return _mm_xor_si128(_mm_clmulepi64_si128(fold, k1_k2, 0x00),
                              _mm_xor_si128(data_block, tmp));
+#else	
+        simde__m128i tmp = simde_mm_clmulepi64_si128(fold, k1_k2, 0x11);
+
+        return simde_mm_xor_si128(simde_mm_clmulepi64_si128(fold, k1_k2, 0x00),
+                             simde_mm_xor_si128(data_block, tmp));
+#endif
 }
 
 /**
@@ -324,17 +328,25 @@ __m128i crc32_folding_round(const __m128i data_block,
  * @return data reduced to 64 bits
  */
 __forceinline
-__m128i crc32_reduce_128_to_64(__m128i data128, const __m128i k3_q)
+simde__m128i crc32_reduce_128_to_64(simde__m128i data128, const simde__m128i k3_q)
 {
-        __m128i tmp;
+        simde__m128i tmp;
 
-        tmp = _mm_xor_si128(_mm_clmulepi64_si128(data128, k3_q, 0x01 /* k3 */),
+#ifdef __x86_64__
+        tmp = simde_mm_xor_si128(_mm_clmulepi64_si128(data128, k3_q, 0x01 /* k3 */),
                             data128);
 
-        data128 = _mm_xor_si128(_mm_clmulepi64_si128(tmp, k3_q, 0x01 /* k3 */),
+        data128 = simde_mm_xor_si128(_mm_clmulepi64_si128(tmp, k3_q, 0x01 /* k3 */),
+                                data128);
+#else
+        tmp = simde_mm_xor_si128(simde_mm_clmulepi64_si128(data128, k3_q, 0x01 /* k3 */),
+                            data128);
+
+        data128 = simde_mm_xor_si128(simde_mm_clmulepi64_si128(tmp, k3_q, 0x01 /* k3 */),
                                 data128);
 
-        return _mm_srli_si128(_mm_slli_si128(data128, 8), 8);
+#endif
+        return simde_mm_srli_si128(simde_mm_slli_si128(data128, 8), 8);
 }
 
 /**
@@ -348,15 +360,22 @@ __m128i crc32_reduce_128_to_64(__m128i data128, const __m128i k3_q)
  */
 __forceinline
 uint32_t
-crc32_reduce_64_to_32(__m128i fold, const __m128i k3_q, const __m128i p_res)
+crc32_reduce_64_to_32(simde__m128i fold, const simde__m128i k3_q, const simde__m128i p_res)
 {
-        __m128i temp;
-
-        temp = _mm_clmulepi64_si128(_mm_srli_si128(fold, 4),
+        simde__m128i temp;
+#ifdef __x86_64__
+        temp = _mm_clmulepi64_si128(simde_mm_srli_si128(fold, 4),
                                     k3_q, 0x10 /* Q */);
-        temp = _mm_srli_si128(_mm_xor_si128(temp, fold), 4);
+        temp = simde_mm_srli_si128(simde_mm_xor_si128(temp, fold), 4);
         temp = _mm_clmulepi64_si128(temp, p_res, 0 /* P */);
-        return _mm_extract_epi32(_mm_xor_si128(temp, fold), 0);
+
+#else
+        temp = simde_mm_clmulepi64_si128(simde_mm_srli_si128(fold, 4),
+                                    k3_q, 0x10 /* Q */);
+        temp = simde_mm_srli_si128(simde_mm_xor_si128(temp, fold), 4);
+        temp = simde_mm_clmulepi64_si128(temp, p_res, 0 /* P */);
+#endif	
+        return simde_mm_extract_epi32(simde_mm_xor_si128(temp, fold), 0);
 }
 
 /**
@@ -379,7 +398,7 @@ crc32_calc_pclmulqdq(const uint8_t *data,
                      uint32_t data_len, uint32_t crc,
                      const struct crc_pclmulqdq_ctx *params)
 {
-        __m128i temp, fold, k, swap;
+        simde__m128i temp, fold, k, swap;
         uint32_t n;
 
         if (unlikely(data == NULL || data_len == 0 || params == NULL))
@@ -405,7 +424,7 @@ crc32_calc_pclmulqdq(const uint8_t *data,
          * Load first 16 data bytes in \a fold and
          * set \a swap BE<->LE 16 byte conversion variable
          */
-        fold = _mm_loadu_si128((__m128i *)data);
+        fold = simde_mm_loadu_si128((simde__m128i *)data);
         swap = crc_xmm_be_le_swap128;
 
         /**
@@ -420,20 +439,20 @@ crc32_calc_pclmulqdq(const uint8_t *data,
                  * - adjust data block
                  * - 4 least significant bytes need to be zero
                  */
-                fold = _mm_shuffle_epi8(fold, swap);
-                fold = _mm_slli_si128(xmm_shift_right(fold, 20 - data_len), 4);
+                fold = simde_mm_shuffle_epi8(fold, swap);
+                fold = simde_mm_slli_si128(xmm_shift_right(fold, 20 - data_len), 4);
 
                 /**
                  * Apply CRC init value
                  */
-                temp = _mm_insert_epi32(_mm_setzero_si128(), bswap4(crc), 0);
+                temp = simde_mm_insert_epi32(simde_mm_setzero_si128(), bswap4(crc), 0);
                 temp = xmm_shift_left(temp, data_len - 4);
-                fold = _mm_xor_si128(fold, temp);
+                fold = simde_mm_xor_si128(fold, temp);
         } else {
                 /**
                  * There are 2x16 data blocks or more
                  */
-                __m128i next_data;
+                simde__m128i next_data;
 
                 /**
                  * n = number of bytes required to align \a data_len
@@ -445,10 +464,10 @@ crc32_calc_pclmulqdq(const uint8_t *data,
                  * Apply CRC initial value and
                  * get \a fold to BE format
                  */
-                fold = _mm_xor_si128(fold,
-                                     _mm_insert_epi32(_mm_setzero_si128(),
+                fold = simde_mm_xor_si128(fold,
+                                     simde_mm_insert_epi32(simde_mm_setzero_si128(),
                                                       crc, 0));
-                fold = _mm_shuffle_epi8(fold, swap);
+                fold = simde_mm_shuffle_epi8(fold, swap);
 
                 /**
                  * Load next 16 bytes of data and
@@ -456,9 +475,9 @@ crc32_calc_pclmulqdq(const uint8_t *data,
                  *
                  * CONCAT(fold,next_data) >> (n*8)
                  */
-                next_data = _mm_loadu_si128((__m128i *)&data[16]);
-                next_data = _mm_shuffle_epi8(next_data, swap);
-                next_data = _mm_or_si128(xmm_shift_right(next_data, n),
+                next_data = simde_mm_loadu_si128((simde__m128i *)&data[16]);
+                next_data = simde_mm_shuffle_epi8(next_data, swap);
+                next_data = simde_mm_or_si128(xmm_shift_right(next_data, n),
                                          xmm_shift_left(fold, 16 - n));
                 fold = xmm_shift_right(fold, n);
 
@@ -467,12 +486,12 @@ crc32_calc_pclmulqdq(const uint8_t *data,
                          * In such unlikely case clear 4 least significant bytes
                          */
                         next_data =
-                                _mm_slli_si128(_mm_srli_si128(next_data, 4), 4);
+                                simde_mm_slli_si128(simde_mm_srli_si128(next_data, 4), 4);
 
                 /**
                  * Do the initial folding round on 2 first 16 byte chunks
                  */
-                k = _mm_load_si128((__m128i *)(&params->k1));
+                k = simde_mm_load_si128((simde__m128i *)(&params->k1));
                 fold = crc32_folding_round(next_data, k, fold);
 
                 if (likely(data_len > 32)) {
@@ -480,7 +499,7 @@ crc32_calc_pclmulqdq(const uint8_t *data,
                          * \a data_block needs to be at least 48 bytes long
                          * in order to get here
                          */
-                        __m128i new_data;
+                        simde__m128i new_data;
 
                         /**
                          * Main folding loop
@@ -493,8 +512,8 @@ crc32_calc_pclmulqdq(const uint8_t *data,
                          * - the last 16 bytes is processed separately
                          */
                         for (n = 16 + 16 - n; n < (data_len - 16); n += 16) {
-                                new_data = _mm_loadu_si128((__m128i *)&data[n]);
-                                new_data = _mm_shuffle_epi8(new_data, swap);
+                                new_data = simde_mm_loadu_si128((simde__m128i *)&data[n]);
+                                new_data = simde_mm_shuffle_epi8(new_data, swap);
                                 fold = crc32_folding_round(new_data, k, fold);
                         }
 
@@ -504,9 +523,9 @@ crc32_calc_pclmulqdq(const uint8_t *data,
                          * Read from offset -4 is to avoid one
                          * shift right operation.
                          */
-                        new_data = _mm_loadu_si128((__m128i *)&data[n - 4]);
-                        new_data = _mm_shuffle_epi8(new_data, swap);
-                        new_data = _mm_slli_si128(new_data, 4);
+                        new_data = simde_mm_loadu_si128((simde__m128i *)&data[n - 4]);
+                        new_data = simde_mm_shuffle_epi8(new_data, swap);
+                        new_data = simde_mm_slli_si128(new_data, 4);
                         fold = crc32_folding_round(new_data, k, fold);
                 } /* if (data_len > 32) */
         }
@@ -520,14 +539,14 @@ crc32_calc_pclmulqdq(const uint8_t *data,
         /**
          * REDUCTION 128 -> 64
          */
-        k = _mm_load_si128((__m128i *)(&params->k3));
+        k = simde_mm_load_si128((simde__m128i *)(&params->k3));
         fold = crc32_reduce_128_to_64(fold, k);
 
         /**
          * REDUCTION 64 -> 32
          */
         n = crc32_reduce_64_to_32(fold, k,
-                                  _mm_load_si128((__m128i *)(&params->p)));
+                                  simde_mm_load_si128((simde__m128i *)(&params->p)));
 
 #ifdef __KERNEL__
         /**

openair1/PHY/CODING/crc_byte.c

@@ -30,30 +30,28 @@
    Modified in June, 2001, to include  the length non multiple of 8
 */
 
-#ifndef __SSE4_1__
+#if !defined(__SSE4_1__) && !defined(__aarch64__)
 #define USE_INTEL_CRC 0
 #else
-#define USE_INTEL_CRC __SSE4_1__
+#define USE_INTEL_CRC 1
+#include "crc.h"
 #endif
 
 #include "coding_defs.h"
 #include "assertions.h"
-#if USE_INTEL_CRC
-#include "crc.h"
-#endif
 /*ref 36-212 v8.6.0 , pp 8-9 */
 /* the highest degree is set by default */
 
-uint32_t poly24a = 0x864cfb00; // 1000 0110 0100 1100 1111 1011
-                               // D^24 + D^23 + D^18 + D^17 + D^14 + D^11 + D^10 + D^7 + D^6 + D^5 + D^4 + D^3 + D + 1
-uint32_t poly24b = 0x80006300; // 1000 0000 0000 0000 0110 0011
-                               // D^24 + D^23 + D^6 + D^5 + D + 1
-uint32_t poly24c = 0xb2b11700; // 1011 0010 1011 0001 0001 0111
-                               // D^24+D^23+D^21+D^20+D^17+D^15+D^13+D^12+D^8+D^4+D^2+D+1
+unsigned int             poly24a = 0x864cfb00;   // 1000 0110 0100 1100 1111 1011
+												 // D^24 + D^23 + D^18 + D^17 + D^14 + D^11 + D^10 + D^7 + D^6 + D^5 + D^4 + D^3 + D + 1
+unsigned int             poly24b = 0x80006300;   // 1000 0000 0000 0000 0110 0011
+											     // D^24 + D^23 + D^6 + D^5 + D + 1
+unsigned int             poly24c = 0xb2b11700;   // 1011 0010 1011 0001 0001 0111
+												 // D^24+D^23+D^21+D^20+D^17+D^15+D^13+D^12+D^8+D^4+D^2+D+1
 
-uint32_t poly16 = 0x10210000; // 0001 0000 0010 0001            D^16 + D^12 + D^5 + 1
-uint32_t poly12 = 0x80F00000; // 1000 0000 1111                 D^12 + D^11 + D^3 + D^2 + D + 1
-uint32_t poly8 = 0x9B000000; // 1001 1011                      D^8  + D^7  + D^4 + D^3 + D + 1
+unsigned int             poly16 = 0x10210000;    // 0001 0000 0010 0001            D^16 + D^12 + D^5 + 1
+unsigned int             poly12 = 0x80F00000;    // 1000 0000 1111                 D^12 + D^11 + D^3 + D^2 + D + 1
+unsigned int             poly8 = 0x9B000000;     // 1001 1011                      D^8  + D^7  + D^4 + D^3 + D + 1
 uint32_t poly6 = 0x84000000; // 10000100000... -> D^6+D^5+1
 uint32_t poly11 = 0xc4200000; //11000100001000... -> D^11+D^10+D^9+D^5+1
 
@@ -65,12 +63,14 @@ For initialization && verification purposes,
 The first bit is in the MSB of each byte
 
 *********************************************************/
-uint32_t crcbit(unsigned char* inputptr, int octetlen, uint32_t poly)
+unsigned int crcbit (unsigned char * inputptr,
+		     int octetlen,
+		     unsigned int poly)
 {
-  uint32_t i, crc = 0, c;
+  unsigned int i, crc = 0, c;
 
   while (octetlen-- > 0) {
-    c = ((uint32_t)(*inputptr++)) << 24;
+    c = ((unsigned int)(*inputptr++)) << 24;
 
     for (i = 8; i != 0; i--) {
       if ((1U << 31) & (c ^ crc))
@@ -90,16 +90,16 @@ uint32_t crcbit(unsigned char* inputptr, int octetlen, uint32_t poly)
 crc table initialization
 
 *********************************************************/
-static uint32_t crc24aTable[256];
-static uint32_t crc24bTable[256];
-static uint32_t crc24cTable[256];
-static uint32_t crc16Table[256];
-static uint32_t crc12Table[256];
-static uint32_t crc11Table[256];
-static uint32_t crc8Table[256];
-static uint32_t crc6Table[256];
+static unsigned int        crc24aTable[256];
+static unsigned int        crc24bTable[256];
+static unsigned int        crc24cTable[256];
+static unsigned short      crc16Table[256];
+static unsigned short      crc12Table[256];
+static unsigned short      crc11Table[256];
+static unsigned char       crc8Table[256];
+static unsigned char       crc6Table[256];
 
-#if USE_INTEL_CRC
+#if defined(__SSE4_1__) || defined(__aarch64__) 
 static DECLARE_ALIGNED(struct crc_pclmulqdq_ctx lte_crc24a_pclmulqdq, 16) = {
         0x64e4d700,     /**< k1 */
         0x2c8c9d00,     /**< k2 */
@@ -108,7 +108,7 @@ static DECLARE_ALIGNED(struct crc_pclmulqdq_ctx lte_crc24a_pclmulqdq, 16) = {
         0x864cfb00,     /**< p */
         0ULL            /**< res */
 };
-__m128i crc_xmm_be_le_swap128;
+simde__m128i crc_xmm_be_le_swap128;
 
 DECLARE_ALIGNED(const uint8_t crc_xmm_shift_tab[48], 16) = {
         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
@@ -129,15 +129,15 @@ void crcTableInit (void)
     crc24aTable[c] = crcbit (&c, 1, poly24a);
     crc24bTable[c] = crcbit (&c, 1, poly24b);
     crc24cTable[c] = crcbit (&c, 1, poly24c);
-    crc16Table[c] = crcbit(&c, 1, poly16) >> 16;
-    crc12Table[c] = crcbit(&c, 1, poly12) >> 16;
-    crc11Table[c] = crcbit(&c, 1, poly11) >> 16;
-    crc8Table[c] = crcbit(&c, 1, poly8) >> 24;
-    crc6Table[c] = crcbit(&c, 1, poly6) >> 24;
+    crc16Table[c] = (unsigned short) (crcbit (&c, 1, poly16) >> 16);
+    crc12Table[c] = (unsigned short) (crcbit (&c, 1, poly12) >> 16);
+    crc11Table[c] = (unsigned short) (crcbit (&c, 1, poly11) >> 16);
+    crc8Table[c] = (unsigned char) (crcbit (&c, 1, poly8) >> 24);
+    crc6Table[c] = (unsigned char) (crcbit (&c, 1, poly6) >> 24);
   } while (++c);
-#if USE_INTEL_CRC
-    crc_xmm_be_le_swap128 = _mm_setr_epi32(0x0c0d0e0f, 0x08090a0b,
-					   0x04050607, 0x00010203);
+#if defined(__SSE4_1__) || defined(__aarch64__) 
+    crc_xmm_be_le_swap128 = simde_mm_setr_epi32(0x0c0d0e0f, 0x08090a0b,
+				    	        0x04050607, 0x00010203);
 
 #endif
 }
@@ -149,24 +149,25 @@ assuming initial byte is 0 padded (in MSB) if necessary
 can use SIMD optimized Intel CRC for LTE/NR 24a/24b variants
 *********************************************************/
 
-uint32_t crc24a(unsigned char* inptr, int bitlen)
+unsigned int crc24a (unsigned char * inptr,
+					 int bitlen)
 {
   int octetlen = bitlen / 8;  /* Change in octets */
 
   if ( bitlen % 8 || !USE_INTEL_CRC ) {
-    uint32_t crc = 0;
-    int resbit = (bitlen % 8);
+  unsigned int      crc = 0;
+  int resbit= (bitlen % 8);
 
-    while (octetlen-- > 0) {
-      //   printf("crc24a: in %x => crc %x\n",crc,*inptr);
-      crc = (crc << 8) ^ crc24aTable[(*inptr++) ^ (crc >> 24)];
-    }
+  while (octetlen-- > 0) {
+    //   printf("crc24a: in %x => crc %x\n",crc,*inptr);
+    crc = (crc << 8) ^ crc24aTable[(*inptr++) ^ (crc >> 24)];
+  }
 
   if (resbit > 0)
     crc = (crc << resbit) ^ crc24aTable[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))];
   return crc;
   }
-  #if USE_INTEL_CRC
+  #if defined(__SSE4_1__) || defined(__aarch64__) 
   else {
   return crc32_calc_pclmulqdq(inptr, octetlen, 0,
                               &lte_crc24a_pclmulqdq);
@@ -175,7 +176,7 @@ uint32_t crc24a(unsigned char* inptr, int bitlen)
 
 }
 
-#if USE_INTEL_CRC
+#if defined(__SSE4_1__) || defined(__aarch64__)
 static DECLARE_ALIGNED(struct crc_pclmulqdq_ctx lte_crc24b_pclmulqdq, 16) = {
         0x80140500,     /**< k1 */
         0x42000100,     /**< k2 */
@@ -185,18 +186,19 @@ static DECLARE_ALIGNED(struct crc_pclmulqdq_ctx lte_crc24b_pclmulqdq, 16) = {
         0ULL            /**< res */
 };
 #endif
-uint32_t crc24b(unsigned char* inptr, int bitlen)
+unsigned int crc24b (unsigned char * inptr,
+	   	     int bitlen)
 {
   int octetlen = bitlen / 8;  /* Change in octets */
 
   if ( bitlen % 8 || !USE_INTEL_CRC ) {
-    uint32_t crc = 0;
-    int resbit = (bitlen % 8);
+  unsigned int crc = 0;
+  int resbit = (bitlen % 8);
 
-    while (octetlen-- > 0) {
-      //    printf("crc24b: in %x => crc %x (%x)\n",crc,*inptr,crc24bTable[(*inptr) ^ (crc >> 24)]);
-      crc = (crc << 8) ^ crc24bTable[(*inptr++) ^ (crc >> 24)];
-    }
+  while (octetlen-- > 0) {
+    //    printf("crc24b: in %x => crc %x (%x)\n",crc,*inptr,crc24bTable[(*inptr) ^ (crc >> 24)]);
+    crc = (crc << 8) ^ crc24bTable[(*inptr++) ^ (crc >> 24)];
+  }
 
   if (resbit > 0)
     crc = (crc << resbit) ^ crc24bTable[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))];
@@ -211,10 +213,11 @@ uint32_t crc24b(unsigned char* inptr, int bitlen)
 #endif
 }
 
-uint32_t crc24c(unsigned char* inptr, int bitlen)
+unsigned int crc24c (unsigned char * inptr,
+					 int bitlen)
 {
   int octetlen, resbit;
-  uint32_t crc = 0;
+  unsigned int crc = 0;
   octetlen = bitlen / 8;        /* Change in octets */
   resbit = (bitlen % 8);
 
@@ -229,10 +232,11 @@ uint32_t crc24c(unsigned char* inptr, int bitlen)
   return crc;
 }
 
-uint32_t crc16(unsigned char* inptr, int bitlen)
+unsigned int
+crc16 (unsigned char * inptr, int bitlen)
 {
   int             octetlen, resbit;
-  uint32_t crc = 0;
+  unsigned int             crc = 0;
   octetlen = bitlen / 8;        /* Change in octets */
   resbit = (bitlen % 8);
 
@@ -247,10 +251,11 @@ uint32_t crc16(unsigned char* inptr, int bitlen)
   return crc;
 }
 
-uint32_t crc12(unsigned char* inptr, int bitlen)
+unsigned int
+crc12 (unsigned char * inptr, int bitlen)
 {
   int             octetlen, resbit;
-  uint32_t crc = 0;
+  unsigned int             crc = 0;
   octetlen = bitlen / 8;        /* Change in octets */
   resbit = (bitlen % 8);
 
@@ -264,10 +269,11 @@ uint32_t crc12(unsigned char* inptr, int bitlen)
   return crc;
 }
 
-uint32_t crc11(unsigned char* inptr, int bitlen)
+unsigned int
+crc11 (unsigned char * inptr, int bitlen)
 {
   int             octetlen, resbit;
-  uint32_t crc = 0;
+  unsigned int             crc = 0;
   octetlen = bitlen / 8;        /* Change in octets */
   resbit = (bitlen % 8);
 
@@ -281,27 +287,29 @@ uint32_t crc11(unsigned char* inptr, int bitlen)
   return crc;
 }
 
-uint32_t crc8(unsigned char* inptr, int bitlen)
+unsigned int
+crc8 (unsigned char * inptr, int bitlen)
 {
   int             octetlen, resbit;
-  uint32_t crc = 0;
+  unsigned int             crc = 0;
   octetlen = bitlen / 8;        /* Change in octets */
   resbit = (bitlen % 8);
 
   while (octetlen-- > 0) {
-    crc = ((uint32_t)crc8Table[(*inptr++) ^ (crc >> 24)]) << 24;
+    crc = ((unsigned int)crc8Table[(*inptr++) ^ (crc >> 24)]) << 24;
   }
 
   if (resbit > 0)
-    crc = (crc << resbit) ^ ((uint32_t)(crc8Table[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))]) << 24);
+    crc = (crc << resbit) ^ ((unsigned int)(crc8Table[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))]) << 24);
 
   return crc;
 }
 
-uint32_t crc6(unsigned char* inptr, int bitlen)
+unsigned int
+crc6 (unsigned char * inptr, int bitlen)
 {
   int             octetlen, resbit;
-  uint32_t crc = 0;
+  unsigned int             crc = 0;
   octetlen = bitlen / 8;        /* Change in octets */
   resbit = (bitlen % 8);
 

openair1/PHY/CODING/crcext.h

@@ -33,7 +33,7 @@
 #ifndef __CRCEXT_H__
 #define __CRCEXT_H__
 
-#include <x86intrin.h>
+#include "PHY/sse_intrin.h"
 #include "types.h"
 /**
  * Flag indicating availability of PCLMULQDQ instruction
@@ -45,7 +45,7 @@ extern int pclmulqdq_available;
  * Flag indicating availability of PCLMULQDQ instruction
  * Only valid after running CRCInit() function.
  */
-extern __m128i crc_xmm_be_le_swap128;
+extern simde__m128i crc_xmm_be_le_swap128;
 extern const uint8_t crc_xmm_shift_tab[48];
 
 /**
@@ -57,11 +57,11 @@ extern const uint8_t crc_xmm_shift_tab[48];
  * @return \a reg >> (\a num * 8)
  */
 __forceinline
-__m128i xmm_shift_right(__m128i reg, const unsigned int num)
+simde__m128i xmm_shift_right(simde__m128i reg, const unsigned int num)
 {
-        const __m128i *p = (const __m128i *)(crc_xmm_shift_tab + 16 + num);
+        const simde__m128i *p = (const simde__m128i *)(crc_xmm_shift_tab + 16 + num);
 
-        return _mm_shuffle_epi8(reg, _mm_loadu_si128(p));
+        return simde_mm_shuffle_epi8(reg, simde_mm_loadu_si128(p));
 }
 
 /**
@@ -73,11 +73,11 @@ __m128i xmm_shift_right(__m128i reg, const unsigned int num)
  * @return \a reg << (\a num * 8)
  */
 __forceinline
-__m128i xmm_shift_left(__m128i reg, const unsigned int num)
+simde__m128i xmm_shift_left(simde__m128i reg, const unsigned int num)
 {
-        const __m128i *p = (const __m128i *)(crc_xmm_shift_tab + 16 - num);
+        const simde__m128i *p = (const simde__m128i *)(crc_xmm_shift_tab + 16 - num);
 
-        return _mm_shuffle_epi8(reg, _mm_loadu_si128(p));
+        return simde_mm_shuffle_epi8(reg, simde_mm_loadu_si128(p));
 }
 
 /**
@@ -87,3 +87,4 @@ __m128i xmm_shift_left(__m128i reg, const unsigned int num)
 extern void CRCInit(void);
 
 #endif /* __CRCEXT_H__ */
+

openair1/PHY/CODING/lte_rate_matching.c

@@ -174,7 +174,7 @@ uint32_t sub_block_interleaving_cc(uint32_t D, uint8_t *d,uint8_t *w) {
 
 void sub_block_deinterleaving_turbo(uint32_t D,int16_t *d,int16_t *w) {
   uint32_t RTC = (D>>5), ND, ND3;
-  uint32_t row,col,Kpi;
+  uint32_t row,col,Kpi,index;
   uint32_t index3,k,k2;
   int16_t *d1,*d2,*d3;
 
@@ -200,6 +200,7 @@ void sub_block_deinterleaving_turbo(uint32_t D,int16_t *d,int16_t *w) {
 #ifdef RM_DEBUG2
     printf("Col %d\n",col);
 #endif
+    index = bitrev[col];
     index3 = bitrev_x3[col];//3*index;
 
     for (row=0; row<RTC; row++) {
@@ -207,6 +208,7 @@ void sub_block_deinterleaving_turbo(uint32_t D,int16_t *d,int16_t *w) {
       d2[index3]   = w[Kpi+k2];
       d3[index3]   = w[Kpi+1+k2];
       index3+=96;
+      index+=32;
       k++;
       k2++;
       k2++;

openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_cnProc.h

@@ -49,8 +49,8 @@ static inline void nrLDPC_cnProc_BG2(t_nrLDPC_lut* p_lut, int8_t* cnProcBuf, int
     const uint8_t*  lut_numCnInCnGroups   = p_lut->numCnInCnGroups;
     const uint32_t* lut_startAddrCnGroups = p_lut->startAddrCnGroups;
 
-    __m256i* p_cnProcBuf;
-    __m256i* p_cnProcBufRes;
+    simde__m256i* p_cnProcBuf;
+    simde__m256i* p_cnProcBufRes;
 
     // Number of CNs in Groups
     uint32_t M;
@@ -60,11 +60,11 @@ static inline void nrLDPC_cnProc_BG2(t_nrLDPC_lut* p_lut, int8_t* cnProcBuf, int
     // Offset to each bit within a group in terms of 32 Byte
     uint32_t bitOffsetInGroup;
 
-    __m256i ymm0, min, sgn;
-    __m256i* p_cnProcBufResBit;
+    simde__m256i ymm0, min, sgn;
+    simde__m256i* p_cnProcBufResBit;
 
-    const __m256i* p_ones   = (__m256i*) ones256_epi8;
-    const __m256i* p_maxLLR = (__m256i*) maxLLR256_epi8;
+    const simde__m256i* p_ones   = (simde__m256i*) ones256_epi8;
+    const simde__m256i* p_maxLLR = (simde__m256i*) maxLLR256_epi8;
 
     // LUT with offsets for bits that need to be processed
     // 1. bit proc requires LLRs of 2. and 3. bit, 2.bits of 1. and 3. etc.
@@ -83,8 +83,8 @@ static inline void nrLDPC_cnProc_BG2(t_nrLDPC_lut* p_lut, int8_t* cnProcBuf, int
         bitOffsetInGroup = (lut_numCnInCnGroups_BG2_R15[0]*NR_LDPC_ZMAX)>>5;
 
         // Set pointers to start of group 3
-        p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[0]];
-        p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[0]];
+        p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[0]];
+        p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[0]];
 
         // Loop over every BN
         for (j=0; j<3; j++)
@@ -92,8 +92,8 @@ static inline void nrLDPC_cnProc_BG2(t_nrLDPC_lut* p_lut, int8_t* cnProcBuf, int
             // Set of results pointer to correct BN address
             p_cnProcBufResBit = p_cnProcBufRes + (j*bitOffsetInGroup);
 
-            __m256i *pj0 = &p_cnProcBuf[lut_idxCnProcG3[j][0]];
-            __m256i *pj1 = &p_cnProcBuf[lut_idxCnProcG3[j][1]];
+            simde__m256i *pj0 = &p_cnProcBuf[lut_idxCnProcG3[j][0]];
+            simde__m256i *pj1 = &p_cnProcBuf[lut_idxCnProcG3[j][1]];
 
             // Loop over CNs
             for (i=0; i<M; i++)
@@ -134,8 +134,8 @@ static inline void nrLDPC_cnProc_BG2(t_nrLDPC_lut* p_lut, int8_t* cnProcBuf, int
         bitOffsetInGroup = (lut_numCnInCnGroups_BG2_R15[1]*NR_LDPC_ZMAX)>>5;
 
         // Set pointers to start of group 4
-        p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[1]];
-        p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[1]];
+        p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[1]];
+        p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[1]];
 
         // Loop over every BN
         for (j=0; j<4; j++)
@@ -183,8 +183,8 @@ static inline void nrLDPC_cnProc_BG2(t_nrLDPC_lut* p_lut, int8_t* cnProcBuf, int
         bitOffsetInGroup = (lut_numCnInCnGroups_BG2_R15[2]*NR_LDPC_ZMAX)>>5;
 
         // Set pointers to start of group 5
-        p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[2]];
-        p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[2]];
+        p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[2]];
+        p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[2]];
 
         // Loop over every BN
         for (j=0; j<5; j++)
@@ -233,8 +233,8 @@ static inline void nrLDPC_cnProc_BG2(t_nrLDPC_lut* p_lut, int8_t* cnProcBuf, int
         bitOffsetInGroup = (lut_numCnInCnGroups_BG2_R15[3]*NR_LDPC_ZMAX)>>5;
 
         // Set pointers to start of group 6
-        p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[3]];
-        p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[3]];
+        p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[3]];
+        p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[3]];
 
         // Loop over every BN
         for (j=0; j<6; j++)
@@ -284,8 +284,8 @@ static inline void nrLDPC_cnProc_BG2(t_nrLDPC_lut* p_lut, int8_t* cnProcBuf, int
         bitOffsetInGroup = (lut_numCnInCnGroups_BG2_R15[4]*NR_LDPC_ZMAX)>>5;
 
         // Set pointers to start of group 8
-        p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[4]];
-        p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[4]];
+        p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[4]];
+        p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[4]];
 
         // Loop over every BN
         for (j=0; j<8; j++)
@@ -336,8 +336,8 @@ static inline void nrLDPC_cnProc_BG2(t_nrLDPC_lut* p_lut, int8_t* cnProcBuf, int
         bitOffsetInGroup = (lut_numCnInCnGroups_BG2_R15[5]*NR_LDPC_ZMAX)>>5;
 
         // Set pointers to start of group 10
-        p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[5]];
-        p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[5]];
+        p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[5]];
+        p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[5]];
 
         // Loop over every BN
         for (j=0; j<10; j++)
@@ -390,8 +390,8 @@ static inline void nrLDPC_cnProc_BG1(t_nrLDPC_lut* p_lut, int8_t* cnProcBuf, int
     const uint8_t*  lut_numCnInCnGroups   = p_lut->numCnInCnGroups;
     const uint32_t* lut_startAddrCnGroups = p_lut->startAddrCnGroups;
 
-    __m256i* p_cnProcBuf;
-    __m256i* p_cnProcBufRes;
+    simde__m256i* p_cnProcBuf;
+    simde__m256i* p_cnProcBufRes;
 
     // Number of CNs in Groups
     uint32_t M;
@@ -401,11 +401,11 @@ static inline void nrLDPC_cnProc_BG1(t_nrLDPC_lut* p_lut, int8_t* cnProcBuf, int
     // Offset to each bit within a group in terms of 32 Byte
     uint32_t bitOffsetInGroup;
 
-    __m256i ymm0, min, sgn;
-    __m256i* p_cnProcBufResBit;
+    simde__m256i ymm0, min, sgn;
+    simde__m256i* p_cnProcBufResBit;
 
-    const __m256i* p_ones   = (__m256i*) ones256_epi8;
-    const __m256i* p_maxLLR = (__m256i*) maxLLR256_epi8;
+    const simde__m256i* p_ones   = (simde__m256i*) ones256_epi8;
+    const simde__m256i* p_maxLLR = (simde__m256i*) maxLLR256_epi8;
 
     // LUT with offsets for bits that need to be processed
     // 1. bit proc requires LLRs of 2. and 3. bit, 2.bits of 1. and 3. etc.
@@ -425,8 +425,8 @@ static inline void nrLDPC_cnProc_BG1(t_nrLDPC_lut* p_lut, int8_t* cnProcBuf, int
         bitOffsetInGroup = (lut_numCnInCnGroups_BG1_R13[0]*NR_LDPC_ZMAX)>>5;
 
         // Set pointers to start of group 3
-        p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[0]];
-        p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[0]];
+        p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[0]];
+        p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[0]];
 
         // Loop over every BN
         for (j=0; j<3; j++)
@@ -472,8 +472,8 @@ static inline void nrLDPC_cnProc_BG1(t_nrLDPC_lut* p_lut, int8_t* cnProcBuf, int
         bitOffsetInGroup = (lut_numCnInCnGroups_BG1_R13[1]*NR_LDPC_ZMAX)>>5;
 
         // Set pointers to start of group 4
-        p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[1]];
-        p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[1]];
+        p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[1]];
+        p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[1]];
 
         // Loop over every BN
         for (j=0; j<4; j++)
@@ -522,8 +522,8 @@ static inline void nrLDPC_cnProc_BG1(t_nrLDPC_lut* p_lut, int8_t* cnProcBuf, int
         bitOffsetInGroup = (lut_numCnInCnGroups_BG1_R13[2]*NR_LDPC_ZMAX)>>5;
 
         // Set pointers to start of group 5
-        p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[2]];
-        p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[2]];
+        p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[2]];
+        p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[2]];
 
         // Loop over every BN
         for (j=0; j<5; j++)
@@ -573,8 +573,8 @@ static inline void nrLDPC_cnProc_BG1(t_nrLDPC_lut* p_lut, int8_t* cnProcBuf, int
         bitOffsetInGroup = (lut_numCnInCnGroups_BG1_R13[3]*NR_LDPC_ZMAX)>>5;
 
         // Set pointers to start of group 6
-        p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[3]];
-        p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[3]];
+        p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[3]];
+        p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[3]];
 
         // Loop over every BN
         for (j=0; j<6; j++)
@@ -625,8 +625,8 @@ static inline void nrLDPC_cnProc_BG1(t_nrLDPC_lut* p_lut, int8_t* cnProcBuf, int
         bitOffsetInGroup = (lut_numCnInCnGroups_BG1_R13[4]*NR_LDPC_ZMAX)>>5;
 
         // Set pointers to start of group 7
-        p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[4]];
-        p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[4]];
+        p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[4]];
+        p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[4]];
 
         // Loop over every BN
         for (j=0; j<7; j++)
@@ -677,8 +677,8 @@ static inline void nrLDPC_cnProc_BG1(t_nrLDPC_lut* p_lut, int8_t* cnProcBuf, int
         bitOffsetInGroup = (lut_numCnInCnGroups_BG1_R13[5]*NR_LDPC_ZMAX)>>5;
 
         // Set pointers to start of group 8
-        p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[5]];
-        p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[5]];
+        p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[5]];
+        p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[5]];
 
         // Loop over every BN
         for (j=0; j<8; j++)
@@ -730,8 +730,8 @@ static inline void nrLDPC_cnProc_BG1(t_nrLDPC_lut* p_lut, int8_t* cnProcBuf, int
         bitOffsetInGroup = (lut_numCnInCnGroups_BG1_R13[6]*NR_LDPC_ZMAX)>>5;
 
         // Set pointers to start of group 9
-        p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[6]];
-        p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[6]];
+        p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[6]];
+        p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[6]];
 
         // Loop over every BN
         for (j=0; j<9; j++)
@@ -783,8 +783,8 @@ static inline void nrLDPC_cnProc_BG1(t_nrLDPC_lut* p_lut, int8_t* cnProcBuf, int
         bitOffsetInGroup = (lut_numCnInCnGroups_BG1_R13[7]*NR_LDPC_ZMAX)>>5;
 
         // Set pointers to start of group 10
-        p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[7]];
-        p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[7]];
+        p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[7]];
+        p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[7]];
 
         // Loop over every BN
         for (j=0; j<10; j++)
@@ -841,8 +841,8 @@ static inline void nrLDPC_cnProc_BG1(t_nrLDPC_lut* p_lut, int8_t* cnProcBuf, int
         bitOffsetInGroup = (lut_numCnInCnGroups_BG1_R13[8]*NR_LDPC_ZMAX)>>5;
 
         // Set pointers to start of group 19
-        p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[8]];
-        p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[8]];
+        p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[8]];
+        p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[8]];
 
         // Loop over every BN
         for (j=0; j<19; j++)
@@ -889,8 +889,8 @@ static inline uint32_t nrLDPC_cnProcPc_BG1(t_nrLDPC_lut* p_lut, int8_t* cnProcBu
     const uint8_t*  lut_numCnInCnGroups   = p_lut->numCnInCnGroups;
     const uint32_t* lut_startAddrCnGroups = p_lut->startAddrCnGroups;
 
-    __m256i* p_cnProcBuf;
-    __m256i* p_cnProcBufRes;
+    simde__m256i* p_cnProcBuf;
+    simde__m256i* p_cnProcBufRes;
 
     // Number of CNs in Groups
     uint32_t M;
@@ -901,7 +901,7 @@ static inline uint32_t nrLDPC_cnProcPc_BG1(t_nrLDPC_lut* p_lut, int8_t* cnProcBu
     uint32_t Mrem;
     uint32_t M32;
 
-    __m256i ymm0, ymm1;
+    simde__m256i ymm0, ymm1;
 
     // =====================================================================
     // Process group with 3 BNs
@@ -920,8 +920,8 @@ static inline uint32_t nrLDPC_cnProcPc_BG1(t_nrLDPC_lut* p_lut, int8_t* cnProcBu
         M32 = (M + 31)>>5;
 
         // Set pointers to start of group 3
-        p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[0]];
-        p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[0]];
+        p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[0]];
+        p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[0]];
 
         // Loop over CNs
         for (i=0; i<(M32-1); i++)
@@ -988,8 +988,8 @@ static inline uint32_t nrLDPC_cnProcPc_BG1(t_nrLDPC_lut* p_lut, int8_t* cnProcBu
         M32 = (M + 31)>>5;
 
         // Set pointers to start of group 4
-        p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[1]];
-        p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[1]];
+        p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[1]];
+        p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[1]];
 
         // Loop over CNs
         for (i=0; i<(M32-1); i++)
@@ -1056,8 +1056,8 @@ static inline uint32_t nrLDPC_cnProcPc_BG1(t_nrLDPC_lut* p_lut, int8_t* cnProcBu
         M32 = (M + 31)>>5;
 
         // Set pointers to start of group 5
-        p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[2]];
-        p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[2]];
+        p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[2]];
+        p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[2]];
 
         // Loop over CNs
         for (i=0; i<(M32-1); i++)
@@ -1125,8 +1125,8 @@ static inline uint32_t nrLDPC_cnProcPc_BG1(t_nrLDPC_lut* p_lut, int8_t* cnProcBu
         M32 = (M + 31)>>5;
 
         // Set pointers to start of group 6
-        p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[3]];
-        p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[3]];
+        p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[3]];
+        p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[3]];
 
         // Loop over CNs
         for (i=0; i<(M32-1); i++)
@@ -1193,8 +1193,8 @@ static inline uint32_t nrLDPC_cnProcPc_BG1(t_nrLDPC_lut* p_lut, int8_t* cnProcBu
         M32 = (M + 31)>>5;
 
         // Set pointers to start of group 7
-        p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[4]];
-        p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[4]];
+        p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[4]];
+        p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[4]];
 
         // Loop over CNs
         for (i=0; i<(M32-1); i++)
@@ -1261,8 +1261,8 @@ static inline uint32_t nrLDPC_cnProcPc_BG1(t_nrLDPC_lut* p_lut, int8_t* cnProcBu
         M32 = (M + 31)>>5;
 
         // Set pointers to start of group 8
-        p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[5]];
-        p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[5]];
+        p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[5]];
+        p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[5]];
 
         // Loop over CNs
         for (i=0; i<(M32-1); i++)
@@ -1329,8 +1329,8 @@ static inline uint32_t nrLDPC_cnProcPc_BG1(t_nrLDPC_lut* p_lut, int8_t* cnProcBu
         M32 = (M + 31)>>5;
 
         // Set pointers to start of group 9
-        p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[6]];
-        p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[6]];
+        p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[6]];
+        p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[6]];
 
         // Loop over CNs
         for (i=0; i<(M32-1); i++)
@@ -1397,8 +1397,8 @@ static inline uint32_t nrLDPC_cnProcPc_BG1(t_nrLDPC_lut* p_lut, int8_t* cnProcBu
         M32 = (M + 31)>>5;
 
         // Set pointers to start of group 10
-        p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[7]];
-        p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[7]];
+        p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[7]];
+        p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[7]];
 
         // Loop over CNs
         for (i=0; i<(M32-1); i++)
@@ -1465,8 +1465,8 @@ static inline uint32_t nrLDPC_cnProcPc_BG1(t_nrLDPC_lut* p_lut, int8_t* cnProcBu
         M32 = (M + 31)>>5;
 
         // Set pointers to start of group 19
-        p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[8]];
-        p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[8]];
+        p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[8]];
+        p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[8]];
 
         // Loop over CNs
         for (i=0; i<(M32-1); i++)
@@ -1530,8 +1530,8 @@ static inline uint32_t nrLDPC_cnProcPc_BG2(t_nrLDPC_lut* p_lut, int8_t* cnProcBu
     const uint8_t*  lut_numCnInCnGroups   = p_lut->numCnInCnGroups;
     const uint32_t* lut_startAddrCnGroups = p_lut->startAddrCnGroups;
 
-    __m256i* p_cnProcBuf;
-    __m256i* p_cnProcBufRes;
+    simde__m256i* p_cnProcBuf;
+    simde__m256i* p_cnProcBufRes;
 
     // Number of CNs in Groups
     uint32_t M;
@@ -1542,7 +1542,7 @@ static inline uint32_t nrLDPC_cnProcPc_BG2(t_nrLDPC_lut* p_lut, int8_t* cnProcBu
     uint32_t Mrem;
     uint32_t M32;
 
-    __m256i ymm0, ymm1;
+    simde__m256i ymm0, ymm1;
 
     // =====================================================================
     // Process group with 3 BNs
@@ -1561,8 +1561,8 @@ static inline uint32_t nrLDPC_cnProcPc_BG2(t_nrLDPC_lut* p_lut, int8_t* cnProcBu
         M32 = (M + 31)>>5;
 
         // Set pointers to start of group 3
-        p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[0]];
-        p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[0]];
+        p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[0]];
+        p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[0]];
 
         // Loop over CNs
         for (i=0; i<(M32-1); i++)
@@ -1629,8 +1629,8 @@ static inline uint32_t nrLDPC_cnProcPc_BG2(t_nrLDPC_lut* p_lut, int8_t* cnProcBu
         M32 = (M + 31)>>5;
 
         // Set pointers to start of group 4
-        p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[1]];
-        p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[1]];
+        p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[1]];
+        p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[1]];
 
         // Loop over CNs
         for (i=0; i<(M32-1); i++)
@@ -1697,8 +1697,8 @@ static inline uint32_t nrLDPC_cnProcPc_BG2(t_nrLDPC_lut* p_lut, int8_t* cnProcBu
         M32 = (M + 31)>>5;
 
         // Set pointers to start of group 5
-        p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[2]];
-        p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[2]];
+        p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[2]];
+        p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[2]];
 
         // Loop over CNs
         for (i=0; i<(M32-1); i++)
@@ -1765,8 +1765,8 @@ static inline uint32_t nrLDPC_cnProcPc_BG2(t_nrLDPC_lut* p_lut, int8_t* cnProcBu
         M32 = (M + 31)>>5;
 
         // Set pointers to start of group 6
-        p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[3]];
-        p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[3]];
+        p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[3]];
+        p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[3]];
 
         // Loop over CNs
         for (i=0; i<(M32-1); i++)
@@ -1833,8 +1833,8 @@ static inline uint32_t nrLDPC_cnProcPc_BG2(t_nrLDPC_lut* p_lut, int8_t* cnProcBu
         M32 = (M + 31)>>5;
 
         // Set pointers to start of group 8
-        p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[4]];
-        p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[4]];
+        p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[4]];
+        p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[4]];
 
         // Loop over CNs
         for (i=0; i<(M32-1); i++)
@@ -1901,8 +1901,8 @@ static inline uint32_t nrLDPC_cnProcPc_BG2(t_nrLDPC_lut* p_lut, int8_t* cnProcBu
         M32 = (M + 31)>>5;
 
         // Set pointers to start of group 10
-        p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[5]];
-        p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[5]];
+        p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[5]];
+        p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[5]];
 
         // Loop over CNs
         for (i=0; i<(M32-1); i++)

openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder.c

@@ -52,7 +52,7 @@
 #include "cnProc_avx512/nrLDPC_cnProc_BG2_R13_AVX512.h"
 #include "cnProc_avx512/nrLDPC_cnProc_BG2_R23_AVX512.h"
 
-#else
+#elif defined(__AVX2__)
 
 /*----------------------------------------------------------------------
 |                  cn Processing files -->AVX2
@@ -67,6 +67,16 @@
 #include "cnProc/nrLDPC_cnProc_BG2_R13_AVX2.h"
 #include "cnProc/nrLDPC_cnProc_BG2_R23_AVX2.h"
 
+#else
+
+//BG1------------------------------------------------------------------
+#include "cnProc128/nrLDPC_cnProc_BG1_R13_128.h"
+#include "cnProc128/nrLDPC_cnProc_BG1_R23_128.h"
+#include "cnProc128/nrLDPC_cnProc_BG1_R89_128.h"
+//BG2 --------------------------------------------------------------------
+#include "cnProc128/nrLDPC_cnProc_BG2_R15_128.h"
+#include "cnProc128/nrLDPC_cnProc_BG2_R13_128.h"
+#include "cnProc128/nrLDPC_cnProc_BG2_R23_128.h"
 #endif
 
 /*----------------------------------------------------------------------
@@ -74,6 +84,7 @@
 /----------------------------------------------------------------------*/
 
 //bnProcPc-------------------------------------------------------------
+#ifdef __AVX2__
 //BG1------------------------------------------------------------------
 #include "bnProcPc/nrLDPC_bnProcPc_BG1_R13_AVX2.h"
 #include "bnProcPc/nrLDPC_bnProcPc_BG1_R23_AVX2.h"
@@ -82,6 +93,14 @@
 #include "bnProcPc/nrLDPC_bnProcPc_BG2_R15_AVX2.h"
 #include "bnProcPc/nrLDPC_bnProcPc_BG2_R13_AVX2.h"
 #include "bnProcPc/nrLDPC_bnProcPc_BG2_R23_AVX2.h"
+#else
+#include "bnProcPc128/nrLDPC_bnProcPc_BG1_R13_128.h"
+#include "bnProcPc128/nrLDPC_bnProcPc_BG1_R23_128.h"
+#include "bnProcPc128/nrLDPC_bnProcPc_BG1_R89_128.h"
+#include "bnProcPc128/nrLDPC_bnProcPc_BG2_R15_128.h"
+#include "bnProcPc128/nrLDPC_bnProcPc_BG2_R13_128.h"
+#include "bnProcPc128/nrLDPC_bnProcPc_BG2_R23_128.h"
+#endif
 
 //bnProc----------------------------------------------------------------
 
@@ -95,7 +114,7 @@
 #include "bnProc_avx512/nrLDPC_bnProc_BG2_R13_AVX512.h"
 #include "bnProc_avx512/nrLDPC_bnProc_BG2_R23_AVX512.h"
 
-#else
+#elif defined(__AVX2__)
 #include "bnProc/nrLDPC_bnProc_BG1_R13_AVX2.h"
 #include "bnProc/nrLDPC_bnProc_BG1_R23_AVX2.h"
 #include "bnProc/nrLDPC_bnProc_BG1_R89_AVX2.h"
@@ -103,7 +122,14 @@
 #include "bnProc/nrLDPC_bnProc_BG2_R15_AVX2.h"
 #include "bnProc/nrLDPC_bnProc_BG2_R13_AVX2.h"
 #include "bnProc/nrLDPC_bnProc_BG2_R23_AVX2.h"
-
+#else
+#include "bnProc128/nrLDPC_bnProc_BG1_R13_128.h"
+#include "bnProc128/nrLDPC_bnProc_BG1_R23_128.h"
+#include "bnProc128/nrLDPC_bnProc_BG1_R89_128.h"
+//BG2 --------------------------------------------------------------------
+#include "bnProc128/nrLDPC_bnProc_BG2_R15_128.h"
+#include "bnProc128/nrLDPC_bnProc_BG2_R13_128.h"
+#include "bnProc128/nrLDPC_bnProc_BG2_R23_128.h"
 #endif
 
 
@@ -112,7 +138,7 @@
 
 
 #define NR_LDPC_ENABLE_PARITY_CHECK
-//#define NR_LDPC_PROFILER_DETAIL
+#define NR_LDPC_PROFILER_DETAIL
 
 #ifdef NR_LDPC_DEBUG_MODE
 #include "nrLDPC_tools/nrLDPC_debug.h"
@@ -226,8 +252,10 @@ static inline uint32_t nrLDPC_decoder_core(int8_t* p_llr, int8_t* p_out, uint32_
             {
                 #if defined(__AVX512BW__)
                 nrLDPC_cnProc_BG1_R13_AVX512(cnProcBuf, cnProcBufRes, Z);
-                #else
+                #elif defined(__AVX2__)
                 nrLDPC_cnProc_BG1_R13_AVX2(cnProcBuf, cnProcBufRes, Z);
+                #else
+                nrLDPC_cnProc_BG1_R13_128(cnProcBuf, cnProcBufRes, Z);
                 #endif
                 break;
             }
@@ -236,8 +264,10 @@ static inline uint32_t nrLDPC_decoder_core(int8_t* p_llr, int8_t* p_out, uint32_
             {
                 #if defined(__AVX512BW__)
                 nrLDPC_cnProc_BG1_R23_AVX512(cnProcBuf,cnProcBufRes, Z);
-                #else
+                #elif defined(__AVX2__)
                 nrLDPC_cnProc_BG1_R23_AVX2(cnProcBuf, cnProcBufRes, Z);
+                #else                
+                nrLDPC_cnProc_BG1_R23_128(cnProcBuf, cnProcBufRes, Z);
                 #endif
                 break;
             }
@@ -246,8 +276,10 @@ static inline uint32_t nrLDPC_decoder_core(int8_t* p_llr, int8_t* p_out, uint32_
             {
                 #if defined(__AVX512BW__)
                  nrLDPC_cnProc_BG1_R89_AVX512(cnProcBuf, cnProcBufRes, Z);
-                #else
+                #elif defined(__AVX2__)
                 nrLDPC_cnProc_BG1_R89_AVX2(cnProcBuf, cnProcBufRes, Z);
+                #else
+                nrLDPC_cnProc_BG1_R89_128(cnProcBuf, cnProcBufRes, Z);
                 #endif
                 break;
             }
@@ -263,26 +295,32 @@ static inline uint32_t nrLDPC_decoder_core(int8_t* p_llr, int8_t* p_out, uint32_
             {
                 #if defined(__AVX512BW__)
                 nrLDPC_cnProc_BG2_R15_AVX512(cnProcBuf, cnProcBufRes, Z);
-                #else
+                #elif defined(__AVX2__)
                 nrLDPC_cnProc_BG2_R15_AVX2(cnProcBuf, cnProcBufRes, Z);
+                #else
+                nrLDPC_cnProc_BG2_R15_128(cnProcBuf, cnProcBufRes, Z);
                 #endif
                 break;
             }
             case 13:
             {
                 #if defined(__AVX512BW__)
-                 nrLDPC_cnProc_BG2_R13_AVX512(cnProcBuf, cnProcBufRes, Z);
-                #else
+                nrLDPC_cnProc_BG2_R13_AVX512(cnProcBuf, cnProcBufRes, Z);
+                #elif defined(__AVX2__)
                 nrLDPC_cnProc_BG2_R13_AVX2(cnProcBuf, cnProcBufRes, Z);
+                #else
+                nrLDPC_cnProc_BG2_R13_128(cnProcBuf, cnProcBufRes, Z);
                 #endif
                 break;
             }
             case 23:
             {
                 #if defined(__AVX512BW__)
-                 nrLDPC_cnProc_BG2_R23_AVX512(cnProcBuf, cnProcBufRes, Z);
-                #else
+                nrLDPC_cnProc_BG2_R23_AVX512(cnProcBuf, cnProcBufRes, Z);
+                #elif defined(__AVX2__)
                 nrLDPC_cnProc_BG2_R23_AVX2(cnProcBuf, cnProcBufRes, Z);
+                #else
+                nrLDPC_cnProc_BG2_R23_128(cnProcBuf, cnProcBufRes, Z);
                 #endif
                 break;
             }
@@ -326,17 +364,29 @@ static inline uint32_t nrLDPC_decoder_core(int8_t* p_llr, int8_t* p_out, uint32_
         switch (R) {
             case 13:
             {
+#ifdef __AVX2__		    
                 nrLDPC_bnProcPc_BG1_R13_AVX2(bnProcBuf,bnProcBufRes,llrRes, llrProcBuf, Z);
-                break;
+#else
+		nrLDPC_bnProcPc_BG1_R13_128(bnProcBuf,bnProcBufRes,llrRes, llrProcBuf, Z);
+#endif 
+ 		break;
             }
             case 23:
             {
+#ifdef __AVX2__		    
                 nrLDPC_bnProcPc_BG1_R23_AVX2(bnProcBuf,bnProcBufRes, llrRes, llrProcBuf, Z);
+#else
+                nrLDPC_bnProcPc_BG1_R23_128(bnProcBuf,bnProcBufRes, llrRes, llrProcBuf, Z);
+#endif		
                 break;
             }
             case 89:
             {
+#ifdef __AVX2__
                 nrLDPC_bnProcPc_BG1_R89_AVX2(bnProcBuf,bnProcBufRes, llrRes, llrProcBuf, Z);
+#else
+                nrLDPC_bnProcPc_BG1_R89_128(bnProcBuf,bnProcBufRes, llrRes, llrProcBuf, Z);
+#endif
                 break;
             }
         }
@@ -344,18 +394,30 @@ static inline uint32_t nrLDPC_decoder_core(int8_t* p_llr, int8_t* p_out, uint32_
         switch (R) {
             case 15:
             {
+#ifdef __AVX2__		    
                 nrLDPC_bnProcPc_BG2_R15_AVX2(bnProcBuf,bnProcBufRes, llrRes, llrProcBuf, Z);
+#else
+                nrLDPC_bnProcPc_BG2_R15_128(bnProcBuf,bnProcBufRes, llrRes, llrProcBuf, Z);
+#endif
                 break;
             }
             case 13:
             {
+#ifdef __AVX2__		    
                 nrLDPC_bnProcPc_BG2_R13_AVX2(bnProcBuf,bnProcBufRes,llrRes,llrProcBuf, Z);
+#else
+                nrLDPC_bnProcPc_BG2_R13_128(bnProcBuf,bnProcBufRes,llrRes,llrProcBuf, Z);
+#endif
                 break;
             }
 
             case 23:
             {
+#ifdef __AVX2__		    
                 nrLDPC_bnProcPc_BG2_R23_AVX2(bnProcBuf,bnProcBufRes,llrRes, llrProcBuf, Z);
+#else
+                nrLDPC_bnProcPc_BG2_R23_128(bnProcBuf,bnProcBufRes,llrRes, llrProcBuf, Z);
+#endif
                 break;
             }
         }
@@ -384,8 +446,10 @@ static inline uint32_t nrLDPC_decoder_core(int8_t* p_llr, int8_t* p_out, uint32_
             {
                 #if defined(__AVX512BW__)
                 nrLDPC_bnProc_BG1_R13_AVX512(bnProcBuf, bnProcBufRes,llrRes, Z);
-                #else
+                #elif defined (__AVX2__)
                 nrLDPC_bnProc_BG1_R13_AVX2(bnProcBuf, bnProcBufRes,llrRes, Z);
+                #else
+                nrLDPC_bnProc_BG1_R13_128(bnProcBuf, bnProcBufRes,llrRes, Z);
                 #endif
                 break;
             }
@@ -393,8 +457,10 @@ static inline uint32_t nrLDPC_decoder_core(int8_t* p_llr, int8_t* p_out, uint32_
             {
                 #if defined(__AVX512BW__)
                 nrLDPC_bnProc_BG1_R23_AVX512(bnProcBuf, bnProcBufRes,llrRes, Z);
+                #elif defined(__AVX2__)
+		nrLDPC_bnProc_BG1_R23_AVX2(bnProcBuf, bnProcBufRes,llrRes, Z);
                 #else
-                nrLDPC_bnProc_BG1_R23_AVX2(bnProcBuf, bnProcBufRes,llrRes, Z);
+                nrLDPC_bnProc_BG1_R23_128(bnProcBuf, bnProcBufRes,llrRes, Z);
                 #endif
                 break;
             }
@@ -402,8 +468,10 @@ static inline uint32_t nrLDPC_decoder_core(int8_t* p_llr, int8_t* p_out, uint32_
             {
                 #if defined(__AVX512BW__)
                 nrLDPC_bnProc_BG1_R89_AVX512(bnProcBuf, bnProcBufRes,llrRes, Z);
-                #else
+                #elif defined(__AVX2__)
                 nrLDPC_bnProc_BG1_R89_AVX2(bnProcBuf, bnProcBufRes,llrRes, Z);
+                #else
+                nrLDPC_bnProc_BG1_R89_128(bnProcBuf, bnProcBufRes,llrRes, Z);
                 #endif
                 break;
             }
@@ -418,8 +486,10 @@ static inline uint32_t nrLDPC_decoder_core(int8_t* p_llr, int8_t* p_out, uint32_
             {
                 #if defined(__AVX512BW__)
                 nrLDPC_bnProc_BG2_R15_AVX512(bnProcBuf, bnProcBufRes,llrRes, Z);
-                #else
+                #elif defined(__AVX2__)
                 nrLDPC_bnProc_BG2_R15_AVX2(bnProcBuf, bnProcBufRes,llrRes, Z);
+                #else
+                nrLDPC_bnProc_BG2_R15_128(bnProcBuf, bnProcBufRes,llrRes, Z);
                 #endif
                 break;
             }
@@ -427,8 +497,10 @@ static inline uint32_t nrLDPC_decoder_core(int8_t* p_llr, int8_t* p_out, uint32_
             {
                 #if defined(__AVX512BW__)
                 nrLDPC_bnProc_BG2_R13_AVX512(bnProcBuf, bnProcBufRes,llrRes, Z);
-                #else
+                #elif defined(__AVX2__)
                 nrLDPC_bnProc_BG2_R13_AVX2(bnProcBuf, bnProcBufRes,llrRes, Z);
+                #else
+                nrLDPC_bnProc_BG2_R13_128(bnProcBuf, bnProcBufRes,llrRes, Z);
                 #endif
                 break;
             }
@@ -437,8 +509,10 @@ static inline uint32_t nrLDPC_decoder_core(int8_t* p_llr, int8_t* p_out, uint32_
             {
                 #if defined(__AVX512BW__)
                 nrLDPC_bnProc_BG2_R23_AVX512(bnProcBuf, bnProcBufRes,llrRes, Z);
-                #else
+                #elif defined(__AVX2__)
                 nrLDPC_bnProc_BG2_R23_AVX2(bnProcBuf, bnProcBufRes,llrRes, Z);
+                #else
+                nrLDPC_bnProc_BG2_R23_128(bnProcBuf, bnProcBufRes,llrRes, Z);
                 #endif
                 break;
             }
@@ -492,26 +566,32 @@ static inline uint32_t nrLDPC_decoder_core(int8_t* p_llr, int8_t* p_out, uint32_
             {
                 #if defined(__AVX512BW__)
                 nrLDPC_cnProc_BG1_R13_AVX512(cnProcBuf, cnProcBufRes, Z);
-                #else
+                #elif defined(__AVX2__)
                 nrLDPC_cnProc_BG1_R13_AVX2(cnProcBuf, cnProcBufRes, Z);
+                #else
+                nrLDPC_cnProc_BG1_R13_128(cnProcBuf, cnProcBufRes, Z);
                 #endif
                 break;
             }
             case 23:
             {
                 #if defined(__AVX512BW__)
-                 nrLDPC_cnProc_BG1_R23_AVX512(cnProcBuf, cnProcBufRes, Z);
-                #else
+                nrLDPC_cnProc_BG1_R23_AVX512(cnProcBuf, cnProcBufRes, Z);
+                #elif defined(__AVX2__)
                 nrLDPC_cnProc_BG1_R23_AVX2(cnProcBuf, cnProcBufRes, Z);
+                #else
+                nrLDPC_cnProc_BG1_R23_128(cnProcBuf, cnProcBufRes, Z);
                 #endif
                 break;
             }
             case 89:
             {
                 #if defined(__AVX512BW__)
-                 nrLDPC_cnProc_BG1_R89_AVX512(cnProcBuf, cnProcBufRes, Z);
-                #else
+                nrLDPC_cnProc_BG1_R89_AVX512(cnProcBuf, cnProcBufRes, Z);
+                #elif defined(__AVX2__)
                 nrLDPC_cnProc_BG1_R89_AVX2(cnProcBuf, cnProcBufRes, Z);
+                #else
+                nrLDPC_cnProc_BG1_R89_128(cnProcBuf, cnProcBufRes, Z);
                 #endif
                 break;
             }
@@ -526,26 +606,32 @@ static inline uint32_t nrLDPC_decoder_core(int8_t* p_llr, int8_t* p_out, uint32_
             {
                 #if defined(__AVX512BW__)
                 nrLDPC_cnProc_BG2_R15_AVX512(cnProcBuf,cnProcBufRes, Z);
-                #else
+                #elif defined(__AVX2__)
                 nrLDPC_cnProc_BG2_R15_AVX2(cnProcBuf, cnProcBufRes, Z);
+                #else
+                nrLDPC_cnProc_BG2_R15_128(cnProcBuf, cnProcBufRes, Z);
                 #endif
                 break;
             }
             case 13:
             {
                 #if defined(__AVX512BW__)
-                 nrLDPC_cnProc_BG2_R13_AVX512(cnProcBuf, cnProcBufRes, Z);
-                #else
+                nrLDPC_cnProc_BG2_R13_AVX512(cnProcBuf, cnProcBufRes, Z);
+                #elif defined(__AVX2__)
                 nrLDPC_cnProc_BG2_R13_AVX2(cnProcBuf, cnProcBufRes, Z);
+                #else
+                nrLDPC_cnProc_BG2_R13_128(cnProcBuf, cnProcBufRes, Z);
                 #endif
                 break;
             } 
             case 23:
             {
                 #if defined(__AVX512BW__)
-                 nrLDPC_cnProc_BG2_R23_AVX512(cnProcBuf, cnProcBufRes, Z);
-                #else
+                nrLDPC_cnProc_BG2_R23_AVX512(cnProcBuf, cnProcBufRes, Z);
+                #elif defined(__AVX2__)
                 nrLDPC_cnProc_BG2_R23_AVX2(cnProcBuf, cnProcBufRes, Z);
+                #else
+                nrLDPC_cnProc_BG2_R23_128(cnProcBuf, cnProcBufRes, Z);
                 #endif
                 break;
             }
@@ -586,17 +672,29 @@ static inline uint32_t nrLDPC_decoder_core(int8_t* p_llr, int8_t* p_out, uint32_
           switch (R) {
             case 13:
             {
+#ifdef __AVX2__
                 nrLDPC_bnProcPc_BG1_R13_AVX2(bnProcBuf,bnProcBufRes,llrRes, llrProcBuf, Z);
+#else		
+                nrLDPC_bnProcPc_BG1_R13_128(bnProcBuf,bnProcBufRes,llrRes, llrProcBuf, Z);
+#endif
                 break;
             }
             case 23:
             {
+#ifdef __AVX2__
                 nrLDPC_bnProcPc_BG1_R23_AVX2(bnProcBuf,bnProcBufRes, llrRes, llrProcBuf, Z);
+#else		
+                nrLDPC_bnProcPc_BG1_R23_128(bnProcBuf,bnProcBufRes, llrRes, llrProcBuf, Z);
+#endif
                 break;
             }
             case 89:
             {
+#ifdef __AVX2__
                 nrLDPC_bnProcPc_BG1_R89_AVX2(bnProcBuf,bnProcBufRes, llrRes, llrProcBuf, Z);
+#else		
+                nrLDPC_bnProcPc_BG1_R89_128(bnProcBuf,bnProcBufRes, llrRes, llrProcBuf, Z);
+#endif
                 break;
             }
           }
@@ -605,17 +703,29 @@ static inline uint32_t nrLDPC_decoder_core(int8_t* p_llr, int8_t* p_out, uint32_
           {
             case 15:
             {
+#ifdef __AVX2__		    
                 nrLDPC_bnProcPc_BG2_R15_AVX2(bnProcBuf,bnProcBufRes,llrRes, llrProcBuf, Z);
+#else
+                nrLDPC_bnProcPc_BG2_R15_128(bnProcBuf,bnProcBufRes,llrRes, llrProcBuf, Z);
+#endif
                 break;
             }
             case 13:
             {
+#ifdef __AVX2__		    
                 nrLDPC_bnProcPc_BG2_R13_AVX2(bnProcBuf,bnProcBufRes,llrRes, llrProcBuf, Z);
+#else
+                nrLDPC_bnProcPc_BG2_R13_128(bnProcBuf,bnProcBufRes,llrRes, llrProcBuf, Z);
+#endif
                 break;
             }
             case 23:
             {
+#ifdef __AVX2__		    
                 nrLDPC_bnProcPc_BG2_R23_AVX2(bnProcBuf,bnProcBufRes,llrRes, llrProcBuf, Z);
+#else
+                nrLDPC_bnProcPc_BG2_R23_128(bnProcBuf,bnProcBufRes,llrRes, llrProcBuf, Z);
+#endif
                 break;
             }
           }
@@ -641,8 +751,10 @@ static inline uint32_t nrLDPC_decoder_core(int8_t* p_llr, int8_t* p_out, uint32_
             {
                 #if defined(__AVX512BW__)
                 nrLDPC_bnProc_BG1_R13_AVX512(bnProcBuf, bnProcBufRes,llrRes, Z);
-                #else
+                #elif defined(__AVX2__)
                 nrLDPC_bnProc_BG1_R13_AVX2(bnProcBuf, bnProcBufRes,llrRes, Z);
+                #else
+                nrLDPC_bnProc_BG1_R13_128(bnProcBuf, bnProcBufRes,llrRes, Z);
                 #endif
                 break;
             }
@@ -650,8 +762,10 @@ static inline uint32_t nrLDPC_decoder_core(int8_t* p_llr, int8_t* p_out, uint32_
             {
                 #if defined(__AVX512BW__)
                 nrLDPC_bnProc_BG1_R23_AVX512(bnProcBuf, bnProcBufRes,llrRes, Z);
-                #else
+                #elif defined(__AVX2__)
                 nrLDPC_bnProc_BG1_R23_AVX2(bnProcBuf,bnProcBufRes,llrRes, Z);
+                #else
+                nrLDPC_bnProc_BG1_R23_128(bnProcBuf,bnProcBufRes,llrRes, Z);
                 #endif
                 break;
             }
@@ -659,8 +773,10 @@ static inline uint32_t nrLDPC_decoder_core(int8_t* p_llr, int8_t* p_out, uint32_
             {
                 #if defined(__AVX512BW__)
                 nrLDPC_bnProc_BG1_R89_AVX512(bnProcBuf, bnProcBufRes,llrRes, Z);
-                #else
+                #elif defined(__AVX2__)
                 nrLDPC_bnProc_BG1_R89_AVX2(bnProcBuf, bnProcBufRes,llrRes, Z);
+                #else
+                nrLDPC_bnProc_BG1_R89_128(bnProcBuf, bnProcBufRes,llrRes, Z);
                 #endif
                 break;
             }
@@ -672,8 +788,10 @@ static inline uint32_t nrLDPC_decoder_core(int8_t* p_llr, int8_t* p_out, uint32_
             {
                 #if defined(__AVX512BW__)
                 nrLDPC_bnProc_BG2_R15_AVX512(bnProcBuf, bnProcBufRes,llrRes, Z);
-                #else
+                #elif defined(__AVX2__)
                 nrLDPC_bnProc_BG2_R15_AVX2(bnProcBuf, bnProcBufRes,llrRes, Z);
+                #else
+                nrLDPC_bnProc_BG2_R15_128(bnProcBuf, bnProcBufRes,llrRes, Z);
                 #endif
                 break;
             }
@@ -681,8 +799,10 @@ static inline uint32_t nrLDPC_decoder_core(int8_t* p_llr, int8_t* p_out, uint32_
             {
                 #if defined(__AVX512BW__)
                 nrLDPC_bnProc_BG2_R13_AVX512(bnProcBuf, bnProcBufRes,llrRes, Z);
-                #else
+                #elif defined(__AVX2__)
                 nrLDPC_bnProc_BG2_R13_AVX2(bnProcBuf, bnProcBufRes,llrRes, Z);
+                #else
+                nrLDPC_bnProc_BG2_R13_128(bnProcBuf, bnProcBufRes,llrRes, Z);
                 #endif
                 break;
             }
@@ -690,8 +810,10 @@ static inline uint32_t nrLDPC_decoder_core(int8_t* p_llr, int8_t* p_out, uint32_
             {
                 #if defined(__AVX512BW__)
                 nrLDPC_bnProc_BG2_R23_AVX512(bnProcBuf, bnProcBufRes,llrRes, Z);
-                #else
+                #elif defined(__AVX2__)
                 nrLDPC_bnProc_BG2_R23_AVX2(bnProcBuf, bnProcBufRes,llrRes, Z);
+                #else
+                nrLDPC_bnProc_BG2_R23_128(bnProcBuf, bnProcBufRes,llrRes, Z);
                 #endif
                 break;
             }

openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/CMakeLists.txt

@@ -7,13 +7,17 @@ add_subdirectory(${CMAKE_CURRENT_LIST_DIR}/generator_cnProc_avx512 ldpc/generato
 add_custom_target(ldpc_generators)
 add_dependencies(ldpc_generators
                  bnProc_gen_avx2
+                 bnProc_gen_128
                  bnProc_gen_avx512
                  cnProc_gen_avx2
+                 cnProc_gen_128
                  cnProc_gen_avx512)
 
 add_library(ldpc_gen_HEADERS INTERFACE)
 target_link_libraries(ldpc_gen_HEADERS INTERFACE
                       bnProc_gen_avx2_HEADERS
+                      bnProc_gen_128_HEADERS
                       bnProc_gen_avx512_HEADERS
                       cnProc_gen_avx2_HEADERS
+                      cnProc_gen_128_HEADERS
                       cnProc_gen_avx512_HEADERS)

openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_bnProc/CMakeLists.txt

@@ -4,8 +4,16 @@ add_executable(bnProc_gen_avx2
                bnProcPc_gen_BG1_avx2.c
                bnProcPc_gen_BG2_avx2.c
                main.c)
-target_compile_options(bnProc_gen_avx2 PRIVATE -W -Wall -mavx2)
+add_executable(bnProc_gen_128
+               bnProc_gen_BG1_128.c
+               bnProc_gen_BG2_128.c
+               bnProcPc_gen_BG1_128.c
+               bnProcPc_gen_BG2_128.c
+               main128.c)
+	       
+target_compile_options(bnProc_gen_avx2 PRIVATE -W -Wall )
 
+target_compile_options(bnProc_gen_128 PRIVATE -W -Wall )
 #set(bnProc_headers
 #    bnProc/nrLDPC_bnProc_BG1_R13_AVX2.h
 #    bnProc/nrLDPC_bnProc_BG1_R23_AVX2.h
@@ -30,7 +38,18 @@ add_custom_command(TARGET bnProc_gen_avx2 POST_BUILD
   DEPENDS bnProc_gen_avx2
   COMMENT "Generating LDPC bnProc header files for AVX2"
 )
+add_custom_command(TARGET bnProc_gen_128 POST_BUILD
+  #OUTPUT ${bnProc_headers} ${bnProcPc_headers}
+  COMMAND ${CMAKE_COMMAND} -E make_directory bnProc128
+  COMMAND ${CMAKE_COMMAND} -E make_directory bnProcPc128
+  COMMAND bnProc_gen_128 .
+  DEPENDS bnProc_gen_128
+  COMMENT "Generating LDPC bnProc header files for 128-bit SIMD"
+)
 
 add_library(bnProc_gen_avx2_HEADERS INTERFACE)
 target_include_directories(bnProc_gen_avx2_HEADERS INTERFACE ${CMAKE_CURRENT_BINARY_DIR})
 add_dependencies(bnProc_gen_avx2_HEADERS bnProc_gen_avx2)
+add_library(bnProc_gen_128_HEADERS INTERFACE)
+target_include_directories(bnProc_gen_128_HEADERS INTERFACE ${CMAKE_CURRENT_BINARY_DIR})
+add_dependencies(bnProc_gen_128_HEADERS bnProc_gen_128)

openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_bnProc/bnProcPc_gen_BG1_128.c

@@ -0,0 +1,163 @@
+/*
+ * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.
+ * The OpenAirInterface Software Alliance licenses this file to You under
+ * the OAI Public License, Version 1.1  (the "License"); you may not use this file
+ * except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.openairinterface.org/?page_id=698
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *-------------------------------------------------------------------------------
+ * For more information about the OpenAirInterface (OAI) Software Alliance:
+ *      contact@openairinterface.org
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include "../../nrLDPCdecoder_defs.h"
+#include "../../nrLDPC_types.h"
+
+
+void nrLDPC_bnProcPc_BG1_generator_128(const char *dir, int R)
+{
+  const char *ratestr[3]={"13","23","89"};
+
+  if (R<0 || R>2) {printf("Illegal R %d\n",R); abort();}
+
+
+ // system("mkdir -p ../ldpc_gen_files");
+
+  char fname[FILENAME_MAX+1];
+  snprintf(fname, sizeof(fname), "%s/bnProcPc128/nrLDPC_bnProcPc_BG1_R%s_128.h", dir, ratestr[R]);
+  FILE *fd=fopen(fname,"w");
+  if (fd == NULL) {
+    printf("Cannot create file %s\n", fname);
+    abort();
+  }
+
+  fprintf(fd,"#include <stdint.h>\n");
+  fprintf(fd,"#include \"PHY/sse_intrin.h\"\n");
+
+  fprintf(fd,"static inline void nrLDPC_bnProcPc_BG1_R%s_128(int8_t* bnProcBuf,int8_t* bnProcBufRes,int8_t* llrRes ,  int8_t* llrProcBuf, uint16_t Z ) {\n",ratestr[R]);
+    const uint8_t*  lut_numBnInBnGroups;
+    const uint32_t* lut_startAddrBnGroups;
+    const uint16_t* lut_startAddrBnGroupsLlr;
+    if (R==0) {
+
+
+      lut_numBnInBnGroups =  lut_numBnInBnGroups_BG1_R13;
+      lut_startAddrBnGroups = lut_startAddrBnGroups_BG1_R13;
+      lut_startAddrBnGroupsLlr = lut_startAddrBnGroupsLlr_BG1_R13;
+
+    }
+    else if (R==1){
+
+      lut_numBnInBnGroups =  lut_numBnInBnGroups_BG1_R23;
+      lut_startAddrBnGroups = lut_startAddrBnGroups_BG1_R23;
+      lut_startAddrBnGroupsLlr = lut_startAddrBnGroupsLlr_BG1_R23;
+    }
+    else if (R==2) {
+
+      lut_numBnInBnGroups = lut_numBnInBnGroups_BG1_R89;
+      lut_startAddrBnGroups = lut_startAddrBnGroups_BG1_R89;
+      lut_startAddrBnGroupsLlr = lut_startAddrBnGroupsLlr_BG1_R89;
+    }
+  else { printf("aborting, illegal R %d\n",R); fclose(fd);abort();}
+        // Number of BNs in Groups
+    uint32_t k;
+    // Offset to each bit within a group in terms of 32 Byte
+    uint32_t cnOffsetInGroup;
+    uint8_t idxBnGroup = 0;
+
+    fprintf(fd,"  // Process group with 1 CN\n");
+    fprintf(fd,"        uint32_t M = (%d*Z + 15)>>4;\n",lut_numBnInBnGroups[0]);
+
+    fprintf(fd,"        simde__m128i* p_bnProcBuf    = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups   [idxBnGroup]);
+    fprintf(fd,"        simde__m128i* p_bnProcBufRes = (simde__m128i*) &bnProcBufRes [%d];\n",lut_startAddrBnGroups   [idxBnGroup]);
+    fprintf(fd,"        simde__m128i* p_llrProcBuf   = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+    fprintf(fd,"        simde__m128i* p_llrRes       = (simde__m128i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+    fprintf(fd,"        simde__m128i ymm0, ymm1, ymmRes0, ymmRes1;\n");
+
+
+    fprintf(fd,"        for (int i=0;i<M;i++) {\n");
+    fprintf(fd,"          p_bnProcBufRes[i] = p_llrProcBuf[i];\n");
+    fprintf(fd,"          ymm0 = simde_mm_cvtepi8_epi16(p_bnProcBuf [i]);\n");
+    fprintf(fd,"          ymm1 = simde_mm_cvtepi8_epi16(p_llrProcBuf[i]);\n");
+    fprintf(fd,"          ymmRes0 = simde_mm_adds_epi16(ymm0, ymm1);\n");
+    fprintf(fd,"          ymm0 = simde_mm_cvtepi8_epi16(simde_mm_srli_si128(p_bnProcBuf [i],8));\n");
+    fprintf(fd,"          ymm1 = simde_mm_cvtepi8_epi16(simde_mm_srli_si128(p_llrProcBuf[i],8));\n");
+    fprintf(fd,"          ymmRes1 = simde_mm_adds_epi16(ymm0, ymm1);\n");
+    fprintf(fd,"          *p_llrRes = simde_mm_packs_epi16(ymmRes0, ymmRes1);\n");
+    fprintf(fd,"          p_llrRes++;\n");
+    fprintf(fd,"        }\n");
+ 
+    
+    for (uint32_t cnidx=1;cnidx<30;cnidx++) {
+    // Process group with 4 CNs
+
+       if (lut_numBnInBnGroups[cnidx] > 0)
+       {
+        // If elements in group move to next address
+        idxBnGroup++;
+
+        fprintf(fd,"  M = (%d*Z + 15)>>4;\n",lut_numBnInBnGroups[cnidx]);
+
+        // Set the offset to each CN within a group in terms of 16 Byte
+        cnOffsetInGroup = (lut_numBnInBnGroups[cnidx]*NR_LDPC_ZMAX)>>4;
+
+        // Set pointers to start of group 2
+        fprintf(fd,"  p_bnProcBuf     = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"  p_llrProcBuf    = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"  p_llrRes        = (simde__m128i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+
+        // Loop over BNs
+        fprintf(fd,"        for (int i=0;i<M;i++) {\n");
+            // First 16 LLRs of first CN
+        fprintf(fd,"        ymmRes0 = simde_mm_cvtepi8_epi16(p_bnProcBuf [i]);\n");
+        fprintf(fd,"        ymmRes1 = simde_mm_cvtepi8_epi16(simde_mm_srli_si128(p_bnProcBuf [i],8));\n");
+
+            // Loop over CNs
+        for (k=1; k<=cnidx; k++)
+        {
+           fprintf(fd,"        ymm0 = simde_mm_cvtepi8_epi16(p_bnProcBuf[%d + i]);\n", k*cnOffsetInGroup);
+           fprintf(fd,"        ymmRes0 = simde_mm_adds_epi16(ymmRes0, ymm0);\n");
+
+           fprintf(fd,"        ymm1 = simde_mm_cvtepi8_epi16(simde_mm_srli_si128(p_bnProcBuf[%d + i],8));\n", k*cnOffsetInGroup);
+
+           fprintf(fd, "       ymmRes1 = simde_mm_adds_epi16(ymmRes1, ymm1); \n");
+        }
+
+            // Add LLR from receiver input
+        fprintf(fd,"        ymm0    = simde_mm_cvtepi8_epi16(p_llrProcBuf[i]);\n");
+        fprintf(fd,"        ymmRes0 = simde_mm_adds_epi16(ymmRes0, ymm0);\n");
+
+        fprintf(fd,"        ymm1    = simde_mm_cvtepi8_epi16(simde_mm_srli_si128(p_llrProcBuf[i],8));\n");
+        fprintf(fd,"        ymmRes1 = simde_mm_adds_epi16(ymmRes1, ymm1);\n");
+
+            // Pack results back to epi8
+        fprintf(fd,"        *p_llrRes = simde_mm_packs_epi16(ymmRes0, ymmRes1);\n");
+        fprintf(fd,"        p_llrRes++;\n");
+
+        fprintf(fd,"   }\n");
+       }
+
+    }
+
+    fprintf(fd,"}\n");
+    fclose(fd);
+}//end of the function  nrLDPC_bnProcPc_BG1
+
+
+
+
+
+
+

openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_bnProc/bnProcPc_gen_BG2_128.c

@@ -0,0 +1,166 @@
+/*
+ * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.
+ * The OpenAirInterface Software Alliance licenses this file to You under
+ * the OAI Public License, Version 1.1  (the "License"); you may not use this file
+ * except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.openairinterface.org/?page_id=698
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *-------------------------------------------------------------------------------
+ * For more information about the OpenAirInterface (OAI) Software Alliance:
+ *      contact@openairinterface.org
+ */
+
+#include <stdio.h>
+#include <stdint.h>
+#include "PHY/sse_intrin.h"
+#include "../../nrLDPCdecoder_defs.h"
+#include "../../nrLDPC_types.h"
+
+
+void nrLDPC_bnProcPc_BG2_generator_128(const char *dir, int R)
+{
+  const char *ratestr[3]={"15","13","23"};
+
+  if (R<0 || R>2) {printf("Illegal R %d\n",R); abort();}
+
+
+ // system("mkdir -p ../ldpc_gen_files");
+
+  char fname[FILENAME_MAX+1];
+  snprintf(fname, sizeof(fname), "%s/bnProcPc128/nrLDPC_bnProcPc_BG2_R%s_128.h", dir, ratestr[R]);
+  FILE *fd=fopen(fname,"w");
+  if (fd == NULL) {
+    printf("Cannot create file %s\n", fname);
+    abort();
+  }
+
+  fprintf(fd,"#include <stdint.h>\n");
+  fprintf(fd,"#include \"PHY/sse_intrin.h\"\n");
+
+  fprintf(fd,"static inline void nrLDPC_bnProcPc_BG2_R%s_128(int8_t* bnProcBuf,int8_t* bnProcBufRes,int8_t* llrRes ,  int8_t* llrProcBuf, uint16_t Z  ) {\n",ratestr[R]);
+    const uint8_t*  lut_numBnInBnGroups;
+    const uint32_t* lut_startAddrBnGroups;
+    const uint16_t* lut_startAddrBnGroupsLlr;
+    if (R==0) {
+
+
+      lut_numBnInBnGroups =  lut_numBnInBnGroups_BG2_R15;
+      lut_startAddrBnGroups = lut_startAddrBnGroups_BG2_R15;
+      lut_startAddrBnGroupsLlr = lut_startAddrBnGroupsLlr_BG2_R15;
+
+    }
+    else if (R==1){
+
+      lut_numBnInBnGroups =  lut_numBnInBnGroups_BG2_R13;
+      lut_startAddrBnGroups = lut_startAddrBnGroups_BG2_R13;
+      lut_startAddrBnGroupsLlr = lut_startAddrBnGroupsLlr_BG2_R13;
+    }
+    else if (R==2) {
+
+      lut_numBnInBnGroups = lut_numBnInBnGroups_BG2_R23;
+      lut_startAddrBnGroups = lut_startAddrBnGroups_BG2_R23;
+      lut_startAddrBnGroupsLlr = lut_startAddrBnGroupsLlr_BG2_R23;
+    }
+  else { printf("aborting, illegal R %d\n",R); fclose(fd);abort();}
+
+        // Number of BNs in Groups
+    uint32_t k;
+    // Offset to each bit within a group in terms of 32 Byte
+    uint32_t cnOffsetInGroup;
+    uint8_t idxBnGroup = 0;
+
+    fprintf(fd,"  // Process group with 1 CN\n");
+    fprintf(fd,"        uint32_t M = (%d*Z + 15)>>4;\n",lut_numBnInBnGroups[0]);
+
+    fprintf(fd,"        simde__m128i* p_bnProcBuf    = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups   [idxBnGroup]);
+    fprintf(fd,"        simde__m128i* p_bnProcBufRes = (simde__m128i*) &bnProcBufRes [%d];\n",lut_startAddrBnGroups   [idxBnGroup]);
+    fprintf(fd,"        simde__m128i* p_llrProcBuf   = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+    fprintf(fd,"        simde__m128i* p_llrRes       = (simde__m128i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+    fprintf(fd,"        simde__m128i ymm0, ymm1, ymmRes0, ymmRes1;\n");
+
+
+    fprintf(fd,"        for (int i=0;i<M;i++) {\n");
+    fprintf(fd,"          p_bnProcBufRes[i] = p_llrProcBuf[i];\n");
+    fprintf(fd,"          ymm0 = simde_mm_cvtepi8_epi16(p_bnProcBuf [i]);\n");
+    fprintf(fd,"          ymm1 = simde_mm_cvtepi8_epi16(p_llrProcBuf[i]);\n");
+    fprintf(fd,"          ymmRes0 = simde_mm_adds_epi16(ymm0, ymm1);\n");
+    fprintf(fd,"          ymm0 = simde_mm_cvtepi8_epi16(simde_mm_srli_si128(p_bnProcBuf [i],8));\n");
+    fprintf(fd,"          ymm1 = simde_mm_cvtepi8_epi16(simde_mm_srli_si128(p_llrProcBuf[i],8));\n");
+    fprintf(fd,"          ymmRes1 = simde_mm_adds_epi16(ymm0, ymm1);\n");
+    fprintf(fd,"          *p_llrRes = simde_mm_packs_epi16(ymmRes0, ymmRes1);\n");
+    fprintf(fd,"          p_llrRes++;\n");
+    fprintf(fd,"        }\n");
+ 
+    
+    for (uint32_t cnidx=1;cnidx<30;cnidx++) {
+    // Process group with 4 CNs
+
+       if (lut_numBnInBnGroups[cnidx] > 0)
+       {
+        // If elements in group move to next address
+        idxBnGroup++;
+
+        fprintf(fd,"  M = (%d*Z + 15)>>4;\n",lut_numBnInBnGroups[cnidx]);
+
+        // Set the offset to each CN within a group in terms of 16 Byte
+        cnOffsetInGroup = (lut_numBnInBnGroups[cnidx]*NR_LDPC_ZMAX)>>4;
+
+        // Set pointers to start of group 2
+        fprintf(fd,"  p_bnProcBuf     = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"  p_llrProcBuf    = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"  p_llrRes        = (simde__m128i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+
+        // Loop over BNs
+        fprintf(fd,"        for (int i=0;i<M;i++) {\n");
+            // First 16 LLRs of first CN
+        fprintf(fd,"        ymmRes0 = simde_mm_cvtepi8_epi16(p_bnProcBuf [i]);\n");
+        fprintf(fd,"        ymmRes1 = simde_mm_cvtepi8_epi16(simde_mm_srli_si128(p_bnProcBuf [i],8));\n");
+
+            // Loop over CNs
+        for (k=1; k<=cnidx; k++)
+        {
+           fprintf(fd,"        ymm0 = simde_mm_cvtepi8_epi16(p_bnProcBuf[%d + i]);\n", k*cnOffsetInGroup);
+           fprintf(fd,"        ymmRes0 = simde_mm_adds_epi16(ymmRes0, ymm0);\n");
+
+           fprintf(fd,"        ymm1 = simde_mm_cvtepi8_epi16(simde_mm_srli_si128(p_bnProcBuf[%d + i],8));\n", k*cnOffsetInGroup);
+
+           fprintf(fd, "       ymmRes1 = simde_mm_adds_epi16(ymmRes1, ymm1); \n");
+        }
+
+            // Add LLR from receiver input
+        fprintf(fd,"        ymm0    = simde_mm_cvtepi8_epi16(p_llrProcBuf[i]);\n");
+        fprintf(fd,"        ymmRes0 = simde_mm_adds_epi16(ymmRes0, ymm0);\n");
+
+        fprintf(fd,"        ymm1    = simde_mm_cvtepi8_epi16(simde_mm_srli_si128(p_llrProcBuf[i],8));\n");
+        fprintf(fd,"        ymmRes1 = simde_mm_adds_epi16(ymmRes1, ymm1);\n");
+
+            // Pack results back to epi8
+        fprintf(fd,"        *p_llrRes = simde_mm_packs_epi16(ymmRes0, ymmRes1);\n");
+        fprintf(fd,"        p_llrRes++;\n");
+
+        fprintf(fd,"   }\n");
+       }
+
+    }
+
+
+    fprintf(fd,"}\n");
+    fclose(fd);
+}//end of the function  nrLDPC_bnProcPc_BG2
+
+
+
+
+
+
+
+

openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_bnProc/bnProcPc_gen_BG2_avx2.c

@@ -80,14 +80,14 @@ void nrLDPC_bnProcPc_BG2_generator_AVX2(const char *dir, int R)
     uint32_t cnOffsetInGroup;
     uint8_t idxBnGroup = 0;
 
-    fprintf(fd,"   __m256i ymm0, ymm1, ymmRes0, ymmRes1;  \n");
+    fprintf(fd,"  simde__m256i ymm0, ymm1, ymmRes0, ymmRes1;  \n");
 
 
-    fprintf(fd,"        __m128i* p_bnProcBuf; \n");
-    fprintf(fd,"        __m128i* p_llrProcBuf;\n");
-    fprintf(fd,"        __m256i* p_llrRes; \n");
-   // fprintf(fd,"        __m256i* p_bnProcBufRes; \n");
-   // fprintf(fd,"        __m256i* p_llrProcBuf256; \n");
+    fprintf(fd,"        simde__m128i* p_bnProcBuf; \n");
+    fprintf(fd,"        simde__m128i* p_llrProcBuf;\n");
+    fprintf(fd,"        simde__m256i* p_llrRes; \n");
+   // fprintf(fd,"        simde__m256i* p_bnProcBufRes; \n");
+   // fprintf(fd,"        simde__m256i* p_llrProcBuf256; \n");
     fprintf(fd,"         uint32_t M ;\n");
 
 
@@ -108,11 +108,11 @@ void nrLDPC_bnProcPc_BG2_generator_AVX2(const char *dir, int R)
        // cnOffsetInGroup = (lut_numBnInBnGroups[0]*NR_LDPC_ZMAX)>>4;
 
         // Set pointers to start of group 2
-        fprintf(fd,"    p_bnProcBuf     = (__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
-        fprintf(fd,"    p_bnProcBufRes     = (__m256i*) &bnProcBufRes    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
-        fprintf(fd,"    p_llrProcBuf    = (__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
-         fprintf(fd,"   p_llrProcBuf256   = (__m256i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
-        fprintf(fd,"    p_llrRes        = (__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_bnProcBuf     = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"    p_bnProcBufRes     = (simde__m256i*) &bnProcBufRes    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"    p_llrProcBuf    = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+         fprintf(fd,"   p_llrProcBuf256   = (simde__m256i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_llrRes        = (simde__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
 
         // Loop over BNs
         fprintf(fd,"            for (int i=0,j=0;i<M;i++,j+=2) {\n");
@@ -159,9 +159,9 @@ fprintf(fd,  "// Process group with 2 CNs \n");
         cnOffsetInGroup = (lut_numBnInBnGroups[1]*NR_LDPC_ZMAX)>>4;
 
         // Set pointers to start of group 2
-        fprintf(fd,"    p_bnProcBuf     = (__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
-        fprintf(fd,"    p_llrProcBuf    = (__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
-        fprintf(fd,"    p_llrRes        = (__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_bnProcBuf     = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"    p_llrProcBuf    = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_llrRes        = (simde__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
 
         // Loop over BNs
         fprintf(fd,"            for (int i=0,j=0;i<M;i++,j+=2) {\n");
@@ -217,9 +217,9 @@ fprintf(fd,  "// Process group with 3 CNs \n");
         cnOffsetInGroup = (lut_numBnInBnGroups[2]*NR_LDPC_ZMAX)>>4;
 
         // Set pointers to start of group 2
-        fprintf(fd,"    p_bnProcBuf     = (__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
-        fprintf(fd,"    p_llrProcBuf    = (__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
-        fprintf(fd,"    p_llrRes        = (__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_bnProcBuf     = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"    p_llrProcBuf    = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_llrRes        = (simde__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
         // Loop over BNs
         fprintf(fd,"        for (int i=0,j=0;i<M;i++,j+=2) {\n");
             // First 16 LLRs of first CN
@@ -273,9 +273,9 @@ fprintf(fd,  "// Process group with 4 CNs \n");
         cnOffsetInGroup = (lut_numBnInBnGroups[3]*NR_LDPC_ZMAX)>>4;
 
         // Set pointers to start of group 2
-        fprintf(fd,"    p_bnProcBuf     = (__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
-        fprintf(fd,"    p_llrProcBuf    = (__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
-        fprintf(fd,"    p_llrRes        = (__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_bnProcBuf     = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"    p_llrProcBuf    = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_llrRes        = (simde__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
 
         // Loop over BNs
         fprintf(fd,"        for (int i=0,j=0;i<M;i++,j+=2) {\n");
@@ -330,9 +330,9 @@ fprintf(fd,  "// Process group with 5 CNs \n");
         cnOffsetInGroup = (lut_numBnInBnGroups[4]*NR_LDPC_ZMAX)>>4;
 
         // Set pointers to start of group 2
-        fprintf(fd,"    p_bnProcBuf     = (__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
-        fprintf(fd,"    p_llrProcBuf    = (__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
-        fprintf(fd,"    p_llrRes        = (__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_bnProcBuf     = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"    p_llrProcBuf    = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_llrRes        = (simde__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
         // Loop over BNs
         fprintf(fd,"        for (int i=0,j=0;i<M;i++,j+=2) {\n");
             // First 16 LLRs of first CN
@@ -387,9 +387,9 @@ fprintf(fd,  "// Process group with 6 CNs \n");
         cnOffsetInGroup = (lut_numBnInBnGroups[5]*NR_LDPC_ZMAX)>>4;
 
         // Set pointers to start of group 2
-        fprintf(fd,"    p_bnProcBuf     = (__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
-        fprintf(fd,"    p_llrProcBuf    = (__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
-        fprintf(fd,"    p_llrRes        = (__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_bnProcBuf     = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"    p_llrProcBuf    = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_llrRes        = (simde__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
         // Loop over BNs
         fprintf(fd,"        for (int i=0,j=0;i<M;i++,j+=2) {\n");
             // First 16 LLRs of first CN
@@ -443,9 +443,9 @@ fprintf(fd,  "// Process group with 7 CNs \n");
         cnOffsetInGroup = (lut_numBnInBnGroups[6]*NR_LDPC_ZMAX)>>4;
 
         // Set pointers to start of group 2
-        fprintf(fd,"    p_bnProcBuf     = (__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
-        fprintf(fd,"    p_llrProcBuf    = (__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
-        fprintf(fd,"    p_llrRes        = (__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_bnProcBuf     = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"    p_llrProcBuf    = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_llrRes        = (simde__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
         // Loop over BNs
         fprintf(fd,"        for (int i=0,j=0;i<M;i++,j+=2) {\n");
             // First 16 LLRs of first CN
@@ -474,7 +474,7 @@ fprintf(fd,  "// Process group with 7 CNs \n");
         fprintf(fd,"        ymm0 = simde_mm256_packs_epi16(ymmRes0, ymmRes1);\n");
             // ymm0     = [ymmRes1[255:128] ymmRes0[255:128] ymmRes1[127:0] ymmRes0[127:0]]
             // p_llrRes = [ymmRes1[255:128] ymmRes1[127:0] ymmRes0[255:128] ymmRes0[127:0]]
-        //fprintf(fd,"         (__m256i*) &llrRes[%d + i]    = simde_mm256_permute4x64_epi64(ymm0, 0xD8);\n",lut_startAddrBnGroupsLlr[idxBnGroup]>>5 );
+        //fprintf(fd,"         (simde__m256i*) &llrRes[%d + i]    = simde_mm256_permute4x64_epi64(ymm0, 0xD8);\n",lut_startAddrBnGroupsLlr[idxBnGroup]>>5 );
         fprintf(fd,"            p_llrRes[i] = simde_mm256_permute4x64_epi64(ymm0, 0xD8);\n");
 
         fprintf(fd,"}\n");
@@ -500,9 +500,9 @@ fprintf(fd,  "// Process group with 8 CNs \n");
         cnOffsetInGroup = (lut_numBnInBnGroups[7]*NR_LDPC_ZMAX)>>4;
 
         // Set pointers to start of group 2
-        fprintf(fd,"    p_bnProcBuf     = (__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
-        fprintf(fd,"    p_llrProcBuf    = (__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
-        fprintf(fd,"    p_llrRes        = (__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_bnProcBuf     = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"    p_llrProcBuf    = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_llrRes        = (simde__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
         // Loop over BNs
         fprintf(fd,"        for (int i=0,j=0;i<M;i++,j+=2) {\n");
             // First 16 LLRs of first CN
@@ -531,7 +531,7 @@ fprintf(fd,  "// Process group with 8 CNs \n");
         fprintf(fd,"        ymm0 = simde_mm256_packs_epi16(ymmRes0, ymmRes1);\n");
             // ymm0     = [ymmRes1[255:128] ymmRes0[255:128] ymmRes1[127:0] ymmRes0[127:0]]
             // p_llrRes = [ymmRes1[255:128] ymmRes1[127:0] ymmRes0[255:128] ymmRes0[127:0]]
-        //fprintf(fd,"         (__m256i*) &llrRes[%d + i]    = simde_mm256_permute4x64_epi64(ymm0, 0xD8);\n",lut_startAddrBnGroupsLlr[idxBnGroup]>>5 );
+        //fprintf(fd,"         (simde__m256i*) &llrRes[%d + i]    = simde_mm256_permute4x64_epi64(ymm0, 0xD8);\n",lut_startAddrBnGroupsLlr[idxBnGroup]>>5 );
 
         fprintf(fd,"            p_llrRes[i] = simde_mm256_permute4x64_epi64(ymm0, 0xD8);\n");
 
@@ -557,9 +557,9 @@ fprintf(fd,  "// Process group with 9 CNs \n");
         cnOffsetInGroup = (lut_numBnInBnGroups[8]*NR_LDPC_ZMAX)>>4;
 
         // Set pointers to start of group 2
-        fprintf(fd,"    p_bnProcBuf     = (__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
-        fprintf(fd,"    p_llrProcBuf    = (__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
-        fprintf(fd,"    p_llrRes        = (__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_bnProcBuf     = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"    p_llrProcBuf    = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_llrRes        = (simde__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
         // Loop over BNs
         fprintf(fd,"        for (int i=0,j=0;i<M;i++,j+=2) {\n");
             // First 16 LLRs of first CN
@@ -588,7 +588,7 @@ fprintf(fd,  "// Process group with 9 CNs \n");
         fprintf(fd,"        ymm0 = simde_mm256_packs_epi16(ymmRes0, ymmRes1);\n");
             // ymm0     = [ymmRes1[255:128] ymmRes0[255:128] ymmRes1[127:0] ymmRes0[127:0]]
             // p_llrRes = [ymmRes1[255:128] ymmRes1[127:0] ymmRes0[255:128] ymmRes0[127:0]]
-        //fprintf(fd,"         (__m256i*) &llrRes[%d + i]    = simde_mm256_permute4x64_epi64(ymm0, 0xD8);\n",lut_startAddrBnGroupsLlr[idxBnGroup]>>5 );
+        //fprintf(fd,"         (simde__m256i*) &llrRes[%d + i]    = simde_mm256_permute4x64_epi64(ymm0, 0xD8);\n",lut_startAddrBnGroupsLlr[idxBnGroup]>>5 );
         fprintf(fd,"            p_llrRes[i] = simde_mm256_permute4x64_epi64(ymm0, 0xD8);\n");
 
         fprintf(fd,"}\n");
@@ -614,9 +614,9 @@ fprintf(fd,  "// Process group with 10 CNs \n");
         cnOffsetInGroup = (lut_numBnInBnGroups[9]*NR_LDPC_ZMAX)>>4;
 
         // Set pointers to start of group 2
-        fprintf(fd,"    p_bnProcBuf     = (__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
-        fprintf(fd,"    p_llrProcBuf    = (__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
-        fprintf(fd,"    p_llrRes        = (__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_bnProcBuf     = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"    p_llrProcBuf    = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_llrRes        = (simde__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
         // Loop over BNs
         fprintf(fd,"        for (int i=0,j=0;i<M;i++,j+=2) {\n");
             // First 16 LLRs of first CN
@@ -672,9 +672,9 @@ fprintf(fd,  "// Process group with 11 CNs \n");
         cnOffsetInGroup = (lut_numBnInBnGroups[10]*NR_LDPC_ZMAX)>>4;
 
         // Set pointers to start of group 2
-        fprintf(fd,"    p_bnProcBuf     = (__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
-        fprintf(fd,"    p_llrProcBuf    = (__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
-        fprintf(fd,"    p_llrRes        = (__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_bnProcBuf     = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"    p_llrProcBuf    = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_llrRes        = (simde__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
         // Loop over BNs
         fprintf(fd,"            for (int i=0,j=0;i<M;i++,j+=2) {\n");
             // First 16 LLRs of first CN
@@ -727,9 +727,9 @@ fprintf(fd,  "// Process group with 12 CNs \n");
         cnOffsetInGroup = (lut_numBnInBnGroups[11]*NR_LDPC_ZMAX)>>4;
 
         // Set pointers to start of group 2
-        fprintf(fd,"    p_bnProcBuf     = (__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
-        fprintf(fd,"    p_llrProcBuf    = (__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
-        fprintf(fd,"    p_llrRes        = (__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_bnProcBuf     = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"    p_llrProcBuf    = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_llrRes        = (simde__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
         // Loop over BNs
         fprintf(fd,"            for (int i=0,j=0;i<M;i++,j+=2) {\n");
             // First 16 LLRs of first CN
@@ -783,9 +783,9 @@ fprintf(fd,  "// Process group with 13 CNs \n");
         cnOffsetInGroup = (lut_numBnInBnGroups[12]*NR_LDPC_ZMAX)>>4;
 
         // Set pointers to start of group 2
-        fprintf(fd,"    p_bnProcBuf     = (__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
-        fprintf(fd,"    p_llrProcBuf    = (__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
-        fprintf(fd,"    p_llrRes        = (__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_bnProcBuf     = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"    p_llrProcBuf    = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_llrRes        = (simde__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
         // Loop over BNs
         fprintf(fd,"        for (int i=0,j=0;i<M;i++,j+=2) {\n");
             // First 16 LLRs of first CN
@@ -840,9 +840,9 @@ fprintf(fd,  "// Process group with 14 CNs \n");
         cnOffsetInGroup = (lut_numBnInBnGroups[13]*NR_LDPC_ZMAX)>>4;
 
         // Set pointers to start of group 2
-        fprintf(fd,"    p_bnProcBuf     = (__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
-        fprintf(fd,"    p_llrProcBuf    = (__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
-        fprintf(fd,"    p_llrRes        = (__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_bnProcBuf     = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"    p_llrProcBuf    = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_llrRes        = (simde__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
         // Loop over BNs
         fprintf(fd,"        for (int i=0,j=0;i<M;i++,j+=2) {\n");
             // First 16 LLRs of first CN
@@ -896,9 +896,9 @@ fprintf(fd,  "// Process group with 15 CNs \n");
         cnOffsetInGroup = (lut_numBnInBnGroups[14]*NR_LDPC_ZMAX)>>4;
 
         // Set pointers to start of group 2
-        fprintf(fd,"    p_bnProcBuf     = (__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
-        fprintf(fd,"    p_llrProcBuf    = (__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
-        fprintf(fd,"    p_llrRes        = (__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_bnProcBuf     = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"    p_llrProcBuf    = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_llrRes        = (simde__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
         // Loop over BNs
         fprintf(fd,"        for (int i=0,j=0;i<M;i++,j+=2) {\n");
             // First 16 LLRs of first CN
@@ -953,9 +953,9 @@ fprintf(fd,  "// Process group with 16 CNs \n");
         cnOffsetInGroup = (lut_numBnInBnGroups[15]*NR_LDPC_ZMAX)>>4;
 
         // Set pointers to start of group 2
-        fprintf(fd,"    p_bnProcBuf     = (__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
-        fprintf(fd,"    p_llrProcBuf    = (__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
-        fprintf(fd,"    p_llrRes        = (__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_bnProcBuf     = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"    p_llrProcBuf    = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_llrRes        = (simde__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
         // Loop over BNs
         fprintf(fd,"        for (int i=0,j=0;i<M;i++,j+=2) {\n");
             // First 16 LLRs of first CN
@@ -1009,9 +1009,9 @@ fprintf(fd,  "// Process group with 17 CNs \n");
         cnOffsetInGroup = (lut_numBnInBnGroups[16]*NR_LDPC_ZMAX)>>4;
 
         // Set pointers to start of group 2
-        fprintf(fd,"    p_bnProcBuf     = (__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
-        fprintf(fd,"    p_llrProcBuf    = (__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
-        fprintf(fd,"    p_llrRes        = (__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_bnProcBuf     = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"    p_llrProcBuf    = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_llrRes        = (simde__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
         // Loop over BNs
         fprintf(fd,"        for (int i=0,j=0;i<M;i++,j+=2) {\n");
             // First 16 LLRs of first CN
@@ -1065,9 +1065,9 @@ fprintf(fd,  "// Process group with 18 CNs \n");
         cnOffsetInGroup = (lut_numBnInBnGroups[17]*NR_LDPC_ZMAX)>>4;
 
         // Set pointers to start of group 2
-        fprintf(fd,"    p_bnProcBuf     = (__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
-        fprintf(fd,"    p_llrProcBuf    = (__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
-        fprintf(fd,"    p_llrRes        = (__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_bnProcBuf     = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"    p_llrProcBuf    = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_llrRes        = (simde__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
         // Loop over BNs
         fprintf(fd,"        for (int i=0,j=0;i<M;i++,j+=2) {\n");
             // First 16 LLRs of first CN
@@ -1120,9 +1120,9 @@ fprintf(fd,  "// Process group with 19 CNs \n");
         cnOffsetInGroup = (lut_numBnInBnGroups[18]*NR_LDPC_ZMAX)>>4;
 
         // Set pointers to start of group 2
-        fprintf(fd,"    p_bnProcBuf     = (__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
-        fprintf(fd,"    p_llrProcBuf    = (__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
-        fprintf(fd,"    p_llrRes        = (__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_bnProcBuf     = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"    p_llrProcBuf    = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_llrRes        = (simde__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
         // Loop over BNs
         fprintf(fd,"        for (int i=0,j=0;i<M;i++,j+=2) {\n");
             // First 16 LLRs of first CN
@@ -1176,9 +1176,9 @@ fprintf(fd,  "// Process group with 20 CNs \n");
         cnOffsetInGroup = (lut_numBnInBnGroups[19]*NR_LDPC_ZMAX)>>4;
 
         // Set pointers to start of group 2
-        fprintf(fd,"    p_bnProcBuf     = (__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
-        fprintf(fd,"    p_llrProcBuf    = (__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
-        fprintf(fd,"    p_llrRes        = (__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_bnProcBuf     = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"    p_llrProcBuf    = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_llrRes        = (simde__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
         // Loop over BNs
         fprintf(fd,"        for (int i=0,j=0;i<M;i++,j+=2) {\n");
             // First 16 LLRs of first CN
@@ -1236,9 +1236,9 @@ fprintf(fd,  "// Process group with 21 CNs \n");
         cnOffsetInGroup = (lut_numBnInBnGroups[20]*NR_LDPC_ZMAX)>>4;
 
         // Set pointers to start of group 2
-        fprintf(fd,"    p_bnProcBuf     = (__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
-        fprintf(fd,"    p_llrProcBuf    = (__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
-        fprintf(fd,"    p_llrRes        = (__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_bnProcBuf     = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"    p_llrProcBuf    = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_llrRes        = (simde__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
         // Loop over BNs
         fprintf(fd,"            for (int i=0,j=0;i<M;i++,j+=2) {\n");
             // First 16 LLRs of first CN
@@ -1291,9 +1291,9 @@ fprintf(fd,  "// Process group with 22 CNs \n");
         cnOffsetInGroup = (lut_numBnInBnGroups[21]*NR_LDPC_ZMAX)>>4;
 
         // Set pointers to start of group 2
-        fprintf(fd,"    p_bnProcBuf     = (__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
-        fprintf(fd,"    p_llrProcBuf    = (__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
-        fprintf(fd,"    p_llrRes        = (__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_bnProcBuf     = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"    p_llrProcBuf    = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_llrRes        = (simde__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
         // Loop over BNs
         fprintf(fd,"            for (int i=0,j=0;i<M;i++,j+=2) {\n");
             // First 16 LLRs of first CN
@@ -1347,9 +1347,9 @@ fprintf(fd,  "// Process group with <23 CNs \n");
         cnOffsetInGroup = (lut_numBnInBnGroups[22]*NR_LDPC_ZMAX)>>4;
 
         // Set pointers to start of group 2
-        fprintf(fd,"    p_bnProcBuf     = (__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
-        fprintf(fd,"    p_llrProcBuf    = (__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
-        fprintf(fd,"    p_llrRes        = (__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_bnProcBuf     = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"    p_llrProcBuf    = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_llrRes        = (simde__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
         // Loop over BNs
         fprintf(fd,"        for (int i=0,j=0;i<M;i++,j+=2) {\n");
             // First 16 LLRs of first CN
@@ -1404,9 +1404,9 @@ fprintf(fd,  "// Process group with 24 CNs \n");
         cnOffsetInGroup = (lut_numBnInBnGroups[23]*NR_LDPC_ZMAX)>>4;
 
         // Set pointers to start of group 2
-        fprintf(fd,"    p_bnProcBuf     = (__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
-        fprintf(fd,"    p_llrProcBuf    = (__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
-        fprintf(fd,"    p_llrRes        = (__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_bnProcBuf     = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"    p_llrProcBuf    = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_llrRes        = (simde__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
         // Loop over BNs
         fprintf(fd,"        for (int i=0,j=0;i<M;i++,j+=2) {\n");
             // First 16 LLRs of first CN
@@ -1460,9 +1460,9 @@ fprintf(fd,  "// Process group with 25 CNs \n");
         cnOffsetInGroup = (lut_numBnInBnGroups[24]*NR_LDPC_ZMAX)>>4;
 
         // Set pointers to start of group 2
-        fprintf(fd,"    p_bnProcBuf     = (__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
-        fprintf(fd,"    p_llrProcBuf    = (__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
-        fprintf(fd,"    p_llrRes        = (__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_bnProcBuf     = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"    p_llrProcBuf    = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_llrRes        = (simde__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
         // Loop over BNs
         fprintf(fd,"        for (int i=0,j=0;i<M;i++,j+=2) {\n");
             // First 16 LLRs of first CN
@@ -1517,9 +1517,9 @@ fprintf(fd,  "// Process group with 26 CNs \n");
         cnOffsetInGroup = (lut_numBnInBnGroups[25]*NR_LDPC_ZMAX)>>4;
 
         // Set pointers to start of group 2
-        fprintf(fd,"    p_bnProcBuf     = (__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
-        fprintf(fd,"    p_llrProcBuf    = (__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
-        fprintf(fd,"    p_llrRes        = (__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_bnProcBuf     = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"    p_llrProcBuf    = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_llrRes        = (simde__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
         // Loop over BNs
         fprintf(fd,"        for (int i=0,j=0;i<M;i++,j+=2) {\n");
             // First 16 LLRs of first CN
@@ -1573,9 +1573,9 @@ fprintf(fd,  "// Process group with 27 CNs \n");
         cnOffsetInGroup = (lut_numBnInBnGroups[26]*NR_LDPC_ZMAX)>>4;
 
         // Set pointers to start of group 2
-        fprintf(fd,"    p_bnProcBuf     = (__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
-        fprintf(fd,"    p_llrProcBuf    = (__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
-        fprintf(fd,"    p_llrRes        = (__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_bnProcBuf     = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"    p_llrProcBuf    = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_llrRes        = (simde__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
         // Loop over BNs
         fprintf(fd,"        for (int i=0,j=0;i<M;i++,j+=2) {\n");
             // First 16 LLRs of first CN
@@ -1629,9 +1629,9 @@ fprintf(fd,  "// Process group with 28 CNs \n");
         cnOffsetInGroup = (lut_numBnInBnGroups[27]*NR_LDPC_ZMAX)>>4;
 
         // Set pointers to start of group 2
-        fprintf(fd,"    p_bnProcBuf     = (__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
-        fprintf(fd,"    p_llrProcBuf    = (__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
-        fprintf(fd,"    p_llrRes        = (__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_bnProcBuf     = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"    p_llrProcBuf    = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_llrRes        = (simde__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
         // Loop over BNs
         fprintf(fd,"        for (int i=0,j=0;i<M;i++,j+=2) {\n");
             // First 16 LLRs of first CN
@@ -1684,9 +1684,9 @@ fprintf(fd,  "// Process group with 29 CNs \n");
         cnOffsetInGroup = (lut_numBnInBnGroups[28]*NR_LDPC_ZMAX)>>4;
 
         // Set pointers to start of group 2
-        fprintf(fd,"    p_bnProcBuf     = (__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
-        fprintf(fd,"    p_llrProcBuf    = (__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
-        fprintf(fd,"    p_llrRes        = (__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_bnProcBuf     = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"    p_llrProcBuf    = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_llrRes        = (simde__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
         // Loop over BNs
         fprintf(fd,"        for (int i=0,j=0;i<M;i++,j+=2) {\n");
             // First 16 LLRs of first CN
@@ -1740,9 +1740,9 @@ fprintf(fd,  "// Process group with 30 CNs \n");
         cnOffsetInGroup = (lut_numBnInBnGroups[29]*NR_LDPC_ZMAX)>>4;
 
         // Set pointers to start of group 2
-        fprintf(fd,"    p_bnProcBuf     = (__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
-        fprintf(fd,"    p_llrProcBuf    = (__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
-        fprintf(fd,"    p_llrRes        = (__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_bnProcBuf     = (simde__m128i*) &bnProcBuf    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+        fprintf(fd,"    p_llrProcBuf    = (simde__m128i*) &llrProcBuf   [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
+        fprintf(fd,"    p_llrRes        = (simde__m256i*) &llrRes       [%d];\n",lut_startAddrBnGroupsLlr[idxBnGroup]);
         // Loop over BNs
         fprintf(fd,"        for (int i=0,j=0;i<M;i++,j+=2) {\n");
             // First 16 LLRs of first CN

openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_bnProc/bnProc_gen_BG1_avx2.c

@@ -106,7 +106,7 @@ void nrLDPC_bnProc_BG1_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -130,13 +130,13 @@ void nrLDPC_bnProc_BG1_generator_AVX2(const char* dir, int R)
     cnOffsetInGroup = (lut_numBnInBnGroups[2] * NR_LDPC_ZMAX) >> 5;
 
     // Set pointers to start of group 2
-    // fprintf(fd,"    ((__m256i*) bnProcBuf)     = ((__m256i*) &bnProcBuf)    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+    // fprintf(fd,"    ((simde__m256i*) bnProcBuf)     = ((simde__m256i*) &bnProcBuf)    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
 
     for (k = 0; k < 3; k++) {
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -165,7 +165,7 @@ void nrLDPC_bnProc_BG1_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               ((lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup),
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               ((lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup));
@@ -195,7 +195,7 @@ void nrLDPC_bnProc_BG1_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -227,7 +227,7 @@ void nrLDPC_bnProc_BG1_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -259,7 +259,7 @@ void nrLDPC_bnProc_BG1_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -291,7 +291,7 @@ void nrLDPC_bnProc_BG1_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -323,7 +323,7 @@ void nrLDPC_bnProc_BG1_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -355,7 +355,7 @@ void nrLDPC_bnProc_BG1_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -386,7 +386,7 @@ void nrLDPC_bnProc_BG1_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -416,7 +416,7 @@ void nrLDPC_bnProc_BG1_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -447,7 +447,7 @@ void nrLDPC_bnProc_BG1_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -478,7 +478,7 @@ void nrLDPC_bnProc_BG1_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -509,7 +509,7 @@ void nrLDPC_bnProc_BG1_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -540,7 +540,7 @@ void nrLDPC_bnProc_BG1_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -574,7 +574,7 @@ void nrLDPC_bnProc_BG1_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -607,7 +607,7 @@ void nrLDPC_bnProc_BG1_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -638,7 +638,7 @@ void nrLDPC_bnProc_BG1_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -669,7 +669,7 @@ void nrLDPC_bnProc_BG1_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -700,7 +700,7 @@ void nrLDPC_bnProc_BG1_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -730,7 +730,7 @@ void nrLDPC_bnProc_BG1_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -761,7 +761,7 @@ void nrLDPC_bnProc_BG1_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -794,7 +794,7 @@ void nrLDPC_bnProc_BG1_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -825,7 +825,7 @@ void nrLDPC_bnProc_BG1_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -856,7 +856,7 @@ void nrLDPC_bnProc_BG1_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -889,7 +889,7 @@ void nrLDPC_bnProc_BG1_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -922,7 +922,7 @@ void nrLDPC_bnProc_BG1_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -955,7 +955,7 @@ void nrLDPC_bnProc_BG1_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -988,7 +988,7 @@ void nrLDPC_bnProc_BG1_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);

openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_bnProc/bnProc_gen_BG2_128.c

@@ -0,0 +1,998 @@
+/*
+ * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.
+ * The OpenAirInterface Software Alliance licenses this file to You under
+ * the OAI Public License, Version 1.1  (the "License"); you may not use this file
+ * except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.openairinterface.org/?page_id=698
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *-------------------------------------------------------------------------------
+ * For more information about the OpenAirInterface (OAI) Software Alliance:
+ *      contact@openairinterface.org
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include "../../nrLDPCdecoder_defs.h"
+#include "../../nrLDPC_types.h"
+
+void nrLDPC_bnProc_BG2_generator_128(const char* dir, int R)
+{
+  const char* ratestr[3] = {"15", "13", "23"};
+
+  if (R < 0 || R > 2) {
+    printf("Illegal R %d\n", R);
+    abort();
+  }
+
+  // system("mkdir -p ../ldpc_gen_files");
+
+  char fname[FILENAME_MAX + 1];
+  snprintf(fname, sizeof(fname), "%s/bnProc128/nrLDPC_bnProc_BG2_R%s_128.h", dir, ratestr[R]);
+  FILE* fd = fopen(fname, "w");
+  if (fd == NULL) {
+    printf("Cannot create file %s\n", fname);
+    abort();
+  }
+
+  fprintf(fd, "static inline void nrLDPC_bnProc_BG2_R%s_128(int8_t* bnProcBuf,int8_t* bnProcBufRes,  int8_t* llrRes, uint16_t Z  ) {\n", ratestr[R]);
+  const uint8_t* lut_numBnInBnGroups;
+  const uint32_t* lut_startAddrBnGroups;
+  const uint16_t* lut_startAddrBnGroupsLlr;
+  if (R == 0) {
+    lut_numBnInBnGroups = lut_numBnInBnGroups_BG2_R15;
+    lut_startAddrBnGroups = lut_startAddrBnGroups_BG2_R15;
+    lut_startAddrBnGroupsLlr = lut_startAddrBnGroupsLlr_BG2_R15;
+
+  } else if (R == 1) {
+    lut_numBnInBnGroups = lut_numBnInBnGroups_BG2_R13;
+    lut_startAddrBnGroups = lut_startAddrBnGroups_BG2_R13;
+    lut_startAddrBnGroupsLlr = lut_startAddrBnGroupsLlr_BG2_R13;
+  } else if (R == 2) {
+    lut_numBnInBnGroups = lut_numBnInBnGroups_BG2_R23;
+    lut_startAddrBnGroups = lut_startAddrBnGroups_BG2_R23;
+    lut_startAddrBnGroupsLlr = lut_startAddrBnGroupsLlr_BG2_R23;
+  } else {
+    printf("aborting, illegal R %d\n", R);
+    fclose(fd);
+    abort();
+  }
+
+  // uint32_t M;
+  // uint32_t M32rem;
+  // uint32_t i;
+  uint32_t k;
+  // Offset to each bit within a group in terms of 32 Byte
+  uint32_t cnOffsetInGroup;
+  uint8_t idxBnGroup = 0;
+
+  fprintf(fd, "        uint32_t M, i; \n");
+
+  // =====================================================================
+  // Process group with 1 CN
+  // Already done in bnProcBufPc
+
+  // =====================================================================
+
+  fprintf(fd, "// Process group with 2 CNs \n");
+
+  if (lut_numBnInBnGroups[1] > 0) {
+    // If elements in group move to next address
+    idxBnGroup++;
+
+    // Number of groups of 32 BNs or parallel processing
+    fprintf(fd, " M = (%d*Z + 15)>>4;\n", lut_numBnInBnGroups[1]);
+
+    // Set the offset to each CN within a group in terms of 16 Byte
+    cnOffsetInGroup = (lut_numBnInBnGroups[1] * NR_LDPC_ZMAX) >> 4;
+
+    // Set pointers to start of group 2
+
+    // Loop over CNs
+    for (k = 0; k < 2; k++) {
+      // Loop over BNs
+      fprintf(fd, "            for (i=0;i<M;i++) {\n");
+      fprintf(fd,
+              "            ((simde__m128i*)bnProcBufRes)[%d + i ] = simde_mm_subs_epi8(((simde__m128i*)llrRes)[%d + i ], ((simde__m128i*) bnProcBuf)[%d + i]);\n",
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup,
+              (lut_startAddrBnGroupsLlr[idxBnGroup] >> 4),
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup);
+
+      fprintf(fd, "}\n");
+    }
+  }
+
+  // =====================================================================
+
+  fprintf(fd, "// Process group with 3 CNs \n");
+
+  if (lut_numBnInBnGroups[2] > 0) {
+    // If elements in group move to next address
+    idxBnGroup++;
+
+    // Number of groups of 32 BNs for parallel processing
+    fprintf(fd, "       M = (%d*Z + 15)>>4;\n", lut_numBnInBnGroups[2]);
+
+    // Set the offset to each CN within a group in terms of 16 Byte
+    cnOffsetInGroup = (lut_numBnInBnGroups[2] * NR_LDPC_ZMAX) >> 4;
+
+    // Set pointers to start of group 2
+    // fprintf(fd,"    ((simde__m128i*) bnProcBuf)     = ((simde__m128i*) &bnProcBuf)    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+
+    for (k = 0; k < 3; k++) {
+      // Loop over BNs
+      fprintf(fd, "            for (i=0;i<M;i++) {\n");
+      fprintf(fd,
+              "            ((simde__m128i*)bnProcBufRes)[%d + i ] = simde_mm_subs_epi8(((simde__m128i*)llrRes)[%d + i ], ((simde__m128i*) bnProcBuf)[%d + i]);\n",
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup,
+              (lut_startAddrBnGroupsLlr[idxBnGroup] >> 4),
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup);
+
+      fprintf(fd, "}\n");
+    }
+  }
+
+  // =====================================================================
+
+  fprintf(fd, "// Process group with 4 CNs \n");
+
+  if (lut_numBnInBnGroups[3] > 0) {
+    // If elements in group move to next address
+    idxBnGroup++;
+
+    // Number of groups of 32 BNs for parallel processing
+    fprintf(fd, "       M = (%d*Z + 15)>>4;\n", lut_numBnInBnGroups[3]);
+
+    // Set the offset to each CN within a group in terms of 16 Byte
+    cnOffsetInGroup = (lut_numBnInBnGroups[3] * NR_LDPC_ZMAX) >> 4;
+
+    // Set pointers to start of group 2
+
+    for (k = 0; k < 4; k++) {
+      // Loop over BNs
+      fprintf(fd, "            for (i=0;i<M;i++) {\n");
+      fprintf(fd,
+              "            ((simde__m128i*)bnProcBufRes)[%d + i ] = simde_mm_subs_epi8(((simde__m128i*)llrRes)[%d + i ], ((simde__m128i*) bnProcBuf)[%d + i]);\n",
+              ((lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup),
+              (lut_startAddrBnGroupsLlr[idxBnGroup] >> 4),
+              ((lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup));
+
+      fprintf(fd, "}\n");
+    }
+  }
+
+  // =====================================================================
+
+  fprintf(fd, "// Process group with 5 CNs \n");
+
+  if (lut_numBnInBnGroups[4] > 0) {
+    // If elements in group move to next address
+    idxBnGroup++;
+
+    // Number of groups of 32 BNs for parallel processing
+    fprintf(fd, "       M = (%d*Z + 15)>>4;\n", lut_numBnInBnGroups[4]);
+
+    // Set the offset to each CN within a group in terms of 16 Byte
+    cnOffsetInGroup = (lut_numBnInBnGroups[4] * NR_LDPC_ZMAX) >> 4;
+
+    // Set pointers to start of group 2
+
+    // Loop over CNs
+    for (k = 0; k < 5; k++) {
+      // Loop over BNs
+      fprintf(fd, "            for (i=0;i<M;i++) {\n");
+      fprintf(fd,
+              "            ((simde__m128i*)bnProcBufRes)[%d + i ] = simde_mm_subs_epi8(((simde__m128i*)llrRes)[%d + i ], ((simde__m128i*) bnProcBuf)[%d + i]);\n",
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup,
+              (lut_startAddrBnGroupsLlr[idxBnGroup] >> 4),
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup);
+
+      fprintf(fd, "}\n");
+    }
+  }
+
+  // =====================================================================
+
+  fprintf(fd, "// Process group with 6 CNs \n");
+
+  // Process group with 6 CNs
+
+  if (lut_numBnInBnGroups[5] > 0) {
+    // If elements in group move to next address
+    idxBnGroup++;
+
+    // Number of groups of 32 BNs for parallel processing
+    fprintf(fd, "       M = (%d*Z + 15)>>4;\n", lut_numBnInBnGroups[5]);
+
+    // Set the offset to each CN within a group in terms of 16 Byte
+    cnOffsetInGroup = (lut_numBnInBnGroups[5] * NR_LDPC_ZMAX) >> 4;
+
+    // Set pointers to start of group 2
+
+    // Loop over CNs
+    for (k = 0; k < 6; k++) {
+      // Loop over BNs
+      fprintf(fd, "            for (i=0;i<M;i++) {\n");
+      fprintf(fd,
+              "            ((simde__m128i*)bnProcBufRes)[%d + i ] = simde_mm_subs_epi8(((simde__m128i*)llrRes)[%d + i ], ((simde__m128i*) bnProcBuf)[%d + i]);\n",
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup,
+              (lut_startAddrBnGroupsLlr[idxBnGroup] >> 4),
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup);
+
+      fprintf(fd, "}\n");
+    }
+  }
+
+  // =====================================================================
+
+  fprintf(fd, "// Process group with 7 CNs \n");
+
+  // Process group with 7 CNs
+
+  if (lut_numBnInBnGroups[6] > 0) {
+    // If elements in group move to next address
+    idxBnGroup++;
+
+    // Number of groups of 32 BNs for parallel processing
+    fprintf(fd, "       M = (%d*Z + 15)>>4;\n", lut_numBnInBnGroups[6]);
+
+    // Set the offset to each CN within a group in terms of 16 Byte
+    cnOffsetInGroup = (lut_numBnInBnGroups[6] * NR_LDPC_ZMAX) >> 4;
+
+    // Set pointers to start of group 2
+
+    // Loop over CNs
+    for (k = 0; k < 7; k++) {
+      // Loop over BNs
+      fprintf(fd, "            for (i=0;i<M;i++) {\n");
+      fprintf(fd,
+              "            ((simde__m128i*)bnProcBufRes)[%d + i ] = simde_mm_subs_epi8(((simde__m128i*)llrRes)[%d + i ], ((simde__m128i*) bnProcBuf)[%d + i]);\n",
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup,
+              (lut_startAddrBnGroupsLlr[idxBnGroup] >> 4),
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup);
+
+      fprintf(fd, "}\n");
+    }
+  }
+
+  // =====================================================================
+
+  fprintf(fd, "// Process group with 8 CNs \n");
+
+  // Process group with 8 CNs
+
+  if (lut_numBnInBnGroups[7] > 0) {
+    // If elements in group move to next address
+    idxBnGroup++;
+
+    // Number of groups of 32 BNs for parallel processing
+    fprintf(fd, "       M = (%d*Z + 15)>>4;\n", lut_numBnInBnGroups[7]);
+
+    // Set the offset to each CN within a group in terms of 16 Byte
+    cnOffsetInGroup = (lut_numBnInBnGroups[7] * NR_LDPC_ZMAX) >> 4;
+
+    // Set pointers to start of group 2
+
+    // Loop over CNs
+    for (k = 0; k < 8; k++) {
+      // Loop over BNs
+      fprintf(fd, "            for (i=0;i<M;i++) {\n");
+      fprintf(fd,
+              "            ((simde__m128i*)bnProcBufRes)[%d + i ] = simde_mm_subs_epi8(((simde__m128i*)llrRes)[%d + i ], ((simde__m128i*) bnProcBuf)[%d + i]);\n",
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup,
+              (lut_startAddrBnGroupsLlr[idxBnGroup] >> 4),
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup);
+
+      fprintf(fd, "}\n");
+    }
+  }
+
+  // =====================================================================
+
+  fprintf(fd, "// Process group with 9 CNs \n");
+
+  // Process group with 9 CNs
+
+  if (lut_numBnInBnGroups[8] > 0) {
+    // If elements in group move to next address
+    idxBnGroup++;
+
+    // Number of groups of 32 BNs for parallel processing
+    fprintf(fd, "       M = (%d*Z + 15)>>4;\n", lut_numBnInBnGroups[8]);
+
+    // Set the offset to each CN within a group in terms of 16 Byte
+    cnOffsetInGroup = (lut_numBnInBnGroups[8] * NR_LDPC_ZMAX) >> 4;
+
+    // Set pointers to start of group 2
+
+    // Loop over CNs
+    for (k = 0; k < 9; k++) {
+      // Loop over BNs
+      fprintf(fd, "            for (i=0;i<M;i++) {\n");
+      fprintf(fd,
+              "            ((simde__m128i*)bnProcBufRes)[%d + i ] = simde_mm_subs_epi8(((simde__m128i*)llrRes)[%d + i ], ((simde__m128i*) bnProcBuf)[%d + i]);\n",
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup,
+              (lut_startAddrBnGroupsLlr[idxBnGroup] >> 4),
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup);
+
+      fprintf(fd, "}\n");
+    }
+  }
+
+  // =====================================================================
+
+  fprintf(fd, "// Process group with 10 CNs \n");
+
+  // Process group with 10 CNs
+
+  if (lut_numBnInBnGroups[9] > 0) {
+    // If elements in group move to next address
+    idxBnGroup++;
+
+    // Number of groups of 32 BNs for parallel processing
+    fprintf(fd, "       M = (%d*Z + 15)>>4;\n", lut_numBnInBnGroups[9]);
+
+    // Set the offset to each CN within a group in terms of 16 Byte
+    cnOffsetInGroup = (lut_numBnInBnGroups[9] * NR_LDPC_ZMAX) >> 4;
+
+    // Set pointers to start of group 2
+
+    // Loop over CNs
+    for (k = 0; k < 10; k++) {
+      // Loop over BNs
+      fprintf(fd, "            for (i=0;i<M;i++) {\n");
+      fprintf(fd,
+              "            ((simde__m128i*)bnProcBufRes)[%d + i ] = simde_mm_subs_epi8(((simde__m128i*)llrRes)[%d + i ], ((simde__m128i*) bnProcBuf)[%d + i]);\n",
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup,
+              (lut_startAddrBnGroupsLlr[idxBnGroup] >> 4),
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup);
+
+      fprintf(fd, "}\n");
+    }
+  }
+
+  // =====================================================================
+
+  fprintf(fd, "// Process group with 11 CNs \n");
+
+  if (lut_numBnInBnGroups[10] > 0) {
+    // If elements in group move to next address
+    idxBnGroup++;
+
+    // Number of groups of 32 BNs for parallel processing
+    fprintf(fd, "       M = (%d*Z + 15)>>4;\n", lut_numBnInBnGroups[10]);
+    ;
+
+    // Set the offset to each CN within a group in terms of 16 Byte
+    cnOffsetInGroup = (lut_numBnInBnGroups[10] * NR_LDPC_ZMAX) >> 4;
+
+    // Set pointers to start of group 2
+
+    // Loop over CNs
+    for (k = 0; k < 11; k++) {
+      // Loop over BNs
+      fprintf(fd, "            for (i=0;i<M;i++) {\n");
+      fprintf(fd,
+              "            ((simde__m128i*)bnProcBufRes)[%d + i ] = simde_mm_subs_epi8(((simde__m128i*)llrRes)[%d + i ], ((simde__m128i*) bnProcBuf)[%d + i]);\n",
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup,
+              (lut_startAddrBnGroupsLlr[idxBnGroup] >> 4),
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup);
+
+      fprintf(fd, "}\n");
+    }
+  }
+  // =====================================================================
+
+  fprintf(fd, "// Process group with 12 CNs \n");
+
+  if (lut_numBnInBnGroups[11] > 0) {
+    // If elements in group move to next address
+    idxBnGroup++;
+
+    // Number of groups of 32 BNs for parallel processing
+    fprintf(fd, "       M = (%d*Z + 15)>>4;\n", lut_numBnInBnGroups[11]);
+    ;
+
+    // Set the offset to each CN within a group in terms of 16 Byte
+    cnOffsetInGroup = (lut_numBnInBnGroups[11] * NR_LDPC_ZMAX) >> 4;
+
+    // Set pointers to start of group 2
+
+    // Loop over CNs
+    for (k = 0; k < 12; k++) {
+      // Loop over BNs
+      fprintf(fd, "            for (i=0;i<M;i++) {\n");
+      fprintf(fd,
+              "            ((simde__m128i*)bnProcBufRes)[%d + i ] = simde_mm_subs_epi8(((simde__m128i*)llrRes)[%d + i ], ((simde__m128i*) bnProcBuf)[%d + i]);\n",
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup,
+              (lut_startAddrBnGroupsLlr[idxBnGroup] >> 4),
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup);
+
+      fprintf(fd, "}\n");
+    }
+  }
+
+  // =====================================================================
+
+  fprintf(fd, "// Process group with 13 CNs \n");
+
+  if (lut_numBnInBnGroups[12] > 0) {
+    // If elements in group move to next address
+    idxBnGroup++;
+
+    // Number of groups of 32 BNs for parallel processing
+    fprintf(fd, "       M = (%d*Z + 15)>>4;\n", lut_numBnInBnGroups[12]);
+    ;
+
+    // Set the offset to each CN within a group in terms of 16 Byte
+    cnOffsetInGroup = (lut_numBnInBnGroups[12] * NR_LDPC_ZMAX) >> 4;
+
+    // Set pointers to start of group 2
+
+    // Loop over CNs
+    for (k = 0; k < 13; k++) {
+      // Loop over BNs
+      fprintf(fd, "            for (i=0;i<M;i++) {\n");
+      fprintf(fd,
+              "            ((simde__m128i*)bnProcBufRes)[%d + i ] = simde_mm_subs_epi8(((simde__m128i*)llrRes)[%d + i ], ((simde__m128i*) bnProcBuf)[%d + i]);\n",
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup,
+              (lut_startAddrBnGroupsLlr[idxBnGroup] >> 4),
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup);
+
+      fprintf(fd, "}\n");
+    }
+  }
+
+  // =====================================================================
+
+  fprintf(fd, "// Process group with 14 CNs \n");
+
+  if (lut_numBnInBnGroups[13] > 0) {
+    // If elements in group move to next address
+    idxBnGroup++;
+
+    // Number of groups of 32 BNs for parallel processing
+    fprintf(fd, "       M = (%d*Z + 15)>>4;\n", lut_numBnInBnGroups[13]);
+    ;
+
+    // Set the offset to each CN within a group in terms of 16 Byte
+    cnOffsetInGroup = (lut_numBnInBnGroups[13] * NR_LDPC_ZMAX) >> 4;
+
+    // Set pointers to start of group 2
+
+    // Loop over CNs
+    for (k = 0; k < 14; k++) {
+      // Loop over BNs
+      fprintf(fd, "            for (i=0;i<M;i++) {\n");
+      fprintf(fd,
+              "            ((simde__m128i*)bnProcBufRes)[%d + i ] = simde_mm_subs_epi8(((simde__m128i*)llrRes)[%d + i ], ((simde__m128i*) bnProcBuf)[%d + i]);\n",
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup,
+              (lut_startAddrBnGroupsLlr[idxBnGroup] >> 4),
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup);
+
+      fprintf(fd, "}\n");
+    }
+  }
+
+  // =====================================================================
+
+  fprintf(fd, "// Process group with 15 CNs \n");
+
+  if (lut_numBnInBnGroups[14] > 0) {
+    // If elements in group move to next address
+    idxBnGroup++;
+
+    // Number of groups of 32 BNs for parallel processing
+    fprintf(fd, "       M = (%d*Z + 15)>>4;\n", lut_numBnInBnGroups[14]);
+    ;
+
+    // Set the offset to each CN within a group in terms of 16 Byte
+    cnOffsetInGroup = (lut_numBnInBnGroups[14] * NR_LDPC_ZMAX) >> 4;
+
+    // Set pointers to start of group 2
+
+    // Loop over CNs
+    for (k = 0; k < 15; k++) {
+      // Loop over BNs
+      fprintf(fd, "            for (i=0;i<M;i++) {\n");
+      fprintf(fd,
+              "            ((simde__m128i*)bnProcBufRes)[%d + i ] = simde_mm_subs_epi8(((simde__m128i*)llrRes)[%d + i ], ((simde__m128i*) bnProcBuf)[%d + i]);\n",
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup,
+              (lut_startAddrBnGroupsLlr[idxBnGroup] >> 4),
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup);
+
+      fprintf(fd, "}\n");
+    }
+  }
+
+  // =====================================================================
+
+  fprintf(fd, "// Process group with 16 CNs \n");
+
+  if (lut_numBnInBnGroups[15] > 0) {
+    // If elements in group move to next address
+    idxBnGroup++;
+
+    // Number of groups of 32 BNs for parallel processing
+    fprintf(fd, "       M = (%d*Z + 15)>>4;\n", lut_numBnInBnGroups[15]);
+    ;
+
+    // Set the offset to each CN within a group in terms of 16 Byte
+    cnOffsetInGroup = (lut_numBnInBnGroups[15] * NR_LDPC_ZMAX) >> 4;
+
+    // Set pointers to start of group 2
+
+    // Loop over CNs
+    for (k = 0; k < 16; k++) {
+      // Loop over BNs
+      fprintf(fd, "            for (i=0;i<M;i++) {\n");
+      fprintf(fd,
+              "            ((simde__m128i*)bnProcBufRes)[%d + i ] = simde_mm_subs_epi8(((simde__m128i*)llrRes)[%d + i ], ((simde__m128i*) bnProcBuf)[%d + i]);\n",
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup,
+              (lut_startAddrBnGroupsLlr[idxBnGroup] >> 4),
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup);
+
+      fprintf(fd, "}\n");
+    }
+  }
+
+  // =====================================================================
+  // Process group with 17 CNs
+
+  fprintf(fd, "// Process group with 17 CNs \n");
+
+  // Process group with 17 CNs
+
+  if (lut_numBnInBnGroups[16] > 0) {
+    // If elements in group move to next address
+    idxBnGroup++;
+
+    // Number of groups of 32 BNs for parallel processing
+    fprintf(fd, "       M = (%d*Z + 15)>>4;\n", lut_numBnInBnGroups[16]);
+    ;
+
+    // Set the offset to each CN within a group in terms of 16 Byte
+    cnOffsetInGroup = (lut_numBnInBnGroups[16] * NR_LDPC_ZMAX) >> 4;
+
+    // Set pointers to start of group 2
+
+    // Loop over CNs
+    for (k = 0; k < 17; k++) {
+      // Loop over BNs
+      fprintf(fd, "            for (i=0;i<M;i++) {\n");
+      fprintf(fd,
+              "            ((simde__m128i*)bnProcBufRes)[%d + i ] = simde_mm_subs_epi8(((simde__m128i*)llrRes)[%d + i ], ((simde__m128i*) bnProcBuf)[%d + i]);\n",
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup,
+              (lut_startAddrBnGroupsLlr[idxBnGroup] >> 4),
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup);
+
+      fprintf(fd, "}\n");
+    }
+  }
+
+  // =====================================================================
+
+  fprintf(fd, "// Process group with 18 CNs \n");
+
+  // Process group with 8 CNs
+
+  if (lut_numBnInBnGroups[17] > 0) {
+    // If elements in group move to next address
+    idxBnGroup++;
+
+    // Number of groups of 32 BNs for parallel processing
+    fprintf(fd, "       M = (%d*Z + 15)>>4;\n", lut_numBnInBnGroups[17]);
+    ;
+
+    // Set the offset to each CN within a group in terms of 16 Byte
+    cnOffsetInGroup = (lut_numBnInBnGroups[17] * NR_LDPC_ZMAX) >> 4;
+
+    // Set pointers to start of group 2
+
+    // Loop over CNs
+    for (k = 0; k < 18; k++) {
+      // Loop over BNs
+      fprintf(fd, "            for (i=0;i<M;i++) {\n");
+      fprintf(fd,
+              "            ((simde__m128i*)bnProcBufRes)[%d + i ] = simde_mm_subs_epi8(((simde__m128i*)llrRes)[%d + i ], ((simde__m128i*) bnProcBuf)[%d + i]);\n",
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup,
+              (lut_startAddrBnGroupsLlr[idxBnGroup] >> 4),
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup);
+
+      fprintf(fd, "}\n");
+    }
+  }
+
+  // =====================================================================
+
+  fprintf(fd, "// Process group with 19 CNs \n");
+
+  if (lut_numBnInBnGroups[18] > 0) {
+    // If elements in group move to next address
+    idxBnGroup++;
+
+    // Number of groups of 32 BNs for parallel processing
+    fprintf(fd, "       M = (%d*Z + 15)>>4;\n", lut_numBnInBnGroups[18]);
+    ;
+
+    // Set the offset to each CN within a group in terms of 16 Byte
+    cnOffsetInGroup = (lut_numBnInBnGroups[18] * NR_LDPC_ZMAX) >> 4;
+
+    // Set pointers to start of group 2
+
+    // Loop over CNs
+    for (k = 0; k < 19; k++) {
+      // Loop over BNs
+      fprintf(fd, "            for (i=0;i<M;i++) {\n");
+      fprintf(fd,
+              "            ((simde__m128i*)bnProcBufRes)[%d + i ] = simde_mm_subs_epi8(((simde__m128i*)llrRes)[%d + i ], ((simde__m128i*) bnProcBuf)[%d + i]);\n",
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup,
+              (lut_startAddrBnGroupsLlr[idxBnGroup] >> 4),
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup);
+
+      fprintf(fd, "}\n");
+    }
+  }
+
+  // =====================================================================
+
+  fprintf(fd, "// Process group with 20 CNs \n");
+
+  if (lut_numBnInBnGroups[19] > 0) {
+    // If elements in group move to next address
+    idxBnGroup++;
+
+    // Number of groups of 32 BNs for parallel processing
+    fprintf(fd, "       M = (%d*Z + 15)>>4;\n", lut_numBnInBnGroups[19]);
+    ;
+
+    // Set the offset to each CN within a group in terms of 16 Byte
+    cnOffsetInGroup = (lut_numBnInBnGroups[19] * NR_LDPC_ZMAX) >> 4;
+
+    // Set pointers to start of group 2
+
+    // Loop over CNs
+    for (k = 0; k < 20; k++) {
+      // Loop over BNs
+      fprintf(fd, "            for (i=0;i<M;i++) {\n");
+      fprintf(fd,
+              "            ((simde__m128i*)bnProcBufRes)[%d + i ] = simde_mm_subs_epi8(((simde__m128i*)llrRes)[%d + i ], ((simde__m128i*) bnProcBuf)[%d + i]);\n",
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup,
+              (lut_startAddrBnGroupsLlr[idxBnGroup] >> 4),
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup);
+
+      fprintf(fd, "}\n");
+    }
+  }
+
+  // =====================================================================
+
+  fprintf(fd, "// Process group with 21 CNs \n");
+
+  if (lut_numBnInBnGroups[20] > 0) {
+    // If elements in group move to next address
+    idxBnGroup++;
+
+    // Number of groups of 32 BNs for parallel processing
+    fprintf(fd, "       M = (%d*Z + 15)>>4;\n", lut_numBnInBnGroups[20]);
+    ;
+
+    // Set the offset to each CN within a group in terms of 16 Byte
+    cnOffsetInGroup = (lut_numBnInBnGroups[20] * NR_LDPC_ZMAX) >> 4;
+
+    // Set pointers to start of group 2
+
+    // Loop over CNs
+    for (k = 0; k < 21; k++) {
+      // Loop over BNs
+      fprintf(fd, "            for (i=0;i<M;i++) {\n");
+      fprintf(fd,
+              "            ((simde__m128i*)bnProcBufRes)[%d + i ] = simde_mm_subs_epi8(((simde__m128i*)llrRes)[%d + i ], ((simde__m128i*) bnProcBuf)[%d + i]);\n",
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup,
+              (lut_startAddrBnGroupsLlr[idxBnGroup] >> 4),
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup);
+
+      fprintf(fd, "}\n");
+    }
+  }
+  // =====================================================================
+
+  fprintf(fd, "// Process group with 22 CNs \n");
+
+  if (lut_numBnInBnGroups[21] > 0) {
+    // If elements in group move to next address
+    idxBnGroup++;
+
+    // Number of groups of 32 BNs for parallel processing
+    fprintf(fd, "       M = (%d*Z + 15)>>4;\n", lut_numBnInBnGroups[21]);
+    ;
+
+    // Set the offset to each CN within a group in terms of 16 Byte
+    cnOffsetInGroup = (lut_numBnInBnGroups[21] * NR_LDPC_ZMAX) >> 4;
+
+    // Set pointers to start of group 2
+
+    // Loop over CNs
+    for (k = 0; k < 22; k++) {
+      // Loop over BNs
+      fprintf(fd, "            for (i=0;i<M;i++) {\n");
+      fprintf(fd,
+              "            ((simde__m128i*)bnProcBufRes)[%d + i ] = simde_mm_subs_epi8(((simde__m128i*)llrRes)[%d + i ], ((simde__m128i*) bnProcBuf)[%d + i]);\n",
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup,
+              (lut_startAddrBnGroupsLlr[idxBnGroup] >> 4),
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup);
+
+      fprintf(fd, "}\n");
+    }
+  }
+
+  // =====================================================================
+
+  fprintf(fd, "// Process group with <23 CNs \n");
+
+  if (lut_numBnInBnGroups[22] > 0) {
+    // If elements in group move to next address
+    idxBnGroup++;
+
+    // Number of groups of 32 BNs for parallel processing
+    fprintf(fd, "       M = (%d*Z + 15)>>4;\n", lut_numBnInBnGroups[22]);
+    ;
+
+    // Set the offset to each CN within a group in terms of 16 Byte
+    cnOffsetInGroup = (lut_numBnInBnGroups[22] * NR_LDPC_ZMAX) >> 4;
+
+    // Set pointers to start of group 2
+
+    // Loop over CNs
+    for (k = 0; k < 23; k++) {
+      // Loop over BNs
+      fprintf(fd, "            for (i=0;i<M;i++) {\n");
+      fprintf(fd,
+              "            ((simde__m128i*)bnProcBufRes)[%d + i ] = simde_mm_subs_epi8(((simde__m128i*)llrRes)[%d + i ], ((simde__m128i*) bnProcBuf)[%d + i]);\n",
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup,
+              (lut_startAddrBnGroupsLlr[idxBnGroup] >> 4),
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup);
+
+      fprintf(fd, "}\n");
+    }
+  }
+
+  // =====================================================================
+
+  fprintf(fd, "// Process group with 24 CNs \n");
+
+  // Process group with 4 CNs
+
+  if (lut_numBnInBnGroups[23] > 0) {
+    // If elements in group move to next address
+    idxBnGroup++;
+
+    // Number of groups of 32 BNs for parallel processing
+    fprintf(fd, "       M = (%d*Z + 15)>>4;\n", lut_numBnInBnGroups[23]);
+    ;
+
+    // Set the offset to each CN within a group in terms of 16 Byte
+    cnOffsetInGroup = (lut_numBnInBnGroups[23] * NR_LDPC_ZMAX) >> 4;
+
+    // Set pointers to start of group 2
+
+    // Loop over CNs
+    for (k = 0; k < 24; k++) {
+      // Loop over BNs
+      fprintf(fd, "            for (i=0;i<M;i++) {\n");
+      fprintf(fd,
+              "            ((simde__m128i*)bnProcBufRes)[%d + i ] = simde_mm_subs_epi8(((simde__m128i*)llrRes)[%d + i ], ((simde__m128i*) bnProcBuf)[%d + i]);\n",
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup,
+              (lut_startAddrBnGroupsLlr[idxBnGroup] >> 4),
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup);
+
+      fprintf(fd, "}\n");
+    }
+  }
+
+  // =====================================================================
+
+  fprintf(fd, "// Process group with 25 CNs \n");
+
+  if (lut_numBnInBnGroups[24] > 0) {
+    // If elements in group move to next address
+    idxBnGroup++;
+
+    // Number of groups of 32 BNs for parallel processing
+    fprintf(fd, "       M = (%d*Z + 15)>>4;\n", lut_numBnInBnGroups[24]);
+    ;
+
+    // Set the offset to each CN within a group in terms of 16 Byte
+    cnOffsetInGroup = (lut_numBnInBnGroups[24] * NR_LDPC_ZMAX) >> 4;
+
+    // Set pointers to start of group 2
+
+    // Loop over CNs
+    for (k = 0; k < 25; k++) {
+      // Loop over BNs
+      fprintf(fd, "            for (i=0;i<M;i++) {\n");
+      fprintf(fd,
+              "            ((simde__m128i*)bnProcBufRes)[%d + i ] = simde_mm_subs_epi8(((simde__m128i*)llrRes)[%d + i ], ((simde__m128i*) bnProcBuf)[%d + i]);\n",
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup,
+              (lut_startAddrBnGroupsLlr[idxBnGroup] >> 4),
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup);
+
+      fprintf(fd, "}\n");
+    }
+  }
+
+  // =====================================================================
+
+  fprintf(fd, "// Process group with 26 CNs \n");
+
+  if (lut_numBnInBnGroups[25] > 0) {
+    // If elements in group move to next address
+    idxBnGroup++;
+
+    // Number of groups of 32 BNs for parallel processing
+    fprintf(fd, "       M = (%d*Z + 15)>>4;\n", lut_numBnInBnGroups[25]);
+    ;
+
+    // Set the offset to each CN within a group in terms of 16 Byte
+    cnOffsetInGroup = (lut_numBnInBnGroups[25] * NR_LDPC_ZMAX) >> 4;
+
+    // Set pointers to start of group 2
+
+    // Loop over CNs
+    for (k = 0; k < 26; k++) {
+      // Loop over BNs
+      fprintf(fd, "            for (i=0;i<M;i++) {\n");
+      fprintf(fd,
+              "            ((simde__m128i*)bnProcBufRes)[%d + i ] = simde_mm_subs_epi8(((simde__m128i*)llrRes)[%d + i ], ((simde__m128i*) bnProcBuf)[%d + i]);\n",
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup,
+              (lut_startAddrBnGroupsLlr[idxBnGroup] >> 4),
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup);
+
+      fprintf(fd, "}\n");
+    }
+  }
+
+  // =====================================================================
+
+  fprintf(fd, "// Process group with 27 CNs \n");
+
+  // Process group with 17 CNs
+
+  if (lut_numBnInBnGroups[26] > 0) {
+    // If elements in group move to next address
+    idxBnGroup++;
+
+    // Number of groups of 32 BNs for parallel processing
+    fprintf(fd, "       M = (%d*Z + 15)>>4;\n", lut_numBnInBnGroups[26]);
+    ;
+
+    // Set the offset to each CN within a group in terms of 16 Byte
+    cnOffsetInGroup = (lut_numBnInBnGroups[26] * NR_LDPC_ZMAX) >> 4;
+
+    // Set pointers to start of group 2
+
+    // Loop over CNs
+    for (k = 0; k < 27; k++) {
+      // Loop over BNs
+      fprintf(fd, "            for (i=0;i<M;i++) {\n");
+      fprintf(fd,
+              "            ((simde__m128i*)bnProcBufRes)[%d + i ] = simde_mm_subs_epi8(((simde__m128i*)llrRes)[%d + i ], ((simde__m128i*) bnProcBuf)[%d + i]);\n",
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup,
+              (lut_startAddrBnGroupsLlr[idxBnGroup] >> 4),
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup);
+
+      fprintf(fd, "}\n");
+    }
+  }
+
+  // =====================================================================
+
+  fprintf(fd, "// Process group with 28 CNs \n");
+
+  // Process group with 8 CNs
+
+  if (lut_numBnInBnGroups[27] > 0) {
+    // If elements in group move to next address
+    idxBnGroup++;
+
+    // Number of groups of 32 BNs for parallel processing
+    fprintf(fd, "       M = (%d*Z + 15)>>4;\n", lut_numBnInBnGroups[27]);
+    ;
+
+    // Set the offset to each CN within a group in terms of 16 Byte
+    cnOffsetInGroup = (lut_numBnInBnGroups[27] * NR_LDPC_ZMAX) >> 4;
+
+    // Set pointers to start of group 2
+
+    // Loop over CNs
+    for (k = 0; k < 28; k++) {
+      // Loop over BNs
+      fprintf(fd, "            for (i=0;i<M;i++) {\n");
+      fprintf(fd,
+              "            ((simde__m128i*)bnProcBufRes)[%d + i ] = simde_mm_subs_epi8(((simde__m128i*)llrRes)[%d + i ], ((simde__m128i*) bnProcBuf)[%d + i]);\n",
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup,
+              (lut_startAddrBnGroupsLlr[idxBnGroup] >> 4),
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup);
+
+      fprintf(fd, "}\n");
+    }
+  }
+
+  // =====================================================================
+
+  fprintf(fd, "// Process group with 29 CNs \n");
+
+  // Process group with 9 CNs
+
+  if (lut_numBnInBnGroups[28] > 0) {
+    // If elements in group move to next address
+    idxBnGroup++;
+
+    // Number of groups of 32 BNs for parallel processing
+    fprintf(fd, "       M = (%d*Z + 15)>>4;\n", lut_numBnInBnGroups[28]);
+    ;
+
+    // Set the offset to each CN within a group in terms of 16 Byte
+    cnOffsetInGroup = (lut_numBnInBnGroups[28] * NR_LDPC_ZMAX) >> 4;
+
+    // Set pointers to start of group 2
+
+    // Loop over CNs
+    for (k = 0; k < 29; k++) {
+      // Loop over BNs
+      fprintf(fd, "            for (i=0;i<M;i++) {\n");
+      fprintf(fd,
+              "            ((simde__m128i*)bnProcBufRes)[%d + i ] = simde_mm_subs_epi8(((simde__m128i*)llrRes)[%d + i ], ((simde__m128i*) bnProcBuf)[%d + i]);\n",
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup,
+              (lut_startAddrBnGroupsLlr[idxBnGroup] >> 4),
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup);
+
+      fprintf(fd, "}\n");
+    }
+  }
+
+  // =====================================================================
+
+  fprintf(fd, "// Process group with 30 CNs \n");
+
+  // Process group with 20 CNs
+
+  if (lut_numBnInBnGroups[29] > 0) {
+    // If elements in group move to next address
+    idxBnGroup++;
+
+    // Number of groups of 32 BNs for parallel processing
+    fprintf(fd, "       M = (%d*Z + 15)>>4;\n", lut_numBnInBnGroups[29]);
+    ;
+
+    // Set the offset to each CN within a group in terms of 16 Byte
+    cnOffsetInGroup = (lut_numBnInBnGroups[29] * NR_LDPC_ZMAX) >> 4;
+
+    // Set pointers to start of group 2
+
+    // Loop over CNs
+    for (k = 0; k < 30; k++) {
+      // Loop over BNs
+      fprintf(fd, "            for (i=0;i<M;i++) {\n");
+      fprintf(fd,
+              "            ((simde__m128i*)bnProcBufRes)[%d + i ] = simde_mm_subs_epi8(((simde__m128i*)llrRes)[%d + i ], ((simde__m128i*) bnProcBuf)[%d + i]);\n",
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup,
+              (lut_startAddrBnGroupsLlr[idxBnGroup] >> 4),
+              (lut_startAddrBnGroups[idxBnGroup] >> 4) + k * cnOffsetInGroup);
+
+      fprintf(fd, "}\n");
+    }
+  }
+
+  fprintf(fd, "}\n");
+  fclose(fd);
+} // end of the function  nrLDPC_bnProc_BG2

openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_bnProc/bnProc_gen_BG2_avx2.c

@@ -102,7 +102,7 @@ void nrLDPC_bnProc_BG2_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -126,13 +126,13 @@ void nrLDPC_bnProc_BG2_generator_AVX2(const char* dir, int R)
     cnOffsetInGroup = (lut_numBnInBnGroups[2] * NR_LDPC_ZMAX) >> 5;
 
     // Set pointers to start of group 2
-    // fprintf(fd,"    ((__m256i*) bnProcBuf)     = ((__m256i*) &bnProcBuf)    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
+    // fprintf(fd,"    ((simde__m256i*) bnProcBuf)     = ((simde__m256i*) &bnProcBuf)    [%d];\n",lut_startAddrBnGroups[idxBnGroup]);
 
     for (k = 0; k < 3; k++) {
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -161,7 +161,7 @@ void nrLDPC_bnProc_BG2_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               ((lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup),
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               ((lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup));
@@ -191,7 +191,7 @@ void nrLDPC_bnProc_BG2_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -223,7 +223,7 @@ void nrLDPC_bnProc_BG2_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -255,7 +255,7 @@ void nrLDPC_bnProc_BG2_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -287,7 +287,7 @@ void nrLDPC_bnProc_BG2_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -319,7 +319,7 @@ void nrLDPC_bnProc_BG2_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -351,7 +351,7 @@ void nrLDPC_bnProc_BG2_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -382,7 +382,7 @@ void nrLDPC_bnProc_BG2_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -412,7 +412,7 @@ void nrLDPC_bnProc_BG2_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -443,7 +443,7 @@ void nrLDPC_bnProc_BG2_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -474,7 +474,7 @@ void nrLDPC_bnProc_BG2_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -505,7 +505,7 @@ void nrLDPC_bnProc_BG2_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -536,7 +536,7 @@ void nrLDPC_bnProc_BG2_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -570,7 +570,7 @@ void nrLDPC_bnProc_BG2_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -603,7 +603,7 @@ void nrLDPC_bnProc_BG2_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -634,7 +634,7 @@ void nrLDPC_bnProc_BG2_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -665,7 +665,7 @@ void nrLDPC_bnProc_BG2_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -696,7 +696,7 @@ void nrLDPC_bnProc_BG2_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -726,7 +726,7 @@ void nrLDPC_bnProc_BG2_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -757,7 +757,7 @@ void nrLDPC_bnProc_BG2_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -790,7 +790,7 @@ void nrLDPC_bnProc_BG2_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -821,7 +821,7 @@ void nrLDPC_bnProc_BG2_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -852,7 +852,7 @@ void nrLDPC_bnProc_BG2_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -885,7 +885,7 @@ void nrLDPC_bnProc_BG2_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -918,7 +918,7 @@ void nrLDPC_bnProc_BG2_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -951,7 +951,7 @@ void nrLDPC_bnProc_BG2_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);
@@ -984,7 +984,7 @@ void nrLDPC_bnProc_BG2_generator_AVX2(const char* dir, int R)
       // Loop over BNs
       fprintf(fd, "            for (i=0;i<M;i++) {\n");
       fprintf(fd,
-              "            ((__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((__m256i*)llrRes)[%d + i ], ((__m256i*) bnProcBuf)[%d + i]);\n",
+              "            ((simde__m256i*)bnProcBufRes)[%d + i ] = simde_mm256_subs_epi8(((simde__m256i*)llrRes)[%d + i ], ((simde__m256i*) bnProcBuf)[%d + i]);\n",
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup,
               (lut_startAddrBnGroupsLlr[idxBnGroup] >> 5),
               (lut_startAddrBnGroups[idxBnGroup] >> 5) + k * cnOffsetInGroup);

openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_bnProc/main128.c

@@ -0,0 +1,55 @@
+/*
+ * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.
+ * The OpenAirInterface Software Alliance licenses this file to You under
+ * the OAI Public License, Version 1.1  (the "License"); you may not use this file
+ * except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.openairinterface.org/?page_id=698
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *-------------------------------------------------------------------------------
+ * For more information about the OpenAirInterface (OAI) Software Alliance:
+ *      contact@openairinterface.org
+ */
+
+#include <stdio.h>
+#include <stdint.h>
+#define NB_R  3
+void nrLDPC_bnProc_BG1_generator_128(const char*, int);
+void nrLDPC_bnProc_BG2_generator_128(const char*, int);
+void nrLDPC_bnProcPc_BG1_generator_128(const char*, int);
+void nrLDPC_bnProcPc_BG2_generator_128(const char*, int);
+
+const char *__asan_default_options()
+{
+  /* don't do leak checking in nr_ulsim, creates problems in the CI */
+  return "detect_leaks=0";
+}
+
+int main(int argc, char *argv[])
+{
+  if (argc != 2) {
+    fprintf(stderr, "usage: %s <output-dir>\n", argv[0]);
+    return 1;
+  }
+  const char *dir = argv[1];
+
+  int R[NB_R]={0,1,2};
+  for(int i=0; i<NB_R;i++){
+    nrLDPC_bnProc_BG1_generator_128(dir, R[i]);
+    nrLDPC_bnProc_BG2_generator_128(dir, R[i]);
+
+    nrLDPC_bnProcPc_BG1_generator_128(dir, R[i]);
+    nrLDPC_bnProcPc_BG2_generator_128(dir, R[i]);
+  }
+
+  return(0);
+}
+

openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_bnProc_avx512/CMakeLists.txt

@@ -4,7 +4,7 @@ add_executable(bnProc_gen_avx512
                bnProcPc_gen_BG1_avx512.c
                bnProcPc_gen_BG2_avx512.c
                main.c)
-target_compile_options(bnProc_gen_avx512 PRIVATE -W -Wall -mavx2)
+target_compile_options(bnProc_gen_avx512 PRIVATE -W -Wall )
 
 #set(bnProc_avx512_headers
 #    bnProc_avx512/rLDPC_bnProc_BG1_R13_AVX512.h

openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_cnProc/CMakeLists.txt

@@ -2,7 +2,12 @@ add_executable(cnProc_gen_avx2
                cnProc_gen_BG1_avx2.c
                cnProc_gen_BG2_avx2.c
                main.c)
-target_compile_options(cnProc_gen_avx2 PRIVATE -W -Wall -mavx2)
+add_executable(cnProc_gen_128
+               cnProc_gen_BG1_128.c
+               cnProc_gen_BG2_128.c
+               main128.c)
+target_compile_options(cnProc_gen_avx2 PRIVATE -W -Wall )
+target_compile_options(cnProc_gen_128 PRIVATE -W -Wall )
 
 #set(cnProc_headers
 #    cnProc/rLDPC_cnProc_BG1_R13_AVX2.h
@@ -20,6 +25,17 @@ add_custom_command(TARGET cnProc_gen_avx2 POST_BUILD
   COMMENT "Generating LDPC cnProc header files for AVX2"
 )
 
+add_custom_command(TARGET cnProc_gen_128 POST_BUILD
+  #OUTPUT ${cnProc_headers}
+  COMMAND ${CMAKE_COMMAND} -E make_directory cnProc128
+  COMMAND cnProc_gen_128 .
+  DEPENDS cnProc_gen_128
+  COMMENT "Generating LDPC cnProc header files for 128-bit SIMD"
+)
 add_library(cnProc_gen_avx2_HEADERS INTERFACE)
 target_include_directories(cnProc_gen_avx2_HEADERS INTERFACE ${CMAKE_CURRENT_BINARY_DIR})
 add_dependencies(cnProc_gen_avx2_HEADERS cnProc_gen_avx2)
+
+add_library(cnProc_gen_128_HEADERS INTERFACE)
+target_include_directories(cnProc_gen_128_HEADERS INTERFACE ${CMAKE_CURRENT_BINARY_DIR})
+add_dependencies(cnProc_gen_128_HEADERS cnProc_gen_128)

openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_cnProc/cnProc_gen_BG1_128.c

@@ -0,0 +1,785 @@
+/*
+ * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.
+ * The OpenAirInterface Software Alliance licenses this file to You under
+ * the OAI Public License, Version 1.1  (the "License"); you may not use this file
+ * except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.openairinterface.org/?page_id=698
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *-------------------------------------------------------------------------------
+ * For more information about the OpenAirInterface (OAI) Software Alliance:
+ *      contact@openairinterface.org
+ */
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <stdint.h>
+#include "../../nrLDPCdecoder_defs.h"
+
+#define AVOID_MM256_SIGN 1
+#define DROP_MAXLLR 1
+void nrLDPC_cnProc_BG1_generator_128(const char* dir, int R)
+{
+  const char *ratestr[3]={"13","23","89"};
+
+  if (R<0 || R>2) {printf("Illegal R %d\n",R); abort();}
+
+
+ // system("mkdir -p ../ldpc_gen_files");
+
+  char fname[FILENAME_MAX+1];
+  snprintf(fname, sizeof(fname), "%s/cnProc128/nrLDPC_cnProc_BG1_R%s_128.h", dir, ratestr[R]);
+  FILE *fd=fopen(fname,"w");
+  if (fd == NULL) {
+    printf("Cannot create file %s\n", fname);
+    abort();
+  }
+
+  fprintf(fd,"#include <stdint.h>\n");
+  fprintf(fd,"#include \"PHY/sse_intrin.h\"\n");
+
+
+  fprintf(fd,"static inline void nrLDPC_cnProc_BG1_R%s_128(int8_t* cnProcBuf, int8_t* cnProcBufRes, uint16_t Z) {\n",ratestr[R]);
+
+  const uint8_t*  lut_numCnInCnGroups;
+  const uint32_t* lut_startAddrCnGroups = lut_startAddrCnGroups_BG1;
+
+  if (R==0)      lut_numCnInCnGroups = lut_numCnInCnGroups_BG1_R13;
+  else if (R==1) lut_numCnInCnGroups = lut_numCnInCnGroups_BG1_R23;
+  else if (R==2) lut_numCnInCnGroups = lut_numCnInCnGroups_BG1_R89;
+  else { printf("aborting, illegal R %d\n",R); fclose(fd);abort();}
+
+
+
+  //simde__m128i* p_cnProcBuf;
+  //simde__m128i* p_cnProcBufRes;
+
+  // Number of CNs in Groups
+  //uint32_t M;
+  uint32_t j;
+  uint32_t k;
+  // Offset to each bit within a group in terms of 16 Byte
+  uint32_t bitOffsetInGroup;
+
+  //simde__m128i ymm0, min, sgn;
+  //simde__m128i* p_cnProcBufResBit;
+
+  // const simde__m128i* p_ones   = (simde__m128i*) ones256_epi8;
+  // const simde__m128i* p_maxLLR = (simde__m128i*) maxLLR256_epi8;
+
+  // LUT with offsets for bits that need to be processed
+  // 1. bit proc requires LLRs of 2. and 3. bit, 2.bits of 1. and 3. etc.
+  // Offsets are in units of bitOffsetInGroup (1*384/32)
+  //    const uint8_t lut_idxCnProcG3[3][2] = {{12,24}, {0,24}, {0,12}};
+
+  // =====================================================================
+  // Process group with 3 BNs
+  fprintf(fd,"//Process group with 3 BNs\n");
+  // LUT with offsets for bits that need to be processed
+  // 1. bit proc requires LLRs of 2. and 3. bit, 2.bits of 1. and 3. etc.
+  // Offsets are in units of bitOffsetInGroup (1*384/32)
+  const uint8_t lut_idxCnProcG3[3][2] = {{12,24}, {0,24}, {0,12}};
+#ifndef DROP_MAXLLR
+  fprintf(fd,"                simde__m128i ymm0, min, sgn,ones,maxLLR;\n");
+#else
+  fprintf(fd,"                simde__m128i ymm0, min, sgn,ones;\n");
+#endif  
+  fprintf(fd,"                ones   = simde_mm_set1_epi8((int8_t)1);\n");
+
+  fprintf(fd,"                uint32_t  M;\n");
+
+  if (lut_numCnInCnGroups[0] > 0)
+    {
+      // Number of groups of 16 CNs for parallel processing
+      // Ceil for values not divisible by 16
+       fprintf(fd," M = (%d*Z + 15)>>4;\n",lut_numCnInCnGroups[0] );
+
+      // Set the offset to each bit within a group in terms of 16 Byte
+      bitOffsetInGroup = (lut_numCnInCnGroups_BG1_R13[0]*NR_LDPC_ZMAX)>>4;
+
+
+      // Set pointers to start of group 3
+      //p_cnProcBuf    = (simde__m128i*) &cnProcBuf   [lut_startAddrCnGroups[0]];
+      //p_cnProcBufRes = (simde__m128i*) &cnProcBufRes[lut_startAddrCnGroups[0]];
+
+      // Loop over every BN
+      
+      for (j=0; j<3; j++)
+        {
+	  // Set of results pointer to correct BN address
+	  //p_cnProcBufResBit = p_cnProcBufRes + (j*bitOffsetInGroup);
+
+	  // Loop over CNs
+	  //	  for (i=0; i<M; i++,iprime++)
+	  //            {
+	  
+	  fprintf(fd,"            for (int i=0;i<M;i++) {\n");
+	  // Abs and sign of 16 CNs (first BN)
+	  //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
+	  fprintf(fd,"                ymm0 = ((simde__m128i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[0]>>4)+lut_idxCnProcG3[j][0]*2);
+	  //                sgn  = simde_mm_sign_epi8(ones, ymm0);
+#ifndef AVOID_MM256_SIGN
+	  fprintf(fd,"                sgn  = simde_mm_sign_epi8(ones, ymm0);\n");
+#else
+	  fprintf(fd,"                sgn  = simde_mm_xor_si128(ones, ymm0);\n");
+#endif	  
+	  //                min  = simde_mm_abs_epi8(ymm0);
+	  fprintf(fd,"                min  = simde_mm_abs_epi8(ymm0);\n");
+	  
+	  // 16 CNs of second BN
+	  //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][1] + i];
+	  fprintf(fd,"                ymm0 = ((simde__m128i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[0]>>4)+lut_idxCnProcG3[j][1]*2);
+	  
+	  //                min  = simde_mm_min_epu8(min, simde_mm_abs_epi8(ymm0));
+	  fprintf(fd,"                min  = simde_mm_min_epu8(min, simde_mm_abs_epi8(ymm0));\n");
+	  
+	  //                sgn  = simde_mm_sign_epi8(sgn, ymm0);
+#ifndef AVOID_MM256_SIGN
+	  fprintf(fd,"                sgn  = simde_mm_sign_epi8(sgn, ymm0);\n");
+#else
+	  fprintf(fd,"                sgn  = simde_mm_xor_si128(sgn, ymm0);\n");
+#endif
+	  // Store result
+	  //                min = simde_mm_min_epu8(min, maxLLR); // 128 in epi8 is -127
+#ifndef DROP_MAXLLR
+	  fprintf(fd,"                min = simde_mm_min_epu8(min, maxLLR);\n");
+#endif
+	  //                *p_cnProcBufResBit = simde_mm_sign_epi8(min, sgn);
+	  //                p_cnProcBufResBit++;
+	  fprintf(fd,"                ((simde__m128i*)cnProcBufRes)[%d+i] = simde_mm_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[0]>>4)+(j*bitOffsetInGroup));
+	  fprintf(fd,"            }\n");
+        }
+    }
+  // =====================================================================
+  // Process group with 4 BNs
+  fprintf(fd,"//Process group with 4 BNs\n");
+  // Offset is 5*384/32 = 60
+  const uint8_t lut_idxCnProcG4[4][3] = {{60,120,180}, {0,120,180}, {0,60,180}, {0,60,120}};
+
+  if (lut_numCnInCnGroups[1] > 0)
+    {
+      // Number of groups of 16 CNs for parallel processing
+      // Ceil for values not divisible by 16
+      fprintf(fd," M = (%d*Z + 15)>>4;\n",lut_numCnInCnGroups[1] );
+
+      // Set the offset to each bit within a group in terms of 16 Byte
+      bitOffsetInGroup = (lut_numCnInCnGroups_BG1_R13[1]*NR_LDPC_ZMAX)>>4;
+
+
+      // Set pointers to start of group 4
+      //p_cnProcBuf    = (simde__m128i*) &cnProcBuf   [lut_startAddrCnGroups[1]];
+      //p_cnProcBufRes = (simde__m128i*) &cnProcBufRes[lut_startAddrCnGroups[1]];
+
+      // Loop over every BN
+      
+      for (j=0; j<4; j++)
+        {
+	  // Set of results pointer to correct BN address
+	  //p_cnProcBufResBit = p_cnProcBufRes + (j*bitOffsetInGroup);
+
+	  // Loop over CNs
+	  //	  for (i=0; i<M; i++,iprime++)
+	  //            {
+	  fprintf(fd,"            for (int i=0;i<M;i++) {\n");
+	  // Abs and sign of 16 CNs (first BN)
+	  //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
+	  fprintf(fd,"                ymm0 = ((simde__m128i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[1]>>4)+lut_idxCnProcG4[j][0]*2);
+	  //                sgn  = simde_mm_sign_epi8(ones, ymm0);
+#ifndef AVOID_MM256_SIGN
+	  fprintf(fd,"                sgn  = simde_mm_sign_epi8(ones, ymm0);\n");
+#else
+	  fprintf(fd,"                sgn  = simde_mm_xor_si128(ones, ymm0);\n");
+#endif	  
+	  //                min  = simde_mm_abs_epi8(ymm0);
+	  fprintf(fd,"                min  = simde_mm_abs_epi8(ymm0);\n");
+	  
+	  
+	  // Loop over BNs
+	  for (k=1; k<3; k++)
+	    {
+	      fprintf(fd,"                ymm0 = ((simde__m128i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[1]>>4)+lut_idxCnProcG4[j][k]*2);
+	      
+	      //                min  = simde_mm_min_epu8(min, simde_mm_abs_epi8(ymm0));
+	      fprintf(fd,"                min  = simde_mm_min_epu8(min, simde_mm_abs_epi8(ymm0));\n");
+	      
+	      //                sgn  = simde_mm_sign_epi8(sgn, ymm0);
+#ifndef AVOID_MM256_SIGN
+  	      fprintf(fd,"                sgn  = simde_mm_sign_epi8(sgn, ymm0);\n");
+#else
+	      fprintf(fd,"                sgn  = simde_mm_xor_si128(sgn, ymm0);\n");
+#endif
+	    }
+	  
+	  // Store result
+	  //                min = simde_mm_min_epu8(min, maxLLR); // 128 in epi8 is -127
+#ifndef DROP_MAXLLR
+	  fprintf(fd,"                min = simde_mm_min_epu8(min, maxLLR);\n");
+#endif	  
+	  //                *p_cnProcBufResBit = simde_mm_sign_epi8(min, sgn);
+	      //                p_cnProcBufResBit++;
+	  fprintf(fd,"                ((simde__m128i*)cnProcBufRes)[%d+i] = simde_mm_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[1]>>4)+(j*bitOffsetInGroup));
+	  fprintf(fd,"            }\n");
+        }
+    }
+
+
+  // =====================================================================
+  // Process group with 5 BNs
+  fprintf(fd,"//Process group with 5 BNs\n");
+  // Offset is 18*384/32 = 216
+  const uint16_t lut_idxCnProcG5[5][4] = {{216,432,648,864}, {0,432,648,864},
+					  {0,216,648,864}, {0,216,432,864}, {0,216,432,648}};
+
+
+  if (lut_numCnInCnGroups[2] > 0)
+    {
+      // Number of groups of 16 CNs for parallel processing
+      // Ceil for values not divisible by 16
+      fprintf(fd," M = (%d*Z + 15)>>4;\n",lut_numCnInCnGroups[2] );
+
+      // Set the offset to each bit within a group in terms of 16 Byte
+      bitOffsetInGroup = (lut_numCnInCnGroups_BG1_R13[2]*NR_LDPC_ZMAX)>>4;
+
+
+      // Set pointers to start of group 4
+      //p_cnProcBuf    = (simde__m128i*) &cnProcBuf   [lut_startAddrCnGroups[1]];
+      //p_cnProcBufRes = (simde__m128i*) &cnProcBufRes[lut_startAddrCnGroups[1]];
+
+      // Loop over every BN
+      
+      for (j=0; j<5; j++)
+	{
+	  // Set of results pointer to correct BN address
+	  //p_cnProcBufResBit = p_cnProcBufRes + (j*bitOffsetInGroup);
+
+	  // Loop over CNs
+	  //	  for (i=0; i<M; i++,iprime++)
+	  //            {
+	  fprintf(fd,"            for (int i=0;i<M;i++) {\n");
+	  // Abs and sign of 16 CNs (first BN)
+	  //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
+	  fprintf(fd,"                ymm0 = ((simde__m128i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[2]>>4)+lut_idxCnProcG5[j][0]*2);
+	  //                sgn  = simde_mm_sign_epi8(ones, ymm0);
+#ifndef AVOID_MM256_SIGN
+	  fprintf(fd,"                sgn  = simde_mm_sign_epi8(ones, ymm0);\n");
+#else
+	  fprintf(fd,"                sgn  = simde_mm_xor_si128(ones, ymm0);\n");
+#endif	  
+	  //                min  = simde_mm_abs_epi8(ymm0);
+	  fprintf(fd,"                min  = simde_mm_abs_epi8(ymm0);\n");
+	  
+	  
+	  // Loop over BNs
+	  for (k=1; k<4; k++)
+	    {
+	      fprintf(fd,"                ymm0 = ((simde__m128i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[2]>>4)+lut_idxCnProcG5[j][k]*2);
+	      
+	      //                min  = simde_mm_min_epu8(min, simde_mm_abs_epi8(ymm0));
+	      fprintf(fd,"                min  = simde_mm_min_epu8(min, simde_mm_abs_epi8(ymm0));\n");
+	      
+	      //                sgn  = simde_mm_sign_epi8(sgn, ymm0);
+#ifndef AVOID_MM256_SIGN
+  	      fprintf(fd,"                sgn  = simde_mm_sign_epi8(sgn, ymm0);\n");
+#else
+	      fprintf(fd,"                sgn  = simde_mm_xor_si128(sgn, ymm0);\n");
+#endif
+	    }
+	  
+	  // Store result
+	  //                min = simde_mm_min_epu8(min, maxLLR); // 128 in epi8 is -127
+#ifndef DROP_MAXLLR
+	  fprintf(fd,"                min = simde_mm_min_epu8(min, maxLLR);\n");
+#endif	  
+	  //                *p_cnProcBufResBit = simde_mm_sign_epi8(min, sgn);
+	  //                p_cnProcBufResBit++;
+	  fprintf(fd,"                ((simde__m128i*)cnProcBufRes)[%d+i] = simde_mm_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[2]>>4)+(j*bitOffsetInGroup));
+	  fprintf(fd,"           }\n");
+        }
+    }
+
+  // =====================================================================
+  // Process group with 6 BNs
+  fprintf(fd,"//Process group with 6 BNs\n");
+  // Offset is 8*384/32 = 96
+  const uint16_t lut_idxCnProcG6[6][5] = {{96,192,288,384,480}, {0,192,288,384,480},
+					  {0,96,288,384,480}, {0,96,192,384,480},
+					  {0,96,192,288,480}, {0,96,192,288,384}};
+
+
+  if (lut_numCnInCnGroups[3] > 0)
+    {
+      // Number of groups of 16 CNs for parallel processing
+      // Ceil for values not divisible by 16
+     fprintf(fd, "M = (%d*Z + 15)>>4;\n",lut_numCnInCnGroups[3] );
+
+      // Set the offset to each bit within a group in terms of 16 Byte
+      bitOffsetInGroup = (lut_numCnInCnGroups_BG1_R13[3]*NR_LDPC_ZMAX)>>4;
+
+
+      // Set pointers to start of group 4
+      //p_cnProcBuf    = (simde__m128i*) &cnProcBuf   [lut_startAddrCnGroups[1]];
+      //p_cnProcBufRes = (simde__m128i*) &cnProcBufRes[lut_startAddrCnGroups[1]];
+
+      // Loop over every BN
+      
+      for (j=0; j<6; j++)
+        {
+	  // Set of results pointer to correct BN address
+	  //p_cnProcBufResBit = p_cnProcBufRes + (j*bitOffsetInGroup);
+
+	  // Loop over CNs
+	  //	  for (i=0; i<M; i++,iprime++)
+	  //            {
+	  fprintf(fd,"            for (int i=0;i<M;i++) {\n");
+	  // Abs and sign of 16 CNs (first BN)
+	  //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
+	  fprintf(fd,"                ymm0 = ((simde__m128i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[3]>>4)+lut_idxCnProcG6[j][0]*2);
+	  //                sgn  = simde_mm_sign_epi8(ones, ymm0);
+#ifndef AVOID_MM256_SIGN
+	  fprintf(fd,"                sgn  = simde_mm_sign_epi8(ones, ymm0);\n");
+#else
+	  fprintf(fd,"                sgn  = simde_mm_xor_si128(ones, ymm0);\n");
+#endif	  
+	  //                min  = simde_mm_abs_epi8(ymm0);
+	  fprintf(fd,"                min  = simde_mm_abs_epi8(ymm0);\n");
+	  
+	  
+	  // Loop over BNs
+	  for (k=1; k<5; k++)
+	    {
+	      fprintf(fd,"                ymm0 = ((simde__m128i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[3]>>4)+lut_idxCnProcG6[j][k]*2);
+	      
+	      //                min  = simde_mm_min_epu8(min, simde_mm_abs_epi8(ymm0));
+	      fprintf(fd,"                min  = simde_mm_min_epu8(min, simde_mm_abs_epi8(ymm0));\n");
+	      
+	      //                sgn  = simde_mm_sign_epi8(sgn, ymm0);
+#ifndef AVOID_MM256_SIGN
+  	      fprintf(fd,"                sgn  = simde_mm_sign_epi8(sgn, ymm0);\n");
+#else
+	      fprintf(fd,"                sgn  = simde_mm_xor_si128(sgn, ymm0);\n");
+#endif
+	    }
+	  
+	  // Store result
+	  //                min = simde_mm_min_epu8(min, maxLLR); // 128 in epi8 is -127
+#ifndef DROP_MAXLLR
+	  fprintf(fd,"                min = simde_mm_min_epu8(min, maxLLR);\n");
+#endif	  
+	  //                *p_cnProcBufResBit = simde_mm_sign_epi8(min, sgn);
+	  //                p_cnProcBufResBit++;
+	  fprintf(fd,"                ((simde__m128i*)cnProcBufRes)[%d+i] = simde_mm_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[3]>>4)+(j*bitOffsetInGroup));
+	  fprintf(fd,"            }\n");
+	}
+    }
+
+
+  // =====================================================================
+  // Process group with 7 BNs
+  fprintf(fd,"//Process group with 7 BNs\n");
+  // Offset is 5*384/32 = 60
+  const uint16_t lut_idxCnProcG7[7][6] = {{60,120,180,240,300,360}, {0,120,180,240,300,360},
+					  {0,60,180,240,300,360},   {0,60,120,240,300,360},
+					  {0,60,120,180,300,360},   {0,60,120,180,240,360},
+					  {0,60,120,180,240,300}};
+
+
+
+  if (lut_numCnInCnGroups[4] > 0)
+    {
+      // Number of groups of 16 CNs for parallel processing
+      // Ceil for values not divisible by 16
+      fprintf(fd, "M = (%d*Z + 15)>>4;\n",lut_numCnInCnGroups[4] );
+
+      // Set the offset to each bit within a group in terms of 16 Byte
+      bitOffsetInGroup = (lut_numCnInCnGroups_BG1_R13[4]*NR_LDPC_ZMAX)>>4;
+
+
+      // Set pointers to start of group 4
+      //p_cnProcBuf    = (simde__m128i*) &cnProcBuf   [lut_startAddrCnGroups[1]];
+      //p_cnProcBufRes = (simde__m128i*) &cnProcBufRes[lut_startAddrCnGroups[1]];
+
+      // Loop over every BN
+      
+      for (j=0; j<7; j++)
+        {
+	  // Set of results pointer to correct BN address
+	  //p_cnProcBufResBit = p_cnProcBufRes + (j*bitOffsetInGroup);
+
+	  // Loop over CNs
+	  //	  for (i=0; i<M; i++,iprime++)
+	  //            {
+	  fprintf(fd,"            for (int i=0;i<M;i++) {\n");
+	  // Abs and sign of 16 CNs (first BN)
+	  //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
+	  fprintf(fd,"                ymm0 = ((simde__m128i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[4]>>4)+lut_idxCnProcG7[j][0]*2);
+	  //                sgn  = simde_mm_sign_epi8(ones, ymm0);
+#ifndef AVOID_MM256_SIGN
+	  fprintf(fd,"                sgn  = simde_mm_sign_epi8(ones, ymm0);\n");
+#else
+	  fprintf(fd,"                sgn  = simde_mm_xor_si128(ones, ymm0);\n");
+#endif	  
+	  //                min  = simde_mm_abs_epi8(ymm0);
+	  fprintf(fd,"                min  = simde_mm_abs_epi8(ymm0);\n");
+	  
+	  
+	  // Loop over BNs
+	  for (k=1; k<6; k++)
+	    {
+	      fprintf(fd,"                ymm0 = ((simde__m128i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[4]>>4)+lut_idxCnProcG7[j][k]*2);
+	      
+	      //                min  = simde_mm_min_epu8(min, simde_mm_abs_epi8(ymm0));
+	      fprintf(fd,"                min  = simde_mm_min_epu8(min, simde_mm_abs_epi8(ymm0));\n");
+	      
+	      //                sgn  = simde_mm_sign_epi8(sgn, ymm0);
+#ifndef AVOID_MM256_SIGN
+  	      fprintf(fd,"                sgn  = simde_mm_sign_epi8(sgn, ymm0);\n");
+#else
+	      fprintf(fd,"                sgn  = simde_mm_xor_si128(sgn, ymm0);\n");
+#endif
+	    }
+	  
+	  // Store result
+	  //                min = simde_mm_min_epu8(min, maxLLR); // 128 in epi8 is -127
+#ifndef DROP_MAXLLR
+	  fprintf(fd,"                min = simde_mm_min_epu8(min, maxLLR);\n");
+#endif	  
+	  //                *p_cnProcBufResBit = simde_mm_sign_epi8(min, sgn);
+	  //                p_cnProcBufResBit++;
+	  fprintf(fd,"                ((simde__m128i*)cnProcBufRes)[%d+i] = simde_mm_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[4]>>4)+(j*bitOffsetInGroup));
+	  fprintf(fd,"            }\n");
+	}
+    }
+
+
+  // =====================================================================
+  // Process group with 8 BNs
+  fprintf(fd,"//Process group with 8 BNs\n");
+  // Offset is 2*384/32 = 24
+  const uint8_t lut_idxCnProcG8[8][7] = {{24,48,72,96,120,144,168}, {0,48,72,96,120,144,168},
+					 {0,24,72,96,120,144,168}, {0,24,48,96,120,144,168},
+					 {0,24,48,72,120,144,168}, {0,24,48,72,96,144,168},
+					 {0,24,48,72,96,120,168},  {0,24,48,72,96,120,144}};
+
+
+
+
+  if (lut_numCnInCnGroups[5] > 0)
+    {
+      // Number of groups of 16 CNs for parallel processing
+      // Ceil for values not divisible by 16
+     fprintf(fd, "M = (%d*Z + 15)>>4;\n",lut_numCnInCnGroups[5] );
+
+      // Set the offset to each bit within a group in terms of 16 Byte
+      bitOffsetInGroup = (lut_numCnInCnGroups_BG1_R13[5]*NR_LDPC_ZMAX)>>4;
+
+
+      // Set pointers to start of group 4
+      //p_cnProcBuf    = (simde__m128i*) &cnProcBuf   [lut_startAddrCnGroups[1]];
+      //p_cnProcBufRes = (simde__m128i*) &cnProcBufRes[lut_startAddrCnGroups[1]];
+
+      // Loop over every BN
+      
+      for (j=0; j<8; j++)
+        {
+	  // Set of results pointer to correct BN address
+	  //p_cnProcBufResBit = p_cnProcBufRes + (j*bitOffsetInGroup);
+
+	  // Loop over CNs
+	  //	  for (i=0; i<M; i++,iprime++)
+	  //            {
+	  fprintf(fd,"            for (int i=0;i<M;i++) {\n");
+	  // Abs and sign of 16 CNs (first BN)
+	  //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
+	  fprintf(fd,"                ymm0 = ((simde__m128i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[5]>>4)+lut_idxCnProcG8[j][0]*2);
+	  //                sgn  = simde_mm_sign_epi8(ones, ymm0);
+#ifndef AVOID_MM256_SIGN
+	  fprintf(fd,"                sgn  = simde_mm_sign_epi8(ones, ymm0);\n");
+#else
+	  fprintf(fd,"                sgn  = simde_mm_xor_si128(ones, ymm0);\n");
+#endif	  
+	  //                min  = simde_mm_abs_epi8(ymm0);
+	  fprintf(fd,"                min  = simde_mm_abs_epi8(ymm0);\n");
+	  
+	  
+	  // Loop over BNs
+	  for (k=1; k<7; k++)
+	    {
+	      fprintf(fd,"                ymm0 = ((simde__m128i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[5]>>4)+lut_idxCnProcG8[j][k]*2);
+	      
+	      //                min  = simde_mm_min_epu8(min, simde_mm_abs_epi8(ymm0));
+	      fprintf(fd,"                min  = simde_mm_min_epu8(min, simde_mm_abs_epi8(ymm0));\n");
+	      
+	      //                sgn  = simde_mm_sign_epi8(sgn, ymm0);
+#ifndef AVOID_MM256_SIGN
+  	      fprintf(fd,"                sgn  = simde_mm_sign_epi8(sgn, ymm0);\n");
+#else
+	      fprintf(fd,"                sgn  = simde_mm_xor_si128(sgn, ymm0);\n");
+#endif
+	    }
+	  
+	  // Store result
+	  //                min = simde_mm_min_epu8(min, maxLLR); // 128 in epi8 is -127
+#ifndef DROP_MAXLLR
+	  fprintf(fd,"                min = simde_mm_min_epu8(min, maxLLR);\n");
+#endif
+	  //                *p_cnProcBufResBit = simde_mm_sign_epi8(min, sgn);
+	  //                p_cnProcBufResBit++;
+	  fprintf(fd,"                ((simde__m128i*)cnProcBufRes)[%d+i] = simde_mm_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[5]>>4)+(j*bitOffsetInGroup));
+	  fprintf(fd,"              }\n");
+        }
+    }
+
+  // =====================================================================
+  // Process group with 9 BNs
+  fprintf(fd,"//Process group with 9 BNs\n");
+  // Offset is 2*384/32 = 24
+  const uint8_t lut_idxCnProcG9[9][8] = {{24,48,72,96,120,144,168,192}, {0,48,72,96,120,144,168,192},
+					 {0,24,72,96,120,144,168,192}, {0,24,48,96,120,144,168,192},
+					 {0,24,48,72,120,144,168,192}, {0,24,48,72,96,144,168,192},
+					 {0,24,48,72,96,120,168,192}, {0,24,48,72,96,120,144,192},
+					 {0,24,48,72,96,120,144,168}};
+
+
+
+
+
+  if (lut_numCnInCnGroups[6] > 0)
+    {
+      // Number of groups of 16 CNs for parallel processing
+      // Ceil for values not divisible by 16
+      fprintf(fd, "M = (%d*Z + 15)>>4;\n",lut_numCnInCnGroups[6] );
+      // Set the offset to each bit within a group in terms of 16 Byte
+      bitOffsetInGroup = (lut_numCnInCnGroups_BG1_R13[6]*NR_LDPC_ZMAX)>>4;
+
+
+      // Set pointers to start of group 9
+      //p_cnProcBuf    = (simde__m128i*) &cnProcBuf   [lut_startAddrCnGroups[1]];
+      //p_cnProcBufRes = (simde__m128i*) &cnProcBufRes[lut_startAddrCnGroups[1]];
+
+      // Loop over every BN
+     
+      for (j=0; j<9; j++)
+        {
+	  // Set of results pointer to correct BN address
+	  //p_cnProcBufResBit = p_cnProcBufRes + (j*bitOffsetInGroup);
+
+	  // Loop over CNs
+	  //	  for (i=0; i<M; i++,iprime++)
+	  //            {
+	  fprintf(fd,"            for (int i=0;i<M;i++) {\n");
+	  // Abs and sign of 16 CNs (first BN)
+	  //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
+	  fprintf(fd,"                ymm0 = ((simde__m128i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[6]>>4)+lut_idxCnProcG9[j][0]*2);
+	  //                sgn  = simde_mm_sign_epi8(ones, ymm0);
+#ifndef AVOID_MM256_SIGN
+	  fprintf(fd,"                sgn  = simde_mm_sign_epi8(ones, ymm0);\n");
+#else
+	  fprintf(fd,"                sgn  = simde_mm_xor_si128(ones, ymm0);\n");
+#endif	  
+	  //                min  = simde_mm_abs_epi8(ymm0);
+	  fprintf(fd,"                min  = simde_mm_abs_epi8(ymm0);\n");
+	  
+	  
+	  // Loop over BNs
+	  for (k=1; k<8; k++)
+	    {
+	      fprintf(fd,"                ymm0 = ((simde__m128i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[6]>>4)+lut_idxCnProcG9[j][k]*2);
+	      
+	      //                min  = simde_mm_min_epu8(min, simde_mm_abs_epi8(ymm0));
+	      fprintf(fd,"                min  = simde_mm_min_epu8(min, simde_mm_abs_epi8(ymm0));\n");
+	      
+	      //                sgn  = simde_mm_sign_epi8(sgn, ymm0);
+#ifndef AVOID_MM256_SIGN
+  	      fprintf(fd,"                sgn  = simde_mm_sign_epi8(sgn, ymm0);\n");
+#else
+	      fprintf(fd,"                sgn  = simde_mm_xor_si128(sgn, ymm0);\n");
+#endif
+	    }
+	  
+	  // Store result
+	  //                min = simde_mm_min_epu8(min, maxLLR); // 128 in epi8 is -127
+#ifndef DROP_MAXLLR
+	  fprintf(fd,"                min = simde_mm_min_epu8(min, maxLLR);\n");
+#endif
+	  //                *p_cnProcBufResBit = simde_mm_sign_epi8(min, sgn);
+	  //                p_cnProcBufResBit++;
+	  fprintf(fd,"                ((simde__m128i*)cnProcBufRes)[%d+i] = simde_mm_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[6]>>4)+(j*bitOffsetInGroup));
+	  fprintf(fd,"            }\n");
+	}
+    }
+
+  // =====================================================================
+  // Process group with 10 BNs
+  fprintf(fd,"//Process group with 10 BNs\n");
+  // Offset is 1*384/32 = 12
+  const uint8_t lut_idxCnProcG10[10][9] = {{12,24,36,48,60,72,84,96,108}, {0,24,36,48,60,72,84,96,108},
+					   {0,12,36,48,60,72,84,96,108}, {0,12,24,48,60,72,84,96,108},
+					   {0,12,24,36,60,72,84,96,108}, {0,12,24,36,48,72,84,96,108},
+					   {0,12,24,36,48,60,84,96,108}, {0,12,24,36,48,60,72,96,108},
+					   {0,12,24,36,48,60,72,84,108}, {0,12,24,36,48,60,72,84,96}};
+
+
+
+
+
+  if (lut_numCnInCnGroups[7] > 0)
+    {
+      // Number of groups of 16 CNs for parallel processing
+      // Ceil for values not divisible by 16
+      fprintf(fd, " M = (%d*Z + 15)>>4;\n",lut_numCnInCnGroups[7] );
+
+      // Set the offset to each bit within a group in terms of 16 Byte
+      bitOffsetInGroup = (lut_numCnInCnGroups_BG1_R13[7]*NR_LDPC_ZMAX)>>4;
+
+
+      // Set pointers to start of group 10
+      //p_cnProcBuf    = (simde__m128i*) &cnProcBuf   [lut_startAddrCnGroups[1]];
+      //p_cnProcBufRes = (simde__m128i*) &cnProcBufRes[lut_startAddrCnGroups[1]];
+
+      // Loop over every BN
+      
+      for (j=0; j<10; j++)
+        {
+	  // Set of results pointer to correct BN address
+	  //p_cnProcBufResBit = p_cnProcBufRes + (j*bitOffsetInGroup);
+
+	  // Loop over CNs
+	  //	  for (i=0; i<M; i++,iprime++)
+	  //            {
+	  fprintf(fd,"            for (int i=0;i<M;i++) {\n");
+	  // Abs and sign of 16 CNs (first BN)
+	  //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
+	  fprintf(fd,"                ymm0 = ((simde__m128i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[7]>>4)+lut_idxCnProcG10[j][0]*2);
+	  //                sgn  = simde_mm_sign_epi8(ones, ymm0);
+#ifndef AVOID_MM256_SIGN
+	  fprintf(fd,"                sgn  = simde_mm_sign_epi8(ones, ymm0);\n");
+#else
+	  fprintf(fd,"                sgn  = simde_mm_xor_si128(ones, ymm0);\n");
+#endif	  
+	  //                min  = simde_mm_abs_epi8(ymm0);
+	  fprintf(fd,"                min  = simde_mm_abs_epi8(ymm0);\n");
+	  
+	  
+	  // Loop over BNs
+	  for (k=1; k<9; k++)
+	    {
+	      fprintf(fd,"                ymm0 = ((simde__m128i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[7]>>4)+lut_idxCnProcG10[j][k]*2);
+	      
+	      //                min  = simde_mm_min_epu8(min, simde_mm_abs_epi8(ymm0));
+	      fprintf(fd,"                min  = simde_mm_min_epu8(min, simde_mm_abs_epi8(ymm0));\n");
+	      
+	      //                sgn  = simde_mm_sign_epi8(sgn, ymm0);
+#ifndef AVOID_MM256_SIGN
+  	      fprintf(fd,"                sgn  = simde_mm_sign_epi8(sgn, ymm0);\n");
+#else
+	      fprintf(fd,"                sgn  = simde_mm_xor_si128(sgn, ymm0);\n");
+#endif
+	    }
+	  
+	  // Store result
+	  //                min = simde_mm_min_epu8(min, maxLLR); // 128 in epi8 is -127
+#ifndef DROP_MAXLLR
+	  fprintf(fd,"                min = simde_mm_min_epu8(min, maxLLR);\n");
+#endif	  
+	  //                *p_cnProcBufResBit = simde_mm_sign_epi8(min, sgn);
+	  //                p_cnProcBufResBit++;
+	  fprintf(fd,"                ((simde__m128i*)cnProcBufRes)[%d+i] = simde_mm_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[7]>>4)+(j*bitOffsetInGroup));
+	  fprintf(fd,"            }\n");
+        }
+    }
+
+
+  // =====================================================================
+  // Process group with 19 BNs
+  fprintf(fd,"//Process group with 19 BNs\n");
+  // Offset is 4*384/32 = 12
+  const uint16_t lut_idxCnProcG19[19][18] = {{48,96,144,192,240,288,336,384,432,480,528,576,624,672,720,768,816,864}, {0,96,144,192,240,288,336,384,432,480,528,576,624,672,720,768,816,864},
+					     {0,48,144,192,240,288,336,384,432,480,528,576,624,672,720,768,816,864}, {0,48,96,192,240,288,336,384,432,480,528,576,624,672,720,768,816,864},
+					     {0,48,96,144,240,288,336,384,432,480,528,576,624,672,720,768,816,864}, {0,48,96,144,192,288,336,384,432,480,528,576,624,672,720,768,816,864},
+					     {0,48,96,144,192,240,336,384,432,480,528,576,624,672,720,768,816,864}, {0,48,96,144,192,240,288,384,432,480,528,576,624,672,720,768,816,864},
+					     {0,48,96,144,192,240,288,336,432,480,528,576,624,672,720,768,816,864}, {0,48,96,144,192,240,288,336,384,480,528,576,624,672,720,768,816,864},
+					     {0,48,96,144,192,240,288,336,384,432,528,576,624,672,720,768,816,864}, {0,48,96,144,192,240,288,336,384,432,480,576,624,672,720,768,816,864},
+					     {0,48,96,144,192,240,288,336,384,432,480,528,624,672,720,768,816,864}, {0,48,96,144,192,240,288,336,384,432,480,528,576,672,720,768,816,864},
+					     {0,48,96,144,192,240,288,336,384,432,480,528,576,624,720,768,816,864}, {0,48,96,144,192,240,288,336,384,432,480,528,576,624,672,768,816,864},
+					     {0,48,96,144,192,240,288,336,384,432,480,528,576,624,672,720,816,864}, {0,48,96,144,192,240,288,336,384,432,480,528,576,624,672,720,768,864},
+					     {0,48,96,144,192,240,288,336,384,432,480,528,576,624,672,720,768,816}};
+
+ 
+  if (lut_numCnInCnGroups[8] > 0)
+    {
+      // Number of groups of 16 CNs for parallel processing
+      // Ceil for values not divisible by 16
+     fprintf(fd, " M = (%d*Z + 15)>>4;\n",lut_numCnInCnGroups[8] );
+
+      // Set the offset to each bit within a group in terms of 16 Byte
+      bitOffsetInGroup = (lut_numCnInCnGroups_BG1_R13[8]*NR_LDPC_ZMAX)>>4;
+
+
+      // Set pointers to start of group 19
+      //p_cnProcBuf    = (simde__m128i*) &cnProcBuf   [lut_startAddrCnGroups[1]];
+      //p_cnProcBufRes = (simde__m128i*) &cnProcBufRes[lut_startAddrCnGroups[1]];
+
+      // Loop over every BN
+      
+      for (j=0; j<19; j++)
+        {
+	  // Set of results pointer to correct BN address
+	  //p_cnProcBufResBit = p_cnProcBufRes + (j*bitOffsetInGroup);
+
+	  // Loop over CNs
+	  //	  for (i=0; i<M; i++,iprime++)
+	  //            {
+	  fprintf(fd,"            for (int i=0;i<M;i++) {\n");
+	  // Abs and sign of 16 CNs (first BN)
+	  //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
+	  fprintf(fd,"                ymm0 = ((simde__m128i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[8]>>4)+lut_idxCnProcG19[j][0]*2);
+	  //                sgn  = simde_mm_sign_epi8(ones, ymm0);
+#ifndef AVOID_MM256_SIGN
+	  fprintf(fd,"                sgn  = simde_mm_sign_epi8(ones, ymm0);\n");
+#else
+	  fprintf(fd,"                sgn  = simde_mm_xor_si128(ones, ymm0);\n");
+#endif	  
+	  //                min  = simde_mm_abs_epi8(ymm0);
+	  fprintf(fd,"                min  = simde_mm_abs_epi8(ymm0);\n");
+	  
+	  
+	  // Loop over BNs
+	  for (k=1; k<18; k++)
+	    {
+	      fprintf(fd,"                ymm0 = ((simde__m128i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[8]>>4)+lut_idxCnProcG19[j][k]*2);
+	      
+	      //                min  = simde_mm_min_epu8(min, simde_mm_abs_epi8(ymm0));
+	      fprintf(fd,"                min  = simde_mm_min_epu8(min, simde_mm_abs_epi8(ymm0));\n");
+	      
+	      //                sgn  = simde_mm_sign_epi8(sgn, ymm0);
+#ifndef AVOID_MM256_SIGN
+  	      fprintf(fd,"                sgn  = simde_mm_sign_epi8(sgn, ymm0);\n");
+#else
+	      fprintf(fd,"                sgn  = simde_mm_xor_si128(sgn, ymm0);\n");
+#endif
+	    }
+	  
+	  // Store result
+	  //                min = simde_mm_min_epu8(min, maxLLR); // 128 in epi8 is -127
+#ifndef DROP_MAXLLR
+	  fprintf(fd,"                min = simde_mm_min_epu8(min, maxLLR);\n");
+#endif	  
+	  //                *p_cnProcBufResBit = simde_mm_sign_epi8(min, sgn);
+	  //                p_cnProcBufResBit++;
+	  fprintf(fd,"                ((simde__m128i*)cnProcBufRes)[%d+i] = simde_mm_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[8]>>4)+(j*bitOffsetInGroup));
+	  fprintf(fd,"            }\n");
+        }
+    }
+
+  fprintf(fd,"}\n");
+  fclose(fd);
+}//end of the function  nrLDPC_cnProc_BG1
+

openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_cnProc/cnProc_gen_BG1_avx2.c

@@ -24,6 +24,8 @@
 #include <stdint.h>
 #include "../../nrLDPCdecoder_defs.h"
 
+#define AVOID_MM256_SIGN 1
+#define DROP_MAXLLR 1
 void nrLDPC_cnProc_BG1_generator_AVX2(const char* dir, int R)
 {
   const char *ratestr[3]={"13","23","89"};
@@ -57,8 +59,8 @@ void nrLDPC_cnProc_BG1_generator_AVX2(const char* dir, int R)
 
 
 
-  //__m256i* p_cnProcBuf;
-  //__m256i* p_cnProcBufRes;
+  //simde__m256i* p_cnProcBuf;
+  //simde__m256i* p_cnProcBufRes;
 
   // Number of CNs in Groups
   //uint32_t M;
@@ -67,11 +69,11 @@ void nrLDPC_cnProc_BG1_generator_AVX2(const char* dir, int R)
   // Offset to each bit within a group in terms of 32 Byte
   uint32_t bitOffsetInGroup;
 
-  //__m256i ymm0, min, sgn;
-  //__m256i* p_cnProcBufResBit;
+  //simde__m256i ymm0, min, sgn;
+  //simde__m256i* p_cnProcBufResBit;
 
-  // const __m256i* p_ones   = (__m256i*) ones256_epi8;
-  // const __m256i* p_maxLLR = (__m256i*) maxLLR256_epi8;
+  // const simde__m256i* p_ones   = (simde__m256i*) ones256_epi8;
+  // const simde__m256i* p_maxLLR = (simde__m256i*) maxLLR256_epi8;
 
   // LUT with offsets for bits that need to be processed
   // 1. bit proc requires LLRs of 2. and 3. bit, 2.bits of 1. and 3. etc.
@@ -85,11 +87,15 @@ void nrLDPC_cnProc_BG1_generator_AVX2(const char* dir, int R)
   // 1. bit proc requires LLRs of 2. and 3. bit, 2.bits of 1. and 3. etc.
   // Offsets are in units of bitOffsetInGroup (1*384/32)
   const uint8_t lut_idxCnProcG3[3][2] = {{12,24}, {0,24}, {0,12}};
-
-  fprintf(fd,"                __m256i ymm0, min, sgn,ones,maxLLR;\n");
-  fprintf(fd,"                ones   = simde_mm256_set1_epi8((char)1);\n");
-  fprintf(fd,"                maxLLR = simde_mm256_set1_epi8((char)127);\n");
-
+#ifndef DROP_MAXLLR
+  fprintf(fd,"                simde__m256i ymm0, min, sgn,ones,maxLLR;\n");
+#else
+  fprintf(fd,"                simde__m256i ymm0, min, sgn,ones;\n");
+#endif
+  fprintf(fd,"                ones   = simde_mm256_set1_epi8((int8_t)1);\n");
+#ifndef DROP_MAXLLR
+  fprintf(fd,"                maxLLR = simde_mm256_set1_epi8((int8_t)127);\n");
+#endif
   fprintf(fd,"                uint32_t  M;\n");
 
   if (lut_numCnInCnGroups[0] > 0)
@@ -103,8 +109,8 @@ void nrLDPC_cnProc_BG1_generator_AVX2(const char* dir, int R)
 
 
       // Set pointers to start of group 3
-      //p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[0]];
-      //p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[0]];
+      //p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[0]];
+      //p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[0]];
 
       // Loop over every BN
       
@@ -120,32 +126,40 @@ void nrLDPC_cnProc_BG1_generator_AVX2(const char* dir, int R)
 	  fprintf(fd,"            for (int i=0;i<M;i++) {\n");
 	  // Abs and sign of 32 CNs (first BN)
 	  //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
-	  fprintf(fd,"                ymm0 = ((__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[0]>>5)+lut_idxCnProcG3[j][0]);
+	  fprintf(fd,"                ymm0 = ((simde__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[0]>>5)+lut_idxCnProcG3[j][0]);
 	  //                sgn  = simde_mm256_sign_epi8(ones, ymm0);
+#ifndef AVOID_MM256_SIGN
 	  fprintf(fd,"                sgn  = simde_mm256_sign_epi8(ones, ymm0);\n");
+#else
+	  fprintf(fd,"                sgn  = simde_mm256_xor_si256(ones, ymm0);\n");
+#endif	  
 	  //                min  = simde_mm256_abs_epi8(ymm0);
 	  fprintf(fd,"                min  = simde_mm256_abs_epi8(ymm0);\n");
 	  
 	  // 32 CNs of second BN
 	  //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][1] + i];
-	  fprintf(fd,"                ymm0 = ((__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[0]>>5)+lut_idxCnProcG3[j][1]);
+	  fprintf(fd,"                ymm0 = ((simde__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[0]>>5)+lut_idxCnProcG3[j][1]);
 	  
 	  //                min  = simde_mm256_min_epu8(min, simde_mm256_abs_epi8(ymm0));
 	  fprintf(fd,"                min  = simde_mm256_min_epu8(min, simde_mm256_abs_epi8(ymm0));\n");
 	  
 	  //                sgn  = simde_mm256_sign_epi8(sgn, ymm0);
+#ifndef AVOID_MM256_SIGN
 	  fprintf(fd,"                sgn  = simde_mm256_sign_epi8(sgn, ymm0);\n");
-	  
+#else
+	  fprintf(fd,"                sgn  = simde_mm256_xor_si256(sgn, ymm0);\n");
+#endif
 	  // Store result
 	  //                min = simde_mm256_min_epu8(min, maxLLR); // 128 in epi8 is -127
+#ifndef DROP_MAXLLR
 	  fprintf(fd,"                min = simde_mm256_min_epu8(min, maxLLR);\n");
+#endif
 	  //                *p_cnProcBufResBit = simde_mm256_sign_epi8(min, sgn);
 	  //                p_cnProcBufResBit++;
-	  fprintf(fd,"                ((__m256i*)cnProcBufRes)[%d+i] = simde_mm256_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[0]>>5)+(j*bitOffsetInGroup));
+	  fprintf(fd,"                ((simde__m256i*)cnProcBufRes)[%d+i] = simde_mm256_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[0]>>5)+(j*bitOffsetInGroup));
 	  fprintf(fd,"            }\n");
         }
     }
-
   // =====================================================================
   // Process group with 4 BNs
   fprintf(fd,"//Process group with 4 BNs\n");
@@ -163,8 +177,8 @@ void nrLDPC_cnProc_BG1_generator_AVX2(const char* dir, int R)
 
 
       // Set pointers to start of group 4
-      //p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[1]];
-      //p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[1]];
+      //p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[1]];
+      //p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[1]];
 
       // Loop over every BN
       
@@ -179,9 +193,13 @@ void nrLDPC_cnProc_BG1_generator_AVX2(const char* dir, int R)
 	  fprintf(fd,"            for (int i=0;i<M;i++) {\n");
 	  // Abs and sign of 32 CNs (first BN)
 	  //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
-	  fprintf(fd,"                ymm0 = ((__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[1]>>5)+lut_idxCnProcG4[j][0]);
+	  fprintf(fd,"                ymm0 = ((simde__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[1]>>5)+lut_idxCnProcG4[j][0]);
 	  //                sgn  = simde_mm256_sign_epi8(ones, ymm0);
+#ifndef AVOID_MM256_SIGN
 	  fprintf(fd,"                sgn  = simde_mm256_sign_epi8(ones, ymm0);\n");
+#else
+	  fprintf(fd,"                sgn  = simde_mm256_xor_si256(ones, ymm0);\n");
+#endif	  
 	  //                min  = simde_mm256_abs_epi8(ymm0);
 	  fprintf(fd,"                min  = simde_mm256_abs_epi8(ymm0);\n");
 	  
@@ -189,21 +207,27 @@ void nrLDPC_cnProc_BG1_generator_AVX2(const char* dir, int R)
 	  // Loop over BNs
 	  for (k=1; k<3; k++)
 	    {
-	      fprintf(fd,"                ymm0 = ((__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[1]>>5)+lut_idxCnProcG4[j][k]);
+	      fprintf(fd,"                ymm0 = ((simde__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[1]>>5)+lut_idxCnProcG4[j][k]);
 	      
 	      //                min  = simde_mm256_min_epu8(min, simde_mm256_abs_epi8(ymm0));
 	      fprintf(fd,"                min  = simde_mm256_min_epu8(min, simde_mm256_abs_epi8(ymm0));\n");
 	      
 	      //                sgn  = simde_mm256_sign_epi8(sgn, ymm0);
-	      fprintf(fd,"                sgn  = simde_mm256_sign_epi8(sgn, ymm0);\n");
+#ifndef AVOID_MM256_SIGN
+  	      fprintf(fd,"                sgn  = simde_mm256_sign_epi8(sgn, ymm0);\n");
+#else
+	      fprintf(fd,"                sgn  = simde_mm256_xor_si256(sgn, ymm0);\n");
+#endif
 	    }
 	  
 	  // Store result
 	  //                min = simde_mm256_min_epu8(min, maxLLR); // 128 in epi8 is -127
+#ifndef DROP_MAXLLR
 	  fprintf(fd,"                min = simde_mm256_min_epu8(min, maxLLR);\n");
+#endif	  
 	  //                *p_cnProcBufResBit = simde_mm256_sign_epi8(min, sgn);
 	      //                p_cnProcBufResBit++;
-	  fprintf(fd,"                ((__m256i*)cnProcBufRes)[%d+i] = simde_mm256_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[1]>>5)+(j*bitOffsetInGroup));
+	  fprintf(fd,"                ((simde__m256i*)cnProcBufRes)[%d+i] = simde_mm256_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[1]>>5)+(j*bitOffsetInGroup));
 	  fprintf(fd,"            }\n");
         }
     }
@@ -228,8 +252,8 @@ void nrLDPC_cnProc_BG1_generator_AVX2(const char* dir, int R)
 
 
       // Set pointers to start of group 4
-      //p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[1]];
-      //p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[1]];
+      //p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[1]];
+      //p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[1]];
 
       // Loop over every BN
       
@@ -244,9 +268,13 @@ void nrLDPC_cnProc_BG1_generator_AVX2(const char* dir, int R)
 	  fprintf(fd,"            for (int i=0;i<M;i++) {\n");
 	  // Abs and sign of 32 CNs (first BN)
 	  //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
-	  fprintf(fd,"                ymm0 = ((__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[2]>>5)+lut_idxCnProcG5[j][0]);
+	  fprintf(fd,"                ymm0 = ((simde__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[2]>>5)+lut_idxCnProcG5[j][0]);
 	  //                sgn  = simde_mm256_sign_epi8(ones, ymm0);
+#ifndef AVOID_MM256_SIGN
 	  fprintf(fd,"                sgn  = simde_mm256_sign_epi8(ones, ymm0);\n");
+#else
+	  fprintf(fd,"                sgn  = simde_mm256_xor_si256(ones, ymm0);\n");
+#endif	  
 	  //                min  = simde_mm256_abs_epi8(ymm0);
 	  fprintf(fd,"                min  = simde_mm256_abs_epi8(ymm0);\n");
 	  
@@ -254,21 +282,27 @@ void nrLDPC_cnProc_BG1_generator_AVX2(const char* dir, int R)
 	  // Loop over BNs
 	  for (k=1; k<4; k++)
 	    {
-	      fprintf(fd,"                ymm0 = ((__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[2]>>5)+lut_idxCnProcG5[j][k]);
+	      fprintf(fd,"                ymm0 = ((simde__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[2]>>5)+lut_idxCnProcG5[j][k]);
 	      
 	      //                min  = simde_mm256_min_epu8(min, simde_mm256_abs_epi8(ymm0));
 	      fprintf(fd,"                min  = simde_mm256_min_epu8(min, simde_mm256_abs_epi8(ymm0));\n");
 	      
 	      //                sgn  = simde_mm256_sign_epi8(sgn, ymm0);
-	      fprintf(fd,"                sgn  = simde_mm256_sign_epi8(sgn, ymm0);\n");
+#ifndef AVOID_MM256_SIGN
+  	      fprintf(fd,"                sgn  = simde_mm256_sign_epi8(sgn, ymm0);\n");
+#else
+	      fprintf(fd,"                sgn  = simde_mm256_xor_si256(sgn, ymm0);\n");
+#endif
 	    }
 	  
 	  // Store result
 	  //                min = simde_mm256_min_epu8(min, maxLLR); // 128 in epi8 is -127
+#ifndef DROP_MAXLLR
 	  fprintf(fd,"                min = simde_mm256_min_epu8(min, maxLLR);\n");
+#endif	  
 	  //                *p_cnProcBufResBit = simde_mm256_sign_epi8(min, sgn);
 	  //                p_cnProcBufResBit++;
-	  fprintf(fd,"                ((__m256i*)cnProcBufRes)[%d+i] = simde_mm256_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[2]>>5)+(j*bitOffsetInGroup));
+	  fprintf(fd,"                ((simde__m256i*)cnProcBufRes)[%d+i] = simde_mm256_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[2]>>5)+(j*bitOffsetInGroup));
 	  fprintf(fd,"           }\n");
         }
     }
@@ -293,8 +327,8 @@ void nrLDPC_cnProc_BG1_generator_AVX2(const char* dir, int R)
 
 
       // Set pointers to start of group 4
-      //p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[1]];
-      //p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[1]];
+      //p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[1]];
+      //p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[1]];
 
       // Loop over every BN
       
@@ -309,9 +343,13 @@ void nrLDPC_cnProc_BG1_generator_AVX2(const char* dir, int R)
 	  fprintf(fd,"            for (int i=0;i<M;i++) {\n");
 	  // Abs and sign of 32 CNs (first BN)
 	  //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
-	  fprintf(fd,"                ymm0 = ((__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[3]>>5)+lut_idxCnProcG6[j][0]);
+	  fprintf(fd,"                ymm0 = ((simde__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[3]>>5)+lut_idxCnProcG6[j][0]);
 	  //                sgn  = simde_mm256_sign_epi8(ones, ymm0);
+#ifndef AVOID_MM256_SIGN
 	  fprintf(fd,"                sgn  = simde_mm256_sign_epi8(ones, ymm0);\n");
+#else
+	  fprintf(fd,"                sgn  = simde_mm256_xor_si256(ones, ymm0);\n");
+#endif	  
 	  //                min  = simde_mm256_abs_epi8(ymm0);
 	  fprintf(fd,"                min  = simde_mm256_abs_epi8(ymm0);\n");
 	  
@@ -319,21 +357,27 @@ void nrLDPC_cnProc_BG1_generator_AVX2(const char* dir, int R)
 	  // Loop over BNs
 	  for (k=1; k<5; k++)
 	    {
-	      fprintf(fd,"                ymm0 = ((__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[3]>>5)+lut_idxCnProcG6[j][k]);
+	      fprintf(fd,"                ymm0 = ((simde__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[3]>>5)+lut_idxCnProcG6[j][k]);
 	      
 	      //                min  = simde_mm256_min_epu8(min, simde_mm256_abs_epi8(ymm0));
 	      fprintf(fd,"                min  = simde_mm256_min_epu8(min, simde_mm256_abs_epi8(ymm0));\n");
 	      
 	      //                sgn  = simde_mm256_sign_epi8(sgn, ymm0);
-	      fprintf(fd,"                sgn  = simde_mm256_sign_epi8(sgn, ymm0);\n");
+#ifndef AVOID_MM256_SIGN
+  	      fprintf(fd,"                sgn  = simde_mm256_sign_epi8(sgn, ymm0);\n");
+#else
+	      fprintf(fd,"                sgn  = simde_mm256_xor_si256(sgn, ymm0);\n");
+#endif
 	    }
 	  
 	  // Store result
 	  //                min = simde_mm256_min_epu8(min, maxLLR); // 128 in epi8 is -127
+#ifndef DROP_MAXLLR
 	  fprintf(fd,"                min = simde_mm256_min_epu8(min, maxLLR);\n");
+#endif	  
 	  //                *p_cnProcBufResBit = simde_mm256_sign_epi8(min, sgn);
 	  //                p_cnProcBufResBit++;
-	  fprintf(fd,"                ((__m256i*)cnProcBufRes)[%d+i] = simde_mm256_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[3]>>5)+(j*bitOffsetInGroup));
+	  fprintf(fd,"                ((simde__m256i*)cnProcBufRes)[%d+i] = simde_mm256_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[3]>>5)+(j*bitOffsetInGroup));
 	  fprintf(fd,"            }\n");
 	}
     }
@@ -361,8 +405,8 @@ void nrLDPC_cnProc_BG1_generator_AVX2(const char* dir, int R)
 
 
       // Set pointers to start of group 4
-      //p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[1]];
-      //p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[1]];
+      //p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[1]];
+      //p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[1]];
 
       // Loop over every BN
       
@@ -377,9 +421,13 @@ void nrLDPC_cnProc_BG1_generator_AVX2(const char* dir, int R)
 	  fprintf(fd,"            for (int i=0;i<M;i++) {\n");
 	  // Abs and sign of 32 CNs (first BN)
 	  //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
-	  fprintf(fd,"                ymm0 = ((__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[4]>>5)+lut_idxCnProcG7[j][0]);
+	  fprintf(fd,"                ymm0 = ((simde__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[4]>>5)+lut_idxCnProcG7[j][0]);
 	  //                sgn  = simde_mm256_sign_epi8(ones, ymm0);
+#ifndef AVOID_MM256_SIGN
 	  fprintf(fd,"                sgn  = simde_mm256_sign_epi8(ones, ymm0);\n");
+#else
+	  fprintf(fd,"                sgn  = simde_mm256_xor_si256(ones, ymm0);\n");
+#endif	  
 	  //                min  = simde_mm256_abs_epi8(ymm0);
 	  fprintf(fd,"                min  = simde_mm256_abs_epi8(ymm0);\n");
 	  
@@ -387,21 +435,27 @@ void nrLDPC_cnProc_BG1_generator_AVX2(const char* dir, int R)
 	  // Loop over BNs
 	  for (k=1; k<6; k++)
 	    {
-	      fprintf(fd,"                ymm0 = ((__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[4]>>5)+lut_idxCnProcG7[j][k]);
+	      fprintf(fd,"                ymm0 = ((simde__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[4]>>5)+lut_idxCnProcG7[j][k]);
 	      
 	      //                min  = simde_mm256_min_epu8(min, simde_mm256_abs_epi8(ymm0));
 	      fprintf(fd,"                min  = simde_mm256_min_epu8(min, simde_mm256_abs_epi8(ymm0));\n");
 	      
 	      //                sgn  = simde_mm256_sign_epi8(sgn, ymm0);
-	      fprintf(fd,"                sgn  = simde_mm256_sign_epi8(sgn, ymm0);\n");
+#ifndef AVOID_MM256_SIGN
+  	      fprintf(fd,"                sgn  = simde_mm256_sign_epi8(sgn, ymm0);\n");
+#else
+	      fprintf(fd,"                sgn  = simde_mm256_xor_si256(sgn, ymm0);\n");
+#endif
 	    }
 	  
 	  // Store result
 	  //                min = simde_mm256_min_epu8(min, maxLLR); // 128 in epi8 is -127
+#ifndef DROP_MAXLLR
 	  fprintf(fd,"                min = simde_mm256_min_epu8(min, maxLLR);\n");
+#endif	  
 	  //                *p_cnProcBufResBit = simde_mm256_sign_epi8(min, sgn);
 	  //                p_cnProcBufResBit++;
-	  fprintf(fd,"                ((__m256i*)cnProcBufRes)[%d+i] = simde_mm256_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[4]>>5)+(j*bitOffsetInGroup));
+	  fprintf(fd,"                ((simde__m256i*)cnProcBufRes)[%d+i] = simde_mm256_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[4]>>5)+(j*bitOffsetInGroup));
 	  fprintf(fd,"            }\n");
 	}
     }
@@ -430,8 +484,8 @@ void nrLDPC_cnProc_BG1_generator_AVX2(const char* dir, int R)
 
 
       // Set pointers to start of group 4
-      //p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[1]];
-      //p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[1]];
+      //p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[1]];
+      //p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[1]];
 
       // Loop over every BN
       
@@ -446,9 +500,13 @@ void nrLDPC_cnProc_BG1_generator_AVX2(const char* dir, int R)
 	  fprintf(fd,"            for (int i=0;i<M;i++) {\n");
 	  // Abs and sign of 32 CNs (first BN)
 	  //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
-	  fprintf(fd,"                ymm0 = ((__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[5]>>5)+lut_idxCnProcG8[j][0]);
+	  fprintf(fd,"                ymm0 = ((simde__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[5]>>5)+lut_idxCnProcG8[j][0]);
 	  //                sgn  = simde_mm256_sign_epi8(ones, ymm0);
+#ifndef AVOID_MM256_SIGN
 	  fprintf(fd,"                sgn  = simde_mm256_sign_epi8(ones, ymm0);\n");
+#else
+	  fprintf(fd,"                sgn  = simde_mm256_xor_si256(ones, ymm0);\n");
+#endif	  
 	  //                min  = simde_mm256_abs_epi8(ymm0);
 	  fprintf(fd,"                min  = simde_mm256_abs_epi8(ymm0);\n");
 	  
@@ -456,21 +514,27 @@ void nrLDPC_cnProc_BG1_generator_AVX2(const char* dir, int R)
 	  // Loop over BNs
 	  for (k=1; k<7; k++)
 	    {
-	      fprintf(fd,"                ymm0 = ((__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[5]>>5)+lut_idxCnProcG8[j][k]);
+	      fprintf(fd,"                ymm0 = ((simde__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[5]>>5)+lut_idxCnProcG8[j][k]);
 	      
 	      //                min  = simde_mm256_min_epu8(min, simde_mm256_abs_epi8(ymm0));
 	      fprintf(fd,"                min  = simde_mm256_min_epu8(min, simde_mm256_abs_epi8(ymm0));\n");
 	      
 	      //                sgn  = simde_mm256_sign_epi8(sgn, ymm0);
-	      fprintf(fd,"                sgn  = simde_mm256_sign_epi8(sgn, ymm0);\n");
+#ifndef AVOID_MM256_SIGN
+  	      fprintf(fd,"                sgn  = simde_mm256_sign_epi8(sgn, ymm0);\n");
+#else
+	      fprintf(fd,"                sgn  = simde_mm256_xor_si256(sgn, ymm0);\n");
+#endif
 	    }
 	  
 	  // Store result
 	  //                min = simde_mm256_min_epu8(min, maxLLR); // 128 in epi8 is -127
+#ifndef DROP_MAXLLR
 	  fprintf(fd,"                min = simde_mm256_min_epu8(min, maxLLR);\n");
+#endif
 	  //                *p_cnProcBufResBit = simde_mm256_sign_epi8(min, sgn);
 	  //                p_cnProcBufResBit++;
-	  fprintf(fd,"                ((__m256i*)cnProcBufRes)[%d+i] = simde_mm256_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[5]>>5)+(j*bitOffsetInGroup));
+	  fprintf(fd,"                ((simde__m256i*)cnProcBufRes)[%d+i] = simde_mm256_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[5]>>5)+(j*bitOffsetInGroup));
 	  fprintf(fd,"              }\n");
         }
     }
@@ -499,8 +563,8 @@ void nrLDPC_cnProc_BG1_generator_AVX2(const char* dir, int R)
 
 
       // Set pointers to start of group 9
-      //p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[1]];
-      //p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[1]];
+      //p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[1]];
+      //p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[1]];
 
       // Loop over every BN
      
@@ -515,9 +579,13 @@ void nrLDPC_cnProc_BG1_generator_AVX2(const char* dir, int R)
 	  fprintf(fd,"            for (int i=0;i<M;i++) {\n");
 	  // Abs and sign of 32 CNs (first BN)
 	  //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
-	  fprintf(fd,"                ymm0 = ((__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[6]>>5)+lut_idxCnProcG9[j][0]);
+	  fprintf(fd,"                ymm0 = ((simde__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[6]>>5)+lut_idxCnProcG9[j][0]);
 	  //                sgn  = simde_mm256_sign_epi8(ones, ymm0);
+#ifndef AVOID_MM256_SIGN
 	  fprintf(fd,"                sgn  = simde_mm256_sign_epi8(ones, ymm0);\n");
+#else
+	  fprintf(fd,"                sgn  = simde_mm256_xor_si256(ones, ymm0);\n");
+#endif	  
 	  //                min  = simde_mm256_abs_epi8(ymm0);
 	  fprintf(fd,"                min  = simde_mm256_abs_epi8(ymm0);\n");
 	  
@@ -525,21 +593,27 @@ void nrLDPC_cnProc_BG1_generator_AVX2(const char* dir, int R)
 	  // Loop over BNs
 	  for (k=1; k<8; k++)
 	    {
-	      fprintf(fd,"                ymm0 = ((__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[6]>>5)+lut_idxCnProcG9[j][k]);
+	      fprintf(fd,"                ymm0 = ((simde__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[6]>>5)+lut_idxCnProcG9[j][k]);
 	      
 	      //                min  = simde_mm256_min_epu8(min, simde_mm256_abs_epi8(ymm0));
 	      fprintf(fd,"                min  = simde_mm256_min_epu8(min, simde_mm256_abs_epi8(ymm0));\n");
 	      
 	      //                sgn  = simde_mm256_sign_epi8(sgn, ymm0);
-	      fprintf(fd,"                sgn  = simde_mm256_sign_epi8(sgn, ymm0);\n");
+#ifndef AVOID_MM256_SIGN
+  	      fprintf(fd,"                sgn  = simde_mm256_sign_epi8(sgn, ymm0);\n");
+#else
+	      fprintf(fd,"                sgn  = simde_mm256_xor_si256(sgn, ymm0);\n");
+#endif
 	    }
 	  
 	  // Store result
 	  //                min = simde_mm256_min_epu8(min, maxLLR); // 128 in epi8 is -127
+#ifndef DROP_MAXLLR
 	  fprintf(fd,"                min = simde_mm256_min_epu8(min, maxLLR);\n");
+#endif
 	  //                *p_cnProcBufResBit = simde_mm256_sign_epi8(min, sgn);
 	  //                p_cnProcBufResBit++;
-	  fprintf(fd,"                ((__m256i*)cnProcBufRes)[%d+i] = simde_mm256_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[6]>>5)+(j*bitOffsetInGroup));
+	  fprintf(fd,"                ((simde__m256i*)cnProcBufRes)[%d+i] = simde_mm256_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[6]>>5)+(j*bitOffsetInGroup));
 	  fprintf(fd,"            }\n");
 	}
     }
@@ -569,8 +643,8 @@ void nrLDPC_cnProc_BG1_generator_AVX2(const char* dir, int R)
 
 
       // Set pointers to start of group 10
-      //p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[1]];
-      //p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[1]];
+      //p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[1]];
+      //p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[1]];
 
       // Loop over every BN
       
@@ -585,9 +659,13 @@ void nrLDPC_cnProc_BG1_generator_AVX2(const char* dir, int R)
 	  fprintf(fd,"            for (int i=0;i<M;i++) {\n");
 	  // Abs and sign of 32 CNs (first BN)
 	  //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
-	  fprintf(fd,"                ymm0 = ((__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[7]>>5)+lut_idxCnProcG10[j][0]);
+	  fprintf(fd,"                ymm0 = ((simde__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[7]>>5)+lut_idxCnProcG10[j][0]);
 	  //                sgn  = simde_mm256_sign_epi8(ones, ymm0);
+#ifndef AVOID_MM256_SIGN
 	  fprintf(fd,"                sgn  = simde_mm256_sign_epi8(ones, ymm0);\n");
+#else
+	  fprintf(fd,"                sgn  = simde_mm256_xor_si256(ones, ymm0);\n");
+#endif	  
 	  //                min  = simde_mm256_abs_epi8(ymm0);
 	  fprintf(fd,"                min  = simde_mm256_abs_epi8(ymm0);\n");
 	  
@@ -595,21 +673,27 @@ void nrLDPC_cnProc_BG1_generator_AVX2(const char* dir, int R)
 	  // Loop over BNs
 	  for (k=1; k<9; k++)
 	    {
-	      fprintf(fd,"                ymm0 = ((__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[7]>>5)+lut_idxCnProcG10[j][k]);
+	      fprintf(fd,"                ymm0 = ((simde__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[7]>>5)+lut_idxCnProcG10[j][k]);
 	      
 	      //                min  = simde_mm256_min_epu8(min, simde_mm256_abs_epi8(ymm0));
 	      fprintf(fd,"                min  = simde_mm256_min_epu8(min, simde_mm256_abs_epi8(ymm0));\n");
 	      
 	      //                sgn  = simde_mm256_sign_epi8(sgn, ymm0);
-	      fprintf(fd,"                sgn  = simde_mm256_sign_epi8(sgn, ymm0);\n");
+#ifndef AVOID_MM256_SIGN
+  	      fprintf(fd,"                sgn  = simde_mm256_sign_epi8(sgn, ymm0);\n");
+#else
+	      fprintf(fd,"                sgn  = simde_mm256_xor_si256(sgn, ymm0);\n");
+#endif
 	    }
 	  
 	  // Store result
 	  //                min = simde_mm256_min_epu8(min, maxLLR); // 128 in epi8 is -127
+#ifndef DROP_MAXLLR
 	  fprintf(fd,"                min = simde_mm256_min_epu8(min, maxLLR);\n");
+#endif	  
 	  //                *p_cnProcBufResBit = simde_mm256_sign_epi8(min, sgn);
 	  //                p_cnProcBufResBit++;
-	  fprintf(fd,"                ((__m256i*)cnProcBufRes)[%d+i] = simde_mm256_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[7]>>5)+(j*bitOffsetInGroup));
+	  fprintf(fd,"                ((simde__m256i*)cnProcBufRes)[%d+i] = simde_mm256_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[7]>>5)+(j*bitOffsetInGroup));
 	  fprintf(fd,"            }\n");
         }
     }
@@ -630,7 +714,7 @@ void nrLDPC_cnProc_BG1_generator_AVX2(const char* dir, int R)
 					     {0,48,96,144,192,240,288,336,384,432,480,528,576,624,672,720,816,864}, {0,48,96,144,192,240,288,336,384,432,480,528,576,624,672,720,768,864},
 					     {0,48,96,144,192,240,288,336,384,432,480,528,576,624,672,720,768,816}};
 
-
+ 
   if (lut_numCnInCnGroups[8] > 0)
     {
       // Number of groups of 32 CNs for parallel processing
@@ -642,8 +726,8 @@ void nrLDPC_cnProc_BG1_generator_AVX2(const char* dir, int R)
 
 
       // Set pointers to start of group 19
-      //p_cnProcBuf    = (__m256i*) &cnProcBuf   [lut_startAddrCnGroups[1]];
-      //p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[1]];
+      //p_cnProcBuf    = (simde__m256i*) &cnProcBuf   [lut_startAddrCnGroups[1]];
+      //p_cnProcBufRes = (simde__m256i*) &cnProcBufRes[lut_startAddrCnGroups[1]];
 
       // Loop over every BN
       
@@ -658,9 +742,13 @@ void nrLDPC_cnProc_BG1_generator_AVX2(const char* dir, int R)
 	  fprintf(fd,"            for (int i=0;i<M;i++) {\n");
 	  // Abs and sign of 32 CNs (first BN)
 	  //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
-	  fprintf(fd,"                ymm0 = ((__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[8]>>5)+lut_idxCnProcG19[j][0]);
+	  fprintf(fd,"                ymm0 = ((simde__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[8]>>5)+lut_idxCnProcG19[j][0]);
 	  //                sgn  = simde_mm256_sign_epi8(ones, ymm0);
+#ifndef AVOID_MM256_SIGN
 	  fprintf(fd,"                sgn  = simde_mm256_sign_epi8(ones, ymm0);\n");
+#else
+	  fprintf(fd,"                sgn  = simde_mm256_xor_si256(ones, ymm0);\n");
+#endif	  
 	  //                min  = simde_mm256_abs_epi8(ymm0);
 	  fprintf(fd,"                min  = simde_mm256_abs_epi8(ymm0);\n");
 	  
@@ -668,21 +756,27 @@ void nrLDPC_cnProc_BG1_generator_AVX2(const char* dir, int R)
 	  // Loop over BNs
 	  for (k=1; k<18; k++)
 	    {
-	      fprintf(fd,"                ymm0 = ((__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[8]>>5)+lut_idxCnProcG19[j][k]);
+	      fprintf(fd,"                ymm0 = ((simde__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[8]>>5)+lut_idxCnProcG19[j][k]);
 	      
 	      //                min  = simde_mm256_min_epu8(min, simde_mm256_abs_epi8(ymm0));
 	      fprintf(fd,"                min  = simde_mm256_min_epu8(min, simde_mm256_abs_epi8(ymm0));\n");
 	      
 	      //                sgn  = simde_mm256_sign_epi8(sgn, ymm0);
-	      fprintf(fd,"                sgn  = simde_mm256_sign_epi8(sgn, ymm0);\n");
+#ifndef AVOID_MM256_SIGN
+  	      fprintf(fd,"                sgn  = simde_mm256_sign_epi8(sgn, ymm0);\n");
+#else
+	      fprintf(fd,"                sgn  = simde_mm256_xor_si256(sgn, ymm0);\n");
+#endif
 	    }
 	  
 	  // Store result
 	  //                min = simde_mm256_min_epu8(min, maxLLR); // 128 in epi8 is -127
+#ifndef DROP_MAXLLR
 	  fprintf(fd,"                min = simde_mm256_min_epu8(min, maxLLR);\n");
+#endif	  
 	  //                *p_cnProcBufResBit = simde_mm256_sign_epi8(min, sgn);
 	  //                p_cnProcBufResBit++;
-	  fprintf(fd,"                ((__m256i*)cnProcBufRes)[%d+i] = simde_mm256_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[8]>>5)+(j*bitOffsetInGroup));
+	  fprintf(fd,"                ((simde__m256i*)cnProcBufRes)[%d+i] = simde_mm256_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[8]>>5)+(j*bitOffsetInGroup));
 	  fprintf(fd,"            }\n");
         }
     }

openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_cnProc/cnProc_gen_BG2_128.c

@@ -0,0 +1,436 @@
+/*
+ * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.
+ * The OpenAirInterface Software Alliance licenses this file to You under
+ * the OAI Public License, Version 1.1  (the "License"); you may not use this file
+ * except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.openairinterface.org/?page_id=698
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *-------------------------------------------------------------------------------
+ * For more information about the OpenAirInterface (OAI) Software Alliance:
+ *      contact@openairinterface.org
+ */
+
+#include <stdio.h>
+#include <stdint.h>
+#include <stdlib.h>
+#include "../../nrLDPCdecoder_defs.h"
+#include "../../nrLDPC_types.h"                                                                                           
+#include "../../nrLDPC_bnProc.h"
+
+
+void nrLDPC_cnProc_BG2_generator_128(const char* dir, int R)
+{
+  const char *ratestr[3]={"15","13","23"};
+
+  if (R<0 || R>2) {printf("Illegal R %d\n",R); abort();}
+
+
+//  system("mkdir -p ldpc_gen_files/avx2");
+
+  char fname[FILENAME_MAX+1];
+  snprintf(fname, sizeof(fname), "%s/cnProc128/nrLDPC_cnProc_BG2_R%s_128.h", dir, ratestr[R]);
+  FILE *fd=fopen(fname,"w");
+  if (fd == NULL) {
+    printf("Cannot create file %s\n", fname);
+    abort();
+  }
+
+  fprintf(fd,"#include <stdint.h>\n");
+  fprintf(fd,"#include \"PHY/sse_intrin.h\"\n");
+  fprintf(fd,"static inline void nrLDPC_cnProc_BG2_R%s_128(int8_t* cnProcBuf, int8_t* cnProcBufRes, uint16_t Z) {\n",ratestr[R]);
+
+  const uint8_t*  lut_numCnInCnGroups;
+  const uint32_t* lut_startAddrCnGroups = lut_startAddrCnGroups_BG2;
+
+  if (R==0)      lut_numCnInCnGroups = lut_numCnInCnGroups_BG2_R15;
+  else if (R==1) lut_numCnInCnGroups = lut_numCnInCnGroups_BG2_R13;
+  else if (R==2) lut_numCnInCnGroups = lut_numCnInCnGroups_BG2_R23;
+  else { printf("aborting, illegal R %d\n",R); fclose(fd);abort();}
+
+
+  // Number of CNs in Groups
+  //uint32_t M;
+  uint32_t j;
+  uint32_t k;
+  // Offset to each bit within a group in terms of 32 byte
+  uint32_t bitOffsetInGroup;
+
+  // Offsets are in units of bitOffsetInGroup (1*384/32)
+  //    const uint8_t lut_idxCnProcG3[3][2] = {{12,24}, {0,24}, {0,12}};
+
+  // =====================================================================
+  // Process group with 3 BNs
+  fprintf(fd,"//Process group with 3 BNs\n");
+  // LUT with offsets for bits that need to be processed
+  // 1. bit proc requires LLRs of 2. and 3. bit, 2.bits of 1. and 3. etc.
+    // Offsets are in units of bitOffsetInGroup
+    const uint8_t lut_idxCnProcG3[3][2] = {{72,144}, {0,144}, {0,72}};
+
+
+  fprintf(fd,"                simde__m128i ymm0, min, sgn,ones,maxLLR;\n");
+  fprintf(fd,"                ones   = simde_mm_set1_epi8((char)1);\n");
+  fprintf(fd,"                maxLLR = simde_mm_set1_epi8((char)127);\n");
+    fprintf(fd,"                uint32_t M;\n");
+ 
+
+  if (lut_numCnInCnGroups[0] > 0)
+    {
+      // Number of groups of 16 CNs for parallel processing
+      // Ceil for values not divisible by 32
+     fprintf(fd," M = (%d*Z + 15)>>4;\n",lut_numCnInCnGroups[0] );
+
+      // Set the offset to each bit within a group in terms of 32 byte
+      bitOffsetInGroup = (lut_numCnInCnGroups_BG2_R15[0]*NR_LDPC_ZMAX)>>4;
+
+      // Loop over every BN
+      
+      for (j=0; j<3; j++)
+        {
+
+            fprintf(fd,"            for (int i=0;i<M;i+=2) {\n");
+            // Abs and sign of 16 CNs (first BN)
+            //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
+            fprintf(fd,"                ymm0 = ((simde__m128i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[0]>>4)+lut_idxCnProcG3[j][0]*2);
+            //                sgn  = simde_mm_sign_epi8(ones, ymm0);
+            fprintf(fd,"                sgn  = simde_mm_sign_epi8(ones, ymm0);\n");
+            //                min  = simde_mm_abs_epi8(ymm0);
+            fprintf(fd,"                min  = simde_mm_abs_epi8(ymm0);\n");
+            
+            // 16 CNs of second BN
+            //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][1] + i];
+            fprintf(fd,"                ymm0 = ((simde__m128i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[0]>>4)+lut_idxCnProcG3[j][1]*2);
+            
+            //                min  = simde_mm_min_epu8(min, simde_mm_abs_epi8(ymm0));
+            fprintf(fd,"                min  = simde_mm_min_epu8(min, simde_mm_abs_epi8(ymm0));\n");
+            
+            //                sgn  = simde_mm_sign_epi8(sgn, ymm0);
+            fprintf(fd,"                sgn  = simde_mm_sign_epi8(sgn, ymm0);\n");
+            
+            // Store result
+            //                min = simde_mm_min_epu8(min, maxLLR); // 128 in epi8 is -127
+            fprintf(fd,"                min = simde_mm_min_epu8(min, maxLLR);\n");
+            //                *p_cnProcBufResBit = simde_mm_sign_epi8(min, sgn);
+            //                p_cnProcBufResBit++;
+            fprintf(fd,"                ((simde__m128i*)cnProcBufRes)[%d+i] = simde_mm_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[0]>>4)+(j*bitOffsetInGroup));
+
+            // Abs and sign of 16 CNs (first BN)
+            //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
+            fprintf(fd,"                ymm0 = ((simde__m128i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[0]>>4)+lut_idxCnProcG3[j][0]*2+1);
+            //                sgn  = simde_mm_sign_epi8(ones, ymm0);
+            fprintf(fd,"                sgn  = simde_mm_sign_epi8(ones, ymm0);\n");
+            //                min  = simde_mm_abs_epi8(ymm0);
+            fprintf(fd,"                min  = simde_mm_abs_epi8(ymm0);\n");
+      
+            fprintf(fd,"            }\n");
+          }
+      }
+
+  // =====================================================================
+  // Process group with 4 BNs
+  fprintf(fd,"//Process group with 4 BNs\n");
+  
+ // Offset is 20*384/32 = 240
+    const uint16_t lut_idxCnProcG4[4][3] = {{240,480,720}, {0,480,720}, {0,240,720}, {0,240,480}};
+
+    if (lut_numCnInCnGroups[1] > 0)
+    {
+            // Number of groups of 16 CNs for parallel processing
+            // Ceil for values not divisible by 32
+        fprintf(fd," M = (%d*Z + 15)>>4;\n",lut_numCnInCnGroups[1] );
+
+            // Set the offset to each bit within a group in terms of 32 byte
+            bitOffsetInGroup = (lut_numCnInCnGroups_BG2_R15[1]*NR_LDPC_ZMAX)>>4;
+
+            // Loop over every BN
+            
+          for (j=0; j<4; j++)
+          {
+
+          // Loop over CNs
+
+          fprintf(fd,"            for (int i=0;i<M;i++) {\n");
+          // Abs and sign of 16 CNs (first BN)
+          //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
+          fprintf(fd,"                ymm0 = ((simde__m128i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[1]>>4)+lut_idxCnProcG4[j][0]*2);
+          //                sgn  = simde_mm_sign_epi8(ones, ymm0);
+           fprintf(fd,"                sgn  = simde_mm_sign_epi8(ones, ymm0);\n");
+          //                min  = simde_mm_abs_epi8(ymm0);
+          fprintf(fd,"                min  = simde_mm_abs_epi8(ymm0);\n");
+            
+            
+          // Loop over BNs
+            for (k=1; k<3; k++)
+            {
+            fprintf(fd,"                ymm0 = ((simde__m128i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[1]>>4)+lut_idxCnProcG4[j][k]*2);
+                
+            //                min  = simde_mm_min_epu8(min, simde_mm_abs_epi8(ymm0));
+            fprintf(fd,"                min  = simde_mm_min_epu8(min, simde_mm_abs_epi8(ymm0));\n");
+                
+            //                sgn  = simde_mm_sign_epi8(sgn, ymm0);
+                fprintf(fd,"                sgn  = simde_mm_sign_epi8(sgn, ymm0);\n");
+            }
+            
+            // Store result
+            //                min = simde_mm_min_epu8(min, maxLLR); // 128 in epi8 is -127
+            fprintf(fd,"                min = simde_mm_min_epu8(min, maxLLR);\n");
+            //                *p_cnProcBufResBit = simde_mm_sign_epi8(min, sgn);
+                //                p_cnProcBufResBit++;
+            fprintf(fd,"                ((simde__m128i*)cnProcBufRes)[%d+i] = simde_mm_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[1]>>4)+(j*bitOffsetInGroup));
+            fprintf(fd,"            }\n");
+          }
+      }
+
+
+  // =====================================================================
+  // Process group with 5 BNs
+    fprintf(fd,"//Process group with 5 BNs\n");
+
+    // Offset is 9*384/32 = 108
+    const uint16_t lut_idxCnProcG5[5][4] = {{108,216,324,432}, {0,216,324,432},
+                                            {0,108,324,432}, {0,108,216,432}, {0,108,216,324}};
+
+
+
+    if (lut_numCnInCnGroups[2] > 0)
+    {
+      // Number of groups of 16 CNs for parallel processing
+      // Ceil for values not divisible by 32
+    fprintf(fd," M = (%d*Z + 15)>>4;\n",lut_numCnInCnGroups[2] );
+      // Set the offset to each bit within a group in terms of 32 byte
+      bitOffsetInGroup = (lut_numCnInCnGroups_BG2_R15[2]*NR_LDPC_ZMAX)>>4;
+
+      // Loop over every BN
+      
+      for (j=0; j<5; j++)
+	    {
+
+         
+         fprintf(fd,"            for (int i=0;i<M;i++) {\n");
+        // Abs and sign of 16 CNs (first BN)
+        //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
+        fprintf(fd,"                ymm0 = ((simde__m128i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[2]>>4)+lut_idxCnProcG5[j][0]*2);
+        //                sgn  = simde_mm_sign_epi8(ones, ymm0);
+        fprintf(fd,"                sgn  = simde_mm_sign_epi8(ones, ymm0);\n");
+        //                min  = simde_mm_abs_epi8(ymm0);
+        fprintf(fd,"                min  = simde_mm_abs_epi8(ymm0);\n");
+        
+        
+        // Loop over BNs
+        for (k=1; k<4; k++)
+        {
+          fprintf(fd,"                ymm0 = ((simde__m128i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[2]>>4)+lut_idxCnProcG5[j][k]*2);
+            
+          //                min  = simde_mm_min_epu8(min, simde_mm_abs_epi8(ymm0));
+          fprintf(fd,"                min  = simde_mm_min_epu8(min, simde_mm_abs_epi8(ymm0));\n");
+            
+          //                sgn  = simde_mm_sign_epi8(sgn, ymm0);
+          fprintf(fd,"                sgn  = simde_mm_sign_epi8(sgn, ymm0);\n");
+        }
+        
+          // Store result
+        //                min = simde_mm_min_epu8(min, maxLLR); // 128 in epi8 is -127
+        fprintf(fd,"                min = simde_mm_min_epu8(min, maxLLR);\n");
+        //                *p_cnProcBufResBit = simde_mm_sign_epi8(min, sgn);
+        fprintf(fd,"                ((simde__m128i*)cnProcBufRes)[%d+i] = simde_mm_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[2]>>4)+(j*bitOffsetInGroup));
+        fprintf(fd,"           }\n");
+      }
+    }
+
+  // =====================================================================
+  // Process group with 6 BNs
+  fprintf(fd,"//Process group with 6 BNs\n");
+    // Offset is 3*384/32 = 36
+  const uint16_t lut_idxCnProcG6[6][5] = {{36,72,108,144,180}, {0,72,108,144,180},
+                                            {0,36,108,144,180}, {0,36,72,144,180},
+                                            {0,36,72,108,180}, {0,36,72,108,144}};
+
+
+  if (lut_numCnInCnGroups[3] > 0)
+  {
+      // Number of groups of 16 CNs for parallel processing
+      // Ceil for values not divisible by 32
+      fprintf(fd, "M = (%d*Z + 15)>>4;\n",lut_numCnInCnGroups[3] );
+
+      // Set the offset to each bit within a group in terms of 32 byte
+      bitOffsetInGroup = (lut_numCnInCnGroups_BG2_R15[3]*NR_LDPC_ZMAX)>>4;
+
+      // Loop over every BN
+      
+    for (j=0; j<6; j++)
+    {
+	
+
+	    // Loop over CNs
+	 
+	    fprintf(fd,"            for (int i=0;i<M;i++) {\n");
+	    // Abs and sign of 16 CNs (first BN)
+	    //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
+	    fprintf(fd,"                ymm0 = ((simde__m128i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[3]>>4)+lut_idxCnProcG6[j][0]*2);
+	    //                sgn  = simde_mm_sign_epi8(ones, ymm0);
+	    fprintf(fd,"                sgn  = simde_mm_sign_epi8(ones, ymm0);\n");
+	   //                min  = simde_mm_abs_epi8(ymm0);
+	    fprintf(fd,"                min  = simde_mm_abs_epi8(ymm0);\n");
+	  
+	  
+	    // Loop over BNs
+	    for (k=1; k<5; k++)
+	    {
+	    fprintf(fd,"                ymm0 = ((simde__m128i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[3]>>4)+lut_idxCnProcG6[j][k]*2);
+	      
+	    //                min  = simde_mm_min_epu8(min, simde_mm_abs_epi8(ymm0));
+	    fprintf(fd,"                min  = simde_mm_min_epu8(min, simde_mm_abs_epi8(ymm0));\n");
+	      
+	    //                sgn  = simde_mm_sign_epi8(sgn, ymm0);
+	    fprintf(fd,"                sgn  = simde_mm_sign_epi8(sgn, ymm0);\n");
+	    }
+	  
+      // Store result
+      //                min = simde_mm_min_epu8(min, maxLLR); // 128 in epi8 is -127
+      fprintf(fd,"                min = simde_mm_min_epu8(min, maxLLR);\n");
+      //                *p_cnProcBufResBit = simde_mm_sign_epi8(min, sgn);
+      //                p_cnProcBufResBit++;
+      fprintf(fd,"                ((simde__m128i*)cnProcBufRes)[%d+i] = simde_mm_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[3]>>4)+(j*bitOffsetInGroup));
+      fprintf(fd,"            }\n");
+	  }
+  }
+
+
+
+  // =====================================================================
+  // Process group with 8 BNs
+  fprintf(fd,"//Process group with 8 BNs\n");
+ // Offset is 2*384/32 = 24
+    const uint8_t lut_idxCnProcG8[8][7] = {{24,48,72,96,120,144,168}, {0,48,72,96,120,144,168},
+                                           {0,24,72,96,120,144,168}, {0,24,48,96,120,144,168},
+                                           {0,24,48,72,120,144,168}, {0,24,48,72,96,144,168},
+                                           {0,24,48,72,96,120,168}, {0,24,48,72,96,120,144}};
+
+
+
+
+
+
+    if (lut_numCnInCnGroups[4] > 0)
+    {
+      // Number of groups of 16 CNs for parallel processing
+      // Ceil for values not divisible by 32
+     fprintf(fd, "M = (%d*Z + 15)>>4;\n",lut_numCnInCnGroups[4] );
+
+      // Set the offset to each bit within a group in terms of 32 byte
+      bitOffsetInGroup = (lut_numCnInCnGroups_BG2_R15[4]*NR_LDPC_ZMAX)>>4;
+
+      // Loop over every BN
+      
+      for (j=0; j<8; j++)
+      {
+
+	      // Loop over CNs
+        fprintf(fd,"            for (int i=0;i<M;i++) {\n");
+        // Abs and sign of 16 CNs (first BN)
+        //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
+        fprintf(fd,"                ymm0 = ((simde__m128i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[4]>>4)+lut_idxCnProcG8[j][0]*2);
+        //                sgn  = simde_mm_sign_epi8(ones, ymm0);
+        fprintf(fd,"                sgn  = simde_mm_sign_epi8(ones, ymm0);\n");
+        //                min  = simde_mm_abs_epi8(ymm0);
+        fprintf(fd,"                min  = simde_mm_abs_epi8(ymm0);\n");
+        
+	      // Loop over BNs
+          for (k=1; k<7; k++)
+          {
+          fprintf(fd,"                ymm0 = ((simde__m128i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[4]>>4)+lut_idxCnProcG8[j][k]*2);
+            
+          //                min  = simde_mm_min_epu8(min, simde_mm_abs_epi8(ymm0));
+          fprintf(fd,"                min  = simde_mm_min_epu8(min, simde_mm_abs_epi8(ymm0));\n");
+            
+            //                sgn  = simde_mm_sign_epi8(sgn, ymm0);
+          fprintf(fd,"                sgn  = simde_mm_sign_epi8(sgn, ymm0);\n");
+          
+          }
+	  
+	        // Store result
+          //                min = simde_mm_min_epu8(min, maxLLR); // 128 in epi8 is -127
+          fprintf(fd,"                min = simde_mm_min_epu8(min, maxLLR);\n");
+          //                *p_cnProcBufResBit = simde_mm_sign_epi8(min, sgn);
+          //                p_cnProcBufResBit++;
+          fprintf(fd,"                ((simde__m128i*)cnProcBufRes)[%d+i] = simde_mm_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[4]>>4)+(j*bitOffsetInGroup));
+          fprintf(fd,"              }\n");
+        }
+    }
+
+ 
+  // =====================================================================
+  // Process group with 10 BNs
+  fprintf(fd,"//Process group with 10 BNs\n");
+
+    const uint8_t lut_idxCnProcG10[10][9] = {{24,48,72,96,120,144,168,192,216}, {0,48,72,96,120,144,168,192,216},
+                                             {0,24,72,96,120,144,168,192,216}, {0,24,48,96,120,144,168,192,216},
+                                             {0,24,48,72,120,144,168,192,216}, {0,24,48,72,96,144,168,192,216},
+                                             {0,24,48,72,96,120,168,192,216}, {0,24,48,72,96,120,144,192,216},
+                                             {0,24,48,72,96,120,144,168,216}, {0,24,48,72,96,120,144,168,192}};
+
+
+
+
+
+    if (lut_numCnInCnGroups[5] > 0)
+    {
+      // Number of groups of 16 CNs for parallel processing
+      // Ceil for values not divisible by 32
+    fprintf(fd, "M = (%d*Z + 15)>>4;\n",lut_numCnInCnGroups[5] );
+
+      // Set the offset to each bit within a group in terms of 32 byte
+      bitOffsetInGroup = (lut_numCnInCnGroups_BG2_R15[5]*NR_LDPC_ZMAX)>>4;
+
+      // Loop over every BN
+      
+      for (j=0; j<10; j++)
+      {
+
+      // Loop over CNs
+
+      fprintf(fd,"            for (int i=0;i<M;i++) {\n");
+      // Abs and sign of 16 CNs (first BN)
+        //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
+      fprintf(fd,"                ymm0 = ((simde__m128i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[5]>>4)+lut_idxCnProcG10[j][0]*2);
+        //                sgn  = simde_mm_sign_epi8(ones, ymm0);
+      fprintf(fd,"                sgn  = simde_mm_sign_epi8(ones, ymm0);\n");
+        //                min  = simde_mm_abs_epi8(ymm0);
+      fprintf(fd,"                min  = simde_mm_abs_epi8(ymm0);\n");
+        
+	  
+	  // Loop over BNs
+	     for (k=1; k<9; k++)
+	     {
+          fprintf(fd,"                ymm0 = ((simde__m128i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[5]>>4)+lut_idxCnProcG10[j][k]*2);
+            
+            //                min  = simde_mm_min_epu8(min, simde_mm_abs_epi8(ymm0));
+          fprintf(fd,"                min  = simde_mm_min_epu8(min, simde_mm_abs_epi8(ymm0));\n");
+            
+            //                sgn  = simde_mm_sign_epi8(sgn, ymm0);
+          fprintf(fd,"                sgn  = simde_mm_sign_epi8(sgn, ymm0);\n");
+        }
+	  
+          // Store result
+            //                min = simde_mm_min_epu8(min, maxLLR); // 128 in epi8 is -127
+          fprintf(fd,"                min = simde_mm_min_epu8(min, maxLLR);\n");
+            //                *p_cnProcBufResBit = simde_mm_sign_epi8(min, sgn);
+            //                p_cnProcBufResBit++;
+          fprintf(fd,"                ((simde__m128i*)cnProcBufRes)[%d+i] = simde_mm_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[5]>>4)+(j*bitOffsetInGroup));
+          fprintf(fd,"            }\n");
+      }
+    }
+
+
+  fprintf(fd,"}\n");
+  fclose(fd);
+}//end of the function  nrLDPC_cnProc_BG2
+

openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_cnProc/cnProc_gen_BG2_avx2.c

@@ -76,7 +76,7 @@ void nrLDPC_cnProc_BG2_generator_AVX2(const char* dir, int R)
     const uint8_t lut_idxCnProcG3[3][2] = {{72,144}, {0,144}, {0,72}};
 
 
-  fprintf(fd,"                __m256i ymm0, min, sgn,ones,maxLLR;\n");
+  fprintf(fd,"                simde__m256i ymm0, min, sgn,ones,maxLLR;\n");
   fprintf(fd,"                ones   = simde_mm256_set1_epi8((char)1);\n");
   fprintf(fd,"                maxLLR = simde_mm256_set1_epi8((char)127);\n");
     fprintf(fd,"                uint32_t M;\n");
@@ -99,7 +99,7 @@ void nrLDPC_cnProc_BG2_generator_AVX2(const char* dir, int R)
             fprintf(fd,"            for (int i=0;i<M;i+=2) {\n");
             // Abs and sign of 32 CNs (first BN)
             //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
-            fprintf(fd,"                ymm0 = ((__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[0]>>5)+lut_idxCnProcG3[j][0]);
+            fprintf(fd,"                ymm0 = ((simde__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[0]>>5)+lut_idxCnProcG3[j][0]);
             //                sgn  = simde_mm256_sign_epi8(ones, ymm0);
             fprintf(fd,"                sgn  = simde_mm256_sign_epi8(ones, ymm0);\n");
             //                min  = simde_mm256_abs_epi8(ymm0);
@@ -107,7 +107,7 @@ void nrLDPC_cnProc_BG2_generator_AVX2(const char* dir, int R)
             
             // 32 CNs of second BN
             //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][1] + i];
-            fprintf(fd,"                ymm0 = ((__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[0]>>5)+lut_idxCnProcG3[j][1]);
+            fprintf(fd,"                ymm0 = ((simde__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[0]>>5)+lut_idxCnProcG3[j][1]);
             
             //                min  = simde_mm256_min_epu8(min, simde_mm256_abs_epi8(ymm0));
             fprintf(fd,"                min  = simde_mm256_min_epu8(min, simde_mm256_abs_epi8(ymm0));\n");
@@ -120,11 +120,11 @@ void nrLDPC_cnProc_BG2_generator_AVX2(const char* dir, int R)
             fprintf(fd,"                min = simde_mm256_min_epu8(min, maxLLR);\n");
             //                *p_cnProcBufResBit = simde_mm256_sign_epi8(min, sgn);
             //                p_cnProcBufResBit++;
-            fprintf(fd,"                ((__m256i*)cnProcBufRes)[%d+i] = simde_mm256_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[0]>>5)+(j*bitOffsetInGroup));
+            fprintf(fd,"                ((simde__m256i*)cnProcBufRes)[%d+i] = simde_mm256_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[0]>>5)+(j*bitOffsetInGroup));
 
             // Abs and sign of 32 CNs (first BN)
             //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
-            fprintf(fd,"                ymm0 = ((__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[0]>>5)+lut_idxCnProcG3[j][0]+1);
+            fprintf(fd,"                ymm0 = ((simde__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[0]>>5)+lut_idxCnProcG3[j][0]+1);
             //                sgn  = simde_mm256_sign_epi8(ones, ymm0);
             fprintf(fd,"                sgn  = simde_mm256_sign_epi8(ones, ymm0);\n");
             //                min  = simde_mm256_abs_epi8(ymm0);
@@ -160,7 +160,7 @@ void nrLDPC_cnProc_BG2_generator_AVX2(const char* dir, int R)
           fprintf(fd,"            for (int i=0;i<M;i++) {\n");
           // Abs and sign of 32 CNs (first BN)
           //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
-          fprintf(fd,"                ymm0 = ((__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[1]>>5)+lut_idxCnProcG4[j][0]);
+          fprintf(fd,"                ymm0 = ((simde__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[1]>>5)+lut_idxCnProcG4[j][0]);
           //                sgn  = simde_mm256_sign_epi8(ones, ymm0);
            fprintf(fd,"                sgn  = simde_mm256_sign_epi8(ones, ymm0);\n");
           //                min  = simde_mm256_abs_epi8(ymm0);
@@ -170,7 +170,7 @@ void nrLDPC_cnProc_BG2_generator_AVX2(const char* dir, int R)
           // Loop over BNs
             for (k=1; k<3; k++)
             {
-            fprintf(fd,"                ymm0 = ((__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[1]>>5)+lut_idxCnProcG4[j][k]);
+            fprintf(fd,"                ymm0 = ((simde__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[1]>>5)+lut_idxCnProcG4[j][k]);
                 
             //                min  = simde_mm256_min_epu8(min, simde_mm256_abs_epi8(ymm0));
             fprintf(fd,"                min  = simde_mm256_min_epu8(min, simde_mm256_abs_epi8(ymm0));\n");
@@ -184,7 +184,7 @@ void nrLDPC_cnProc_BG2_generator_AVX2(const char* dir, int R)
             fprintf(fd,"                min = simde_mm256_min_epu8(min, maxLLR);\n");
             //                *p_cnProcBufResBit = simde_mm256_sign_epi8(min, sgn);
                 //                p_cnProcBufResBit++;
-            fprintf(fd,"                ((__m256i*)cnProcBufRes)[%d+i] = simde_mm256_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[1]>>5)+(j*bitOffsetInGroup));
+            fprintf(fd,"                ((simde__m256i*)cnProcBufRes)[%d+i] = simde_mm256_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[1]>>5)+(j*bitOffsetInGroup));
             fprintf(fd,"            }\n");
           }
       }
@@ -217,7 +217,7 @@ void nrLDPC_cnProc_BG2_generator_AVX2(const char* dir, int R)
          fprintf(fd,"            for (int i=0;i<M;i++) {\n");
         // Abs and sign of 32 CNs (first BN)
         //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
-        fprintf(fd,"                ymm0 = ((__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[2]>>5)+lut_idxCnProcG5[j][0]);
+        fprintf(fd,"                ymm0 = ((simde__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[2]>>5)+lut_idxCnProcG5[j][0]);
         //                sgn  = simde_mm256_sign_epi8(ones, ymm0);
         fprintf(fd,"                sgn  = simde_mm256_sign_epi8(ones, ymm0);\n");
         //                min  = simde_mm256_abs_epi8(ymm0);
@@ -227,7 +227,7 @@ void nrLDPC_cnProc_BG2_generator_AVX2(const char* dir, int R)
         // Loop over BNs
         for (k=1; k<4; k++)
         {
-          fprintf(fd,"                ymm0 = ((__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[2]>>5)+lut_idxCnProcG5[j][k]);
+          fprintf(fd,"                ymm0 = ((simde__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[2]>>5)+lut_idxCnProcG5[j][k]);
             
           //                min  = simde_mm256_min_epu8(min, simde_mm256_abs_epi8(ymm0));
           fprintf(fd,"                min  = simde_mm256_min_epu8(min, simde_mm256_abs_epi8(ymm0));\n");
@@ -240,7 +240,7 @@ void nrLDPC_cnProc_BG2_generator_AVX2(const char* dir, int R)
         //                min = simde_mm256_min_epu8(min, maxLLR); // 128 in epi8 is -127
         fprintf(fd,"                min = simde_mm256_min_epu8(min, maxLLR);\n");
         //                *p_cnProcBufResBit = simde_mm256_sign_epi8(min, sgn);
-        fprintf(fd,"                ((__m256i*)cnProcBufRes)[%d+i] = simde_mm256_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[2]>>5)+(j*bitOffsetInGroup));
+        fprintf(fd,"                ((simde__m256i*)cnProcBufRes)[%d+i] = simde_mm256_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[2]>>5)+(j*bitOffsetInGroup));
         fprintf(fd,"           }\n");
       }
     }
@@ -274,7 +274,7 @@ void nrLDPC_cnProc_BG2_generator_AVX2(const char* dir, int R)
 	    fprintf(fd,"            for (int i=0;i<M;i++) {\n");
 	    // Abs and sign of 32 CNs (first BN)
 	    //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
-	    fprintf(fd,"                ymm0 = ((__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[3]>>5)+lut_idxCnProcG6[j][0]);
+	    fprintf(fd,"                ymm0 = ((simde__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[3]>>5)+lut_idxCnProcG6[j][0]);
 	    //                sgn  = simde_mm256_sign_epi8(ones, ymm0);
 	    fprintf(fd,"                sgn  = simde_mm256_sign_epi8(ones, ymm0);\n");
 	   //                min  = simde_mm256_abs_epi8(ymm0);
@@ -284,7 +284,7 @@ void nrLDPC_cnProc_BG2_generator_AVX2(const char* dir, int R)
 	    // Loop over BNs
 	    for (k=1; k<5; k++)
 	    {
-	    fprintf(fd,"                ymm0 = ((__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[3]>>5)+lut_idxCnProcG6[j][k]);
+	    fprintf(fd,"                ymm0 = ((simde__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[3]>>5)+lut_idxCnProcG6[j][k]);
 	      
 	    //                min  = simde_mm256_min_epu8(min, simde_mm256_abs_epi8(ymm0));
 	    fprintf(fd,"                min  = simde_mm256_min_epu8(min, simde_mm256_abs_epi8(ymm0));\n");
@@ -298,7 +298,7 @@ void nrLDPC_cnProc_BG2_generator_AVX2(const char* dir, int R)
       fprintf(fd,"                min = simde_mm256_min_epu8(min, maxLLR);\n");
       //                *p_cnProcBufResBit = simde_mm256_sign_epi8(min, sgn);
       //                p_cnProcBufResBit++;
-      fprintf(fd,"                ((__m256i*)cnProcBufRes)[%d+i] = simde_mm256_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[3]>>5)+(j*bitOffsetInGroup));
+      fprintf(fd,"                ((simde__m256i*)cnProcBufRes)[%d+i] = simde_mm256_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[3]>>5)+(j*bitOffsetInGroup));
       fprintf(fd,"            }\n");
 	  }
   }
@@ -337,7 +337,7 @@ void nrLDPC_cnProc_BG2_generator_AVX2(const char* dir, int R)
         fprintf(fd,"            for (int i=0;i<M;i++) {\n");
         // Abs and sign of 32 CNs (first BN)
         //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
-        fprintf(fd,"                ymm0 = ((__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[4]>>5)+lut_idxCnProcG8[j][0]);
+        fprintf(fd,"                ymm0 = ((simde__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[4]>>5)+lut_idxCnProcG8[j][0]);
         //                sgn  = simde_mm256_sign_epi8(ones, ymm0);
         fprintf(fd,"                sgn  = simde_mm256_sign_epi8(ones, ymm0);\n");
         //                min  = simde_mm256_abs_epi8(ymm0);
@@ -346,7 +346,7 @@ void nrLDPC_cnProc_BG2_generator_AVX2(const char* dir, int R)
 	      // Loop over BNs
           for (k=1; k<7; k++)
           {
-          fprintf(fd,"                ymm0 = ((__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[4]>>5)+lut_idxCnProcG8[j][k]);
+          fprintf(fd,"                ymm0 = ((simde__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[4]>>5)+lut_idxCnProcG8[j][k]);
             
           //                min  = simde_mm256_min_epu8(min, simde_mm256_abs_epi8(ymm0));
           fprintf(fd,"                min  = simde_mm256_min_epu8(min, simde_mm256_abs_epi8(ymm0));\n");
@@ -361,7 +361,7 @@ void nrLDPC_cnProc_BG2_generator_AVX2(const char* dir, int R)
           fprintf(fd,"                min = simde_mm256_min_epu8(min, maxLLR);\n");
           //                *p_cnProcBufResBit = simde_mm256_sign_epi8(min, sgn);
           //                p_cnProcBufResBit++;
-          fprintf(fd,"                ((__m256i*)cnProcBufRes)[%d+i] = simde_mm256_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[4]>>5)+(j*bitOffsetInGroup));
+          fprintf(fd,"                ((simde__m256i*)cnProcBufRes)[%d+i] = simde_mm256_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[4]>>5)+(j*bitOffsetInGroup));
           fprintf(fd,"              }\n");
         }
     }
@@ -400,7 +400,7 @@ void nrLDPC_cnProc_BG2_generator_AVX2(const char* dir, int R)
       fprintf(fd,"            for (int i=0;i<M;i++) {\n");
       // Abs and sign of 32 CNs (first BN)
         //                ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
-      fprintf(fd,"                ymm0 = ((__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[5]>>5)+lut_idxCnProcG10[j][0]);
+      fprintf(fd,"                ymm0 = ((simde__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[5]>>5)+lut_idxCnProcG10[j][0]);
         //                sgn  = simde_mm256_sign_epi8(ones, ymm0);
       fprintf(fd,"                sgn  = simde_mm256_sign_epi8(ones, ymm0);\n");
         //                min  = simde_mm256_abs_epi8(ymm0);
@@ -410,7 +410,7 @@ void nrLDPC_cnProc_BG2_generator_AVX2(const char* dir, int R)
 	  // Loop over BNs
 	     for (k=1; k<9; k++)
 	     {
-          fprintf(fd,"                ymm0 = ((__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[5]>>5)+lut_idxCnProcG10[j][k]);
+          fprintf(fd,"                ymm0 = ((simde__m256i*)cnProcBuf)[%d+i];\n",(lut_startAddrCnGroups[5]>>5)+lut_idxCnProcG10[j][k]);
             
             //                min  = simde_mm256_min_epu8(min, simde_mm256_abs_epi8(ymm0));
           fprintf(fd,"                min  = simde_mm256_min_epu8(min, simde_mm256_abs_epi8(ymm0));\n");
@@ -424,7 +424,7 @@ void nrLDPC_cnProc_BG2_generator_AVX2(const char* dir, int R)
           fprintf(fd,"                min = simde_mm256_min_epu8(min, maxLLR);\n");
             //                *p_cnProcBufResBit = simde_mm256_sign_epi8(min, sgn);
             //                p_cnProcBufResBit++;
-          fprintf(fd,"                ((__m256i*)cnProcBufRes)[%d+i] = simde_mm256_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[5]>>5)+(j*bitOffsetInGroup));
+          fprintf(fd,"                ((simde__m256i*)cnProcBufRes)[%d+i] = simde_mm256_sign_epi8(min, sgn);\n",(lut_startAddrCnGroups[5]>>5)+(j*bitOffsetInGroup));
           fprintf(fd,"            }\n");
       }
     }