add phy procedure for msg4

openair1/SCHED_NR/phy_procedures_nr_gNB.c

@@ -569,7 +569,7 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
           gNB->uci_pdu_list[num_ucis].pdu_type = NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE;
           gNB->uci_pdu_list[num_ucis].pdu_size = sizeof(nfapi_nr_uci_pucch_pdu_format_0_1_t);
           nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_pdu_format0 = &gNB->uci_pdu_list[num_ucis].pucch_pdu_format_0_1;
-
+          uci_pdu_format0->rnti = pucch_pdu->rnti;
           nr_decode_pucch0(gNB,
 	                   slot_rx,
                            uci_pdu_format0,

openair1/SCHED_NR_UE/phy_procedures_nr_ue.c

@@ -875,7 +875,13 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_
       else { // This is to adjust the llr offset in the case of skipping over a dmrs symbol (i.e. in case of no PDSCH REs in DMRS)
         if (pdsch == RA_PDSCH) ue->pdsch_vars[proc->thread_id][eNB_id]->llr_offset[m]=ue->pdsch_vars[proc->thread_id][eNB_id]->llr_offset[m-1];
         else if (pdsch == PDSCH || pdsch == SI_PDSCH) {
-          if (nr_rx_pdsch(ue,
+          if (dlsch0->harq_processes[harq_pid]->n_dmrs_cdm_groups == 2) 
+          {  
+            ue->pdsch_vars[proc->thread_id][eNB_id]->llr_offset[m]=ue->pdsch_vars[proc->thread_id][eNB_id]->llr_offset[m-1];
+          }
+          else
+          {
+            if (nr_rx_pdsch(ue,
                     proc,
                     pdsch,
                     eNB_id,
@@ -888,6 +894,7 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_
                     i_mod,
                     dlsch0->current_harq_pid) < 0)
                       return -1;
+          }
         }
         else AssertFatal(1==0,"Not RA_PDSCH, SI_PDSCH or PDSCH\n");
       }
@@ -2155,7 +2162,7 @@ void nr_ue_prach_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t
 
   } else {
 
-    LOG_D(PHY, "In %s:[%d.%d] getting PRACH resources\n", __FUNCTION__, frame_tx, nr_slot_tx);
+    LOG_D(PHY, "In %s:[%d.%d] getting PRACH resources, UE mode is %d\n", __FUNCTION__, frame_tx, nr_slot_tx, ue->UE_mode[gNB_id]);
     nr_prach = nr_ue_get_rach(prach_resources, &ue->prach_vars[0]->prach_pdu, mod_id, ue->CC_id, frame_tx, gNB_id, nr_slot_tx);
 
   }

openair2/LAYER2/NR_MAC_UE/nr_ra_procedures.c

@@ -47,6 +47,10 @@
 #include "NR_MAC_COMMON/nr_mac.h"
 #include "LAYER2/NR_MAC_UE/mac_proto.h"
 
+#include "PHY/phy_extern_nr_ue.h"
+
+//#define MSG4_TEST_BY_DO_RA
+
 void nr_get_RA_window(NR_UE_MAC_INST_t *mac);
 
 // Random Access procedure initialization as per 5.1.1 and initialization of variables specific
@@ -607,9 +611,19 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources,
 
       if (ra->RA_window_cnt >= 0 && ra->RA_RAPID_found == 1) {
         // Reset RA_active flag: it disables Msg3 retransmission (8.3 of TS 38.213)
-
-        nr_ra_succeeded(mod_id, frame, nr_slot_tx);
-
+#ifdef MSG4_TEST_BY_DO_RA
+        if (1) //(get_softmodem_params()->sa)  // use sa when the branch is unblock -- SA_WAITING
+#else
+        if (get_softmodem_params()->sa)
+#endif
+        {
+          ra->ra_state = WAIT_CONTENTION_RESOLUTION;
+          ra->RA_window_cnt = -1;  
+        }
+        else
+        {
+          nr_ra_succeeded(mod_id, frame, nr_slot_tx);
+        }
       } else if (ra->RA_window_cnt == 0 && !ra->RA_RAPID_found) {
 
         LOG_I(MAC, "[UE %d][%d:%d] RAR reception failed \n", mod_id, frame, nr_slot_tx);
@@ -737,6 +751,12 @@ void nr_ra_succeeded(module_id_t mod_id, frame_t frame, int slot){
 
     ra->RA_window_cnt = -1;
 
+#ifdef MSG4_TEST_BY_DO_RA  
+    // we can delete the code when msg4 is triggered by SA RA      
+    ra->RA_contention_resolution_cnt = -1;
+    ra->RA_contention_resolution_timer_active = 0;   
+#endif    
+
   } else {
 
     LOG_I(MAC, "[UE %d][%d.%d][RAPROC] RA procedure succeeded. CB-RA: Contention Resolution is successful.\n", mod_id, frame, slot);
@@ -748,11 +768,13 @@ void nr_ra_succeeded(module_id_t mod_id, frame_t frame, int slot){
     LOG_D(MAC, "In %s: [UE %d][%d.%d] CB-RA: cleared contention resolution timer...\n", __FUNCTION__, mod_id, frame, slot);
 
   }
-
+  
   LOG_D(MAC, "In %s: [UE %d] clearing RA_active flag...\n", __FUNCTION__, mod_id);
+  ra->t_crnti = 0;
   ra->RA_active = 0;
   ra->generate_nr_prach = 2;
   ra->ra_state = RA_SUCCEEDED;
+  PHY_vars_UE_g[mod_id][0]->UE_mode[0] = PUSCH;
 
 }
 

openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c

@@ -153,6 +153,16 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
     case NR_RNTI_CS:
     break;
     case NR_RNTI_TC:
+    // we use the initial DL BWP
+    sps = initialDownlinkBWP->genericParameters.cyclicPrefix == NULL ? 14 : 12;
+    monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps));
+    rel15->rnti = ra->t_crnti;
+    rel15->BWPSize = NRRIV2BW(initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
+    rel15->BWPStart = NRRIV2PRBOFFSET(bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); //NRRIV2PRBOFFSET(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
+    rel15->SubcarrierSpacing = initialDownlinkBWP->genericParameters.subcarrierSpacing;
+    rel15->dci_length_options[0] = nr_dci_size(scc, mac->scg, def_dci_pdu_rel15, rel15->dci_format_options[0], NR_RNTI_TC, rel15->BWPSize, bwp_id);
+    LOG_D(PHY, "pdcch params: rnti %d, bwp %d %d, len %d\n",rel15->rnti, rel15->BWPSize, rel15->BWPStart, rel15->dci_length_options[0]);
+
     break;
     case NR_RNTI_SP_CSI:
     break;
@@ -252,7 +262,12 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl
               fill_dci_search_candidates(ss, rel15);
               break;
               case WAIT_CONTENTION_RESOLUTION:
-              LOG_E(MAC, "In %s: CB-RA not implemented yet. Should not have fallen in this case.\n", __FUNCTION__);
+              LOG_D(MAC, "[DCI_CONFIG] frame %d %d Configure monitoring of PDCCH candidates in Type1-PDCCH common random access search space, msg 4\n",frame,slot);
+              rel15->rnti = ra->t_crnti;
+              rel15->num_dci_options = 1; // just search the dci for msg4, should add the ul dci for retx for msg3 later.
+              rel15->dci_format_options[0] = NR_DL_DCI_FORMAT_1_0;
+              config_dci_pdu(mac, rel15, dl_config, NR_RNTI_TC, ss_id);
+              fill_dci_search_candidates(ss, rel15);  
               break;
               default:
               break;

openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c

@@ -66,6 +66,8 @@
 //#define DEBUG_EXTRACT_DCI
 //#define DEBUG_RAR
 
+#define MSG4_TEST_RANDOM_DATA
+
 int get_rnti_type(NR_UE_MAC_INST_t *mac, uint16_t rnti){
 
     RA_config_t *ra = &mac->ra;
@@ -73,10 +75,10 @@ int get_rnti_type(NR_UE_MAC_INST_t *mac, uint16_t rnti){
 
     if (rnti == ra->ra_rnti) {
       rnti_type = NR_RNTI_RA;
-    } else if (rnti == mac->crnti) {
-      rnti_type = NR_RNTI_C;
     } else if (rnti == ra->t_crnti) {
       rnti_type = NR_RNTI_TC;
+    }else if (rnti == mac->crnti) {
+      rnti_type = NR_RNTI_C;
     } else if (rnti == 0xFFFE) {
       rnti_type = NR_RNTI_P;
     } else if (rnti == 0xFFFF) {
@@ -469,7 +471,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
   AssertFatal(mac->DLbwp[0]!=NULL,"DLbwp[0] should not be zero here!\n");
   AssertFatal(mac->ULbwp[0]!=NULL,"DLbwp[0] should not be zero here!\n");
 
-  const uint16_t n_RB_DLBWP = (ra->ra_state == WAIT_RAR) ? NRRIV2BW(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE) : NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
+  const uint16_t n_RB_DLBWP = ((ra->ra_state == WAIT_RAR)||(ra->ra_state == WAIT_CONTENTION_RESOLUTION) ) ? NRRIV2BW(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE) : NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
 
   LOG_D(MAC, "In %s: Processing received DCI format %s (DL BWP %d)\n", __FUNCTION__, dci_formats[dci_format], n_RB_DLBWP);
 
@@ -740,7 +742,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
     }
 
     /* PDSCH_TO_HARQ_FEEDBACK_TIME_IND (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI)*/
-    dlsch_config_pdu_1_0->pdsch_to_harq_feedback_time_ind = dci->pdsch_to_harq_feedback_timing_indicator.val;
+    dlsch_config_pdu_1_0->pdsch_to_harq_feedback_time_ind = dci->pdsch_to_harq_feedback_timing_indicator.val + 1;
 
     LOG_D(MAC,"(nr_ue_procedures.c) rnti = %x dl_config->number_pdus = %d\n",
 	  dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti,
@@ -1137,7 +1139,7 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
   int pos=0;
   int fsize=0;
 
-  if (rnti_type == NR_RNTI_C) {
+  if ((rnti_type == NR_RNTI_C) || (rnti_type == NR_RNTI_TC)) {
     // First find out the DCI format from the first bit (UE performed blind decoding)
     pos++;
     dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1;
@@ -1173,32 +1175,32 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
       pos=fsize;
       dci_pdu_rel15->frequency_domain_assignment.val = *dci_pdu>>(dci_size-pos)&((1<<fsize)-1);
 #ifdef DEBUG_EXTRACT_DCI
-      LOG_D(MAC,"frequency-domain assignment %d (%d bits) N_RB_BWP %d=> %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment.val,fsize,N_RB,dci_size-pos,*dci_pdu);
+      LOG_I(MAC,"frequency-domain assignment %d (%d bits) N_RB_BWP %d=> %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment.val,fsize,N_RB,dci_size-pos,*dci_pdu);
 #endif
       // Time domain assignment
       pos+=4;
       dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu >> (dci_size-pos))&0xf;
 #ifdef DEBUG_EXTRACT_DCI
-      LOG_D(MAC,"time-domain assignment %d  (4 bits)=> %d (0x%lx)\n",dci_pdu_rel15->time_domain_assignment.val,dci_size-pos,*dci_pdu);
+      LOG_I(MAC,"time-domain assignment %d  (4 bits)=> %d (0x%lx)\n",dci_pdu_rel15->time_domain_assignment.val,dci_size-pos,*dci_pdu);
 #endif
       // VRB to PRB mapping
 	
       pos++;
       dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu>>(dci_size-pos))&0x1;
 #ifdef DEBUG_EXTRACT_DCI
-      LOG_D(MAC,"vrb to prb mapping %d  (1 bits)=> %d (0x%lx)\n",dci_pdu_rel15->vrb_to_prb_mapping.val,dci_size-pos,*dci_pdu);
+      LOG_I(MAC,"vrb to prb mapping %d  (1 bits)=> %d (0x%lx)\n",dci_pdu_rel15->vrb_to_prb_mapping.val,dci_size-pos,*dci_pdu);
 #endif
       // MCS
       pos+=5;
       dci_pdu_rel15->mcs = (*dci_pdu>>(dci_size-pos))&0x1f;
 #ifdef DEBUG_EXTRACT_DCI
-      LOG_D(MAC,"mcs %d  (5 bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs,dci_size-pos,*dci_pdu);
+      LOG_I(MAC,"mcs %d  (5 bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs,dci_size-pos,*dci_pdu);
 #endif
       // TB scaling
       pos+=2;
       dci_pdu_rel15->tb_scaling = (*dci_pdu>>(dci_size-pos))&0x3;
 #ifdef DEBUG_EXTRACT_DCI
-      LOG_D(MAC,"tb_scaling %d  (2 bits)=> %d (0x%lx)\n",dci_pdu_rel15->tb_scaling,dci_size-pos,*dci_pdu);
+      LOG_I(MAC,"tb_scaling %d  (2 bits)=> %d (0x%lx)\n",dci_pdu_rel15->tb_scaling,dci_size-pos,*dci_pdu);
 #endif
       break;
 
@@ -1267,7 +1269,7 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
 	dci_pdu_rel15->ndi = (*dci_pdu>>(dci_size-pos))&1;
 #ifdef DEBUG_EXTRACT_DCI
 	LOG_D(MAC,"NDI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->ndi,1,dci_size-pos,*dci_pdu);
-#endif      
+#endif
 	  
 	// Redundancy version  2bit
 	pos+=2;
@@ -1290,7 +1292,7 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
 	LOG_D(MAC,"DAI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->dai[0].val,2,dci_size-pos,*dci_pdu);
 #endif
 	  
-	// TPC command for scheduled PUCCH  2bit
+	// TPC command for scheduled PUCCH 2bit
 	pos+=2;
 	dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&3;
 #ifdef DEBUG_EXTRACT_DCI
@@ -1304,7 +1306,7 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
 	LOG_D(MAC,"PUCCH RI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->pucch_resource_indicator,3,dci_size-pos,*dci_pdu);
 #endif
 	  
-	// PDSCH-to-HARQ_feedback timing indicator 3bit
+	// PDSCH-to-HARQ_feedback timing indicator  3bit
 	pos+=3;
 	dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val = (*dci_pdu>>(dci_size-pos))&0x7;
 #ifdef DEBUG_EXTRACT_DCI
@@ -1382,38 +1384,82 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
       break;
 	
     case NR_RNTI_TC:
-      // indicating a DL DCI format 1bit
-      pos++;
-      dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1;
       // Freq domain assignment 0-16 bit
       fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
       pos+=fsize;
       dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<<fsize)-1);
+#ifdef DEBUG_EXTRACT_DCI
+      LOG_I(MAC,"Freq domain assignment %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment.val,fsize,dci_size-pos,*dci_pdu);
+#endif
+
       // Time domain assignment 4 bit
       pos+=4;
       dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0xf;
+#ifdef DEBUG_EXTRACT_DCI
+	LOG_I(MAC,"Time domain assignment %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->time_domain_assignment.val,4,dci_size-pos,*dci_pdu);
+#endif
+      pos+=1;
       // VRB to PRB mapping 1 bit
       dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu>>(dci_size-pos))&1;
+#ifdef DEBUG_EXTRACT_DCI
+	LOG_I(MAC,"VRB to PRB %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->vrb_to_prb_mapping.val,1,dci_size-pos,*dci_pdu);
+#endif
+
       // MCS 5bit  //bit over 32, so dci_pdu ++
       pos+=5;
       dci_pdu_rel15->mcs = (*dci_pdu>>(dci_size-pos))&0x1f;
+#ifdef DEBUG_EXTRACT_DCI
+	LOG_I(MAC,"MCS %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs,5,dci_size-pos,*dci_pdu);
+#endif
+
       // New data indicator 1bit
+      pos+=1;
       dci_pdu_rel15->ndi = (*dci_pdu>>(dci_size-pos))&1;
       // Redundancy version  2bit
+#ifdef DEBUG_EXTRACT_DCI
+	LOG_I(MAC,"NDI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->ndi,1,dci_size-pos,*dci_pdu);
+#endif
+
       pos+=2;
       dci_pdu_rel15->rv = (*dci_pdu>>(dci_size-pos))&3;
       // HARQ process number  4bit
+#ifdef DEBUG_EXTRACT_DCI
+	LOG_I(MAC,"RV %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->rv,2,dci_size-pos,*dci_pdu);
+#endif
+
       pos+=4;
       dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf;
-      // Downlink assignment index  E2 bits
+#ifdef DEBUG_EXTRACT_DCI
+	LOG_I(MAC,"HARQ_PID %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->harq_pid,4,dci_size-pos,*dci_pdu);
+#endif
+
+      // Downlink assignment index 2 bits
       pos+=2;
       dci_pdu_rel15->dai[0].val = (*dci_pdu>>(dci_size-pos))&3;
-      // TPC command for scheduled PUCCH  E2 bits
+#ifdef DEBUG_EXTRACT_DCI
+	LOG_I(MAC,"DAI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->dai[0].val,2,dci_size-pos,*dci_pdu);
+#endif
+
+      // TPC command for scheduled PUCCH 2 bits
       pos+=2;
       dci_pdu_rel15->tpc  = (*dci_pdu>>(dci_size-pos))&3;
-      // PDSCH-to-HARQ_feedback timing indicator  E3 bits
+#ifdef DEBUG_EXTRACT_DCI
+	LOG_I(MAC,"TPC %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->tpc,2,dci_size-pos,*dci_pdu);
+#endif
+
+      // pucch_resource_indicator indicator 3 bits
+      pos+=3;
+      dci_pdu_rel15->pucch_resource_indicator = (*dci_pdu>>(dci_size-pos))&7;
+#ifdef DEBUG_EXTRACT_DCI
+	LOG_I(MAC,"PUCCH RESOURCE INDICATOR %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->pucch_resource_indicator,3,dci_size-pos,*dci_pdu);
+#endif
+
+      // PDSCH-to-HARQ_feedback timing indicator 3 bits
       pos+=3;
       dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val = (*dci_pdu>>(dci_size-pos))&7;
+#ifdef DEBUG_EXTRACT_DCI
+	LOG_I(MAC,"PDSCH to HARQ TI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val,3,dci_size-pos,*dci_pdu);
+#endif
        
       break;
     }
@@ -1886,9 +1932,13 @@ void nr_ue_process_mac_pdu(nr_downlink_indication_t *dl_info,
                 LOG_I(MAC, "[UE %d][RAPROC] Frame %d : received contention resolution msg: %x.%x.%x.%x.%x.%x, Terminating RA procedure\n", module_idP, frameP, pduP[0], pduP[1], pduP[2], pduP[3], pduP[4], pduP[5]);
 
                 if (ra->RA_active == 1) {
+                  mac->crnti = ra->t_crnti;
                   nr_ra_succeeded(module_idP, frameP, slot);
                 }
-
+#ifdef MSG4_TEST_RANDOM_DATA
+    // return here because the msg4 is random data for this version
+                return;   // don't check other LCHs
+#endif                
                 break;
             case DL_SCH_LCID_PADDING:
                 done = 1;

openair2/LAYER2/NR_MAC_gNB/config.c

@@ -398,7 +398,7 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
 
     NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info;
     if (add_ue == 1 && get_softmodem_params()->phy_test) {
-      const int UE_id = add_new_nr_ue(Mod_idP, rnti, secondaryCellGroup);
+      const int UE_id = add_new_nr_ue(Mod_idP, rnti, secondaryCellGroup, true);
       LOG_I(PHY,"Added new UE_id %d/%x with initial secondaryCellGroup\n",UE_id,rnti);
     } else if (add_ue == 1 && !get_softmodem_params()->phy_test) {
       /* TODO: should check for free RA process */

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c

@@ -50,6 +50,8 @@ uint8_t DELTA[4]= {2,3,4,6};
 #define MAX_NUMBER_OF_SSB 64		
 float ssb_per_rach_occasion[8] = {0.125,0.25,0.5,1,2,4,8};
 
+#define MSG4_TEST_RANDOM_DATA
+
 int16_t ssb_index_from_prach(module_id_t module_idP,
                              frame_t frameP,
 			     sub_frame_t slotP,
@@ -423,6 +425,46 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot,
 }
 
 
+void
+nr_check_Msg4_Ack(module_id_t module_id,
+                  int CC_id,
+                 frame_t frame,
+                 sub_frame_t slot) {
+  gNB_MAC_INST          *nr_mac = RC.nrmac[module_id];
+  NR_COMMON_channels_t  *cc = &nr_mac->common_channels[CC_id];
+  NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info;
+  NR_RA_t *ra = &cc->ra[0];
+  NR_list_t *UE_list = &UE_info->list;
+  /* Loop UE_info->list to check retransmission */
+  int UE_id;
+  for ( UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) {
+    if (UE_info->rnti[UE_id] == ra->rnti)
+      break; 
+  }
+
+  NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
+  const int current_harq_pid = ra->harq_pid;
+  NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid];
+
+  LOG_D(MAC, "ue %d, rnti %d, harq is waiting %d, round %d, frame %d %d, harq id %d\n", UE_id, ra->rnti, harq->is_waiting, harq->round, frame, slot, current_harq_pid);
+
+  if (harq->is_waiting == 0)
+  {
+      if ( harq->round == 0)
+      {
+          ra->state = IDLE;
+          UE_info->connected[UE_id] = true;
+          free(ra->preambles.preamble_list);
+          LOG_I(MAC, "ue %d, rnti %d is connected, frame %d %d\n", UE_id, ra->rnti, frame, slot);
+      }
+      else
+      {
+          ra->state = Msg4;
+      }
+  }  
+}
+
+
 void nr_initiate_ra_proc(module_id_t module_idP,
                          int CC_id,
                          frame_t frameP,
@@ -562,10 +604,15 @@ void nr_schedule_RA(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
       nr_generate_Msg2(module_idP, CC_id, frameP, slotP);
       break;
     case Msg4:
-      //generate_Msg4(module_idP, CC_id, frameP, slotP);
+      if (ra->Msg4_frame == frameP && ra->Msg4_slot == slotP )
+          {
+            LOG_I(PHY, "sent msg4: %d %d\n", ra->Msg4_frame, ra->Msg4_slot);
+            nr_generate_Msg4(module_idP, CC_id, frameP, slotP);
+          }
       break;
     case WAIT_Msg4_ACK:
-      //check_Msg4_retransmission(module_idP, CC_id, frameP, slotP);
+      LOG_D(PHY, "check msg4: %d %d\n", frameP, slotP);
+      nr_check_Msg4_Ack(module_idP, CC_id, frameP, slotP);
       break;
     default:
     break;
@@ -1005,6 +1052,663 @@ void nr_generate_Msg2(module_id_t module_idP,
   }
 }
 
+
+void alloc_msg4_resouce(module_id_t module_id,
+           frame_t frame,
+           sub_frame_t slot,
+           NR_list_t *UE_list,
+           int n_rb_sched,
+           uint8_t *rballoc_mask
+           ) {
+  const int CC_id = 0;
+  gNB_MAC_INST                      *nr_mac = RC.nrmac[module_id];
+  NR_COMMON_channels_t              *cc = &nr_mac->common_channels[CC_id];
+  NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info;
+  NR_RA_t *ra = &cc->ra[0];
+  int UE_id;
+  /* Loop UE_info->list to check retransmission */
+  for ( UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) {
+    if (UE_info->rnti[UE_id] == ra->rnti)
+      break; 
+  }
+    NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
+
+    sched_ctrl->search_space = ra->ra_ss;
+    LOG_D(PHY, " %d, %d,  UE id %d, rnti %d %d\n", frame , slot, UE_id, UE_info->rnti[UE_id], ra->rnti);
+    sched_ctrl->coreset = get_coreset(sched_ctrl->active_bwp, sched_ctrl->search_space, 0/* common */);
+  
+    /* get the PID of a HARQ process awaiting retrnasmission, or -1 otherwise */
+    sched_ctrl->dl_harq_pid = sched_ctrl->retrans_dl_harq.head;
+    const rnti_t rnti = UE_info->rnti[UE_id];
+
+    /* retransmission */
+    if (sched_ctrl->dl_harq_pid >= 0) {
+      /* Find a free CCE */
+      bool freeCCE = find_free_CCE(module_id, slot, UE_id);
+      if (!freeCCE){
+        LOG_D(MAC, "%4d.%2d could not find CCE for DL DCI retransmission UE %d/RNTI %04x\n", frame, slot, UE_id, rnti);
+        return;
+      }
+      /* Find PUCCH occasion: if it fails, undo CCE allocation (undoing PUCCH
+       * allocation after CCE alloc fail would be more complex) */
+      const bool alloc = nr_acknack_scheduling(module_id, UE_id, frame, slot, 0);
+      if (!alloc) {
+        LOG_W(MAC,
+              "%s(): could not find PUCCH for UE %d/%04x@%d.%d\n",
+              __func__,
+              UE_id,
+              rnti,
+              frame,
+              slot);
+        int cid = sched_ctrl->coreset->controlResourceSetId;
+        UE_info->num_pdcch_cand[UE_id][cid]--;
+        int *cce_list = RC.nrmac[module_id]->cce_list[sched_ctrl->active_bwp->bwp_Id][cid];
+        for (int i = 0; i < sched_ctrl->aggregation_level; i++)
+          cce_list[sched_ctrl->cce_index + i] = 0;
+        return;
+      }
+      /* Allocate retransmission */
+      bool r = allocate_retransmission(module_id, rballoc_mask, &n_rb_sched, UE_id, sched_ctrl->dl_harq_pid);
+      if (!r) {
+        LOG_D(MAC, "%4d.%2d retransmission can NOT be allocated\n", frame, slot);
+        return;
+      }
+    } else {
+#ifdef MSG4_TEST_RANDOM_DATA
+      int rrc_sdu_length = 500;
+      sched_ctrl->num_total_bytes += rrc_sdu_length;
+#else  
+      /*
+      rrc_sdu_length = mac_rrc_data_req(module_idP, CC_idP, frameP, CCCH,
+                                            UE_RNTI(module_idP,UE_id),1,  // 1 transport block
+                                            &cc[CC_idP].CCCH_pdu.payload[0], 0);  // not used in this case
+      */
+#endif
+      if (sched_ctrl->num_total_bytes == 0)
+      return;
+      LOG_D(MAC,
+                "[gNB %d][RAPROC] CC_id %d Frame %d, slot %d: UE_id %d, rrc_sdu_length %d\n",
+                module_id, CC_id, frame, slot, UE_id, rrc_sdu_length);
+      /* Check DL buffer and skip this UE if no bytes and no TA necessary */
+      if (sched_ctrl->num_total_bytes == 0)
+        return;
+ 
+      NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
+      const uint16_t rnti = UE_info->rnti[UE_id];
+      const uint16_t bwpSize = NRRIV2BW(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
+      int rbStart = NRRIV2PRBOFFSET(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
+
+      /* Find a free CCE */
+      bool freeCCE = find_free_CCE(module_id, slot, UE_id);
+      if (!freeCCE) {
+        LOG_D(MAC, "%4d.%2d could not find CCE for DL DCI UE %d/RNTI %04x\n", frame, slot, UE_id, rnti);
+        return;
+      }
+
+      /* Find PUCCH occasion: if it fails, undo CCE allocation (undoing PUCCH
+      * allocation after CCE alloc fail would be more complex) */
+      const bool alloc = nr_acknack_scheduling(module_id, UE_id, frame, slot, 0);
+      if (!alloc) {
+        LOG_W(MAC,
+              "%s(): could not find PUCCH for UE %d/%04x@%d.%d\n",
+              __func__,
+              UE_id,
+              rnti,
+              frame,
+              slot);
+        int cid = sched_ctrl->coreset->controlResourceSetId;
+        UE_info->num_pdcch_cand[UE_id][cid]--;
+        int *cce_list = RC.nrmac[module_id]->cce_list[sched_ctrl->active_bwp->bwp_Id][cid];
+        for (int i = 0; i < sched_ctrl->aggregation_level; i++)
+          cce_list[sched_ctrl->cce_index + i] = 0;
+        return;
+      }
+
+      /* Allocate transmission */
+      // Time-domain allocation
+      sched_ctrl->time_domain_allocation = 2;
+
+      // modulation scheme
+      sched_ctrl->mcsTableIdx = 0;
+      sched_ctrl->mcs = 9;
+      sched_ctrl->numDmrsCdmGrpsNoData = 2;
+
+      // Freq-demain allocation
+      while (rbStart < bwpSize && !rballoc_mask[rbStart]) rbStart++;
+
+      const uint8_t N_PRB_DMRS =
+          getN_PRB_DMRS(sched_ctrl->active_bwp, sched_ctrl->numDmrsCdmGrpsNoData);
+      const int nrOfSymbols = getNrOfSymbols(sched_ctrl->active_bwp,
+          sched_ctrl->time_domain_allocation);
+      const NR_ServingCellConfigCommon_t *scc = RC.nrmac[module_id]->common_channels->ServingCellConfigCommon;
+      const uint8_t N_DMRS_SLOT = get_num_dmrs_symbols(
+          sched_ctrl->active_bwp->bwp_Dedicated->pdsch_Config->choice.setup,
+          scc->dmrs_TypeA_Position,
+          nrOfSymbols);
+
+      int rbSize = 0;
+      uint32_t TBS = 0;
+      const int oh = 2 + (sched_ctrl->num_total_bytes >= 256)
+                    + 1 + 6; // UE Contention Resolution Identity CE for msg4
+
+      do {
+        rbSize++;
+        TBS = nr_compute_tbs(nr_get_Qm_dl(sched_ctrl->mcs, sched_ctrl->mcsTableIdx),
+                              nr_get_code_rate_dl(sched_ctrl->mcs, sched_ctrl->mcsTableIdx),
+                              rbSize,
+                              nrOfSymbols,
+                              N_PRB_DMRS * N_DMRS_SLOT,
+                              0 /* N_PRB_oh, 0 for initialBWP */,
+                              0 /* tb_scaling */,
+                              1 /* nrOfLayers */)
+              >> 3;
+      } while (rbStart + rbSize < bwpSize && rballoc_mask[rbStart + rbSize] && TBS < sched_ctrl->num_total_bytes + oh);
+      sched_ctrl->rbSize = rbSize;
+      sched_ctrl->rbStart = rbStart;
+
+      /* transmissions: directly allocate */
+      n_rb_sched -= sched_ctrl->rbSize;
+      for (int rb = 0; rb < sched_ctrl->rbSize; rb++)
+        rballoc_mask[rb+sched_ctrl->rbStart] = 0;
+
+        }
+      return; // just process the UE in MSG4 process.
+  
+}
+
+void nr_simple_dlsch_preprocessor_msg4(module_id_t module_id,
+                                  frame_t frame,
+                                  sub_frame_t slot) {
+  NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info;
+
+  if (UE_info->num_UEs == 0)
+    return;
+
+  const int CC_id = 0;
+
+
+  /* Get bwpSize from the first UE */
+  int UE_id = UE_info->list.head;
+  NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
+  const uint16_t bwpSize = NRRIV2BW(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
+
+  uint16_t *vrb_map = RC.nrmac[module_id]->common_channels[CC_id].vrb_map;
+  uint8_t rballoc_mask[bwpSize];
+  int n_rb_sched = 0;
+  for (int i = 0; i < bwpSize; i++) {
+    // calculate mask: init with "NOT" vrb_map:
+    // if any RB in vrb_map is blocked (1), the current RBG will be 0
+    rballoc_mask[i] = !vrb_map[i];
+    n_rb_sched += rballoc_mask[i];
+  }
+
+  alloc_msg4_resouce(module_id,
+        frame,
+        slot,
+        &UE_info->list,
+        n_rb_sched,
+        rballoc_mask
+        );
+}
+
+void
+nr_get_retransmission_timing(
+                          frame_t *frameP,
+                          sub_frame_t *subframeP)
+//------------------------------------------------------------------------------
+{
+  *frameP = (*frameP + 1) % 1024;
+  *subframeP = *subframeP;
+  return;
+}
+
+void nr_generate_Msg4(module_id_t module_id,
+                         int     CC_id, 
+                         frame_t frame,
+                         sub_frame_t slot) {
+  gNB_MAC_INST *gNB_mac = RC.nrmac[module_id];
+  NR_COMMON_channels_t                  *cc = &gNB_mac->common_channels[CC_id];
+  /* PREPROCESSOR */
+  gNB_mac->pre_processor_dl_msg4(module_id, frame, slot);
+
+
+  NR_ServingCellConfigCommon_t *scc = gNB_mac->common_channels[CC_id].ServingCellConfigCommon;
+  NR_UE_info_t *UE_info = &gNB_mac->UE_info;
+
+  nfapi_nr_dl_tti_request_body_t *dl_req = &gNB_mac->DL_req[CC_id].dl_tti_request_body;
+
+  NR_list_t *UE_list = &UE_info->list;
+  NR_RA_t *ra = &cc->ra[0];
+  /* Loop UE_info->list to check retransmission */
+  int UE_id;
+  for ( UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) {
+    if (UE_info->rnti[UE_id] == ra->rnti)
+      break; 
+  }
+
+    NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
+    UE_info->mac_stats[UE_id].dlsch_current_bytes = 0;
+
+    if (sched_ctrl->rbSize <= 0)
+      return;
+
+    const rnti_t rnti = UE_info->rnti[UE_id];
+
+    /* POST processing */
+    struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList =
+      sched_ctrl->active_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
+    AssertFatal(sched_ctrl->time_domain_allocation < tdaList->list.count,
+                "time_domain_allocation %d>=%d\n",
+                sched_ctrl->time_domain_allocation,
+                tdaList->list.count);
+
+    const int startSymbolAndLength =
+      tdaList->list.array[sched_ctrl->time_domain_allocation]->startSymbolAndLength;
+    int startSymbolIndex, nrOfSymbols;
+    SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
+
+    uint8_t N_PRB_DMRS =
+        getN_PRB_DMRS(sched_ctrl->active_bwp, sched_ctrl->numDmrsCdmGrpsNoData);
+    uint8_t N_DMRS_SLOT = get_num_dmrs_symbols(sched_ctrl->active_bwp->bwp_Dedicated->pdsch_Config->choice.setup,
+                                               RC.nrmac[module_id]->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position ,
+                                               nrOfSymbols);
+    const nfapi_nr_dmrs_type_e dmrsConfigType = getDmrsConfigType(sched_ctrl->active_bwp);
+    const int nrOfLayers = 1;
+    const uint16_t R = nr_get_code_rate_dl(sched_ctrl->mcs, sched_ctrl->mcsTableIdx);
+    const uint8_t Qm = nr_get_Qm_dl(sched_ctrl->mcs, sched_ctrl->mcsTableIdx);
+    const uint32_t TBS =
+        nr_compute_tbs(nr_get_Qm_dl(sched_ctrl->mcs, sched_ctrl->mcsTableIdx),
+                       nr_get_code_rate_dl(sched_ctrl->mcs, sched_ctrl->mcsTableIdx),
+                       sched_ctrl->rbSize,
+                       nrOfSymbols,
+                       N_PRB_DMRS * N_DMRS_SLOT,
+                       0 /* N_PRB_oh, 0 for initialBWP */,
+                       0 /* tb_scaling */,
+                       nrOfLayers)
+        >> 3;
+
+    int8_t current_harq_pid = sched_ctrl->dl_harq_pid;
+    if (current_harq_pid < 0) {
+      /* PP has not selected a specific HARQ Process, get a new one */
+      current_harq_pid = sched_ctrl->available_dl_harq.head;
+      AssertFatal(current_harq_pid >= 0,
+                  "no free HARQ process available for UE %d\n",
+                  UE_id);
+      remove_front_nr_list(&sched_ctrl->available_dl_harq);
+      sched_ctrl->dl_harq_pid = current_harq_pid;
+    } else {
+      /* PP selected a specific HARQ process. Check whether it will be a new
+       * transmission or a retransmission, and remove from the corresponding
+       * list */
+      if (sched_ctrl->harq_processes[current_harq_pid].round == 0)
+        remove_nr_list(&sched_ctrl->available_dl_harq, current_harq_pid);
+      else
+        remove_nr_list(&sched_ctrl->retrans_dl_harq, current_harq_pid);
+    }
+    NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid];
+    DevAssert(!harq->is_waiting);
+    add_tail_nr_list(&sched_ctrl->feedback_dl_harq, current_harq_pid);
+    NR_sched_pucch_t *pucch = &sched_ctrl->sched_pucch[0];
+    harq->feedback_slot = pucch->ul_slot;
+    harq->is_waiting = true;
+    UE_info->mac_stats[UE_id].dlsch_rounds[harq->round]++;
+
+    LOG_D(MAC,
+          "%4d.%2d RNTI %04x start %d RBs %d startSymbol %d nb_symbsol %d MCS %d TBS %d HARQ PID %d round %d NDI %d\n",
+          frame,
+          slot,
+          rnti,
+          sched_ctrl->rbStart,
+          sched_ctrl->rbSize,
+          startSymbolIndex,
+          nrOfSymbols,
+          sched_ctrl->mcs,
+          TBS,
+          current_harq_pid,
+          harq->round,
+          harq->ndi);
+
+    NR_BWP_Downlink_t *bwp = sched_ctrl->active_bwp;
+    AssertFatal(bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList,
+                "searchSpacesToAddModList is null\n");
+    AssertFatal(bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list.count > 0,
+                "searchSPacesToAddModList is empty\n");
+
+    const int coresetid = sched_ctrl->coreset->controlResourceSetId;
+    nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu = gNB_mac->pdcch_pdu_idx[CC_id][bwp->bwp_Id][coresetid];
+    if (!pdcch_pdu) {
+      nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdcch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
+      memset(dl_tti_pdcch_pdu, 0, sizeof(nfapi_nr_dl_tti_request_pdu_t));
+      dl_tti_pdcch_pdu->PDUType = NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE;
+      dl_tti_pdcch_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu));
+      dl_req->nPDUs += 1;
+      pdcch_pdu = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15;
+      nr_configure_pdcch(pdcch_pdu, sched_ctrl->search_space, sched_ctrl->coreset, scc, bwp);
+      gNB_mac->pdcch_pdu_idx[CC_id][bwp->bwp_Id][coresetid] = pdcch_pdu;
+    }
+
+    nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
+    memset(dl_tti_pdsch_pdu, 0, sizeof(nfapi_nr_dl_tti_request_pdu_t));
+    dl_tti_pdsch_pdu->PDUType = NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE;
+    dl_tti_pdsch_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdsch_pdu));
+    dl_req->nPDUs += 1;
+    nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu = &dl_tti_pdsch_pdu->pdsch_pdu.pdsch_pdu_rel15;
+
+    pdsch_pdu->pduBitmap = 0;
+    pdsch_pdu->rnti = rnti;
+    /* SCF222: PDU index incremented for each PDSCH PDU sent in TX control
+     * message. This is used to associate control information to data and is
+     * reset every slot. */
+    const int pduindex = gNB_mac->pdu_index[CC_id]++;
+    pdsch_pdu->pduIndex = pduindex;
+
+    // BWP
+    pdsch_pdu->BWPSize  = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
+    pdsch_pdu->BWPStart = NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
+    //pdsch_pdu->BWPStart = NRRIV2PRBOFFSET(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,MAX_BWP_SIZE);
+    pdsch_pdu->SubcarrierSpacing = bwp->bwp_Common->genericParameters.subcarrierSpacing;
+    if (bwp->bwp_Common->genericParameters.cyclicPrefix)
+      pdsch_pdu->CyclicPrefix = *bwp->bwp_Common->genericParameters.cyclicPrefix;
+    else
+      pdsch_pdu->CyclicPrefix = 0;
+
+    // Codeword information
+    pdsch_pdu->NrOfCodewords = 1;
+    pdsch_pdu->targetCodeRate[0] = R;
+    pdsch_pdu->qamModOrder[0] = Qm;
+    pdsch_pdu->mcsIndex[0] = sched_ctrl->mcs;
+    pdsch_pdu->mcsTable[0] = sched_ctrl->mcsTableIdx;
+    pdsch_pdu->rvIndex[0] = nr_rv_round_map[harq->round];
+    pdsch_pdu->TBSize[0] = TBS;
+
+    pdsch_pdu->dataScramblingId = *scc->physCellId;
+    pdsch_pdu->nrOfLayers = nrOfLayers;
+    pdsch_pdu->transmissionScheme = 0;
+    pdsch_pdu->refPoint = 0; // Point A
+
+    // DMRS
+    pdsch_pdu->dlDmrsSymbPos =
+        fill_dmrs_mask(bwp->bwp_Dedicated->pdsch_Config->choice.setup,
+                       scc->dmrs_TypeA_Position,
+                       nrOfSymbols);
+    pdsch_pdu->dmrsConfigType = dmrsConfigType;
+    pdsch_pdu->dlDmrsScramblingId = *scc->physCellId;
+    pdsch_pdu->SCID = 0;
+    pdsch_pdu->numDmrsCdmGrpsNoData = sched_ctrl->numDmrsCdmGrpsNoData;
+    pdsch_pdu->dmrsPorts = 1;
+
+    // Pdsch Allocation in frequency domain
+    pdsch_pdu->resourceAlloc = 1;
+    pdsch_pdu->rbStart = sched_ctrl->rbStart;
+    pdsch_pdu->rbSize = sched_ctrl->rbSize;
+    pdsch_pdu->VRBtoPRBMapping = 1; // non-interleaved, check if this is ok for initialBWP
+
+    // Resource Allocation in time domain
+    pdsch_pdu->StartSymbolIndex = startSymbolIndex;
+    pdsch_pdu->NrOfSymbols = nrOfSymbols;
+
+
+    /* Fill PDCCH DL DCI PDU */
+    nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu->dci_pdu[pdcch_pdu->numDlDci];
+    pdcch_pdu->numDlDci++;
+    dci_pdu->RNTI = rnti;
+    if (sched_ctrl->coreset->pdcch_DMRS_ScramblingID &&
+        sched_ctrl->search_space->searchSpaceType->present == NR_SearchSpace__searchSpaceType_PR_ue_Specific) {
+      dci_pdu->ScramblingId = *sched_ctrl->coreset->pdcch_DMRS_ScramblingID;
+      dci_pdu->ScramblingRNTI = rnti;
+    } else {
+      dci_pdu->ScramblingId = *scc->physCellId;
+      dci_pdu->ScramblingRNTI = 0;
+    }
+    dci_pdu->AggregationLevel = sched_ctrl->aggregation_level;
+    dci_pdu->CceIndex = sched_ctrl->cce_index;
+    dci_pdu->beta_PDCCH_1_0 = 0;
+    dci_pdu->powerControlOffsetSS = 1;
+
+    /* DCI payload */
+    dci_pdu_rel15_t dci_payload;
+    memset(&dci_payload, 0, sizeof(dci_pdu_rel15_t));
+
+    AssertFatal(bwp->bwp_Dedicated->pdsch_Config->choice.setup->resourceAllocation == NR_PDSCH_Config__resourceAllocation_resourceAllocationType1,
+                "Only frequency resource allocation type 1 is currently supported\n");
+    dci_payload.frequency_domain_assignment.val =
+        PRBalloc_to_locationandbandwidth0(
+            pdsch_pdu->rbSize,
+            pdsch_pdu->rbStart,
+            pdsch_pdu->BWPSize);
+    dci_payload.time_domain_assignment.val = sched_ctrl->time_domain_allocation;
+    dci_payload.mcs = sched_ctrl->mcs;
+    dci_payload.rv = pdsch_pdu->rvIndex[0];
+    dci_payload.harq_pid = current_harq_pid;
+    dci_payload.ndi = harq->ndi;
+    dci_payload.dai[0].val = (pucch->dai_c-1)&3;
+    dci_payload.tpc = sched_ctrl->tpc1; // TPC for PUCCH: table 7.2.1-1 in 38.213
+    dci_payload.pucch_resource_indicator = pucch->resource_indicator;
+    dci_payload.pdsch_to_harq_feedback_timing_indicator.val = pucch->timing_indicator; // PDSCH to HARQ TI
+    dci_payload.antenna_ports.val = 0;  // nb of cdm groups w/o data 1 and dmrs port 0
+    dci_payload.dmrs_sequence_initialization.val = pdsch_pdu->SCID;
+    LOG_D(MAC,
+          "%4d.%2d DCI type 1 payload: freq_alloc %d (%d,%d,%d), "
+          "time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d ndi %d rv %d\n",
+          frame,
+          slot,
+          dci_payload.frequency_domain_assignment.val,
+          pdsch_pdu->rbStart,
+          pdsch_pdu->rbSize,
+          pdsch_pdu->BWPSize,
+          dci_payload.time_domain_assignment.val,
+          dci_payload.vrb_to_prb_mapping.val,
+          dci_payload.mcs,
+          dci_payload.tb_scaling,
+          dci_payload.ndi,
+          dci_payload.rv);
+
+    const int dci_format = NR_DL_DCI_FORMAT_1_0;
+    const int rnti_type = NR_RNTI_TC;
+
+    fill_dci_pdu_rel15(scc,
+                       UE_info->secondaryCellGroup[UE_id],
+                       dci_pdu,
+                       &dci_payload,
+                       dci_format,
+                       rnti_type,
+                       pdsch_pdu->BWPSize,
+                       bwp->bwp_Id);
+
+    LOG_D(MAC,
+          "coreset params: FreqDomainResource %llx, start_symbol %d  n_symb %d\n",
+          (unsigned long long)pdcch_pdu->FreqDomainResource,
+          pdcch_pdu->StartSymbolIndex,
+          pdcch_pdu->DurationSymbols);
+
+    NR_UE_ret_info_t *retInfo = &sched_ctrl->retInfo[current_harq_pid];
+    if (harq->round != 0) { /* retransmission */
+      if (sched_ctrl->rbSize != retInfo->rbSize)
+        LOG_W(MAC,
+              "retransmission uses different rbSize (%d vs. orig %d)\n",
+              sched_ctrl->rbSize,
+              retInfo->rbSize);
+      if (sched_ctrl->time_domain_allocation != retInfo->time_domain_allocation)
+        LOG_W(MAC,
+              "retransmission uses different time_domain_allocation (%d vs. orig %d)\n",
+              sched_ctrl->time_domain_allocation,
+              retInfo->time_domain_allocation);
+      if (sched_ctrl->mcs != retInfo->mcs
+          || sched_ctrl->mcsTableIdx != retInfo->mcsTableIdx
+          || sched_ctrl->numDmrsCdmGrpsNoData != retInfo->numDmrsCdmGrpsNoData)
+        LOG_W(MAC,
+              "retransmission uses different table/MCS/numDmrsCdmGrpsNoData (%d/%d/%d vs. orig %d/%d/%d)\n",
+              sched_ctrl->mcsTableIdx,
+              sched_ctrl->mcs,
+              sched_ctrl->numDmrsCdmGrpsNoData,
+              retInfo->mcsTableIdx,
+              retInfo->mcs,
+              retInfo->numDmrsCdmGrpsNoData);
+      /* we do not have to do anything, since we do not require to get data
+       * from RLC or encode MAC CEs. The TX_req structure is filled below 
+       * or copy data to FAPI structures */
+      LOG_D(MAC,
+            "%d.%2d DL retransmission UE %d/RNTI %04x HARQ PID %d round %d NDI %d\n",
+            frame,
+            slot,
+            UE_id,
+            rnti,
+            current_harq_pid,
+            harq->round,
+            harq->ndi);
+      AssertFatal(harq->tb_size == TBS,
+                  "UE %d mismatch between scheduled TBS and buffered TB for HARQ PID %d\n",
+                  UE_id,
+                  current_harq_pid);
+    } else { /* initial transmission */
+
+      LOG_D(MAC, "[%s] Initial HARQ transmission in %d.%d\n", __FUNCTION__, frame, slot);
+
+      harq->tb_size = TBS;
+      uint8_t *buf = (uint8_t *) harq->tb;
+
+      /* first, write all CEs that might be there */
+      int written = nr_write_ce_dlsch_pdu(module_id,
+                                          sched_ctrl,
+                                          (unsigned char *)buf,
+                                          255, // no drx
+                                          ra->cont_res_id); // contention res id
+      buf += written;
+      int size = TBS - written;
+      DevAssert(size >= 0);
+
+      /* next, get RLC data */
+
+      const int lcid = DL_SCH_LCID_CCCH;
+      int dlsch_total_bytes = 0;
+      if (sched_ctrl->num_total_bytes > 0) {
+        tbs_size_t len = 0;
+        while (size > 3) {
+          // we do not know how much data we will get from RLC, i.e., whether it
+          // will be longer than 256B or not. Therefore, reserve space for long header, then
+          // fetch data, then fill real length
+        
+#ifdef MSG4_TEST_RANDOM_DATA
+        LOG_I(MAC, "Configuring DL_TX in %d.%d: random data\n", frame, slot);
+        // fill dlsch_buffer with random data       
+        NR_MAC_SUBHEADER_LONG *header = (NR_MAC_SUBHEADER_LONG *) buf;
+        buf += 3;
+        size -= 3;
+        header->R = 0;
+        header->F = 1;
+        header->LCID = lcid;
+        header->L1 = (size >> 8) & 0xff;
+        header->L2 = size & 0xff;
+            
+        for (int i = 0; i < size; i++)
+          buf[i] = (unsigned char) (lrand48()&0xff);
+        dlsch_total_bytes += len;
+        size -= size;
+
+
+
+#else
+        sdu_lengths[num_sdus] = mac_rrc_data_req(module_id, CC_idP, frameP, CCCH,
+                                        UE_RNTI(module_idP,UE_id),1,  // 1 transport block
+                                        &cc[CC_idP].CCCH_pdu.payload[0], 1);  
+
+
+        LOG_D(MAC,
+              "[gNB %d][USER-PLANE DEFAULT DRB] Got %d bytes for DTCH %d \n",
+              module_id,
+              sdu_lengths[num_sdus],
+              lcid);
+
+        sdu_lcids[num_sdus] = lcid;
+        sdu_length_total += sdu_lengths[num_sdus];
+        header_length_last = 1 + 1 + (sdu_lengths[num_sdus] >= 128);
+        header_length_total += header_length_last;
+
+        num_sdus++;
+#endif
+        }
+      }
+      else if (get_softmodem_params()->phy_test || get_softmodem_params()->do_ra) {
+        /* we will need the large header, phy-test typically allocates all
+         * resources and fills to the last byte below */
+        NR_MAC_SUBHEADER_LONG *header = (NR_MAC_SUBHEADER_LONG *) buf;
+        buf += 3;
+        size -= 3;
+        DevAssert(size > 0);
+        LOG_D(MAC, "Configuring DL_TX in %d.%d: TBS %d with %d B of random data\n", frame, slot, TBS, size);
+        // fill dlsch_buffer with random data
+        for (int i = 0; i < size; i++)
+          buf[i] = lrand48() & 0xff;
+        header->R = 0;
+        header->F = 1;
+        header->LCID = DL_SCH_LCID_PADDING;
+        header->L1 = (size >> 8) & 0xff;
+        header->L2 = size & 0xff;
+        size -= size;
+        buf += size;
+        dlsch_total_bytes += size;
+      }
+
+      // Add padding header and zero rest out if there is space left
+      if (size > 0) {
+        NR_MAC_SUBHEADER_FIXED *padding = (NR_MAC_SUBHEADER_FIXED *) buf;
+        padding->R = 0;
+        padding->LCID = DL_SCH_LCID_PADDING;
+        size -= 1;
+        buf += 1;
+        while (size > 0) {
+          *buf = 0;
+          buf += 1;
+          size -= 1;
+        }
+      }
+
+      UE_info->mac_stats[UE_id].dlsch_total_bytes += TBS;
+      UE_info->mac_stats[UE_id].dlsch_current_bytes = TBS;
+      UE_info->mac_stats[UE_id].lc_bytes_tx[lcid] += dlsch_total_bytes;
+
+      retInfo->rbSize = sched_ctrl->rbSize;
+      retInfo->time_domain_allocation = sched_ctrl->time_domain_allocation;
+      retInfo->mcsTableIdx = sched_ctrl->mcsTableIdx;
+      retInfo->mcs = sched_ctrl->mcs;
+      retInfo->numDmrsCdmGrpsNoData = sched_ctrl->numDmrsCdmGrpsNoData;
+
+      // ta command is sent, values are reset
+      if (sched_ctrl->ta_apply) {
+        sched_ctrl->ta_apply = false;
+        sched_ctrl->ta_frame = frame;
+        LOG_D(MAC,
+              "%d.%2d UE %d TA scheduled, resetting TA frame\n",
+              frame,
+              slot,
+              UE_id);
+      }
+
+      T(T_GNB_MAC_DL_PDU_WITH_DATA, T_INT(module_id), T_INT(CC_id), T_INT(rnti),
+        T_INT(frame), T_INT(slot), T_INT(current_harq_pid), T_BUFFER(harq->tb, TBS));
+    }
+
+    const int ntx_req = gNB_mac->TX_req[CC_id].Number_of_PDUs;
+    nfapi_nr_pdu_t *tx_req = &gNB_mac->TX_req[CC_id].pdu_list[ntx_req];
+    tx_req->PDU_length = TBS;
+    tx_req->PDU_index  = pduindex;
+    tx_req->num_TLV = 1;
+    tx_req->TLVs[0].length = TBS + 2;
+    memcpy(tx_req->TLVs[0].value.direct, harq->tb, TBS);
+    gNB_mac->TX_req[CC_id].Number_of_PDUs++;
+    gNB_mac->TX_req[CC_id].SFN = frame;
+    gNB_mac->TX_req[CC_id].Slot = slot;
+
+    /* mark UE as scheduled */
+    sched_ctrl->rbSize = 0;
+
+    nr_get_retransmission_timing(&ra->Msg4_frame, &ra->Msg4_slot);
+    ra->state = WAIT_Msg4_ACK;
+    LOG_D(MAC, "retrx time for msg4 is %d %d\n", ra->Msg4_frame, ra->Msg4_slot);
+
+}
+
+
 void nr_clear_ra_proc(module_id_t module_idP, int CC_id, frame_t frameP){
   
   NR_RA_t *ra = &RC.nrmac[module_idP]->common_channels[CC_id].ra[0];
@@ -1110,3 +1814,5 @@ void nr_fill_rar(uint8_t Mod_idP,
   rar->UL_GRANT_4 = (uint8_t) ul_grant & 0xff;
 
 }
+
+

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c

@@ -341,9 +341,12 @@ void nr_store_dlsch_buffer(module_id_t module_id,
     NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
 
     sched_ctrl->num_total_bytes = 0;
-    const int lcid = DL_SCH_LCID_DTCH;
-    const uint16_t rnti = UE_info->rnti[UE_id];
-    sched_ctrl->rlc_status[lcid] = mac_rlc_status_ind(module_id,
+        const uint16_t rnti = UE_info->rnti[UE_id];
+    if (UE_info->connected[UE_id] == 1) // only check connected UE 
+    {
+      const int lcid = DL_SCH_LCID_DTCH;
+
+      sched_ctrl->rlc_status[lcid] = mac_rlc_status_ind(module_id,
                                                       rnti,
                                                       module_id,
                                                       frame,
@@ -353,8 +356,8 @@ void nr_store_dlsch_buffer(module_id_t module_id,
                                                       lcid,
                                                       0,
                                                       0);
-    sched_ctrl->num_total_bytes += sched_ctrl->rlc_status[lcid].bytes_in_buffer;
-    LOG_D(MAC,
+      sched_ctrl->num_total_bytes += sched_ctrl->rlc_status[lcid].bytes_in_buffer;
+      LOG_D(MAC,
           "[%s][%d.%d], DTCH%d->DLSCH, RLC status %d bytes TA %d\n",
           __func__,
           frame,
@@ -362,6 +365,7 @@ void nr_store_dlsch_buffer(module_id_t module_id,
           lcid,
           sched_ctrl->rlc_status[lcid].bytes_in_buffer,
           sched_ctrl->ta_apply);
+    }
   }
 }
 
@@ -450,7 +454,7 @@ void pf_dl(module_id_t module_id,
       }
       /* Find PUCCH occasion: if it fails, undo CCE allocation (undoing PUCCH
        * allocation after CCE alloc fail would be more complex) */
-      const bool alloc = nr_acknack_scheduling(module_id, UE_id, frame, slot);
+      const bool alloc = nr_acknack_scheduling(module_id, UE_id, frame, slot, 1);
       if (!alloc) {
         LOG_W(MAC,
               "%s(): could not find PUCCH for UE %d/%04x@%d.%d\n",
@@ -543,7 +547,7 @@ void pf_dl(module_id_t module_id,
 
     /* Find PUCCH occasion: if it fails, undo CCE allocation (undoing PUCCH
     * allocation after CCE alloc fail would be more complex) */
-    const bool alloc = nr_acknack_scheduling(module_id, UE_id, frame, slot);
+    const bool alloc = nr_acknack_scheduling(module_id, UE_id, frame, slot, 1);
     if (!alloc) {
       LOG_W(MAC,
             "%s(): could not find PUCCH for UE %d/%04x@%d.%d\n",

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c

@@ -329,7 +329,7 @@ void nr_preprocessor_phytest(module_id_t module_id,
               __func__,
               UE_id);
 
-  const bool alloc = nr_acknack_scheduling(module_id, UE_id, frame, slot);
+  const bool alloc = nr_acknack_scheduling(module_id, UE_id, frame, slot, 1);
   if (!alloc) {
     LOG_D(MAC,
           "%s(): could not find PUCCH for UE %d/%04x@%d.%d\n",

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c

@@ -210,7 +210,7 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac,
 
   return(first_cce);
 
-}
+  }
 
 void nr_save_pusch_fields(const NR_ServingCellConfigCommon_t *scc,
                           const NR_BWP_Uplink_t *ubwp,
@@ -563,6 +563,7 @@ void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu,
                         NR_ServingCellConfigCommon_t *scc,
                         NR_BWP_Downlink_t *bwp)
 {
+  int sps;
   if (bwp) { // This is not the InitialBWP
     pdcch_pdu->BWPSize  = NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
     pdcch_pdu->BWPStart = NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
@@ -571,7 +572,19 @@ void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu,
 
     // first symbol
     //AssertFatal(pdcch_scs==kHz15, "PDCCH SCS above 15kHz not allowed if a symbol above 2 is monitored");
-    int sps = bwp->bwp_Common->genericParameters.cyclicPrefix == NULL ? 14 : 12;
+    sps = bwp->bwp_Common->genericParameters.cyclicPrefix == NULL ? 14 : 12;
+
+  }
+  else { // this is for InitialBWP
+    pdcch_pdu->BWPSize  = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,275);
+    pdcch_pdu->BWPStart = NRRIV2PRBOFFSET(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,275);
+    pdcch_pdu->SubcarrierSpacing = scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing;
+    pdcch_pdu->CyclicPrefix = (scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.cyclicPrefix==NULL) ? 0 : *scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.cyclicPrefix;
+    // first symbol
+    //AssertFatal(pdcch_scs==kHz15, "PDCCH SCS above 15kHz not allowed if a symbol above 2 is monitored");
+    sps = scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.cyclicPrefix == NULL ? 14 : 12;
+
+  }
 
     AssertFatal(ss->monitoringSymbolsWithinSlot!=NULL,"ss->monitoringSymbolsWithinSlot is null\n");
     AssertFatal(ss->monitoringSymbolsWithinSlot->buf!=NULL,"ss->monitoringSymbolsWithinSlot->buf is null\n");
@@ -617,10 +630,6 @@ void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu,
 
     //precoderGranularity
     pdcch_pdu->precoderGranularity = coreset->precoderGranularity;
-  }
-  else { // this is for InitialBWP
-    AssertFatal(1==0,"Fill in InitialBWP PDCCH configuration\n");
-  }
 }
 
 
@@ -1130,41 +1139,75 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
       LOG_D(PHY, "dci_pdu_rel15->system_info_indicator = %i\n", dci_pdu_rel15->system_info_indicator);
       break;
 
-    case NR_RNTI_TC:
-      // indicating a DL DCI format 1bit
-      *dci_pdu |= ((uint64_t)dci_pdu_rel15->format_indicator & 1) << (dci_size - pos++);
-      // Freq domain assignment 0-16 bit
-      fsize = (int)ceil(log2((N_RB * (N_RB + 1)) >> 1));
-      for (int i = 0; i < fsize; i++)
-        *dci_pdu |= (((uint64_t)dci_pdu_rel15->frequency_domain_assignment.val >> (fsize - i - 1)) & 1) << (dci_size - pos++);
-      // Time domain assignment 4 bit
-      for (int i = 0; i < 4; i++)
-        *dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment.val >> (3 - i)) & 1) << (dci_size - pos++);
-      // VRB to PRB mapping 1 bit
-      *dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping.val & 1) << (dci_size - pos++);
-      // MCS 5bit  //bit over 32, so dci_pdu ++
-      for (int i = 0; i < 5; i++)
-        *dci_pdu |= (((uint64_t)dci_pdu_rel15->mcs >> (4 - i)) & 1) << (dci_size - pos++);
-      // New data indicator 1bit
-      *dci_pdu |= ((uint64_t)dci_pdu_rel15->ndi & 1) << (dci_size - pos++);
-      // Redundancy version  2bit
-      for (int i = 0; i < 2; i++)
-        *dci_pdu |= (((uint64_t)dci_pdu_rel15->rv >> (1 - i)) & 1) << (dci_size - pos++);
-      // HARQ process number  4bit
-      for (int i = 0; i < 4; i++)
-        *dci_pdu |= (((uint64_t)dci_pdu_rel15->harq_pid >> (3 - i)) & 1) << (dci_size - pos++);
-      // Downlink assignment index – 2 bits
-      for (int i = 0; i < 2; i++)
-        *dci_pdu |= (((uint64_t)dci_pdu_rel15->dai[0].val >> (1 - i)) & 1) << (dci_size - pos++);
-      // TPC command for scheduled PUCCH – 2 bits
-      for (int i = 0; i < 2; i++)
-        *dci_pdu |= (((uint64_t)dci_pdu_rel15->tpc >> (1 - i)) & 1) << (dci_size - pos++);
-      // PDSCH-to-HARQ_feedback timing indicator – 3 bits
-      for (int i = 0; i < 3; i++)
-        *dci_pdu |= (((uint64_t)dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val >> (2 - i)) & 1) << (dci_size - pos++);
+  case NR_RNTI_TC:
+  dci_pdu_rel15->format_indicator = 1;
+	// indicating a DL DCI format 1bit
+
+  pos=1;
+  *dci_pdu |= ((uint64_t)dci_pdu_rel15->format_indicator&0x1)<<(dci_size-pos);
+  LOG_D(MAC,"format indicator %d (%d bits)=> %d (0x%lx), dci size %d\n",dci_pdu_rel15->format_indicator,1,dci_size-pos,*dci_pdu, dci_size);
+  
+	// Freq domain assignment 0-16 bit
+ 	fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
+  pos += fsize;
+  *dci_pdu |= ((uint64_t)dci_pdu_rel15->frequency_domain_assignment.val&((1<<fsize)-1)) << (dci_size-pos);
+	LOG_D(MAC,"Freq domain assignment %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment.val,fsize,dci_size-pos,*dci_pdu);
+
+	// Time domain assignment 4 bit
+  pos += 4;
+  *dci_pdu |= ((uint64_t)dci_pdu_rel15->time_domain_assignment.val&0xf) << (dci_size-pos);
+  LOG_D(MAC,"Time domain assignment %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->time_domain_assignment.val,4,dci_size-pos,*dci_pdu);
+	
+  // VRB to PRB mapping 1 bit
+  pos += 1;
+	*dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping.val&1)<<(dci_size-pos);
+  LOG_D(MAC,"VRB to PRB %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->vrb_to_prb_mapping.val,1,dci_size-pos,*dci_pdu);
+	
+  // MCS 5bit  //bit over 32, so dci_pdu ++
+	pos+=5;
+	*dci_pdu |= ((uint64_t)dci_pdu_rel15->mcs&0x1f)<<(dci_size-pos);
+  LOG_D(MAC,"MCS %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs,5,dci_size-pos,*dci_pdu);
+
+	// New data indicator 1bit
+  pos += 1;
+	*dci_pdu |= ((uint64_t)dci_pdu_rel15->ndi&1)<<(dci_size-pos);
+  LOG_D(MAC,"NDI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->ndi,1,dci_size-pos,*dci_pdu);
+
+	// Redundancy version  2bit
+	pos += 2;
+	*dci_pdu |= ((uint64_t)dci_pdu_rel15->rv&0x3)<<(dci_size-pos);
+  LOG_D(MAC,"RV %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->rv,2,dci_size-pos,*dci_pdu);
+
+	// HARQ process number  4bit
+	pos += 4;
+	*dci_pdu  |= ((uint64_t)dci_pdu_rel15->harq_pid&0xf)<<(dci_size-pos);
+	LOG_D(MAC,"HARQ_PID %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->harq_pid,4,dci_size-pos,*dci_pdu);
+	
+  // Downlink assignment index – 2 bits
+	pos += 2;
+	*dci_pdu  |= ((uint64_t)dci_pdu_rel15->dai[0].val&0x3)<<(dci_size-pos);
+	LOG_D(MAC,"DAI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->dai[0].val,2,dci_size-pos,*dci_pdu);
+
+	// TPC command for scheduled PUCCH – 2 bits
+	pos += 2;
+	*dci_pdu  |= ((uint64_t)dci_pdu_rel15->tpc&0x3)<<(dci_size-pos);
+	LOG_D(MAC,"TPC %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->tpc,2,dci_size-pos,*dci_pdu);
+	
+	//      LOG_D(MAC, "DCI PDU: [0]->0x%08llx \t [1]->0x%08llx \t [2]->0x%08llx \t [3]->0x%08llx\n",
+	//	    dci_pdu[0], dci_pdu[1], dci_pdu[2], dci_pdu[3]);
+	
+	// pucch_resource_indicator – 3 bits
+	pos += 3;
+	*dci_pdu  |= ((uint64_t)dci_pdu_rel15->pucch_resource_indicator&0x7)<<(dci_size-pos);
+	LOG_D(MAC,"pucch_resource_indicator %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->pucch_resource_indicator,3,dci_size-pos,*dci_pdu);
+
+	// PDSCH-to-HARQ_feedback timing indicator – 3 bits
+	pos += 3;
+	*dci_pdu  |= ((uint64_t)dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val&0x7)<<(dci_size-pos);
+	LOG_D(MAC,"PDSCH to HARQ TI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val,3,dci_size-pos,*dci_pdu);
+	break;
+      }
       break;
-    }
-    break;
 
   case NR_UL_DCI_FORMAT_0_0:
     switch (rnti_type) {
@@ -1614,7 +1657,7 @@ int get_nrofHARQ_ProcessesForPDSCH(e_NR_PDSCH_ServingCellConfig__nrofHARQ_Proces
 }
 
 //------------------------------------------------------------------------------
-int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP, NR_CellGroupConfig_t *secondaryCellGroup)
+int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP, NR_CellGroupConfig_t *secondaryCellGroup, bool isConnected)
 {
   NR_UE_info_t *UE_info = &RC.nrmac[mod_idP]->UE_info;
   LOG_I(MAC, "[gNB %d] Adding UE with rnti %x (num_UEs %d)\n",
@@ -1630,6 +1673,7 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP, NR_CellGroupConfig_t *secon
     int UE_id = i;
     UE_info->num_UEs++;
     UE_info->active[UE_id] = true;
+    UE_info->connected[UE_id] = isConnected;  // be true when msg4 is ACKed
     UE_info->rnti[UE_id] = rntiP;
     UE_info->secondaryCellGroup[UE_id] = secondaryCellGroup;
     add_nr_list(&UE_info->list, UE_id);
@@ -1811,8 +1855,19 @@ bool find_free_CCE(module_id_t module_id,
                               &nr_of_candidates,
                               sched_ctrl->search_space);
   const int cid = sched_ctrl->coreset->controlResourceSetId;
-  const uint16_t Y = RC.nrmac[module_id]->UE_info.Y[UE_id][cid][slot];
-  const int m = RC.nrmac[module_id]->UE_info.num_pdcch_cand[UE_id][cid];
+  uint16_t Y; 
+  int m;
+  
+  if (RC.nrmac[module_id]->UE_info.connected[UE_id] == true)
+  {
+    Y = RC.nrmac[module_id]->UE_info.Y[UE_id][cid][slot];
+    m = RC.nrmac[module_id]->UE_info.num_pdcch_cand[UE_id][cid];
+  }
+  else
+  {
+    Y = 0;
+    m = 0;
+  }
   sched_ctrl->cce_index = allocate_nr_CCEs(RC.nrmac[module_id],
                                            sched_ctrl->active_bwp,
                                            sched_ctrl->coreset,

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c

@@ -420,7 +420,8 @@ void handle_nr_uci_pucch_2_3_4(module_id_t mod_id,
 bool nr_acknack_scheduling(int mod_id,
                            int UE_id,
                            frame_t frame,
-                           sub_frame_t slot)
+                           sub_frame_t slot,
+                           int isUEspec)
 {
   const NR_ServingCellConfigCommon_t *scc = RC.nrmac[mod_id]->common_channels->ServingCellConfigCommon;
   const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
@@ -494,7 +495,15 @@ bool nr_acknack_scheduling(int mod_id,
     return false;
 
   // this is hardcoded for now as ue specific
-  NR_SearchSpace__searchSpaceType_PR ss_type = NR_SearchSpace__searchSpaceType_PR_ue_Specific;
+  NR_SearchSpace__searchSpaceType_PR ss_type;
+  if( isUEspec == 1)
+  {
+      ss_type = NR_SearchSpace__searchSpaceType_PR_ue_Specific;
+  }
+  else
+  {
+      ss_type = NR_SearchSpace__searchSpaceType_PR_common;
+  }
   uint8_t pdsch_to_harq_feedback[8];
   get_pdsch_to_harq_feedback(mod_id, UE_id, ss_type, pdsch_to_harq_feedback);
 
@@ -520,7 +529,7 @@ bool nr_acknack_scheduling(int mod_id,
       memset(pucch, 0, sizeof(*pucch));
       pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f;
       pucch->ul_slot = (s + 1) % n_slots_frame;
-      return nr_acknack_scheduling(mod_id, UE_id, frame, slot);
+      return nr_acknack_scheduling(mod_id, UE_id, frame, slot, isUEspec);
     }
 
     pucch->timing_indicator = i;

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c

@@ -33,6 +33,8 @@
 #include "executables/softmodem-common.h"
 #include "common/utils/nr/nr_common.h"
 
+//#define MSG4_TEST_BY_DO_RA
+
 //38.321 Table 6.1.3.1-1
 const uint32_t NR_SHORT_BSR_TABLE[32] = {
     0,    10,    14,    20,    28,     38,     53,     74,
@@ -471,7 +473,12 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
               current_rnti);
         continue;
       }
-      const int UE_id = add_new_nr_ue(gnb_mod_idP, ra->rnti, ra->secondaryCellGroup);
+#ifdef MSG4_TEST_BY_DO_RA      
+      bool isConnected = false; // (get_softmodem_params()->sa ? false:true); // use sa when the branch is unblock -- SA_WAITING
+#else
+      bool isConnected = get_softmodem_params()->sa ? false:true; 
+#endif 
+      const int UE_id = add_new_nr_ue(gnb_mod_idP, ra->rnti, ra->secondaryCellGroup, isConnected);
       UE_info->UE_beam_index[UE_id] = ra->beam_id;
       LOG_I(MAC,
             "[gNB %d][RAPROC] PUSCH with TC_RNTI %x received correctly, "
@@ -483,13 +490,22 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
       // re-initialize ta update variables afrer RA procedure completion
       UE_info->UE_sched_ctrl[UE_id].ta_frame = frameP;
 
-      free(ra->preambles.preamble_list);
-      ra->state = RA_IDLE;
-      LOG_I(MAC,
-            "reset RA state information for RA-RNTI %04x/index %d\n",
-            ra->rnti,
-            i);
-
+      if (isConnected) // NSA mode
+      {
+        free(ra->preambles.preamble_list);
+        ra->state = RA_IDLE;
+        LOG_I(MAC,
+              "reset RA state information for RA-RNTI %04x/index %d\n",
+              ra->rnti,
+              i);
+      }
+      else  // SA mode
+      {
+        ra->state = Msg4;
+        ra->Msg4_frame = ( frameP +2 ) % 1024;
+        ra->Msg4_slot = 1;
+        LOG_I(MAC, "set RA state to Msg4 for RA-RNTI %04x, msg4 frame %d %d\n", ra->rnti, ra->Msg4_frame, ra->Msg4_slot);
+      }
       return;
     }
   }

openair2/LAYER2/NR_MAC_gNB/mac_proto.h

@@ -81,7 +81,10 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t subfra
 void nr_simple_dlsch_preprocessor(module_id_t module_id,
                                   frame_t frame,
                                   sub_frame_t slot);
-
+/* \brief default preprocessor */
+void nr_simple_dlsch_preprocessor_msg4(module_id_t module_id,
+                                  frame_t frame,
+                                  sub_frame_t slot);
 void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP, uint8_t slots_per_frame);
 
 /// uplink scheduler
@@ -192,7 +195,8 @@ void nr_csi_meas_reporting(int Mod_idP,
 bool nr_acknack_scheduling(int Mod_idP,
                            int UE_id,
                            frame_t frameP,
-                           sub_frame_t slotP);
+                           sub_frame_t slotP,
+                           int isUEspec);
 
 void get_pdsch_to_harq_feedback(int Mod_idP,
                                 int UE_id,
@@ -307,7 +311,7 @@ int find_nr_UE_id(module_id_t mod_idP, rnti_t rntiP);
 
 int find_nr_RA_id(module_id_t mod_idP, int CC_idP, rnti_t rntiP);
 
-int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP, NR_CellGroupConfig_t *secondaryCellGroup);
+int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP, NR_CellGroupConfig_t *secondaryCellGroup, bool isConnected);
 
 void mac_remove_nr_ue(module_id_t mod_id, rnti_t rnti);
 
@@ -352,6 +356,27 @@ void nr_generate_Msg2(module_id_t module_idP,
                       frame_t frameP,
                       sub_frame_t slotP);
 
+void nr_generate_Msg4(module_id_t module_id,
+                      int     CC_id, 
+                      frame_t frame,
+                      sub_frame_t slot);
+void nr_check_Msg4_Ack(module_id_t module_id,
+                       int CC_id,
+                       frame_t frame,
+                       sub_frame_t slot);
+bool allocate_retransmission(module_id_t module_id,
+                             uint8_t *rballoc_mask,
+                             int *n_rb_sched,
+                             int UE_id,
+                             int current_harq_pid);                 
+uint8_t getN_PRB_DMRS(NR_BWP_Downlink_t *bwp, int numDmrsCdmGrpsNoData);
+nfapi_nr_dmrs_type_e getDmrsConfigType(NR_BWP_Downlink_t *bwp);
+int nr_write_ce_dlsch_pdu(module_id_t module_idP,
+                          const NR_UE_sched_ctrl_t *ue_sched_ctl,
+                          unsigned char *mac_pdu,
+                          unsigned char drx_cmd,
+                          unsigned char *ue_cont_res_id);
+int getNrOfSymbols(NR_BWP_Downlink_t *bwp, int tda);
 void nr_process_mac_pdu(
     module_id_t module_idP,
     rnti_t rnti,

openair2/LAYER2/NR_MAC_gNB/main.c

@@ -85,8 +85,9 @@ void mac_top_init_gNB(void)
         RC.nrmac[i]->pre_processor_dl = nr_preprocessor_phytest;
         RC.nrmac[i]->pre_processor_ul = nr_ul_preprocessor_phytest;
       } else {
-        RC.nrmac[i]->pre_processor_dl = nr_simple_dlsch_preprocessor;
-        RC.nrmac[i]->pre_processor_ul = nr_simple_ulsch_preprocessor;
+        RC.nrmac[i]->pre_processor_dl      = nr_simple_dlsch_preprocessor;
+        RC.nrmac[i]->pre_processor_dl_msg4 = nr_simple_dlsch_preprocessor_msg4;
+        RC.nrmac[i]->pre_processor_ul      = nr_simple_ulsch_preprocessor;
       }
 
     }//END for (i = 0; i < RC.nb_nr_macrlc_inst; i++)
@@ -116,6 +117,7 @@ void mac_top_init_gNB(void)
     create_nr_list(&UE_info->list, MAX_MOBILES_PER_GNB);
     for (list_el = 0; list_el < MAX_MOBILES_PER_GNB; list_el++) {
       UE_info->active[list_el] = false;
+      UE_info->connected[list_el] = false;
     }
   }
 

openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h

@@ -501,6 +501,7 @@ typedef struct {
   int num_UEs;
 
   bool active[MAX_MOBILES_PER_GNB];
+  bool connected[MAX_MOBILES_PER_GNB]; // reuse active or not for ue status?
   rnti_t rnti[MAX_MOBILES_PER_GNB];
   NR_CellGroupConfig_t *secondaryCellGroup[MAX_MOBILES_PER_GNB];
   /// CCE indexing
@@ -596,6 +597,7 @@ typedef struct gNB_MAC_INST_s {
 
   /// DL preprocessor for differentiated scheduling
   nr_pp_impl_dl pre_processor_dl;
+  nr_pp_impl_dl pre_processor_dl_msg4;
   /// UL preprocessor for differentiated scheduling
   nr_pp_impl_ul pre_processor_ul;