Temporary commit for tests

cmake_targets/autotests/test_case_list.xml

@@ -193,15 +193,17 @@
                                  (Test3: 106 MCS-TABLE 256 QAM MCS Index 26),
                                  (Test4: MCS 0, low SNR performance),
                                  (Test5: 4x4 MIMO, 1 Layer),
-                                 (Test6: 4x4 MIMO, 2 Layers)</desc>
+                                 (Test6: 4x4 MIMO, 2 Layers),
+                                 (Test7: 4x4 MIMO, 4 Layers)</desc>
       <main_exec>nr_dlsim</main_exec>
       <main_exec_args>-n100 -e27 -s30
                       -n100 -e16 -s10
                       -n100 -q1 -e26 -s30
                       -n100 -e0 -t95 -S-1.0 -i 2 1 0
-                      -n10 -s20 -U 3 0 0 2 -gR -x1 -y4 -z4
-                      -n10 -s20 -U 3 0 0 2 -gR -x2 -y4 -z4</main_exec_args>
-      <tags>test1 test2 test3 test4 test5 test6</tags>
+                      -n10 -s20 -gR -x1 -y4 -z4
+                      -n10 -s20 -gR -x2 -y4 -z4
+                      -n100 -s20 -x4 -y4 -z4</main_exec_args>
+      <tags>test1 test2 test3 test4 test5 test6 test7</tags>
       <search_expr_true>PDSCH test OK</search_expr_true>
       <search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
       <nruns>3</nruns>
@@ -399,12 +401,16 @@
     <testCase id="nr_ulsim.mimo">
       <desc>nr_ulsim Test cases. (Test1: MCS 19 50 PRBs 2 RX_Antenna),
                                  (Test2: MCS 9 106 PRBs MIMO 2 layers),
-                                 (Test3: MCS 9 106 PRBs MIMO 4 layers)</desc>
+                                 (Test3: MCS 10 106 PRBs MIMO 2 layers),
+                                 (Test4: MCS 19 106 PRBs MIMO 2 layers),
+                                 (Test5: MCS 9 106 PRBs MIMO 4 layers)</desc>
       <main_exec>nr_ulsim</main_exec>
       <main_exec_args>-n100 -m19 -s10 -S15 -z2
                       -n100 -m9 -r106 -s8 -W2 -y2 -z2
+                      -n100 -m10 -r106 -s12 -W2 -y2 -z2
+                      -n100 -m19 -r106 -s22 -W2 -y2 -z2
                       -n100 -m9 -r106 -s10 -W4 -y4 -z4</main_exec_args>
-      <tags>test1 test2 test3</tags>
+      <tags>test1 test2 test3 test4 test5</tags>
       <search_expr_true>PUSCH test OK</search_expr_true>
       <search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
       <nruns>3</nruns>
@@ -436,30 +442,30 @@
                                  (Test23: 3GPP G-FR1-A5-14, PUSCH Type B, 100 MHz BW, 30 kHz SCS, 4 RX Antennas Requirements Test),
                                  (Test24: 3GPP G-FR1-A5-14, PUSCH Type B, 100 MHz BW, 30 kHz SCS, 8 RX Antennas Requirements Test)</desc>
       <main_exec>nr_ulsim</main_exec>
-      <main_exec_args>-n100 -b14 -I15 -i 1,1 -g A,l -t70 -u 1 -m20 -R106 -r106 -U 0,1,1,2 -z2 -s12.4 -S12.4
-                      -n100 -b14 -I15 -i 1,1 -g A,l -t70 -u 1 -m20 -R106 -r106 -U 0,1,1,2 -z4 -s8.5 -S8.5
-                      -n100 -b14 -I15 -i 1,1 -g A,l -t70 -u 1 -m20 -R106 -r106 -U 0,1,1,2 -z8 -s5.4 -S5.4
-                      -n100 -b14 -I15 -i 1,1 -g A,l -t70 -u 0 -m20 -R25 -r25 -U 1,1,1,2 -z2 -s12.5 -S12.5
-                      -n100 -b14 -I15 -i 1,1 -g A,l -t70 -u 0 -m20 -R25 -r25 -U 1,1,1,2 -z4 -s8.9 -S8.9
-                      -n100 -b14 -I15 -i 1,1 -g A,l -t70 -u 0 -m20 -R25 -r25 -U 1,1,1,2 -z8 -s5.7 -S5.7
-                      -n100 -b14 -I15 -i 1,1 -g A,l -t70 -u 0 -m20 -R52 -r52 -U 1,1,1,2 -z2 -s12.6 -S12.6
-                      -n100 -b14 -I15 -i 1,1 -g A,l -t70 -u 0 -m20 -R52 -r52 -U 1,1,1,2 -z4 -s8.9 -S8.9
-                      -n100 -b14 -I15 -i 1,1 -g A,l -t70 -u 0 -m20 -R52 -r52 -U 1,1,1,2 -z8 -s5.8 -S5.8
-                      -n100 -b14 -I15 -i 1,1 -g A,l -t70 -u 0 -m20 -R106 -r106 -U 1,1,1,2 -z2 -s12.3 -S12.3
-                      -n100 -b14 -I15 -i 1,1 -g A,l -t70 -u 0 -m20 -R106 -r106 -U 1,1,1,2 -z4 -s8.8 -S8.8
-                      -n100 -b14 -I15 -i 1,1 -g A,l -t70 -u 0 -m20 -R106 -r106 -U 1,1,1,2 -z8 -s5.7 -S5.7
-                      -n100 -b14 -I15 -i 1,1 -g A,l -t70 -u 1 -m20 -R24 -r24 -U 1,1,1,2 -z2 -s12.5 -S12.5
-                      -n100 -b14 -I15 -i 1,1 -g A,l -t70 -u 1 -m20 -R24 -r24 -U 1,1,1,2 -z4 -s8.6 -S8.6
-                      -n100 -b14 -I15 -i 1,1 -g A,l -t70 -u 1 -m20 -R24 -r24 -U 1,1,1,2 -z8 -s5.6 -S5.6
-                      -n100 -b14 -I15 -i 1,1 -g A,l -t70 -u 1 -m20 -R51 -r51 -U 1,1,1,2 -z2 -s12.5 -S12.5
-                      -n100 -b14 -I15 -i 1,1 -g A,l -t70 -u 1 -m20 -R51 -r51 -U 1,1,1,2 -z4 -s8.6 -S8.6
-                      -n100 -b14 -I15 -i 1,1 -g A,l -t70 -u 1 -m20 -R51 -r51 -U 1,1,1,2 -z8 -s5.6 -S5.6
-                      -n100 -b14 -I15 -i 1,1 -g A,l -t70 -u 1 -m20 -R106 -r106 -U 1,1,1,2 -z2 -s12.5 -S12.5
-                      -n100 -b14 -I15 -i 1,1 -g A,l -t70 -u 1 -m20 -R106 -r106 -U 1,1,1,2 -z4 -s8.7 -S8.7
-                      -n100 -b14 -I15 -i 1,1 -g A,l -t70 -u 1 -m20 -R106 -r106 -U 1,1,1,2 -z8 -s5.5 -S5.5
-                      -n100 -b14 -I15 -i 1,1 -g A,l -t70 -u 1 -m20 -R273 -r273 -U 1,1,1,2 -z2 -s13.1 -S13.1
-                      -n100 -b14 -I15 -i 1,1 -g A,l -t70 -u 1 -m20 -R273 -r273 -U 1,1,1,2 -z4 -s9.2 -S9.2
-                      -n100 -b14 -I15 -i 1,1 -g A,l -t70 -u 1 -m20 -R273 -r273 -U 1,1,1,2 -z8 -s5.9 -S5.9</main_exec_args>
+      <main_exec_args>-n100 -b14 -I15 -i 0,1 -g A,l -t70 -u 1 -m20 -R106 -r106 -U 0,1,1,2 -z2 -s12.4 -S12.4
+                      -n100 -b14 -I15 -i 0,1 -g A,l -t70 -u 1 -m20 -R106 -r106 -U 0,1,1,2 -z4 -s8.5 -S8.5
+                      -n100 -b14 -I15 -i 0,1 -g A,l -t70 -u 1 -m20 -R106 -r106 -U 0,1,1,2 -z8 -s5.4 -S5.4
+                      -n100 -b14 -I15 -i 0,1 -g A,l -t70 -u 0 -m20 -R25 -r25 -U 1,1,1,2 -z2 -s12.5 -S12.5
+                      -n100 -b14 -I15 -i 0,1 -g A,l -t70 -u 0 -m20 -R25 -r25 -U 1,1,1,2 -z4 -s8.9 -S8.9
+                      -n100 -b14 -I15 -i 0,1 -g A,l -t70 -u 0 -m20 -R25 -r25 -U 1,1,1,2 -z8 -s5.7 -S5.7
+                      -n100 -b14 -I15 -i 0,1 -g A,l -t70 -u 0 -m20 -R52 -r52 -U 1,1,1,2 -z2 -s12.6 -S12.6
+                      -n100 -b14 -I15 -i 0,1 -g A,l -t70 -u 0 -m20 -R52 -r52 -U 1,1,1,2 -z4 -s8.9 -S8.9
+                      -n100 -b14 -I15 -i 0,1 -g A,l -t70 -u 0 -m20 -R52 -r52 -U 1,1,1,2 -z8 -s5.8 -S5.8
+                      -n100 -b14 -I15 -i 0,1 -g A,l -t70 -u 0 -m20 -R106 -r106 -U 1,1,1,2 -z2 -s12.3 -S12.3
+                      -n100 -b14 -I15 -i 0,1 -g A,l -t70 -u 0 -m20 -R106 -r106 -U 1,1,1,2 -z4 -s8.8 -S8.8
+                      -n100 -b14 -I15 -i 0,1 -g A,l -t70 -u 0 -m20 -R106 -r106 -U 1,1,1,2 -z8 -s5.7 -S5.7
+                      -n100 -b14 -I15 -i 0,1 -g A,l -t70 -u 1 -m20 -R24 -r24 -U 1,1,1,2 -z2 -s12.5 -S12.5
+                      -n100 -b14 -I15 -i 0,1 -g A,l -t70 -u 1 -m20 -R24 -r24 -U 1,1,1,2 -z4 -s8.6 -S8.6
+                      -n100 -b14 -I15 -i 0,1 -g A,l -t70 -u 1 -m20 -R24 -r24 -U 1,1,1,2 -z8 -s5.6 -S5.6
+                      -n100 -b14 -I15 -i 0,1 -g A,l -t70 -u 1 -m20 -R51 -r51 -U 1,1,1,2 -z2 -s12.5 -S12.5
+                      -n100 -b14 -I15 -i 0,1 -g A,l -t70 -u 1 -m20 -R51 -r51 -U 1,1,1,2 -z4 -s8.6 -S8.6
+                      -n100 -b14 -I15 -i 0,1 -g A,l -t70 -u 1 -m20 -R51 -r51 -U 1,1,1,2 -z8 -s5.6 -S5.6
+                      -n100 -b14 -I15 -i 0,1 -g A,l -t70 -u 1 -m20 -R106 -r106 -U 1,1,1,2 -z2 -s12.5 -S12.5
+                      -n100 -b14 -I15 -i 0,1 -g A,l -t70 -u 1 -m20 -R106 -r106 -U 1,1,1,2 -z4 -s8.7 -S8.7
+                      -n100 -b14 -I15 -i 0,1 -g A,l -t70 -u 1 -m20 -R106 -r106 -U 1,1,1,2 -z8 -s5.5 -S5.5
+                      -n100 -b14 -I15 -i 0,1 -g A,l -t70 -u 1 -m20 -R273 -r273 -U 1,1,1,2 -z2 -s13.1 -S13.1
+                      -n100 -b14 -I15 -i 0,1 -g A,l -t70 -u 1 -m20 -R273 -r273 -U 1,1,1,2 -z4 -s9.2 -S9.2
+                      -n100 -b14 -I15 -i 0,1 -g A,l -t70 -u 1 -m20 -R273 -r273 -U 1,1,1,2 -z8 -s5.9 -S5.9</main_exec_args>
       <tags>test1 test2 test3 test4 test5 test6 test7 test8 test9 test10 test11 test12 test13 test14 test15 test16 test17 test18 test19 test20 test21 test22 test23 test24</tags>
       <search_expr_true>PUSCH test OK</search_expr_true>
       <search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>

doc/FEATURE_SET.md

@@ -265,8 +265,8 @@ The following features are valid for the gNB and the 5G-NR UE.
    - DMRS configuration type 1 and 2
    - Single and multiple DMRS symbols
    - PTRS support
-   - Support for 2 RX antenna
-   - Support for 1 layer
+   - Support for up to 2 RX antenna
+   - Support for up to 2 layers
 *  NR-PUCCH 
    - Format 0 (2 bits, for ACK/NACK and SR)
    - Format 2 (up to 11 bits, mainly for CSI feedback)
@@ -308,7 +308,8 @@ The following features are valid for the gNB and the 5G-NR UE.
   - HARQ procedures for uplink
 - Scheduler procedures for SRS reception
   - Periodic SRS reception
-  - TPMI computation based on SRS up 4 antenna ports and 1 layer
+  - Channel rank computation up to 2x2 scenario
+  - TPMI computation based on SRS up 4 antenna ports and 2 layers
 - MAC procedures to handle CSI measurement report
   - evalution of RSRP report
   - evaluation of CQI report
@@ -434,8 +435,8 @@ The following features are valid for the gNB and the 5G-NR UE.
    - DMRS configuration type 1 and 2
    - Single and multiple DMRS symbols
    - PTRS support
-   - Support for 2 TX antenna
-   - Support for 1 layer
+   - Support for up to 2 TX antenna
+   - Support for up to 2 layers
 *  NR-PUCCH 
    - Format 0 (2 bits for ACK/NACK and SR)
    - Format 2 (up to 11 bits, mainly for CSI feedback)

doc/RUNMODEM.md

@@ -85,7 +85,7 @@ At the UE the --phy-test flag will
 
 ```bash sudo ./nr-softmodem -O ../../../targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf --phy-test```
 
-In phy-test mode it is possible to mimic the reception of UE Capabilities at gNB by passing through the command line parameter `--uecap_file` the location and file name of the input UE Capability file, e.g. `--uecap_file ../../../targets/PROJECTS/GENERIC-NR-5GC/CONF/uecap.xml`
+In phy-test mode it is possible to mimic the reception of UE Capabilities at gNB by passing through the command line parameter `--uecap_file` the location and file name of the input UE Capability file, e.g. `--uecap_file ../../../targets/PROJECTS/GENERIC-NR-5GC/CONF/uecap_ports1.xml`
 
 ### Launch UE in another window
 
@@ -120,7 +120,7 @@ gNB on machine 1:
 
 `sudo ./nr-softmodem -O ../../../targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf --do-ra`
 
-In do-ra mode it is possible to mimic the reception of UE Capabilities at gNB by passing through the command line parameter `--uecap_file` the location and file name of the input UE Capability file, e.g. `--uecap_file ../../../targets/PROJECTS/GENERIC-NR-5GC/CONF/uecap.xml`
+In do-ra mode it is possible to mimic the reception of UE Capabilities at gNB by passing through the command line parameter `--uecap_file` the location and file name of the input UE Capability file, e.g. `--uecap_file ../../../targets/PROJECTS/GENERIC-NR-5GC/CONF/uecap_ports1.xml`
 
 UE on machine 2:
 
@@ -179,7 +179,7 @@ With the RF simulator (on the same machine):
 
 where `-r` sets the transmission bandwidth configuration in terms of RBs, `-C` sets the downlink carrier frequency and `--ssb` sets the SSB start subcarrier.
 
-Additionally, at UE side `--uecap_file` option can be used to pass the UE Capabilities input file (path location + filename), e.g. `--uecap_file ../../../targets/PROJECTS/GENERIC-NR-5GC/CONF/uecap.xml`
+Additionally, at UE side `--uecap_file` option can be used to pass the UE Capabilities input file (path location + filename), e.g. `--uecap_file ../../../targets/PROJECTS/GENERIC-NR-5GC/CONF/uecap_ports1.xml`
 
 ### Run OAI with SDAP & Custom DRBs
 

executables/nr-softmodem.h

@@ -29,7 +29,7 @@
     {"U" ,                    CONFIG_HLP_ULBM_PHYTEST,0,                u64ptr:&ulsch_slot_bitmap,          defintval:0,                   TYPE_UINT64, 0},        \
     {"usrp-tx-thread-config", CONFIG_HLP_USRP_THREAD, 0,                iptr:&usrp_tx_thread,               defstrval:0,                   TYPE_INT,    0},        \
     {"ldpc-offload-enable",   CONFIG_HLP_LDPC_OFFLOAD, 0,               iptr:&ldpc_offload_flag,            defstrval:0,                   TYPE_INT,    0},        \
-    {"uecap_file",            CONFIG_HLP_UECAP_FILE,  0,                strptr:&uecap_file,                 defstrval:"./uecap.xml",       TYPE_STRING, 0},        \
+    {"uecap_file",            CONFIG_HLP_UECAP_FILE,  0,                strptr:&uecap_file,                 defstrval:"./uecap_ports1.xml",TYPE_STRING, 0},        \
     {"s" ,                    CONFIG_HLP_SNR,         0,                dblptr:&snr_dB,                     defdblval:25,                  TYPE_DOUBLE, 0},        \
   }
 

executables/nr-uesoftmodem.h

@@ -38,8 +38,8 @@
     {"max-ldpc-iterations",      CONFIG_HLP_MAX_LDPC_ITERATIONS, 0,       u8ptr:&nrUE_params.max_ldpc_iterations,    defuintval:5,       TYPE_UINT8, 0}, \
     {"nr-dlsch-demod-shift",     CONFIG_HLP_DLSHIFT,     0,               iptr:(int32_t *)&nr_dlsch_demod_shift,    defintval:0,     TYPE_INT,    0}, \
     {"V" ,                       CONFIG_HLP_VCD,         PARAMFLAG_BOOL,  iptr:&vcdflag,                      defintval:0,     TYPE_INT,    0}, \
-    {"uecap_file",               CONFIG_HLP_UECAP_FILE,  0,               strptr:&uecap_file,        defstrval:"./uecap.xml", TYPE_STRING, 0}, \
-    {"rrc_config_path",          CONFIG_HLP_RRC_CFG_PATH,0,               strptr:&rrc_config_path,   defstrval:"./",  TYPE_STRING, 0}, \
+    {"uecap_file",               CONFIG_HLP_UECAP_FILE,  0,               strptr:&uecap_file,                 defstrval:"./uecap_ports1.xml", TYPE_STRING, 0}, \
+    {"rrc_config_path",          CONFIG_HLP_RRC_CFG_PATH,0,               strptr:&rrc_config_path,            defstrval:"./",                 TYPE_STRING, 0}, \
     {"ue-idx-standalone",        NULL,                   0,               u16ptr:&ue_idx_standalone,          defuintval:0xFFFF,    TYPE_UINT16,   0} \
 }
 

openair1/PHY/CODING/coding_defs.h

@@ -485,8 +485,8 @@ int nr_rate_matching_ldpc(uint32_t Tbslbrm,
                           uint8_t *w,
                           uint8_t *e,
                           uint8_t C,
-			  uint32_t F,
-			  uint32_t Foffset,
+                          uint32_t F,
+                          uint32_t Foffset,
                           uint8_t rvidx,
                           uint32_t E);
 
@@ -499,8 +499,8 @@ int nr_rate_matching_ldpc_rx(uint32_t Tbslbrm,
                              uint8_t rvidx,
                              uint8_t clear,
                              uint32_t E,
-			     uint32_t F,
-			     uint32_t Foffset);
+                             uint32_t F,
+                             uint32_t Foffset);
 
 decoder_if_t phy_threegpplte_turbo_decoder;
 decoder_if_t phy_threegpplte_turbo_decoder8;

openair1/PHY/CODING/nr_rate_matching.c

@@ -513,8 +513,8 @@ int nr_rate_matching_ldpc_rx(uint32_t Tbslbrm,
                              uint8_t rvidx,
                              uint8_t clear,
                              uint32_t E,
-			     uint32_t F,
-			     uint32_t Foffset)
+                             uint32_t F,
+                             uint32_t Foffset)
 {
   uint32_t Ncb,ind,k,Nref,N;
 

openair1/PHY/INIT/nr_init_ue.c

@@ -757,13 +757,13 @@ void nr_init_ul_harq_processes(NR_UL_UE_HARQ_t *harq_list, int number_of_process
       bzero(harq_list[i].d[r],(68*384));
     }
 
-    harq_list[i].e = malloc16(14*num_rb*12*8);
+    harq_list[i].e = malloc16(14*num_rb*12*16);
     DevAssert(harq_list[i].e);
-    bzero(harq_list[i].e,14*num_rb*12*8);
+    bzero(harq_list[i].e,14*num_rb*12*16);
 
-    harq_list[i].f = malloc16(14*num_rb*12*8);
+    harq_list[i].f = malloc16(14*num_rb*12*16);
     DevAssert(harq_list[i].f);
-    bzero(harq_list[i].f,14*num_rb*12*8);
+    bzero(harq_list[i].f,14*num_rb*12*16);
 
     harq_list[i].first_tx = 1;
     harq_list[i].round = 0;

openair1/PHY/NR_ESTIMATION/nr_ul_channel_estimation.c

@@ -108,7 +108,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
                                 unsigned short bwp_start_subcarrier,
                                 nfapi_nr_pusch_pdu_t *pusch_pdu) {
   c16_t pilot[3280] __attribute__((aligned(16)));
-  int16_t *fl,*fm,*fr,*fml,*fmr,*fmm,*fdcl,*fdcr,*fdclh,*fdcrh;
+  int16_t *fdcl, *fdcr, *fdclh, *fdcrh;
 
   const int chest_freq = gNB->chest_freq;
 
@@ -139,12 +139,6 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
 
   switch (nushift) {
     case 0:
-      fl = filt8_l0;
-      fm = filt8_m0;
-      fr = filt8_r0;
-      fmm = filt8_mm0;
-      fml = filt8_m0;
-      fmr = filt8_mr0;
       fdcl = filt8_dcl0;
       fdcr = filt8_dcr0;
       fdclh = filt8_dcl0_h;
@@ -152,12 +146,6 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
       break;
 
     case 1:
-      fl = filt8_l1;
-      fm = filt8_m1;
-      fr = filt8_r1;
-      fmm = filt8_mm1;
-      fml = filt8_ml1;
-      fmr = filt8_mm1;
       fdcl = filt8_dcl1;
       fdcr = filt8_dcr1;
       fdclh = filt8_dcl1_h;
@@ -208,7 +196,6 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
   }
 
 #endif
-  const uint8_t b_shift = pusch_pdu->nrOfLayers == 1;
 
   for (int aarx=0; aarx<gNB->frame_parms.nb_antennas_rx; aarx++) {
     c16_t *rxdataF = (c16_t *)&gNB->common_vars.rxdataF[aarx][symbol_offset];
@@ -240,7 +227,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
           ch=c32x16maddShift(*pil,
                              rxdataF[soffset + re_offset],
                              ch,
-                             15+b_shift);
+                             16);
           pil++;
         }
 
@@ -256,19 +243,16 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
 #endif
 
           if (pilot_cnt == 0) {
-            c16multaddVectRealComplex(fl, &ch16, ul_ch, 8);
-          } else if (pilot_cnt == 1) {
-            c16multaddVectRealComplex(fml, &ch16, ul_ch, 8);
-          } else if (pilot_cnt == (6*nb_rb_pusch-2)) {
-            c16multaddVectRealComplex(fmr, &ch16, ul_ch, 8);
-            ul_ch+=4;
-          } else if (pilot_cnt == (6*nb_rb_pusch-1)) {
-            c16multaddVectRealComplex(fr, &ch16, ul_ch, 8);
-          } else if (pilot_cnt%2 == 0) {
-            c16multaddVectRealComplex(fmm, &ch16, ul_ch, 8);
-            ul_ch+=4;
+            c16multaddVectRealComplex(filt16_ul_p0, &ch16, ul_ch, 16);
+          } else if (pilot_cnt == 1 || pilot_cnt == 2) {
+            c16multaddVectRealComplex(filt16_ul_p1p2, &ch16, ul_ch, 16);
+          } else if (pilot_cnt == (6 * nb_rb_pusch - 1)) {
+            c16multaddVectRealComplex(filt16_ul_last, &ch16, ul_ch, 16);
           } else {
-            c16multaddVectRealComplex(fm, &ch16, ul_ch, 8);
+            c16multaddVectRealComplex(filt16_ul_middle, &ch16, ul_ch, 16);
+            if (pilot_cnt % 2 == 0) {
+              ul_ch += 4;
+            }
           }
 
           pilot_cnt++;
@@ -683,7 +667,7 @@ void nr_pusch_ptrs_processing(PHY_VARS_gNB *gNB,
       /*------------------------------------------------------------------------------------------------------- */
       /* 3) Compensated DMRS based estimated signal with PTRS estimation                                        */
       /*--------------------------------------------------------------------------------------------------------*/
-      for(uint8_t i = *startSymbIndex; i< symbInSlot ; i++) {
+      for(uint8_t i = *startSymbIndex; i < symbInSlot; i++) {
         /* DMRS Symbol has 0 phase so no need to rotate the respective symbol */
         /* Skip rotation if the slot processing is wrong */
         if((!is_dmrs_symbol(i,*dmrsSymbPos)) && (ret == 0)) {

openair1/PHY/NR_TRANSPORT/nr_ulsch_decoding.c

@@ -207,7 +207,7 @@ void nr_processULSegment(void* arg) {
   //////////////////////////// ulsch_llr =====> ulsch_harq->e //////////////////////////////
 
   /// code blocks after bit selection in rate matching for LDPC code (38.212 V15.4.0 section 5.4.2.1)
-  int16_t harq_e[3*8448];
+  int16_t harq_e[E];
 
   nr_deinterleaving_ldpc(E,
                          Qm,
@@ -290,7 +290,7 @@ void nr_processULSegment(void* arg) {
   //////////////////////////////////////////////////////////////////////////////////////////
 
   ////////////////////////////////// pl =====> llrProcBuf //////////////////////////////////
-
+  p_decoderParms->block_length = length_dec;
   no_iteration_ldpc = nrLDPC_decoder(p_decoderParms,
                                      (int8_t*)&pl[0],
                                      llrProcBuf,
@@ -513,7 +513,7 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
           t_nrLDPC_time_stats procTime = {0};
           t_nrLDPC_time_stats *p_procTime = &procTime;
           /// code blocks after bit selection in rate matching for LDPC code (38.212 V15.4.0 section 5.4.2.1)
-          int16_t harq_e[3 * 8448];
+          int16_t harq_e[E];
 
           nr_deinterleaving_ldpc(E, Qm, harq_e, ulsch_llr + r_offset);
 

openair1/PHY/NR_TRANSPORT/nr_ulsch_demodulation.c

@@ -1843,7 +1843,13 @@ uint8_t nr_ulsch_zero_forcing_rx_2layers(int **rxdataF_comp,
                                determ_fin_128[0]);
 
     rxdataF_comp128_0[0] = mmtmpD0;
-    rxdataF_comp128_1[0] = mmtmpD1;
+    if (mod_order > 2) {
+      // We need to check why it is a shift of 3
+      rxdataF_comp128_1[0] = simde_mm_srai_epi16(mmtmpD1, 3);
+    } else {
+      rxdataF_comp128_1[0] = mmtmpD1;
+    }
+
 #ifdef DEBUG_DLSCH_DEMOD
     printf("\n Rx signal after ZF l%d rb%d\n",symbol,rb);
     print_shorts(" Rx layer 1:",(int16_t*)&rxdataF_comp128_0[0]);
@@ -1954,7 +1960,7 @@ void nr_rx_pusch(PHY_VARS_gNB *gNB,
 
   int off = ((rel15_ul->rb_size&1) == 1)? 4:0;
   uint32_t rxdataF_ext_offset = 0;
-  uint8_t ad_shift = 1 + log2_approx(frame_parms->nb_antennas_rx >> 2);
+  uint8_t ad_shift = 1 + log2_approx(frame_parms->nb_antennas_rx >> 2) + (rel15_ul->nrOfLayers == 2);
 
   for(uint8_t symbol = rel15_ul->start_symbol_index; symbol < (rel15_ul->start_symbol_index + rel15_ul->nr_of_symbols); symbol++) {
     uint8_t dmrs_symbol_flag = (rel15_ul->ul_dmrs_symb_pos >> symbol) & 0x01;
@@ -2057,18 +2063,21 @@ void nr_rx_pusch(PHY_VARS_gNB *gNB,
                              symbol,
                              rel15_ul->rb_size,
                              nb_re_pusch);
-                 
-      if (rel15_ul->nrOfLayers == 2)//Apply zero forcing for 2 Tx layers
+
+      //Apply zero forcing for 2 Tx layers
+      if (rel15_ul->nrOfLayers == 2) {
         nr_ulsch_zero_forcing_rx_2layers(gNB->pusch_vars[ulsch_id]->rxdataF_comp,
-                                   gNB->pusch_vars[ulsch_id]->ul_ch_mag0,
-                                   gNB->pusch_vars[ulsch_id]->ul_ch_magb0,                                   
-                                   gNB->pusch_vars[ulsch_id]->ul_ch_estimates_ext,
-                                   rel15_ul->rb_size,
-                                   frame_parms->nb_antennas_rx,
-                                   rel15_ul->qam_mod_order,
-                                   gNB->pusch_vars[ulsch_id]->log2_maxh,
-                                   symbol,
-                                   nb_re_pusch);
+                                         gNB->pusch_vars[ulsch_id]->ul_ch_mag0,
+                                         gNB->pusch_vars[ulsch_id]->ul_ch_magb0,
+                                         gNB->pusch_vars[ulsch_id]->ul_ch_estimates_ext,
+                                         rel15_ul->rb_size,
+                                         frame_parms->nb_antennas_rx,
+                                         rel15_ul->qam_mod_order,
+                                         gNB->pusch_vars[ulsch_id]->log2_maxh,
+                                         symbol,
+                                         nb_re_pusch);
+      }
+
       stop_meas(&gNB->ulsch_mrc_stats);
 
       if (rel15_ul->transform_precoding == transformPrecoder_enabled) {

openair1/PHY/NR_UE_ESTIMATION/filt16a_32.c

@@ -329,3 +329,37 @@ short filt24_end[24] = {
 short filt24_middle[24] = {
     4096,4779,5461,6144,6827,7509,8192,8875,9557,10240,10923,11605,
     12288,11605,10923,10240,9557,8875,8192,7509,6827,6144,5461,4779};
+
+// UL
+short filt16_ul_p0[16] = {4096, 4096, 4096, 4096, 4096, 4096, 4096, 4096,
+                           0, 0, 0, 0, 0, 0, 0, 0};
+
+short filt16_ul_p1p2[16] = {4096, 4096, 4096, 4096, 2048, 2048, 2048, 2048,
+                          2048, 2048, 2048, 2048, 0, 0, 0, 0};
+
+short filt16_ul_middle[16] = {2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048,
+                              2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048};
+
+short filt16_ul_last[16] = {4096, 4096, 4096, 4096, 8192, 8192, 8192, 8192,
+                            0, 0, 0, 0, 0, 0, 0, 0};
+
+// DL
+// DMRS_Type1
+short filt16_dl_first[16] = {12228, 12228, 12228, 12228, 8192, 8192, 8192, 8192,
+                             4096, 4096, 4096, 4096, 0, 0, 0, 0};
+
+short filt16_dl_middle[16] = {2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048,
+                              2048, 2048, 2048, 2048, 2048, 2048, 2048, 2048};
+
+short filt16_dl_last[16] = {4096, 4096, 4096, 4096, 0, 0, 0, 0,
+                            0, 0, 0, 0, 0, 0, 0, 0};
+
+// DMRS_Type2
+short filt16_dl_first_type2[16] = {16384, 16384, 16384, 8192, 8192, 8192, 8192, 8192,
+                                   8192, 0, 0, 0, 0, 0, 0};
+
+short filt16_dl_middle_type2[16] = {8192, 8192, 8192, 8192, 8192, 8192, 8192, 8192,
+                                    8192, 8192, 8192, 8192, 0, 0, 0, 0};
+
+short filt16_dl_last_type2[16] = {8192, 8192, 8192, 8192, 8192, 8192, 16384, 16384,
+                                  16384, 0, 0, 0, 0, 0, 0, 0};

openair1/PHY/NR_UE_ESTIMATION/filt16a_32.h

@@ -219,4 +219,20 @@ extern short filt24_start[24];
 extern short filt24_end[24];
 extern short filt24_middle[24];
 
+/*UL*/
+extern short filt16_ul_p0[16];
+extern short filt16_ul_p1p2[16];
+extern short filt16_ul_middle[16];
+extern short filt16_ul_last[16];
+
+/*DL*/
+// DL DMRS_Type1
+extern short filt16_dl_first[16];
+extern short filt16_dl_middle[16];
+extern short filt16_dl_last[16];
+
+// DL DMRS_Type2
+extern short filt16_dl_first_type2[16];
+extern short filt16_dl_middle_type2[16];
+extern short filt16_dl_last_type2[16];
 #endif

openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c

@@ -1256,7 +1256,7 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
   unsigned short k;
   unsigned int pilot_cnt;
   int16_t ch_l[2],ch_r[2],ch[2],*pil,*rxF,*dl_ch;
-  int16_t *fl=NULL,*fm=NULL,*fr=NULL,*fml=NULL,*fmr=NULL,*fmm=NULL,*fdcl=NULL,*fdcr=NULL,*fdclh=NULL,*fdcrh=NULL, *frl=NULL, *frr=NULL;
+  int16_t *fdcl = NULL, *fdcr = NULL, *fdclh = NULL, *fdcrh = NULL;
   int ch_offset,symbol_offset;
 
   uint8_t nushift;
@@ -1303,33 +1303,17 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
     switch (delta) {
 
     case 0://port 0,1
-      fl = filt8_l0;//left interpolation Filter for DMRS config. 1
-      fm = filt8_m0;//left middle interpolation Filter
-      fr = filt8_r0;//right interpolation Filter
-      fmm = filt8_mm0;;//middle middle interpolation Filter
-      fml = filt8_m0;//left middle interpolation Filter
-      fmr = filt8_mr0;//middle right interpolation Filter
-      fdcl = filt8_dcl0;//left DC interpolation Filter (even RB)
-      fdcr = filt8_dcr0;//right DC interpolation Filter (even RB)
-      fdclh = filt8_dcl0_h;//left DC interpolation Filter (odd RB)
-      fdcrh = filt8_dcr0_h;//right DC interpolation Filter (odd RB)
-      frl = NULL;
-      frr = NULL;
+      fdcl = filt8_dcl0; //left DC interpolation Filter (even RB)
+      fdcr = filt8_dcr0; //right DC interpolation Filter (even RB)
+      fdclh = filt8_dcl0_h; //left DC interpolation Filter (odd RB)
+      fdcrh = filt8_dcr0_h; //right DC interpolation Filter (odd RB)
       break;
 
     case 1://port2,3
-      fl = filt8_l1;
-      fm = filt8_m1;
-      fr = filt8_r1;
-      fmm = filt8_mm1;
-      fml = filt8_ml1;
-      fmr = filt8_m1;
       fdcl = filt8_dcl1;
       fdcr = filt8_dcr1;
       fdclh = filt8_dcl1_h;
       fdcrh = filt8_dcr1_h;
-      frl = NULL;
-      frr = NULL;
       break;
 
     default:
@@ -1342,14 +1326,6 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
     if (p<6) ue->frame_parms.nushift = nushift;
     switch (delta) {
     case 0://port 0,1
-      fl = filt8_l2;//left interpolation Filter should be fml
-      fr = filt8_r2;//right interpolation Filter should be fmr
-      fm = filt8_l2;
-      fmm = filt8_r2;
-      fml = filt8_ml2;
-      fmr = filt8_mr2;
-      frl = filt8_rl2;
-      frr = filt8_rm2;
       fdcl = filt8_dcl1;
       fdcr = filt8_dcr1;
       fdclh = filt8_dcl1_h;
@@ -1357,14 +1333,6 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
       break;
 
     case 2://port2,3
-      fl = filt8_l3;
-      fm = filt8_m2;
-      fr = filt8_r3;
-      fmm = filt8_mm2;
-      fml = filt8_l2;
-      fmr = filt8_r2;
-      frl = filt8_rl3;
-      frr = filt8_rr3;
       fdcl = NULL;
       fdcr = NULL;
       fdclh = NULL;
@@ -1378,145 +1346,56 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
     }
   }
 
-  for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) {
-    pil   = (int16_t *)&pilot[rb_offset*((config_type == NFAPI_NR_DMRS_TYPE1) ? 6:4)];
-    k     = k % ue->frame_parms.ofdm_symbol_size;
-    re_offset = k;
-    rxF   = (int16_t *)&rxdataF[aarx][(symbol_offset+re_offset+nushift)];
-    dl_ch = (int16_t *)&dl_ch_estimates[p*ue->frame_parms.nb_antennas_rx+aarx][ch_offset];
+  for (aarx = 0; aarx < ue->frame_parms.nb_antennas_rx; aarx++) {
 
-    memset(dl_ch,0,4*(ue->frame_parms.ofdm_symbol_size));
 #ifdef DEBUG_PDSCH
-    printf("ch est pilot addr %p RB_DL %d\n",&pilot[0], ue->frame_parms.N_RB_DL);
-    printf("k %d, first_carrier %d\n",k,ue->frame_parms.first_carrier_offset);
-    printf("rxF addr %p p %d\n", rxF,p);
-    printf("dl_ch addr %p nushift %d\n",dl_ch,nushift);
+    printf("\n============================================\n");
+    printf("==== Tx port %i, Rx antenna %i, Symbol %i ====\n", p, aarx, symbol);
+    printf("============================================\n");
 #endif
+
+    pil = (int16_t *)&pilot[rb_offset * ((config_type == NFAPI_NR_DMRS_TYPE1) ? 6 : 4)];
+    k = k % ue->frame_parms.ofdm_symbol_size;
+    re_offset = k;
+    rxF = (int16_t *)&rxdataF[aarx][(symbol_offset + re_offset + nushift)];
+    dl_ch = (int16_t *)&dl_ch_estimates[p * ue->frame_parms.nb_antennas_rx + aarx][ch_offset];
+    memset(dl_ch, 0, 4 * (ue->frame_parms.ofdm_symbol_size));
+
     if (config_type == NFAPI_NR_DMRS_TYPE1 && ue->chest_freq == 0) {
 
-      // Treat first 2 pilots specially (left edge)
-      ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
-      ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
-#ifdef DEBUG_PDSCH
-      printf("ch 0 %d\n",((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1]));
-      printf("pilot 0 : rxF - > (%d,%d) addr %p  ch -> (%d,%d), pil -> (%d,%d) \n",rxF[0],rxF[1],&rxF[0],ch[0],ch[1],pil[0],pil[1]);
-      printf("data 0 : rxF - > (%d,%d) addr %p  ch -> (%d,%d), pil -> (%d,%d) \n",rxF[2],rxF[3],&rxF[2],ch[0],ch[1],pil[0],pil[1]);
-#endif
-      multadd_real_vector_complex_scalar(fl,
-                                         ch,
-                                         dl_ch,
-                                         8);
-      pil += 2;
-      re_offset = (re_offset+2) % ue->frame_parms.ofdm_symbol_size;
-      rxF   = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
-      //for (int i= 0; i<8; i++)
-      //printf("dl_ch addr %p %d\n", dl_ch+i, *(dl_ch+i));
+      for (pilot_cnt = 0; pilot_cnt < 6 * nb_rb_pdsch; pilot_cnt++) {
 
-      ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
-      ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
-#ifdef DEBUG_PDSCH
-      printf("pilot 1 : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
-#endif
-      multadd_real_vector_complex_scalar(fml,
-                                         ch,
-                                         dl_ch,
-                                         8);
-      pil += 2;
-      re_offset = (re_offset+2) % ue->frame_parms.ofdm_symbol_size;
-      rxF   = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
-      //printf("dl_ch addr %p\n",dl_ch);
-      
-      ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
-      ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
-#ifdef DEBUG_PDSCH
-      printf("pilot 2 : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
-#endif
-      multadd_real_vector_complex_scalar(fmm,
-                                         ch,
-                                         dl_ch,
-                                         8);
-                                         
-      pil += 2;
-      re_offset = (re_offset+2) % ue->frame_parms.ofdm_symbol_size;
-      rxF   = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
-      dl_ch += 8;
+        if (pilot_cnt % 2 == 0) {
+          ch[0] = (int16_t)(((int32_t)pil[0] * rxF[0] - (int32_t)pil[1] * rxF[1]) >> 15);
+          ch[1] = (int16_t)(((int32_t)pil[0] * rxF[1] + (int32_t)pil[1] * rxF[0]) >> 15);
+          pil += 2;
+          re_offset = (re_offset + 2) % ue->frame_parms.ofdm_symbol_size;
+          rxF = (int16_t *)&rxdataF[aarx][(symbol_offset + nushift + re_offset)];
+          ch[0] += (int16_t)(((int32_t)pil[0] * rxF[0] - (int32_t)pil[1] * rxF[1]) >> 15);
+          ch[1] += (int16_t)(((int32_t)pil[0] * rxF[1] + (int32_t)pil[1] * rxF[0]) >> 15);
+          ch[0] >>= 1;
+          ch[1] >>= 1;
+          pil += 2;
+          re_offset = (re_offset + 2) % ue->frame_parms.ofdm_symbol_size;
+          rxF = (int16_t *)&rxdataF[aarx][(symbol_offset + nushift + re_offset)];
+        }
 
-      for (pilot_cnt=3; pilot_cnt<(6*nb_rb_pdsch-3); pilot_cnt += 2) {
-
-        ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
-        ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
 #ifdef DEBUG_PDSCH
-	printf("pilot %u : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt,rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
+        printf("pilot %3u: pil -> (%6d,%6d), rxF -> (%4d,%4d), ch -> (%4d,%4d) \n", pilot_cnt, pil[0], pil[1], rxF[0], rxF[1], ch[0], ch[1]);
 #endif
-        multadd_real_vector_complex_scalar(fm,
-                                           ch,
-                                           dl_ch,
-                                           8);
-
-        pil += 2;
-        re_offset = (re_offset+2) % ue->frame_parms.ofdm_symbol_size;
-        rxF   = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
-      
-        ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
-        ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
-#ifdef DEBUG_PDSCH
-	printf("pilot %u : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt+1,rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
-#endif
-        multadd_real_vector_complex_scalar(fmm,
-                                           ch,
-                                           dl_ch,
-                                           8);
-        pil += 2;
-        re_offset = (re_offset+2) % ue->frame_parms.ofdm_symbol_size;
-        rxF   = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
-        dl_ch += 8;
 
+        if (pilot_cnt == 0) { // Treat first pilot
+          multadd_real_vector_complex_scalar(filt16_dl_first, ch, dl_ch, 16);
+        } else if (pilot_cnt == 6 * nb_rb_pdsch - 1) { // Treat last pilot
+          multadd_real_vector_complex_scalar(filt16_dl_last, ch, dl_ch, 16);
+        } else { // Treat middle pilots
+          multadd_real_vector_complex_scalar(filt16_dl_middle, ch, dl_ch, 16);
+          if (pilot_cnt % 2 == 0) {
+            dl_ch += 8;
+          }
+        }
       }
-      
-      // Treat first 2 pilots specially (right edge)
-      ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
-      ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
-#ifdef DEBUG_PDSCH
-      printf("pilot %u : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt,rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
-#endif
-      multadd_real_vector_complex_scalar(fm,
-                                         ch,
-                                         dl_ch,
-                                         8);
-                                         
-      //for (int i= 0; i<8; i++)
-      //printf("dl_ch addr %p %d\n", dl_ch+i, *(dl_ch+i));
 
-      pil += 2;
-      re_offset = (re_offset+2) % ue->frame_parms.ofdm_symbol_size;
-      rxF   = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
-             
-      ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
-      ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
-#ifdef DEBUG_PDSCH
-      printf("ch 0 %d\n",((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1]));
-      printf("pilot %u: rxF - > (%d,%d) addr %p  ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt+1,rxF[0],rxF[1],&rxF[0],ch[0],ch[1],pil[0],pil[1]);
-#endif
-      multadd_real_vector_complex_scalar(fmr,
-                                         ch,
-                                         dl_ch,
-                                         8);
-                                         
-      pil += 2;
-      re_offset = (re_offset+2) % ue->frame_parms.ofdm_symbol_size;
-      rxF   = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
-      dl_ch += 8;
-      
-      ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
-      ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
-#ifdef DEBUG_PDSCH
-      printf("pilot %u: rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt+2,rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
-#endif
-      multadd_real_vector_complex_scalar(fr,
-                                         ch,
-                                         dl_ch,
-                                         8);
-    
       // check if PRB crosses DC and improve estimates around DC
       if ((bwp_start_subcarrier < ue->frame_parms.ofdm_symbol_size) && (bwp_start_subcarrier+nb_rb_pdsch*12 >= ue->frame_parms.ofdm_symbol_size)) {
         dl_ch = (int16_t *)&dl_ch_estimates[aarx][ch_offset];
@@ -1531,7 +1410,14 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
         rxF   = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
         ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
         ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
-          
+        pil += 2;
+        re_offset = (re_offset + 2) % ue->frame_parms.ofdm_symbol_size;
+        rxF = (int16_t *)&rxdataF[aarx][(symbol_offset + nushift + re_offset)];
+        ch[0] += (int16_t)(((int32_t)pil[0] * rxF[0] - (int32_t)pil[1] * rxF[1]) >> 15);
+        ch[1] += (int16_t)(((int32_t)pil[0] * rxF[1] + (int32_t)pil[1] * rxF[0]) >> 15);
+        ch[0] >>= 1;
+        ch[1] >>= 1;
+
         // for proper allignment of SIMD vectors
         if((ue->frame_parms.N_RB_DL&1) == 0) {
               
@@ -1540,12 +1426,19 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
                      dl_ch-4,
                      8);
               
-          pil += 4;
-          re_offset = (re_offset+4) % ue->frame_parms.ofdm_symbol_size;
+          pil += 2;
+          re_offset = (re_offset+2) % ue->frame_parms.ofdm_symbol_size;
           rxF   = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
           ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
           ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
-              
+          pil += 2;
+          re_offset = (re_offset + 2) % ue->frame_parms.ofdm_symbol_size;
+          rxF = (int16_t *)&rxdataF[aarx][(symbol_offset + nushift + re_offset)];
+          ch[0] += (int16_t)(((int32_t)pil[0] * rxF[0] - (int32_t)pil[1] * rxF[1]) >> 15);
+          ch[1] += (int16_t)(((int32_t)pil[0] * rxF[1] + (int32_t)pil[1] * rxF[0]) >> 15);
+          ch[0] >>= 1;
+          ch[1] >>= 1;
+
           multadd_real_vector_complex_scalar(fdcr,
                      ch,
                      dl_ch-4,
@@ -1557,12 +1450,19 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
                      dl_ch,
                      8);
               
-          pil += 4;
-          re_offset = (re_offset+4) % ue->frame_parms.ofdm_symbol_size;
+          pil += 2;
+          re_offset = (re_offset+2) % ue->frame_parms.ofdm_symbol_size;
           rxF   = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
           ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
           ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
-              
+          pil += 2;
+          re_offset = (re_offset + 2) % ue->frame_parms.ofdm_symbol_size;
+          rxF = (int16_t *)&rxdataF[aarx][(symbol_offset + nushift + re_offset)];
+          ch[0] += (int16_t)(((int32_t)pil[0] * rxF[0] - (int32_t)pil[1] * rxF[1]) >> 15);
+          ch[1] += (int16_t)(((int32_t)pil[0] * rxF[1] + (int32_t)pil[1] * rxF[0]) >> 15);
+          ch[0] >>= 1;
+          ch[1] >>= 1;
+
           multadd_real_vector_complex_scalar(fdcrh,
                      ch,
                      dl_ch,
@@ -1571,150 +1471,41 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
       }
     } else if (config_type == NFAPI_NR_DMRS_TYPE2 && ue->chest_freq == 0){ //pdsch_dmrs_type2  |dmrs_r,dmrs_l,0,0,0,0,dmrs_r,dmrs_l,0,0,0,0|
 
-      // Treat first 4 pilots specially (left edge)
-      ch_l[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
-      ch_l[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
+      for (pilot_cnt = 0; pilot_cnt < 4 * nb_rb_pdsch; pilot_cnt++) {
+        if (pilot_cnt % 2 == 0) {
+          ch_l[0] = (int16_t)(((int32_t)pil[0] * rxF[0] - (int32_t)pil[1] * rxF[1]) >> 15);
+          ch_l[1] = (int16_t)(((int32_t)pil[0] * rxF[1] + (int32_t)pil[1] * rxF[0]) >> 15);
 
 #ifdef DEBUG_PDSCH
-      printf("ch 0 %d\n",((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1]));
-      printf("pilot 0 : rxF - > (%d,%d) addr %p  ch -> (%d,%d), pil -> (%d,%d) \n",rxF[0],rxF[1],&rxF[0],ch_l[0],ch_l[1],pil[0],pil[1]);
+          printf("pilot %3u: pil -> (%6d,%6d), rxF -> (%4d,%4d), ch -> (%4d,%4d) \n", pilot_cnt, pil[0], pil[1], rxF[0], rxF[1], ch_l[0], ch_l[1]);
 #endif
 
-      pil += 2;
-      re_offset = (re_offset+1) % ue->frame_parms.ofdm_symbol_size;
-      rxF   = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
-      ch_r[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
-      ch_r[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
-
-      ch[0] = (ch_l[0]+ch_r[0])>>1;
-      ch[1] = (ch_l[1]+ch_r[1])>>1;
-
-      dl_ch[(0+2*nushift)] = ch[0];
-      dl_ch[(1+2*nushift)] = ch[1];
-      dl_ch[2+2*nushift] = ch[0];
-      dl_ch[3+2*nushift] = ch[1];
-
-      multadd_real_vector_complex_scalar(fl,
-                                         ch,
-                                         dl_ch,
-                                         8);
-
-      pil += 2;
-      re_offset = (re_offset+5) % ue->frame_parms.ofdm_symbol_size;
-      rxF   = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
-      ch_l[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
-      ch_l[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
-
-      pil += 2;
-      re_offset = (re_offset+1) % ue->frame_parms.ofdm_symbol_size;
-      rxF   = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
-      ch_r[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
-      ch_r[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
-
-      ch[0] = (ch_l[0]+ch_r[0])>>1;
-      ch[1] = (ch_l[1]+ch_r[1])>>1;
-
-      multadd_real_vector_complex_scalar(fr,
-                                         ch,
-                                         dl_ch,
-                                         8);
-
-      dl_ch += 12;
-      dl_ch[0+2*nushift] = ch[0];
-      dl_ch[1+2*nushift] = ch[1];
-      dl_ch[2+2*nushift] = ch[0];
-      dl_ch[3+2*nushift] = ch[1];
-      dl_ch += 4;
-
-      for (pilot_cnt=4; pilot_cnt<4*nb_rb_pdsch; pilot_cnt += 4) {
-
-        multadd_real_vector_complex_scalar(fml,
-                                           ch,
-                                           dl_ch,
-                                           8);
-        pil += 2;
-        re_offset = (re_offset+5) % ue->frame_parms.ofdm_symbol_size;
-        rxF   = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
-        ch_l[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
-        ch_l[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
+        } else {
+          ch_r[0] = (int16_t)(((int32_t)pil[0] * rxF[0] - (int32_t)pil[1] * rxF[1]) >> 15);
+          ch_r[1] = (int16_t)(((int32_t)pil[0] * rxF[1] + (int32_t)pil[1] * rxF[0]) >> 15);
 
 #ifdef DEBUG_PDSCH
-        printf("pilot %u : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt,rxF[0],rxF[1],ch_l[0],ch_l[1],pil[0],pil[1]);
+          printf("pilot %3u: pil -> (%6d,%6d), rxF -> (%4d,%4d), ch -> (%4d,%4d) \n", pilot_cnt, pil[0], pil[1], rxF[0], rxF[1], ch_r[0], ch_r[1]);
 #endif
+          ch[0] = (ch_l[0] + ch_r[0]) >> 1;
+          ch[1] = (ch_l[1] + ch_r[1]) >> 1;
 
+          if (pilot_cnt == 1) {
+            multadd_real_vector_complex_scalar(filt16_dl_first_type2, ch, dl_ch, 16);
+            dl_ch += 6;
+          } else if (pilot_cnt == (4 * nb_rb_pdsch - 1)) {
+            multadd_real_vector_complex_scalar(filt16_dl_last_type2, ch, dl_ch, 16);
+          } else {
+            multadd_real_vector_complex_scalar(filt16_dl_middle_type2, ch, dl_ch, 16);
+            dl_ch += 12;
+          }
+        }
         pil += 2;
-        re_offset = (re_offset+1) % ue->frame_parms.ofdm_symbol_size;
-        rxF   = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
-        ch_r[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
-        ch_r[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
-
-        ch[0] = (ch_l[0]+ch_r[0])>>1;
-        ch[1] = (ch_l[1]+ch_r[1])>>1;
-
-#ifdef DEBUG_PDSCH
-        printf("pilot %u : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt+1,rxF[0],rxF[1],ch_r[0],ch_r[1],pil[0],pil[1]);
-#endif
-
-        multadd_real_vector_complex_scalar(fmr,
-                                           ch,
-                                           dl_ch,
-                                           8);
-
-        dl_ch += 8;
-        dl_ch[0+2*nushift] = ch[0];
-        dl_ch[1+2*nushift] = ch[1];
-        dl_ch[2+2*nushift] = ch[0];
-        dl_ch[3+2*nushift] = ch[1];
-
-        multadd_real_vector_complex_scalar(fm,
-                                           ch,
-                                           dl_ch,
-                                           8);
-
-        pil += 2;
-        re_offset = (re_offset+5) % ue->frame_parms.ofdm_symbol_size;
-        rxF   = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
-        ch_l[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
-        ch_l[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
-
-        pil += 2;
-        re_offset = (re_offset+1) % ue->frame_parms.ofdm_symbol_size;
-        rxF   = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
-        ch_r[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
-        ch_r[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
-
-#ifdef DEBUG_PDSCH
-        printf("pilot %u : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt+1,rxF[0],rxF[1],ch_r[0],ch_r[1],pil[0],pil[1]);
-#endif
-
-        ch[0] = (ch_l[0]+ch_r[0])>>1;
-        ch[1] = (ch_l[1]+ch_r[1])>>1;
-
-        multadd_real_vector_complex_scalar(fmm,
-                                           ch,
-                                           dl_ch,
-                                           8);
-
-        dl_ch += 12;
-        dl_ch[0+2*nushift] = ch[0];
-        dl_ch[1+2*nushift] = ch[1];
-        dl_ch[2+2*nushift] = ch[0];
-        dl_ch[3+2*nushift] = ch[1];
-        dl_ch += 4;
+        int re_offset_add = pilot_cnt % 2 == 0 ? 1 : 5;
+        re_offset = (re_offset + re_offset_add) % ue->frame_parms.ofdm_symbol_size;
+        rxF = (int16_t *)&rxdataF[aarx][(symbol_offset + nushift + re_offset)];
       }
 
-      // Treat last 2 pilots specially (right edge)
-      // dl_ch-2+nushift<<1
-      multadd_real_vector_complex_scalar(frl,
-                                         dl_ch-2+2*nushift,
-                                         dl_ch,
-                                         8);
-
-      multadd_real_vector_complex_scalar(frr,
-                                         dl_ch-14+2*nushift,/*14*/
-                                         dl_ch,
-                                         8);
-
       // check if PRB crosses DC and improve estimates around DC
       if ((bwp_start_subcarrier < ue->frame_parms.ofdm_symbol_size) && (bwp_start_subcarrier+nb_rb_pdsch*12 >= ue->frame_parms.ofdm_symbol_size) && (p<2)) {
 
@@ -2165,9 +1956,9 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
     dl_ch = (int16_t *)&dl_ch_estimates[p*ue->frame_parms.nb_antennas_rx+aarx][ch_offset];
     for(uint16_t idxP=0; idxP<ceil((float)nb_rb_pdsch*12/8); idxP++) {
       for(uint8_t idxI=0; idxI<16; idxI += 2) {
-        printf("%d\t%d\t",dl_ch[idxP*16+idxI],dl_ch[idxP*16+idxI+1]);
+        printf("%4d\t%4d\t",dl_ch[idxP*16+idxI],dl_ch[idxP*16+idxI+1]);
       }
-      printf("%d\n",idxP);
+      printf("%2d\n",idxP);
     }
 #endif
   }

openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c

@@ -2163,12 +2163,12 @@ uint8_t nr_zero_forcing_rx(int **rxdataF_comp,
   int32_t determ_fin[12*nb_rb_0] __attribute__((aligned(32)));
 
   ///Allocate H^*H matrix elements and sub elements
-  conjH_H_elements        = (int32_t ***)malloc16_clear( n_rx*sizeof(int32_t **) );
-  for (int aarx=0;aarx<n_rx;aarx++) {
-    conjH_H_elements[aarx] = (int32_t **)malloc16_clear( n_tx*n_tx*sizeof(int32_t) );
-    for (int rtx=0;rtx<n_tx;rtx++) {//row
-      for (int ctx=0;ctx<n_tx;ctx++) {//column
-        conjH_H_elements[aarx][ctx*n_tx+rtx] = (int32_t *)malloc16_clear( 12*nb_rb_0*sizeof(int32_t *) );
+  conjH_H_elements = (int32_t ***)malloc16_clear(n_rx * sizeof(int32_t **));
+  for (int aarx = 0; aarx < n_rx; aarx++) {
+    conjH_H_elements[aarx] = (int32_t **)malloc16_clear(n_tx * n_tx * sizeof(int32_t *));
+    for (int rtx = 0; rtx < n_tx; rtx++) { // row
+      for (int ctx = 0; ctx < n_tx; ctx++) { // column
+        conjH_H_elements[aarx][ctx * n_tx + rtx] = (int32_t *)malloc16_clear(12 * nb_rb_0 * sizeof(int32_t));
       }
     }
   }

openair1/SCHED_NR_UE/phy_procedures_nr_ue.c

@@ -295,9 +295,7 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,
     }
   }
 
-  if (ue->UE_mode[gNB_id] == PUSCH) {
-    ue_srs_procedures_nr(ue, proc, gNB_id);
-  }
+  ue_srs_procedures_nr(ue, proc, gNB_id);
 
   if (ue->UE_mode[gNB_id] <= PUSCH) {
     pucch_procedures_ue_nr(ue,

openair1/SIMULATION/NR_PHY/dlsim.c

@@ -700,6 +700,7 @@ int main(int argc, char **argv)
       printf("-g [A,B,C,D,E,F,G,R] Use 3GPP SCM (A,B,C,D) or 36-101 (E-EPA,F-EVA,G-ETU) models or R for MIMO model (ignores delay spread and Ricean factor)\n");
       printf("-y Number of TX antennas used in gNB\n");
       printf("-z Number of RX antennas used in UE\n");
+      printf("-x Num of layer for PDSCH\n");
       printf("-i Change channel estimation technique. Arguments list: Frequency domain {0:Linear interpolation, 1:PRB based averaging}, Time domain {0:Estimates of last DMRS symbol, 1:Average of DMRS symbols}\n");
       //printf("-j Relative strength of second intefering gNB (in dB) - cell_id mod 3 = 2\n");
       printf("-R N_RB_DL\n");

openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c

@@ -386,6 +386,39 @@ const char table_38211_6_3_1_5_3[28][4][1] = {
     {{'1'}, {'o'}, {'o'}, {'n'}}  // tpmi 27
 };
 
+// TS 38.211 - Table 6.3.1.5-4: Precoding matrix W for two-layer transmission using two antenna ports, 'n' = -1 and 'o' = -j
+const char table_38211_6_3_1_5_4[3][2][2] = {
+    {{'1', '0'}, {'0', '1'}}, // tpmi 0
+    {{'1', '1'}, {'1', 'n'}}, // tpmi 1
+    {{'1', '1'}, {'j', 'o'}}  // tpmi 2
+};
+
+// TS 38.211 - Table 6.3.1.5-5: Precoding matrix W for two-layer transmission using four antenna ports, 'n' = -1 and 'o' = -j
+const char table_38211_6_3_1_5_5[22][4][2] = {
+    {{'1', '0'}, {'0', '1'}, {'0', '0'}, {'0', '0'}}, // tpmi 0
+    {{'1', '0'}, {'0', '0'}, {'0', '1'}, {'0', '0'}}, // tpmi 1
+    {{'1', '0'}, {'0', '0'}, {'0', '0'}, {'0', '1'}}, // tpmi 2
+    {{'0', '0'}, {'1', '0'}, {'0', '1'}, {'0', '0'}}, // tpmi 3
+    {{'0', '0'}, {'1', '0'}, {'0', '0'}, {'0', '1'}}, // tpmi 4
+    {{'0', '0'}, {'0', '0'}, {'1', '0'}, {'0', '1'}}, // tpmi 5
+    {{'1', '0'}, {'0', '1'}, {'1', '0'}, {'0', 'o'}}, // tpmi 6
+    {{'1', '0'}, {'0', '1'}, {'1', '0'}, {'0', 'j'}}, // tpmi 7
+    {{'1', '0'}, {'0', '1'}, {'o', '0'}, {'0', '1'}}, // tpmi 8
+    {{'1', '0'}, {'0', '1'}, {'o', '0'}, {'0', 'n'}}, // tpmi 9
+    {{'1', '0'}, {'0', '1'}, {'n', '0'}, {'0', 'o'}}, // tpmi 10
+    {{'1', '0'}, {'0', '1'}, {'n', '0'}, {'0', 'j'}}, // tpmi 11
+    {{'1', '0'}, {'0', '1'}, {'j', '0'}, {'0', '1'}}, // tpmi 12
+    {{'1', '0'}, {'0', '1'}, {'j', '0'}, {'0', 'n'}}, // tpmi 13
+    {{'1', '1'}, {'1', '1'}, {'1', 'n'}, {'1', 'n'}}, // tpmi 14
+    {{'1', '1'}, {'1', '1'}, {'j', 'o'}, {'j', 'o'}}, // tpmi 15
+    {{'1', '1'}, {'j', 'j'}, {'1', 'n'}, {'j', 'o'}}, // tpmi 16
+    {{'1', '1'}, {'j', 'j'}, {'j', 'o'}, {'n', '1'}}, // tpmi 17
+    {{'1', '1'}, {'n', 'n'}, {'1', 'n'}, {'n', '1'}}, // tpmi 18
+    {{'1', '1'}, {'n', 'n'}, {'j', 'o'}, {'o', 'j'}}, // tpmi 19
+    {{'1', '1'}, {'o', 'o'}, {'1', 'n'}, {'o', 'j'}}, // tpmi 20
+    {{'1', '1'}, {'o', 'o'}, {'j', 'o'}, {'1', 'n'}}  // tpmi 21
+};
+
 void get_info_from_tda_tables(int default_abc,
                               int tda,
                               int dmrs_TypeA_Position,

openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h

@@ -146,4 +146,6 @@ extern const int32_t table_38213_10_1_1_c2[5];
 extern const char table_38211_6_3_1_5_1[6][2][1];
 extern const char table_38211_6_3_1_5_2[28][4][1];
 extern const char table_38211_6_3_1_5_3[28][4][1];
+extern const char table_38211_6_3_1_5_4[3][2][2];
+extern const char table_38211_6_3_1_5_5[22][4][2];
 #endif //DEF_H

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c

@@ -2245,6 +2245,13 @@ void set_max_fb_time(NR_UE_UL_BWP_t *UL_BWP, const NR_UE_DL_BWP_t *DL_BWP)
   }
 }
 
+void reset_sched_ctrl(NR_UE_sched_ctrl_t *sched_ctrl)
+{
+  sched_ctrl->srs_feedback.ul_ri = 0;
+  sched_ctrl->srs_feedback.tpmi = 0;
+  sched_ctrl->srs_feedback.sri = 0;
+}
+
 // main function to configure parameters of current BWP
 void configure_UE_BWP(gNB_MAC_INST *nr_mac,
                       NR_ServingCellConfigCommon_t *scc,
@@ -2426,6 +2433,10 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
     UL_BWP->pucch_ConfigCommon = scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup;
 
   if(UE) {
+
+    // Reset required fields in sched_ctrl (e.g. ul_ri and tpmi)
+    reset_sched_ctrl(sched_ctrl);
+
     // setting PDCCH related structures for sched_ctrl
     sched_ctrl->search_space = get_searchspace(scc,
                                                bwpd,

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c

@@ -33,6 +33,8 @@
 #include "nfapi/oai_integration/vendor_ext.h"
 #include "common/utils/nr/nr_common.h"
 
+//#define SRS_DEBUG
+
 extern RAN_CONTEXT_t RC;
 
 const uint16_t m_SRS[64] = { 4, 8, 12, 16, 16, 20, 24, 24, 28, 32, 36, 40, 48, 48, 52, 56, 60, 64, 72, 72, 76, 80, 88,
@@ -40,6 +42,101 @@ const uint16_t m_SRS[64] = { 4, 8, 12, 16, 16, 20, 24, 24, 28, 32, 36, 40, 48, 4
                              160, 160, 168, 176, 184, 192, 192, 192, 192, 208, 216, 224, 240, 240, 240, 240, 256, 256,
                              256, 264, 272, 272, 272 };
 
+uint32_t max4(uint32_t a, uint32_t b,uint32_t c,uint32_t d) {
+  int x = max(a, b);
+  x = max(x, c);
+  x = max(x, d);
+  return x;
+}
+
+void nr_srs_ri_computation(const nfapi_nr_srs_normalized_channel_iq_matrix_t *nr_srs_normalized_channel_iq_matrix,
+                           const NR_UE_UL_BWP_t *current_BWP,
+                           uint8_t *ul_ri)
+{
+  // If the gNB or UE has 1 antenna, the rank is always 1, i.e., *ul_ri = 0.
+  // For 2x2 scenario, we compute the rank of channel.
+  // The computation for 2x4, 4x2, 4x4, ... scenarios are not implemented yet. In these cases, the function sets *ul_ri = 0, which is always a valid value.
+  if (!(nr_srs_normalized_channel_iq_matrix->num_gnb_antenna_elements == 2 &&
+        nr_srs_normalized_channel_iq_matrix->num_ue_srs_ports == 2 &&
+        current_BWP->pusch_Config && *current_BWP->pusch_Config->maxRank == 2)) {
+    *ul_ri = 0;
+    return;
+  }
+
+  const c16_t *ch = (c16_t *)nr_srs_normalized_channel_iq_matrix->channel_matrix;
+  const uint16_t num_gnb_antenna_elements = nr_srs_normalized_channel_iq_matrix->num_gnb_antenna_elements;
+  const uint16_t num_prgs = nr_srs_normalized_channel_iq_matrix->num_prgs;
+  const uint16_t base00_idx = 0 * num_gnb_antenna_elements * num_prgs + 0 * num_prgs; // Rx antenna 0, Tx port 0
+  const uint16_t base01_idx = 1 * num_gnb_antenna_elements * num_prgs + 0 * num_prgs; // Rx antenna 0, Tx port 1
+  const uint16_t base10_idx = 0 * num_gnb_antenna_elements * num_prgs + 1 * num_prgs; // Rx antenna 1, Tx port 0
+  const uint16_t base11_idx = 1 * num_gnb_antenna_elements * num_prgs + 1 * num_prgs; // Rx antenna 1, Tx port 1
+  const uint8_t bshift = 2;
+  const int16_t cond_dB_threshold = 5;
+  int count = 0;
+
+  for(int pI = 0; pI < num_prgs; pI++) {
+
+    /* Hh x H =
+    *           | conjch00 conjch10 | x | ch00 ch01 | = | conjch00*ch00+conjch10*ch10 conjch00*ch01+conjch10*ch11 |
+    *           | conjch01 conjch11 |   | ch10 ch11 |   | conjch01*ch00+conjch11*ch10 conjch01*ch01+conjch11*ch11 |
+    */
+
+    const c32_t ch00 = {ch[base00_idx + pI].r, ch[base00_idx + pI].i};
+    const c32_t ch01 = {ch[base01_idx + pI].r, ch[base01_idx + pI].i};
+    const c32_t ch10 = {ch[base10_idx + pI].r, ch[base10_idx + pI].i};
+    const c32_t ch11 = {ch[base11_idx + pI].r, ch[base11_idx + pI].i};
+
+    c16_t HhxH00 = {(int16_t)((ch00.r * ch00.r + ch00.i * ch00.i + ch10.r * ch10.r + ch10.i * ch10.i) >> bshift),
+                    (int16_t)((ch00.r * ch00.i - ch00.i * ch00.r + ch10.r * ch10.i - ch10.i * ch10.r) >> bshift)};
+
+    c16_t HhxH01 = {(int16_t)((ch00.r * ch01.r + ch00.i * ch01.i + ch10.r * ch11.r + ch10.i * ch11.i) >> bshift),
+                    (int16_t)((ch00.r * ch01.i - ch00.i * ch01.r + ch10.r * ch11.i - ch10.i * ch11.r) >> bshift)};
+
+    c16_t HhxH10 = {(int16_t)((ch01.r * ch00.r + ch01.i * ch00.i + ch11.r * ch10.r + ch11.i * ch10.i) >> bshift),
+                    (int16_t)((ch01.r * ch00.i - ch01.i * ch00.r + ch11.r * ch10.i - ch11.i * ch10.r) >> bshift)};
+
+    c16_t HhxH11 = {(int16_t)((ch01.r * ch01.r + ch01.i * ch01.i + ch11.r * ch11.r + ch11.i * ch11.i) >> bshift),
+                    (int16_t)((ch01.r * ch01.i - ch01.i * ch01.r + ch11.r * ch11.i - ch11.i * ch11.r) >> bshift)};
+
+    int8_t det_HhxH_dB = dB_fixed(HhxH00.r * HhxH11.r - HhxH00.i * HhxH11.i - HhxH01.r * HhxH10.r + HhxH01.i * HhxH10.i);
+
+    int8_t norm_HhxH_2_dB = dB_fixed(max4(HhxH00.r*HhxH00.r + HhxH00.i*HhxH00.i,
+                                          HhxH01.r*HhxH01.r + HhxH01.i*HhxH01.i,
+                                          HhxH10.r*HhxH10.r + HhxH10.i*HhxH10.i,
+                                          HhxH11.r*HhxH11.r + HhxH11.i*HhxH11.i));
+
+    int8_t cond_db = norm_HhxH_2_dB - det_HhxH_dB;
+
+    if (cond_db < cond_dB_threshold) {
+      count++;
+    } else {
+      count--;
+    }
+
+#ifdef SRS_DEBUG
+    LOG_I(NR_MAC, "H00[%i] = %i + j(%i)\n", pI, ch[base00_idx+pI].r, ch[base00_idx+pI].i);
+    LOG_I(NR_MAC, "H01[%i] = %i + j(%i)\n", pI, ch[base01_idx+pI].r, ch[base01_idx+pI].i);
+    LOG_I(NR_MAC, "H10[%i] = %i + j(%i)\n", pI, ch[base10_idx+pI].r, ch[base10_idx+pI].i);
+    LOG_I(NR_MAC, "H11[%i] = %i + j(%i)\n", pI, ch[base11_idx+pI].r, ch[base11_idx+pI].i);
+    LOG_I(NR_MAC, "HhxH00[%i] = %i + j(%i)\n", pI, HhxH00.r, HhxH00.i);
+    LOG_I(NR_MAC, "HhxH01[%i] = %i + j(%i)\n", pI, HhxH01.r, HhxH01.i);
+    LOG_I(NR_MAC, "HhxH10[%i] = %i + j(%i)\n", pI, HhxH10.r, HhxH10.i);
+    LOG_I(NR_MAC, "HhxH11[%i] = %i + j(%i)\n", pI, HhxH11.r, HhxH11.i);
+    LOG_I(NR_MAC, "det_HhxH[%i] = %i\n", pI, det_HhxH_dB);
+    LOG_I(NR_MAC, "norm_HhxH_2_dB[%i] = %i\n", pI, norm_HhxH_2_dB);
+#endif
+  }
+
+  if (count > 0) {
+    *ul_ri = 1;
+  }
+
+#ifdef SRS_DEBUG
+  LOG_I(NR_MAC, "ul_ri = %i (count = %i)\n", (*ul_ri)+1, count);
+#endif
+
+}
+
 void nr_configure_srs(nfapi_nr_srs_pdu_t *srs_pdu, int module_id, int CC_id,NR_UE_info_t*  UE, NR_SRS_ResourceSet_t *srs_resource_set, NR_SRS_Resource_t *srs_resource) {
 
   NR_UE_UL_BWP_t *current_BWP = &UE->current_UL_BWP;

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c

@@ -1033,19 +1033,27 @@ void get_precoder_matrix_coef(char *w,
                               const uint16_t num_ue_srs_ports,
                               const uint8_t transform_precoding,
                               const uint8_t tpmi,
-                              const uint8_t uI) {
+                              const uint8_t uI,
+                              int layer_idx)
+{
   if (ul_ri == 0) {
     if (num_ue_srs_ports == 2) {
-      *w = *table_38211_6_3_1_5_1[tpmi][uI];
+      *w = table_38211_6_3_1_5_1[tpmi][uI][layer_idx];
     } else {
       if (transform_precoding == NR_PUSCH_Config__transformPrecoder_enabled) {
-        *w = *table_38211_6_3_1_5_2[tpmi][uI];
+        *w = table_38211_6_3_1_5_2[tpmi][uI][layer_idx];
       } else {
-        *w = *table_38211_6_3_1_5_3[tpmi][uI];
+        *w = table_38211_6_3_1_5_3[tpmi][uI][layer_idx];
       }
     }
+  } else if (ul_ri == 1) {
+    if (num_ue_srs_ports == 2) {
+      *w = table_38211_6_3_1_5_4[tpmi][uI][layer_idx];
+    } else {
+      *w = table_38211_6_3_1_5_5[tpmi][uI][layer_idx];
+    }
   } else {
-    AssertFatal(1==0,"Function get_precoder_matrix_coef() does not support %i layers yet!\n", ul_ri+1);
+    AssertFatal(1 == 0, "Function get_precoder_matrix_coef() does not support %i layers yet!\n", ul_ri + 1);
   }
 }
 
@@ -1058,20 +1066,21 @@ int nr_srs_tpmi_estimation(const NR_PUSCH_Config_t *pusch_Config,
                            const uint16_t prg_size,
                            const uint16_t num_prgs,
                            const uint8_t ul_ri) {
+  if (ul_ri > 1) {
+    LOG_D(NR_MAC, "TPMI computation for ul_ri %i is not implemented yet!\n", ul_ri);
+    return 0;
+  }
 
   uint8_t tpmi_sel = 0;
-  int16_t precoded_channel_matrix_re[num_prgs*num_gnb_antenna_elements];
-  int16_t precoded_channel_matrix_im[num_prgs*num_gnb_antenna_elements];
-  c16_t *channel_matrix16 = (c16_t*)channel_matrix;
+  const uint8_t nrOfLayers = ul_ri + 1;
+  int16_t precoded_channel_matrix_re[num_prgs * num_gnb_antenna_elements];
+  int16_t precoded_channel_matrix_im[num_prgs * num_gnb_antenna_elements];
+  c16_t *channel_matrix16 = (c16_t *)channel_matrix;
   uint32_t max_precoded_signal_power = 0;
   int additional_max_tpmi = -1;
   char w;
 
-  uint8_t max_tpmi = get_max_tpmi(pusch_Config,
-                                  num_ue_srs_ports,
-                                  &ul_ri,
-                                  &additional_max_tpmi);
-
+  uint8_t max_tpmi = get_max_tpmi(pusch_Config, num_ue_srs_ports, &nrOfLayers, &additional_max_tpmi);
   uint8_t end_tpmi_loop = additional_max_tpmi > max_tpmi ? additional_max_tpmi : max_tpmi;
 
   //                      channel_matrix                          x   precoder_matrix
@@ -1080,44 +1089,43 @@ int nr_srs_tpmi_estimation(const NR_PUSCH_Config_t *pusch_Config,
   // [ (gI=2,uI=0) (gI=2,uI=1) ... (gI=2,uI=num_ue_srs_ports-1) ]     [uI=2]
   //                           ...                                     ...
 
-  for(uint8_t tpmi = 0; tpmi<=end_tpmi_loop; tpmi++) {
-
+  for (uint8_t tpmi = 0; tpmi <= end_tpmi_loop && end_tpmi_loop > 0; tpmi++) {
     if (tpmi > max_tpmi) {
       tpmi = end_tpmi_loop;
     }
 
-    for(int pI = 0; pI <num_prgs; pI++) {
-      for(int gI = 0; gI < num_gnb_antenna_elements; gI++) {
-
-        uint16_t index_gI_pI = gI*num_prgs + pI;
+    for (int pI = 0; pI < num_prgs; pI++) {
+      for (int gI = 0; gI < num_gnb_antenna_elements; gI++) {
+        uint16_t index_gI_pI = gI * num_prgs + pI;
         precoded_channel_matrix_re[index_gI_pI] = 0;
         precoded_channel_matrix_im[index_gI_pI] = 0;
 
-        for(int uI = 0; uI < num_ue_srs_ports; uI++) {
+        for (int uI = 0; uI < num_ue_srs_ports; uI++) {
+          for (int layer_idx = 0; layer_idx < nrOfLayers; layer_idx++) {
+            uint16_t index = uI * num_gnb_antenna_elements * num_prgs + index_gI_pI;
+            get_precoder_matrix_coef(&w, ul_ri, num_ue_srs_ports, transform_precoding, tpmi, uI, layer_idx);
+            c16_t h_times_w = nr_h_times_w(channel_matrix16[index], w);
 
-          uint16_t index = uI*num_gnb_antenna_elements*num_prgs + index_gI_pI;
-          get_precoder_matrix_coef(&w, ul_ri, num_ue_srs_ports, transform_precoding, tpmi, uI);
-          c16_t h_times_w = nr_h_times_w(channel_matrix16[index], w);
-
-          precoded_channel_matrix_re[index_gI_pI] += h_times_w.r;
-          precoded_channel_matrix_im[index_gI_pI] += h_times_w.i;
+            precoded_channel_matrix_re[index_gI_pI] += h_times_w.r;
+            precoded_channel_matrix_im[index_gI_pI] += h_times_w.i;
 
 #ifdef SRS_IND_DEBUG
-          LOG_I(NR_MAC, "(uI %i, gI %i, pI %i) channel_matrix --> real %i, imag %i\n",
-                uI, gI, pI, channel_matrix16[index].r, channel_matrix16[index].i);
+            LOG_I(NR_MAC, "(pI %i, gI %i,  uI %i, layer_idx %i) w = %c, channel_matrix --> real %i, imag %i\n",
+                  pI, gI, uI, layer_idx, w, channel_matrix16[index].r, channel_matrix16[index].i);
 #endif
+          }
         }
 
 #ifdef SRS_IND_DEBUG
-        LOG_I(NR_MAC, "(gI %i, pI %i) precoded_channel_coef --> real %i, imag %i\n",
-              gI, pI, precoded_channel_matrix_re[index_gI_pI], precoded_channel_matrix_im[index_gI_pI]);
+        LOG_I(NR_MAC, "(pI %i, gI %i) precoded_channel_coef --> real %i, imag %i\n",
+              pI, gI, precoded_channel_matrix_re[index_gI_pI], precoded_channel_matrix_im[index_gI_pI]);
 #endif
       }
     }
 
     uint32_t precoded_signal_power = calc_power_complex(precoded_channel_matrix_re,
                                                         precoded_channel_matrix_im,
-                                                        num_prgs*num_gnb_antenna_elements);
+                                                        num_prgs * num_gnb_antenna_elements);
 
 #ifdef SRS_IND_DEBUG
     LOG_I(NR_MAC, "(tpmi %i) precoded_signal_power = %i\n", tpmi, precoded_signal_power);
@@ -1242,11 +1250,12 @@ void handle_nr_srs_measurements(const module_id_t module_id,
       }
 #endif
 
-      // TODO: This should be improved
       NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl;
       NR_UE_UL_BWP_t *current_BWP = &UE->current_UL_BWP;
       sched_ctrl->srs_feedback.sri = NR_SRS_SRI_0;
-      sched_ctrl->srs_feedback.ul_ri = 0; // TODO: Compute this
+
+      nr_srs_ri_computation(&nr_srs_normalized_channel_iq_matrix, current_BWP, &sched_ctrl->srs_feedback.ul_ri);
+
       sched_ctrl->srs_feedback.tpmi = nr_srs_tpmi_estimation(current_BWP->pusch_Config,
                                                              current_BWP->transform_precoding,
                                                              nr_srs_normalized_channel_iq_matrix.channel_matrix,
@@ -1256,7 +1265,9 @@ void handle_nr_srs_measurements(const module_id_t module_id,
                                                              nr_srs_normalized_channel_iq_matrix.prg_size,
                                                              nr_srs_normalized_channel_iq_matrix.num_prgs,
                                                              sched_ctrl->srs_feedback.ul_ri);
+
       sprintf(stats->srs_stats, "UL-RI %d, TPMI %d", sched_ctrl->srs_feedback.ul_ri + 1, sched_ctrl->srs_feedback.tpmi);
+
       break;
     }
 
@@ -1411,7 +1422,7 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac,
 
   int rbStart = 0; // wrt BWP start
   const uint16_t bwpSize = UE->current_UL_BWP.BWPSize;
-  const uint8_t nrOfLayers = 1;
+  const uint8_t nrOfLayers = retInfo->nrOfLayers;
   LOG_D(NR_MAC,"retInfo->time_domain_allocation = %d, tda = %d\n", retInfo->time_domain_allocation, tda);
   LOG_D(NR_MAC,"tbs %d\n",retInfo->tb_size);
   if (tda == retInfo->time_domain_allocation &&
@@ -1445,7 +1456,7 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac,
     uint16_t new_rbSize;
     bool success = nr_find_nb_rb(retInfo->Qm,
                                  retInfo->R,
-                                 1, // layers
+                                 nrOfLayers,
                                  tda_info.nrOfSymbols,
                                  dmrs_info.N_PRB_DMRS * dmrs_info.num_dmrs_symb,
                                  retInfo->tb_size,
@@ -1525,7 +1536,6 @@ static int comparator(const void *p, const void *q) {
   return ((UEsched_t*)p)->coef < ((UEsched_t*)q)->coef;
 }
 
-
 void pf_ul(module_id_t module_id,
            frame_t frame,
            sub_frame_t slot,
@@ -1627,7 +1637,7 @@ void pf_ul(module_id_t module_id,
         continue;
       }
 
-      sched_pusch->nrOfLayers = 1;
+      sched_pusch->nrOfLayers = sched_ctrl->srs_feedback.ul_ri + 1;
       sched_pusch->time_domain_allocation = get_ul_tda(nrmac, scc, sched_pusch->slot);
       sched_pusch->tda_info = nr_get_pusch_tda_info(current_BWP, sched_pusch->time_domain_allocation);
       sched_pusch->dmrs_info = get_ul_dmrs_params(scc,
@@ -1665,8 +1675,7 @@ void pf_ul(module_id_t module_id,
                                             sched_pusch->dmrs_info.N_PRB_DMRS * sched_pusch->dmrs_info.num_dmrs_symb,
                                             0, // nb_rb_oh
                                             0,
-                                            sched_pusch->nrOfLayers)
-                             >> 3;
+                                            sched_pusch->nrOfLayers) >> 3;
 
       /* Mark the corresponding RBs as used */
       n_rb_sched -= sched_pusch->rbSize;
@@ -1690,7 +1699,7 @@ void pf_ul(module_id_t module_id,
 
   qsort(UE_sched, sizeof(*UE_sched), sizeofArray(UE_sched), comparator);
   UEsched_t *iterator=UE_sched;
-  
+
   /* Loop UE_sched to find max coeff and allocate transmission */
   while (remainUEs> 0 && n_rb_sched >= min_rb && iterator->UE != NULL) {
 
@@ -1714,7 +1723,7 @@ void pf_ul(module_id_t module_id,
 
     NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch;
 
-    sched_pusch->nrOfLayers = 1;
+    sched_pusch->nrOfLayers = sched_ctrl->srs_feedback.ul_ri + 1;
     sched_pusch->time_domain_allocation = get_ul_tda(nrmac, scc, sched_pusch->slot);
     sched_pusch->tda_info = nr_get_pusch_tda_info(current_BWP, sched_pusch->time_domain_allocation);
     sched_pusch->dmrs_info = get_ul_dmrs_params(scc,
@@ -1755,7 +1764,7 @@ void pf_ul(module_id_t module_id,
     uint32_t TBS = 0;
     nr_find_nb_rb(sched_pusch->Qm,
                   sched_pusch->R,
-                  1, // layers
+                  sched_pusch->nrOfLayers,
                   sched_pusch->tda_info.nrOfSymbols,
                   sched_pusch->dmrs_info.N_PRB_DMRS * sched_pusch->dmrs_info.num_dmrs_symb,
                   B,
@@ -2001,9 +2010,10 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
       /* Save information on MCS, TBS etc for the current initial transmission
        * so we have access to it when retransmitting */
       cur_harq->sched_pusch = *sched_pusch;
-      /* save which time allocation has been used, to be used on
+      /* save which time allocation and nrOfLayers have been used, to be used on
        * retransmissions */
       cur_harq->sched_pusch.time_domain_allocation = sched_pusch->time_domain_allocation;
+      cur_harq->sched_pusch.nrOfLayers = sched_pusch->nrOfLayers;
       sched_ctrl->sched_ul_bytes += sched_pusch->tb_size;
       UE->mac_stats.ul.total_rbs += sched_pusch->rbSize;
 

openair2/LAYER2/NR_MAC_gNB/mac_proto.h

@@ -199,6 +199,10 @@ void nr_schedule_pucch(gNB_MAC_INST *nrmac,
                        frame_t frameP,
                        sub_frame_t slotP);
 
+void nr_srs_ri_computation(const nfapi_nr_srs_normalized_channel_iq_matrix_t *nr_srs_normalized_channel_iq_matrix,
+                           const NR_UE_UL_BWP_t *current_BWP,
+                           uint8_t *ul_ri);
+
 void nr_schedule_srs(int module_id, frame_t frame);
 
 void nr_csirs_scheduling(int Mod_idP,

openair2/RRC/NR/MESSAGES/asn1_msg.c

@@ -740,15 +740,23 @@ void fill_initial_SpCellConfig(int uid,
 
   initialUplinkBWP->pusch_Config = config_pusch(NULL, scc);
 
-  long maxMIMO_Layers = uplinkConfig &&
+  long maxMIMO_Layers = configuration->pusch_AntennaPorts; /*uplinkConfig &&
                                 uplinkConfig->pusch_ServingCellConfig &&
                                 uplinkConfig->pusch_ServingCellConfig->choice.setup->ext1 &&
                                 uplinkConfig->pusch_ServingCellConfig->choice.setup->ext1->maxMIMO_Layers ?
-                            *uplinkConfig->pusch_ServingCellConfig->choice.setup->ext1->maxMIMO_Layers : 1;
+                            *uplinkConfig->pusch_ServingCellConfig->choice.setup->ext1->maxMIMO_Layers : 1;*/
+
+  if (uplinkConfig->initialUplinkBWP->pusch_Config) {
+    NR_PUSCH_Config_t *pusch_Config = uplinkConfig->initialUplinkBWP->pusch_Config->choice.setup;
+    if (pusch_Config->maxRank == NULL) {
+      pusch_Config->maxRank = calloc(1, sizeof(*pusch_Config->maxRank));
+    }
+    *pusch_Config->maxRank = maxMIMO_Layers;
+  }
 
   // We are using do_srs = 0 here because the periodic SRS will only be enabled in update_cellGroupConfig() if do_srs == 1
   initialUplinkBWP->srs_Config = calloc(1,sizeof(*initialUplinkBWP->srs_Config));
-  config_srs(initialUplinkBWP->srs_Config, NULL, curr_bwp, uid, 0, maxMIMO_Layers, 0);
+  config_srs(initialUplinkBWP->srs_Config, NULL, curr_bwp, uid, 0, maxMIMO_Layers, configuration->do_SRS);
 
   scheduling_request_config(scc, pucch_Config);
 
@@ -1181,24 +1189,58 @@ void update_cellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig,
   NR_ServingCellConfigCommon_t *scc = configuration ? configuration->scc : NULL;
 
   if(scc) {
-    int curr_bwp = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,MAX_BWP_SIZE);
+
+    int curr_bwp = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
     NR_UplinkConfig_t *uplinkConfig = SpCellConfig && SpCellConfig->spCellConfigDedicated ? SpCellConfig->spCellConfigDedicated->uplinkConfig : NULL;
+
+    if (/*uecap &&
+        uecap->featureSets &&
+        uecap->featureSets->featureSetsUplinkPerCC &&
+        uecap->featureSets->featureSetsUplinkPerCC->list.count > 0*/ true) {
+      //NR_FeatureSetUplinkPerCC_t *ul_feature_setup_per_cc = uecap->featureSets->featureSetsUplinkPerCC->list.array[0];
+      uint8_t ul_max_layers = configuration->pusch_AntennaPorts;
+      /*if (ul_feature_setup_per_cc->mimo_CB_PUSCH->maxNumberMIMO_LayersCB_PUSCH) {
+        switch (*ul_feature_setup_per_cc->mimo_CB_PUSCH->maxNumberMIMO_LayersCB_PUSCH) {
+          case NR_MIMO_LayersUL_twoLayers:
+            ul_max_layers = 2;
+            break;
+          case NR_MIMO_LayersUL_fourLayers:
+            ul_max_layers = 4;
+            break;
+          default:
+            ul_max_layers = 1;
+        }
+      }*/
+      ul_max_layers = min(ul_max_layers, configuration->pusch_AntennaPorts);
+      if (uplinkConfig->initialUplinkBWP->pusch_Config) {
+        NR_PUSCH_Config_t *pusch_Config = uplinkConfig->initialUplinkBWP->pusch_Config->choice.setup;
+        if (pusch_Config->maxRank == NULL) {
+          pusch_Config->maxRank = calloc(1, sizeof(*pusch_Config->maxRank));
+        }
+        *pusch_Config->maxRank = ul_max_layers;
+      }
+      if (uplinkConfig->pusch_ServingCellConfig == NULL) {
+        uplinkConfig->pusch_ServingCellConfig = calloc(1, sizeof(*uplinkConfig->pusch_ServingCellConfig));
+        uplinkConfig->pusch_ServingCellConfig->present = NR_SetupRelease_PUSCH_ServingCellConfig_PR_setup;
+        uplinkConfig->pusch_ServingCellConfig->choice.setup = calloc(1, sizeof(*uplinkConfig->pusch_ServingCellConfig->choice.setup));
+        uplinkConfig->pusch_ServingCellConfig->choice.setup->ext1 = calloc(1, sizeof(*uplinkConfig->pusch_ServingCellConfig->choice.setup->ext1));
+        uplinkConfig->pusch_ServingCellConfig->choice.setup->ext1->maxMIMO_Layers = calloc(1, sizeof(*uplinkConfig->pusch_ServingCellConfig->choice.setup->ext1->maxMIMO_Layers));
+      }
+      *uplinkConfig->pusch_ServingCellConfig->choice.setup->ext1->maxMIMO_Layers = ul_max_layers;
+    }
+
     long maxMIMO_Layers = uplinkConfig &&
                                   uplinkConfig->pusch_ServingCellConfig &&
                                   uplinkConfig->pusch_ServingCellConfig->choice.setup->ext1 &&
                                   uplinkConfig->pusch_ServingCellConfig->choice.setup->ext1->maxMIMO_Layers ?
                               *uplinkConfig->pusch_ServingCellConfig->choice.setup->ext1->maxMIMO_Layers : 1;
-    // SRS configuration
-    if (configuration->do_SRS &&
-        SpCellConfig &&
-        SpCellConfig->spCellConfigDedicated &&
-        SpCellConfig->spCellConfigDedicated->uplinkConfig &&
-        SpCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP) {
-      if (!SpCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->srs_Config) {
-        SpCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->srs_Config =
-            calloc(1,sizeof(*SpCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->srs_Config));
+
+    // UL and SRS configuration
+    if (configuration->do_SRS && uplinkConfig && uplinkConfig->initialUplinkBWP) {
+      if (!uplinkConfig->initialUplinkBWP->srs_Config) {
+        uplinkConfig->initialUplinkBWP->srs_Config = calloc(1, sizeof(*uplinkConfig->initialUplinkBWP->srs_Config));
       }
-      config_srs(SpCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->srs_Config,
+      config_srs(uplinkConfig->initialUplinkBWP->srs_Config,
                  uecap,
                  curr_bwp,
                  uid,
@@ -1212,7 +1254,7 @@ void update_cellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig,
     set_dl_mcs_table(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing,
                      configuration->force_256qam_off ? NULL : uecap, bwp_Dedicated, scc);
     struct NR_ServingCellConfig__downlinkBWP_ToAddModList *DL_BWP_list = SpCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList;
-    struct NR_UplinkConfig__uplinkBWP_ToAddModList *UL_BWP_list = SpCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList;
+    struct NR_UplinkConfig__uplinkBWP_ToAddModList *UL_BWP_list = uplinkConfig->uplinkBWP_ToAddModList;
     if (DL_BWP_list) {
       for (int i=0; i<DL_BWP_list->list.count; i++){
         NR_BWP_Downlink_t *bwp = DL_BWP_list->list.array[i];
@@ -1220,7 +1262,7 @@ void update_cellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig,
         set_dl_mcs_table(scs, configuration->force_256qam_off ? NULL : uecap, bwp->bwp_Dedicated, scc);
       }
     }
-    if (UL_BWP_list) {
+    if (configuration->do_SRS && UL_BWP_list) {
       for (int i=0; i<UL_BWP_list->list.count; i++) {
         NR_BWP_Uplink_t *ul_bwp = UL_BWP_list->list.array[i];
         int bwp_size = NRRIV2BW(ul_bwp->bwp_Common->genericParameters.locationAndBandwidth,MAX_BWP_SIZE);

openair2/RRC/NR/nr_rrc_config.c

@@ -467,12 +467,12 @@ void config_srs(NR_SetupRelease_SRS_Config_t *setup_release_srs_Config,
   srs_res0->srs_ResourceId = res_id;
   srs_res0->nrofSRS_Ports = NR_SRS_Resource__nrofSRS_Ports_port1;
   if (do_srs) {
-    long nrofSRS_Ports = 1;
-    if (uecap &&
+    long nrofSRS_Ports = maxMIMO_Layers;
+    if (/*uecap &&
         uecap->featureSets &&
         uecap->featureSets->featureSetsUplink &&
-        uecap->featureSets->featureSetsUplink->list.count > 0) {
-      NR_FeatureSetUplink_t *ul_feature_setup = uecap->featureSets->featureSetsUplink->list.array[0];
+        uecap->featureSets->featureSetsUplink->list.count > 0*/ true) {
+      /*NR_FeatureSetUplink_t *ul_feature_setup = uecap->featureSets->featureSetsUplink->list.array[0];
       switch (ul_feature_setup->supportedSRS_Resources->maxNumberSRS_Ports_PerResource) {
         case NR_SRS_Resources__maxNumberSRS_Ports_PerResource_n1:
           nrofSRS_Ports = 1;
@@ -486,7 +486,7 @@ void config_srs(NR_SetupRelease_SRS_Config_t *setup_release_srs_Config,
         default:
           LOG_E(NR_RRC, "Max Number of SRS Ports Per Resource %ld is invalid!\n",
                 ul_feature_setup->supportedSRS_Resources->maxNumberSRS_Ports_PerResource);
-      }
+      }*/
       nrofSRS_Ports = min(nrofSRS_Ports, maxMIMO_Layers);
       switch (nrofSRS_Ports) {
         case 1:
@@ -499,8 +499,7 @@ void config_srs(NR_SetupRelease_SRS_Config_t *setup_release_srs_Config,
           srs_res0->nrofSRS_Ports = NR_SRS_Resource__nrofSRS_Ports_ports4;
           break;
         default:
-          LOG_E(NR_RRC, "Number of SRS Ports Per Resource %ld is invalid!\n",
-                ul_feature_setup->supportedSRS_Resources->maxNumberSRS_Ports_PerResource);
+          LOG_E(NR_RRC, "Number of SRS Ports Per Resource is invalid!\n");
       }
     }
     LOG_I(NR_RRC, "SRS configured with %d ports\n", 1<<srs_res0->nrofSRS_Ports);
@@ -997,10 +996,7 @@ struct NR_SetupRelease_PDSCH_Config *config_pdsch(uint64_t ssb_bitmap, int bwp_I
   pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->present = NR_SetupRelease_DMRS_DownlinkConfig_PR_setup;
   pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup = calloc(1, sizeof(*pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup));
   NR_DMRS_DownlinkConfig_t *dmrs_DownlinkForPDSCH_MappingTypeA = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup;
-  if ((get_softmodem_params()->do_ra || get_softmodem_params()->phy_test) && dl_antenna_ports > 1) // for MIMO, we use DMRS Config Type 2 but only with OAI UE
-    dmrs_DownlinkForPDSCH_MappingTypeA->dmrs_Type = calloc(1, sizeof(*dmrs_DownlinkForPDSCH_MappingTypeA->dmrs_Type));
-  else
-    dmrs_DownlinkForPDSCH_MappingTypeA->dmrs_Type = NULL;
+  dmrs_DownlinkForPDSCH_MappingTypeA->dmrs_Type = NULL;
   dmrs_DownlinkForPDSCH_MappingTypeA->maxLength = NULL;
   dmrs_DownlinkForPDSCH_MappingTypeA->scramblingID0 = NULL;
   dmrs_DownlinkForPDSCH_MappingTypeA->scramblingID1 = NULL;

openair2/RRC/NR_UE/rrc_UE.c

@@ -2521,7 +2521,7 @@ nr_rrc_ue_process_ueCapabilityEnquiry(
   NR_UE_CapabilityRAT_Container_t ue_CapabilityRAT_Container;
   char UE_NR_Capability_xer[65536];
   size_t size;
-  uint8_t buffer[200];
+  uint8_t buffer[500];
   int i;
   LOG_I(NR_RRC,"[UE %d] Frame %d: Receiving from SRB1 (DL-DCCH), Processing UECapabilityEnquiry (gNB %d)\n",
         ctxt_pP->module_id,
@@ -2605,7 +2605,7 @@ nr_rrc_ue_process_ueCapabilityEnquiry(
       ASN_SEQUENCE_ADD(
         &ul_dcch_msg.message.choice.c1->choice.ueCapabilityInformation->criticalExtensions.choice.ueCapabilityInformation->ue_CapabilityRAT_ContainerList->list,
         &ue_CapabilityRAT_Container);
-      enc_rval = uper_encode_to_buffer(&asn_DEF_NR_UL_DCCH_Message, NULL, (void *) &ul_dcch_msg, buffer, 100);
+      enc_rval = uper_encode_to_buffer(&asn_DEF_NR_UL_DCCH_Message, NULL, (void *) &ul_dcch_msg, buffer, 500);
       AssertFatal (enc_rval.encoded > 0, "ASN1 message encoding failed (%s, %jd)!\n",
                    enc_rval.failed_type->name, enc_rval.encoded);
 

openair2/RRC/NR_UE/rrc_defs.h

@@ -73,7 +73,7 @@ typedef enum {
 #define MAX_UE_NR_CAPABILITY_SIZE 2048
 typedef struct OAI_NR_UECapability_s {
   uint8_t sdu[MAX_UE_NR_CAPABILITY_SIZE];
-  uint8_t sdu_size;
+  uint16_t sdu_size;
   NR_UE_NR_Capability_t *UE_NR_Capability;
 } OAI_NR_UECapability_t;
 
@@ -129,7 +129,7 @@ typedef struct NR_UE_RRC_INST_s {
     uint8_t                        MBMS_flag;
     OAI_NR_UECapability_t          *UECap;
     uint8_t 			   *UECapability;
-    uint8_t                        UECapability_size;
+    uint16_t                       UECapability_size;
 
     RA_trigger_t                   ra_trigger;
     BIT_STRING_t                   requested_SI_List;

targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb_2x2.conf

@@ -0,0 +1,276 @@
+Active_gNBs = ( "gNB-OAI");
+# Asn1_verbosity, choice in: none, info, annoying
+Asn1_verbosity = "none";
+
+gNBs =
+(
+ {
+    ////////// Identification parameters:
+    gNB_ID    =  0xe00;
+    gNB_name  =  "gNB-OAI";
+
+    // Tracking area code, 0x0000 and 0xfffe are reserved values
+    tracking_area_code  =  1;
+    plmn_list = ({ mcc = 001; mnc = 01; mnc_length = 2; snssaiList = ({ sst = 1; sd = 0x1; }) });
+
+    nr_cellid = 12345678L;
+
+    ////////// Physical parameters:
+    min_rxtxtime                                              = 6;
+    pdsch_AntennaPorts_XP                                     = 2;
+    pusch_AntennaPorts                                        = 2;
+    do_CSIRS                                                  = 1;
+    do_SRS                                                    = 1;
+
+     pdcch_ConfigSIB1 = (
+      {
+        controlResourceSetZero = 12;
+        searchSpaceZero = 0;
+      }
+      );
+
+    servingCellConfigCommon = (
+    {
+ #spCellConfigCommon
+
+      physCellId                                                    = 0;
+
+#  downlinkConfigCommon
+    #frequencyInfoDL
+      # this is 3600 MHz + 43 PRBs@30kHz SCS (same as initial BWP)
+      absoluteFrequencySSB                                             = 641280;
+      dl_frequencyBand                                                 = 78;
+      # this is 3600 MHz
+      dl_absoluteFrequencyPointA                                       = 640008;
+      #scs-SpecificCarrierList
+        dl_offstToCarrier                                              = 0;
+# subcarrierSpacing
+# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
+        dl_subcarrierSpacing                                           = 1;
+        dl_carrierBandwidth                                            = 106;
+     #initialDownlinkBWP
+      #genericParameters
+        # this is RBstart=27,L=48 (275*(L-1))+RBstart
+        initialDLBWPlocationAndBandwidth                               = 28875; # 6366 12925 12956 28875 12952
+# subcarrierSpacing
+# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
+        initialDLBWPsubcarrierSpacing                                   = 1;
+      #pdcch-ConfigCommon
+        initialDLBWPcontrolResourceSetZero                              = 12;
+        initialDLBWPsearchSpaceZero                                     = 0;
+
+  #uplinkConfigCommon
+     #frequencyInfoUL
+      ul_frequencyBand                                              = 78;
+      #scs-SpecificCarrierList
+      ul_offstToCarrier                                             = 0;
+# subcarrierSpacing
+# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
+      ul_subcarrierSpacing                                          = 1;
+      ul_carrierBandwidth                                           = 106;
+      pMax                                                          = 20;
+     #initialUplinkBWP
+      #genericParameters
+        initialULBWPlocationAndBandwidth                            = 28875;
+# subcarrierSpacing
+# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
+        initialULBWPsubcarrierSpacing                               = 1;
+      #rach-ConfigCommon
+        #rach-ConfigGeneric
+          prach_ConfigurationIndex                                  = 98;
+#prach_msg1_FDM
+#0 = one, 1=two, 2=four, 3=eight
+          prach_msg1_FDM                                            = 0;
+          prach_msg1_FrequencyStart                                 = 0;
+          zeroCorrelationZoneConfig                                 = 13;
+          preambleReceivedTargetPower                               = -96;
+#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
+          preambleTransMax                                          = 6;
+#powerRampingStep
+# 0=dB0,1=dB2,2=dB4,3=dB6
+        powerRampingStep                                            = 1;
+#ra_ReponseWindow
+#1,2,4,8,10,20,40,80
+        ra_ResponseWindow                                           = 4;
+#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
+#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen
+        ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR                = 4;
+#oneHalf (0..15) 4,8,12,16,...60,64
+        ssb_perRACH_OccasionAndCB_PreamblesPerSSB                   = 14;
+#ra_ContentionResolutionTimer
+#(0..7) 8,16,24,32,40,48,56,64
+        ra_ContentionResolutionTimer                                = 7;
+        rsrp_ThresholdSSB                                           = 19;
+#prach-RootSequenceIndex_PR
+#1 = 839, 2 = 139
+        prach_RootSequenceIndex_PR                                  = 2;
+        prach_RootSequenceIndex                                     = 1;
+        # SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
+        #
+        msg1_SubcarrierSpacing                                      = 1,
+# restrictedSetConfig
+# 0=unrestricted, 1=restricted type A, 2=restricted type B
+        restrictedSetConfig                                         = 0,
+
+        msg3_DeltaPreamble                                          = 1;
+        p0_NominalWithGrant                                         =-90;
+
+# pucch-ConfigCommon setup :
+# pucchGroupHopping
+# 0 = neither, 1= group hopping, 2=sequence hopping
+        pucchGroupHopping                                           = 0;
+        hoppingId                                                   = 40;
+        p0_nominal                                                  = -90;
+# ssb_PositionsInBurs_BitmapPR
+# 1=short, 2=medium, 3=long
+      ssb_PositionsInBurst_PR                                       = 2;
+      ssb_PositionsInBurst_Bitmap                                   = 1;
+
+# ssb_periodicityServingCell
+# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
+      ssb_periodicityServingCell                                    = 2;
+
+# dmrs_TypeA_position
+# 0 = pos2, 1 = pos3
+      dmrs_TypeA_Position                                           = 0;
+
+# subcarrierSpacing
+# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
+      subcarrierSpacing                                             = 1;
+
+
+  #tdd-UL-DL-ConfigurationCommon
+# subcarrierSpacing
+# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
+      referenceSubcarrierSpacing                                    = 1;
+      # pattern1
+      # dl_UL_TransmissionPeriodicity
+      # 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
+      dl_UL_TransmissionPeriodicity                                 = 6;
+      nrofDownlinkSlots                                             = 7;
+      nrofDownlinkSymbols                                           = 6;
+      nrofUplinkSlots                                               = 2;
+      nrofUplinkSymbols                                             = 4;
+
+      ssPBCH_BlockPower                                             = -25;
+  }
+
+  );
+
+
+    # ------- SCTP definitions
+    SCTP :
+    {
+        # Number of streams to use in input/output
+        SCTP_INSTREAMS  = 2;
+        SCTP_OUTSTREAMS = 2;
+    };
+
+
+    ////////// AMF parameters:
+    amf_ip_address      = ( { ipv4       = "192.168.70.132";
+                              ipv6       = "192:168:30::17";
+                              active     = "yes";
+                              preference = "ipv4";
+                            }
+                          );
+
+
+    NETWORK_INTERFACES :
+    {
+        GNB_INTERFACE_NAME_FOR_NG_AMF            = "demo-oai";
+        GNB_IPV4_ADDRESS_FOR_NG_AMF              = "192.168.70.129/24";
+        GNB_INTERFACE_NAME_FOR_NGU               = "demo-oai";
+        GNB_IPV4_ADDRESS_FOR_NGU                 = "192.168.70.129/24";
+        GNB_PORT_FOR_S1U                         = 2152; # Spec 2152
+    };
+
+  }
+);
+
+MACRLCs = (
+{
+  num_cc                      = 1;
+  tr_s_preference             = "local_L1";
+  tr_n_preference             = "local_RRC";
+  pusch_TargetSNRx10          = 150;
+  pucch_TargetSNRx10          = 200;
+  ulsch_max_frame_inactivity  = 0;
+}
+);
+
+L1s = (
+{
+  num_cc = 1;
+  tr_n_preference       = "local_mac";
+  prach_dtx_threshold   = 120;
+  pucch0_dtx_threshold  = 100;
+  ofdm_offset_divisor   = 8; #set this to UINT_MAX for offset 0
+}
+);
+
+RUs = (
+{
+  local_rf       = "yes"
+  nb_tx          = 2
+  nb_rx          = 2
+  att_tx         = 12;
+  att_rx         = 12;
+  bands          = [78];
+  max_pdschReferenceSignalPower = -27;
+  max_rxgain                    = 114;
+  eNB_instances  = [0];
+  #beamforming 1x4 matrix:
+  bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000];
+  clock_src = "internal";
+}
+);
+
+THREAD_STRUCT = (
+{
+  #three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
+  parallel_config    = "PARALLEL_SINGLE_THREAD";
+  #two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
+  worker_config      = "WORKER_ENABLE";
+}
+);
+
+rfsimulator :
+{
+  serveraddr = "server";
+  serverport = "4043";
+  options = (); #("saviq"); or/and "chanmod"
+  modelname = "AWGN";
+  IQfile = "/tmp/rfsimulator.iqs";
+};
+
+security = {
+  # preferred ciphering algorithms
+  # the first one of the list that an UE supports in chosen
+  # valid values: nea0, nea1, nea2, nea3
+  ciphering_algorithms = ( "nea0" );
+
+  # preferred integrity algorithms
+  # the first one of the list that an UE supports in chosen
+  # valid values: nia0, nia1, nia2, nia3
+  integrity_algorithms = ( "nia2", "nia0" );
+
+  # setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter
+  # what 'ciphering_algorithms' configures; same thing for 'drb_integrity'
+  drb_ciphering = "yes";
+  drb_integrity = "no";
+};
+
+log_config :
+{
+  global_log_level                      ="info";
+  hw_log_level                          ="info";
+  phy_log_level                         ="info";
+  mac_log_level                         ="info";
+  rlc_log_level                         ="info";
+  pdcp_log_level                        ="info";
+  rrc_log_level                         ="info";
+  ngap_log_level                        ="debug";
+  f1ap_log_level                        ="debug";
+};
+

targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb_4x4.conf

@@ -0,0 +1,276 @@
+Active_gNBs = ( "gNB-OAI");
+# Asn1_verbosity, choice in: none, info, annoying
+Asn1_verbosity = "none";
+
+gNBs =
+(
+ {
+    ////////// Identification parameters:
+    gNB_ID    =  0xe00;
+    gNB_name  =  "gNB-OAI";
+
+    // Tracking area code, 0x0000 and 0xfffe are reserved values
+    tracking_area_code  =  1;
+    plmn_list = ({ mcc = 001; mnc = 01; mnc_length = 2; snssaiList = ({ sst = 1; sd = 0x1; }) });
+
+    nr_cellid = 12345678L;
+
+    ////////// Physical parameters:
+    min_rxtxtime                                              = 6;
+    pdsch_AntennaPorts_XP                                     = 4;
+    pusch_AntennaPorts                                        = 4;
+    do_CSIRS                                                  = 1;
+    do_SRS                                                    = 1;
+
+     pdcch_ConfigSIB1 = (
+      {
+        controlResourceSetZero = 12;
+        searchSpaceZero = 0;
+      }
+      );
+
+    servingCellConfigCommon = (
+    {
+ #spCellConfigCommon
+
+      physCellId                                                    = 0;
+
+#  downlinkConfigCommon
+    #frequencyInfoDL
+      # this is 3600 MHz + 43 PRBs@30kHz SCS (same as initial BWP)
+      absoluteFrequencySSB                                             = 641280;
+      dl_frequencyBand                                                 = 78;
+      # this is 3600 MHz
+      dl_absoluteFrequencyPointA                                       = 640008;
+      #scs-SpecificCarrierList
+        dl_offstToCarrier                                              = 0;
+# subcarrierSpacing
+# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
+        dl_subcarrierSpacing                                           = 1;
+        dl_carrierBandwidth                                            = 106;
+     #initialDownlinkBWP
+      #genericParameters
+        # this is RBstart=27,L=48 (275*(L-1))+RBstart
+        initialDLBWPlocationAndBandwidth                               = 28875; # 6366 12925 12956 28875 12952
+# subcarrierSpacing
+# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
+        initialDLBWPsubcarrierSpacing                                   = 1;
+      #pdcch-ConfigCommon
+        initialDLBWPcontrolResourceSetZero                              = 12;
+        initialDLBWPsearchSpaceZero                                     = 0;
+
+  #uplinkConfigCommon
+     #frequencyInfoUL
+      ul_frequencyBand                                              = 78;
+      #scs-SpecificCarrierList
+      ul_offstToCarrier                                             = 0;
+# subcarrierSpacing
+# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
+      ul_subcarrierSpacing                                          = 1;
+      ul_carrierBandwidth                                           = 106;
+      pMax                                                          = 20;
+     #initialUplinkBWP
+      #genericParameters
+        initialULBWPlocationAndBandwidth                            = 28875;
+# subcarrierSpacing
+# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
+        initialULBWPsubcarrierSpacing                               = 1;
+      #rach-ConfigCommon
+        #rach-ConfigGeneric
+          prach_ConfigurationIndex                                  = 98;
+#prach_msg1_FDM
+#0 = one, 1=two, 2=four, 3=eight
+          prach_msg1_FDM                                            = 0;
+          prach_msg1_FrequencyStart                                 = 0;
+          zeroCorrelationZoneConfig                                 = 13;
+          preambleReceivedTargetPower                               = -96;
+#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
+          preambleTransMax                                          = 6;
+#powerRampingStep
+# 0=dB0,1=dB2,2=dB4,3=dB6
+        powerRampingStep                                            = 1;
+#ra_ReponseWindow
+#1,2,4,8,10,20,40,80
+        ra_ResponseWindow                                           = 4;
+#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
+#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen
+        ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR                = 4;
+#oneHalf (0..15) 4,8,12,16,...60,64
+        ssb_perRACH_OccasionAndCB_PreamblesPerSSB                   = 14;
+#ra_ContentionResolutionTimer
+#(0..7) 8,16,24,32,40,48,56,64
+        ra_ContentionResolutionTimer                                = 7;
+        rsrp_ThresholdSSB                                           = 19;
+#prach-RootSequenceIndex_PR
+#1 = 839, 2 = 139
+        prach_RootSequenceIndex_PR                                  = 2;
+        prach_RootSequenceIndex                                     = 1;
+        # SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
+        #
+        msg1_SubcarrierSpacing                                      = 1,
+# restrictedSetConfig
+# 0=unrestricted, 1=restricted type A, 2=restricted type B
+        restrictedSetConfig                                         = 0,
+
+        msg3_DeltaPreamble                                          = 1;
+        p0_NominalWithGrant                                         =-90;
+
+# pucch-ConfigCommon setup :
+# pucchGroupHopping
+# 0 = neither, 1= group hopping, 2=sequence hopping
+        pucchGroupHopping                                           = 0;
+        hoppingId                                                   = 40;
+        p0_nominal                                                  = -90;
+# ssb_PositionsInBurs_BitmapPR
+# 1=short, 2=medium, 3=long
+      ssb_PositionsInBurst_PR                                       = 2;
+      ssb_PositionsInBurst_Bitmap                                   = 1;
+
+# ssb_periodicityServingCell
+# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
+      ssb_periodicityServingCell                                    = 2;
+
+# dmrs_TypeA_position
+# 0 = pos2, 1 = pos3
+      dmrs_TypeA_Position                                           = 0;
+
+# subcarrierSpacing
+# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
+      subcarrierSpacing                                             = 1;
+
+
+  #tdd-UL-DL-ConfigurationCommon
+# subcarrierSpacing
+# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
+      referenceSubcarrierSpacing                                    = 1;
+      # pattern1
+      # dl_UL_TransmissionPeriodicity
+      # 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
+      dl_UL_TransmissionPeriodicity                                 = 6;
+      nrofDownlinkSlots                                             = 7;
+      nrofDownlinkSymbols                                           = 6;
+      nrofUplinkSlots                                               = 2;
+      nrofUplinkSymbols                                             = 4;
+
+      ssPBCH_BlockPower                                             = -25;
+  }
+
+  );
+
+
+    # ------- SCTP definitions
+    SCTP :
+    {
+        # Number of streams to use in input/output
+        SCTP_INSTREAMS  = 2;
+        SCTP_OUTSTREAMS = 2;
+    };
+
+
+    ////////// AMF parameters:
+    amf_ip_address      = ( { ipv4       = "192.168.70.132";
+                              ipv6       = "192:168:30::17";
+                              active     = "yes";
+                              preference = "ipv4";
+                            }
+                          );
+
+
+    NETWORK_INTERFACES :
+    {
+        GNB_INTERFACE_NAME_FOR_NG_AMF            = "demo-oai";
+        GNB_IPV4_ADDRESS_FOR_NG_AMF              = "192.168.70.129/24";
+        GNB_INTERFACE_NAME_FOR_NGU               = "demo-oai";
+        GNB_IPV4_ADDRESS_FOR_NGU                 = "192.168.70.129/24";
+        GNB_PORT_FOR_S1U                         = 2152; # Spec 2152
+    };
+
+  }
+);
+
+MACRLCs = (
+{
+  num_cc                      = 1;
+  tr_s_preference             = "local_L1";
+  tr_n_preference             = "local_RRC";
+  pusch_TargetSNRx10          = 150;
+  pucch_TargetSNRx10          = 200;
+  ulsch_max_frame_inactivity  = 0;
+}
+);
+
+L1s = (
+{
+  num_cc = 1;
+  tr_n_preference       = "local_mac";
+  prach_dtx_threshold   = 120;
+  pucch0_dtx_threshold  = 100;
+  ofdm_offset_divisor   = 8; #set this to UINT_MAX for offset 0
+}
+);
+
+RUs = (
+{
+  local_rf       = "yes"
+  nb_tx          = 4
+  nb_rx          = 4
+  att_tx         = 12;
+  att_rx         = 12;
+  bands          = [78];
+  max_pdschReferenceSignalPower = -27;
+  max_rxgain                    = 114;
+  eNB_instances  = [0];
+  #beamforming 1x4 matrix:
+  bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000];
+  clock_src = "internal";
+}
+);
+
+THREAD_STRUCT = (
+{
+  #three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
+  parallel_config    = "PARALLEL_SINGLE_THREAD";
+  #two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
+  worker_config      = "WORKER_ENABLE";
+}
+);
+
+rfsimulator :
+{
+  serveraddr = "server";
+  serverport = "4043";
+  options = (); #("saviq"); or/and "chanmod"
+  modelname = "AWGN";
+  IQfile = "/tmp/rfsimulator.iqs";
+};
+
+security = {
+  # preferred ciphering algorithms
+  # the first one of the list that an UE supports in chosen
+  # valid values: nea0, nea1, nea2, nea3
+  ciphering_algorithms = ( "nea0" );
+
+  # preferred integrity algorithms
+  # the first one of the list that an UE supports in chosen
+  # valid values: nia0, nia1, nia2, nia3
+  integrity_algorithms = ( "nia2", "nia0" );
+
+  # setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter
+  # what 'ciphering_algorithms' configures; same thing for 'drb_integrity'
+  drb_ciphering = "yes";
+  drb_integrity = "no";
+};
+
+log_config :
+{
+  global_log_level                      ="info";
+  hw_log_level                          ="info";
+  phy_log_level                         ="info";
+  mac_log_level                         ="info";
+  rlc_log_level                         ="info";
+  pdcp_log_level                        ="info";
+  rrc_log_level                         ="info";
+  ngap_log_level                        ="debug";
+  f1ap_log_level                        ="debug";
+};
+

targets/PROJECTS/GENERIC-NR-5GC/CONF/uecap_ports1.xml

@@ -0,0 +1,862 @@
+<UE-NR-Capability>
+    <accessStratumRelease><rel15/></accessStratumRelease>
+    <pdcp-Parameters>
+        <supportedROHC-Profiles>
+            <profile0x0000><false/></profile0x0000>
+            <profile0x0001><false/></profile0x0001>
+            <profile0x0002><false/></profile0x0002>
+            <profile0x0003><false/></profile0x0003>
+            <profile0x0004><false/></profile0x0004>
+            <profile0x0006><false/></profile0x0006>
+            <profile0x0101><false/></profile0x0101>
+            <profile0x0102><false/></profile0x0102>
+            <profile0x0103><false/></profile0x0103>
+            <profile0x0104><false/></profile0x0104>
+        </supportedROHC-Profiles>
+        <maxNumberROHC-ContextSessions><cs2/></maxNumberROHC-ContextSessions>
+        <shortSN><supported/></shortSN>
+    </pdcp-Parameters>
+    <rlc-Parameters>
+        <am-WithShortSN><supported/></am-WithShortSN>
+        <um-WithShortSN><supported/></um-WithShortSN>
+        <um-WithLongSN><supported/></um-WithLongSN>
+    </rlc-Parameters>
+    <mac-Parameters>
+        <mac-ParametersXDD-Diff>
+            <logicalChannelSR-DelayTimer><supported/></logicalChannelSR-DelayTimer>
+            <longDRX-Cycle><supported/></longDRX-Cycle>
+            <shortDRX-Cycle><supported/></shortDRX-Cycle>
+            <multipleSR-Configurations><supported/></multipleSR-Configurations>
+        </mac-ParametersXDD-Diff>
+    </mac-Parameters>
+    <phy-Parameters>
+        <phy-ParametersCommon>
+            <nzp-CSI-RS-IntefMgmt><supported/></nzp-CSI-RS-IntefMgmt>
+            <dynamicHARQ-ACK-Codebook><supported/></dynamicHARQ-ACK-Codebook>
+            <semiStaticHARQ-ACK-Codebook><supported/></semiStaticHARQ-ACK-Codebook>
+            <pdsch-MappingTypeA><supported/></pdsch-MappingTypeA>
+            <rateMatchingResrcSetSemi-Static><supported/></rateMatchingResrcSetSemi-Static>
+            <ext2>
+                <maxLayersMIMO-Indication><supported/></maxLayersMIMO-Indication>
+            </ext2>
+        </phy-ParametersCommon>
+        <phy-ParametersFRX-Diff>
+            <twoFL-DMRS>
+                11
+            </twoFL-DMRS>
+            <supportedDMRS-TypeDL><type1/></supportedDMRS-TypeDL>
+            <supportedDMRS-TypeUL><type1And2/></supportedDMRS-TypeUL>
+            <onePortsPTRS>
+                01
+            </onePortsPTRS>
+            <pucch-F2-WithFH><supported/></pucch-F2-WithFH>
+            <pucch-F3-WithFH><supported/></pucch-F3-WithFH>
+            <absoluteTPC-Command><supported/></absoluteTPC-Command>
+            <pusch-HalfPi-BPSK><supported/></pusch-HalfPi-BPSK>
+            <pucch-F3-4-HalfPi-BPSK><supported/></pucch-F3-4-HalfPi-BPSK>
+            <ext1>
+                <csi-RS-IM-ReceptionForFeedback>
+                    <maxConfigNumberNZP-CSI-RS-PerCC>8</maxConfigNumberNZP-CSI-RS-PerCC>
+                    <maxConfigNumberPortsAcrossNZP-CSI-RS-PerCC>64</maxConfigNumberPortsAcrossNZP-CSI-RS-PerCC>
+                    <maxConfigNumberCSI-IM-PerCC><n8/></maxConfigNumberCSI-IM-PerCC>
+                    <maxNumberSimultaneousNZP-CSI-RS-PerCC>4</maxNumberSimultaneousNZP-CSI-RS-PerCC>
+                    <totalNumberPortsSimultaneousNZP-CSI-RS-PerCC>32</totalNumberPortsSimultaneousNZP-CSI-RS-PerCC>
+                </csi-RS-IM-ReceptionForFeedback>
+                <csi-ReportFramework>
+                    <maxNumberPeriodicCSI-PerBWP-ForCSI-Report>2</maxNumberPeriodicCSI-PerBWP-ForCSI-Report>
+                    <maxNumberAperiodicCSI-PerBWP-ForCSI-Report>2</maxNumberAperiodicCSI-PerBWP-ForCSI-Report>
+                    <maxNumberSemiPersistentCSI-PerBWP-ForCSI-Report>0</maxNumberSemiPersistentCSI-PerBWP-ForCSI-Report>
+                    <maxNumberPeriodicCSI-PerBWP-ForBeamReport>2</maxNumberPeriodicCSI-PerBWP-ForBeamReport>
+                    <maxNumberAperiodicCSI-PerBWP-ForBeamReport>2</maxNumberAperiodicCSI-PerBWP-ForBeamReport>
+                    <maxNumberAperiodicCSI-triggeringStatePerCC><n63/></maxNumberAperiodicCSI-triggeringStatePerCC>
+                    <maxNumberSemiPersistentCSI-PerBWP-ForBeamReport>0</maxNumberSemiPersistentCSI-PerBWP-ForBeamReport>
+                    <simultaneousCSI-ReportsPerCC>4</simultaneousCSI-ReportsPerCC>
+                </csi-ReportFramework>
+                <mux-SR-HARQ-ACK-CSI-PUCCH-OncePerSlot>
+                    <sameSymbol><supported/></sameSymbol>
+                </mux-SR-HARQ-ACK-CSI-PUCCH-OncePerSlot>
+                <oneFL-DMRS-TwoAdditionalDMRS-UL><supported/></oneFL-DMRS-TwoAdditionalDMRS-UL>
+                <twoFL-DMRS-TwoAdditionalDMRS-UL><supported/></twoFL-DMRS-TwoAdditionalDMRS-UL>
+            </ext1>
+        </phy-ParametersFRX-Diff>
+        <phy-ParametersFR1>
+            <pdsch-256QAM-FR1><supported/></pdsch-256QAM-FR1>
+            <pdsch-RE-MappingFR1-PerSymbol><n10/></pdsch-RE-MappingFR1-PerSymbol>
+            <ext1>
+                <pdsch-RE-MappingFR1-PerSlot><n32/></pdsch-RE-MappingFR1-PerSlot>
+            </ext1>
+        </phy-ParametersFR1>
+    </phy-Parameters>
+    <rf-Parameters>
+        <supportedBandListNR>
+            <BandNR>
+                <bandNR>78</bandNR>
+                <mimo-ParametersPerBand>
+                    <tci-StatePDSCH>
+                        <maxNumberConfiguredTCIstatesPerCC><n16/></maxNumberConfiguredTCIstatesPerCC>
+                        <maxNumberActiveTCI-PerBWP><n1/></maxNumberActiveTCI-PerBWP>
+                    </tci-StatePDSCH>
+                    <pusch-TransCoherence><nonCoherent/></pusch-TransCoherence>
+                    <periodicBeamReport><supported/></periodicBeamReport>
+                    <aperiodicBeamReport><supported/></aperiodicBeamReport>
+                    <maxNumberNonGroupBeamReporting><n4/></maxNumberNonGroupBeamReporting>
+                    <maxNumberSSB-BFD>2</maxNumberSSB-BFD>
+                    <maxNumberCSI-RS-SSB-CBD>8</maxNumberCSI-RS-SSB-CBD>
+                    <beamReportTiming>
+                        <scs-15kHz><sym8/></scs-15kHz>
+                        <scs-30kHz><sym14/></scs-30kHz>
+                    </beamReportTiming>
+                    <ext1>
+                        <beamManagementSSB-CSI-RS>
+                            <maxNumberSSB-CSI-RS-ResourceOneTx><n8/></maxNumberSSB-CSI-RS-ResourceOneTx>
+                            <maxNumberCSI-RS-Resource><n32/></maxNumberCSI-RS-Resource>
+                            <maxNumberCSI-RS-ResourceTwoTx><n8/></maxNumberCSI-RS-ResourceTwoTx>
+                            <supportedCSI-RS-Density><oneAndThree/></supportedCSI-RS-Density>
+                            <maxNumberAperiodicCSI-RS-Resource><n32/></maxNumberAperiodicCSI-RS-Resource>
+                        </beamManagementSSB-CSI-RS>
+                        <codebookParameters>
+                            <type1>
+                                <singlePanel>
+                                    <supportedCSI-RS-ResourceList>
+                                        <SupportedCSI-RS-Resource>
+                                            <maxNumberTxPortsPerResource><p8/></maxNumberTxPortsPerResource>
+                                            <maxNumberResourcesPerBand>8</maxNumberResourcesPerBand>
+                                            <totalNumberTxPortsPerBand>64</totalNumberTxPortsPerBand>
+                                        </SupportedCSI-RS-Resource>
+                                        <SupportedCSI-RS-Resource>
+                                            <maxNumberTxPortsPerResource><p4/></maxNumberTxPortsPerResource>
+                                            <maxNumberResourcesPerBand>8</maxNumberResourcesPerBand>
+                                            <totalNumberTxPortsPerBand>32</totalNumberTxPortsPerBand>
+                                        </SupportedCSI-RS-Resource>
+                                        <SupportedCSI-RS-Resource>
+                                            <maxNumberTxPortsPerResource><p16/></maxNumberTxPortsPerResource>
+                                            <maxNumberResourcesPerBand>4</maxNumberResourcesPerBand>
+                                            <totalNumberTxPortsPerBand>64</totalNumberTxPortsPerBand>
+                                        </SupportedCSI-RS-Resource>
+                                        <SupportedCSI-RS-Resource>
+                                            <maxNumberTxPortsPerResource><p32/></maxNumberTxPortsPerResource>
+                                            <maxNumberResourcesPerBand>2</maxNumberResourcesPerBand>
+                                            <totalNumberTxPortsPerBand>64</totalNumberTxPortsPerBand>
+                                        </SupportedCSI-RS-Resource>
+                                    </supportedCSI-RS-ResourceList>
+                                    <modes><mode1/></modes>
+                                    <maxNumberCSI-RS-PerResourceSet>4</maxNumberCSI-RS-PerResourceSet>
+                                </singlePanel>
+                            </type1>
+                        </codebookParameters>
+                        <csi-RS-IM-ReceptionForFeedback>
+                            <maxConfigNumberNZP-CSI-RS-PerCC>8</maxConfigNumberNZP-CSI-RS-PerCC>
+                            <maxConfigNumberPortsAcrossNZP-CSI-RS-PerCC>64</maxConfigNumberPortsAcrossNZP-CSI-RS-PerCC>
+                            <maxConfigNumberCSI-IM-PerCC><n8/></maxConfigNumberCSI-IM-PerCC>
+                            <maxNumberSimultaneousNZP-CSI-RS-PerCC>4</maxNumberSimultaneousNZP-CSI-RS-PerCC>
+                            <totalNumberPortsSimultaneousNZP-CSI-RS-PerCC>32</totalNumberPortsSimultaneousNZP-CSI-RS-PerCC>
+                        </csi-RS-IM-ReceptionForFeedback>
+                        <csi-ReportFramework>
+                            <maxNumberPeriodicCSI-PerBWP-ForCSI-Report>2</maxNumberPeriodicCSI-PerBWP-ForCSI-Report>
+                            <maxNumberAperiodicCSI-PerBWP-ForCSI-Report>2</maxNumberAperiodicCSI-PerBWP-ForCSI-Report>
+                            <maxNumberSemiPersistentCSI-PerBWP-ForCSI-Report>0</maxNumberSemiPersistentCSI-PerBWP-ForCSI-Report>
+                            <maxNumberPeriodicCSI-PerBWP-ForBeamReport>2</maxNumberPeriodicCSI-PerBWP-ForBeamReport>
+                            <maxNumberAperiodicCSI-PerBWP-ForBeamReport>2</maxNumberAperiodicCSI-PerBWP-ForBeamReport>
+                            <maxNumberAperiodicCSI-triggeringStatePerCC><n63/></maxNumberAperiodicCSI-triggeringStatePerCC>
+                            <maxNumberSemiPersistentCSI-PerBWP-ForBeamReport>0</maxNumberSemiPersistentCSI-PerBWP-ForBeamReport>
+                            <simultaneousCSI-ReportsPerCC>4</simultaneousCSI-ReportsPerCC>
+                        </csi-ReportFramework>
+                        <csi-RS-ForTracking>
+                            <maxBurstLength>2</maxBurstLength>
+                            <maxSimultaneousResourceSetsPerCC>1</maxSimultaneousResourceSetsPerCC>
+                            <maxConfiguredResourceSetsPerCC>8</maxConfiguredResourceSetsPerCC>
+                            <maxConfiguredResourceSetsAllCC>16</maxConfiguredResourceSetsAllCC>
+                        </csi-RS-ForTracking>
+                    </ext1>
+                </mimo-ParametersPerBand>
+                <multipleTCI><supported/></multipleTCI>
+                <pusch-256QAM><supported/></pusch-256QAM>
+                <ue-PowerClass><pc2/></ue-PowerClass>
+                <channelBWs-DL>
+                    <fr1>
+                        <scs-15kHz>
+                            0000000000
+                        </scs-15kHz>
+                        <scs-30kHz>
+                            0001011111
+                        </scs-30kHz>
+                        <scs-60kHz>
+                            0000000000
+                        </scs-60kHz>
+                    </fr1>
+                </channelBWs-DL>
+                <channelBWs-UL>
+                    <fr1>
+                        <scs-15kHz>
+                            0000000000
+                        </scs-15kHz>
+                        <scs-30kHz>
+                            0001011111
+                        </scs-30kHz>
+                        <scs-60kHz>
+                            0000000000
+                        </scs-60kHz>
+                    </fr1>
+                </channelBWs-UL>
+                <ext1>
+                    <maxUplinkDutyCycle-PC2-FR1><n100/></maxUplinkDutyCycle-PC2-FR1>
+                </ext1>
+                <ext4>
+                    <channelBWs-DL-v1590>
+                        <fr1>
+                            <scs-30kHz>
+                                1000000000000000
+                            </scs-30kHz>
+                        </fr1>
+                    </channelBWs-DL-v1590>
+                    <channelBWs-UL-v1590>
+                        <fr1>
+                            <scs-30kHz>
+                                1000000000000000
+                            </scs-30kHz>
+                        </fr1>
+                    </channelBWs-UL-v1590>
+                </ext4>
+            </BandNR>
+        </supportedBandListNR>
+        <supportedBandCombinationList>
+            <BandCombination>
+                <bandList>
+                        <nr>
+                            <bandNR>78</bandNR>
+                            <ca-BandwidthClassDL-NR><a/></ca-BandwidthClassDL-NR>
+                            <ca-BandwidthClassUL-NR><a/></ca-BandwidthClassUL-NR>
+                        </nr>
+                </bandList>
+                <featureSetCombination>0</featureSetCombination>
+                <powerClass-v1530><pc2/></powerClass-v1530>
+            </BandCombination>
+        </supportedBandCombinationList>
+        <appliedFreqBandListFilter>
+                <bandInformationNR>
+                    <bandNR>78</bandNR>
+                </bandInformationNR>
+        </appliedFreqBandListFilter>
+        <ext1>
+            <supportedBandCombinationList-v1540>
+                <BandCombination-v1540>
+                    <bandList-v1540>
+                        <BandParameters-v1540>
+                            <srs-TxSwitch>
+                                <supportedSRS-TxPortSwitch><t2r4/></supportedSRS-TxPortSwitch>
+                            </srs-TxSwitch>
+                        </BandParameters-v1540>
+                    </bandList-v1540>
+                    <ca-ParametersNR-v1540>
+                        <csi-RS-IM-ReceptionForFeedbackPerBandComb>
+                            <maxNumberSimultaneousNZP-CSI-RS-ActBWP-AllCC>8</maxNumberSimultaneousNZP-CSI-RS-ActBWP-AllCC>
+                            <totalNumberPortsSimultaneousNZP-CSI-RS-ActBWP-AllCC>64</totalNumberPortsSimultaneousNZP-CSI-RS-ActBWP-AllCC>
+                        </csi-RS-IM-ReceptionForFeedbackPerBandComb>
+                        <simultaneousCSI-ReportsAllCC>8</simultaneousCSI-ReportsAllCC>
+                    </ca-ParametersNR-v1540>
+                </BandCombination-v1540>
+            </supportedBandCombinationList-v1540>
+        </ext1>
+    </rf-Parameters>
+    <measAndMobParameters>
+        <measAndMobParametersCommon>
+            <ssb-RLM><supported/></ssb-RLM>
+            <ext1>
+                <eventB-MeasAndReport><supported/></eventB-MeasAndReport>
+                <handoverFDD-TDD><supported/></handoverFDD-TDD>
+            </ext1>
+            <ext2>
+                <periodicEUTRA-MeasAndReport><supported/></periodicEUTRA-MeasAndReport>
+            </ext2>
+        </measAndMobParametersCommon>
+        <measAndMobParametersXDD-Diff>
+            <intraAndInterF-MeasAndReport><supported/></intraAndInterF-MeasAndReport>
+            <eventA-MeasAndReport><supported/></eventA-MeasAndReport>
+            <ext1>
+                <handoverInterF><supported/></handoverInterF>
+                <handoverLTE-EPC><supported/></handoverLTE-EPC>
+            </ext1>
+        </measAndMobParametersXDD-Diff>
+        <measAndMobParametersFRX-Diff>
+            <ss-SINR-Meas><supported/></ss-SINR-Meas>
+            <ext1>
+                <handoverInterF><supported/></handoverInterF>
+                <handoverLTE-EPC><supported/></handoverLTE-EPC>
+            </ext1>
+            <ext3>
+                <simultaneousRxDataSSB-DiffNumerology><supported/></simultaneousRxDataSSB-DiffNumerology>
+            </ext3>
+        </measAndMobParametersFRX-Diff>
+    </measAndMobParameters>
+    <featureSets>
+        <featureSetsDownlink>
+            <FeatureSetDownlink>
+                <featureSetListPerDownlinkCC>
+                    <FeatureSetDownlinkPerCC-Id>1</FeatureSetDownlinkPerCC-Id>
+                </featureSetListPerDownlinkCC>
+                <ue-SpecificUL-DL-Assignment><supported/></ue-SpecificUL-DL-Assignment>
+            </FeatureSetDownlink>
+            <FeatureSetDownlink>
+                <featureSetListPerDownlinkCC>
+                    <FeatureSetDownlinkPerCC-Id>2</FeatureSetDownlinkPerCC-Id>
+                </featureSetListPerDownlinkCC>
+                <ue-SpecificUL-DL-Assignment><supported/></ue-SpecificUL-DL-Assignment>
+            </FeatureSetDownlink>
+            <FeatureSetDownlink>
+                <featureSetListPerDownlinkCC>
+                    <FeatureSetDownlinkPerCC-Id>3</FeatureSetDownlinkPerCC-Id>
+                </featureSetListPerDownlinkCC>
+                <ue-SpecificUL-DL-Assignment><supported/></ue-SpecificUL-DL-Assignment>
+            </FeatureSetDownlink>
+            <FeatureSetDownlink>
+                <featureSetListPerDownlinkCC>
+                    <FeatureSetDownlinkPerCC-Id>4</FeatureSetDownlinkPerCC-Id>
+                </featureSetListPerDownlinkCC>
+                <ue-SpecificUL-DL-Assignment><supported/></ue-SpecificUL-DL-Assignment>
+            </FeatureSetDownlink>
+            <FeatureSetDownlink>
+                <featureSetListPerDownlinkCC>
+                    <FeatureSetDownlinkPerCC-Id>5</FeatureSetDownlinkPerCC-Id>
+                </featureSetListPerDownlinkCC>
+                <ue-SpecificUL-DL-Assignment><supported/></ue-SpecificUL-DL-Assignment>
+            </FeatureSetDownlink>
+            <FeatureSetDownlink>
+                <featureSetListPerDownlinkCC>
+                    <FeatureSetDownlinkPerCC-Id>6</FeatureSetDownlinkPerCC-Id>
+                </featureSetListPerDownlinkCC>
+                <ue-SpecificUL-DL-Assignment><supported/></ue-SpecificUL-DL-Assignment>
+            </FeatureSetDownlink>
+            <FeatureSetDownlink>
+                <featureSetListPerDownlinkCC>
+                    <FeatureSetDownlinkPerCC-Id>7</FeatureSetDownlinkPerCC-Id>
+                </featureSetListPerDownlinkCC>
+                <ue-SpecificUL-DL-Assignment><supported/></ue-SpecificUL-DL-Assignment>
+            </FeatureSetDownlink>
+            <FeatureSetDownlink>
+                <featureSetListPerDownlinkCC>
+                    <FeatureSetDownlinkPerCC-Id>8</FeatureSetDownlinkPerCC-Id>
+                </featureSetListPerDownlinkCC>
+                <ue-SpecificUL-DL-Assignment><supported/></ue-SpecificUL-DL-Assignment>
+            </FeatureSetDownlink>
+            <FeatureSetDownlink>
+                <featureSetListPerDownlinkCC>
+                    <FeatureSetDownlinkPerCC-Id>9</FeatureSetDownlinkPerCC-Id>
+                </featureSetListPerDownlinkCC>
+                <ue-SpecificUL-DL-Assignment><supported/></ue-SpecificUL-DL-Assignment>
+            </FeatureSetDownlink>
+            <FeatureSetDownlink>
+                <featureSetListPerDownlinkCC>
+                    <FeatureSetDownlinkPerCC-Id>10</FeatureSetDownlinkPerCC-Id>
+                </featureSetListPerDownlinkCC>
+                <ue-SpecificUL-DL-Assignment><supported/></ue-SpecificUL-DL-Assignment>
+            </FeatureSetDownlink>
+            <FeatureSetDownlink>
+                <featureSetListPerDownlinkCC>
+                    <FeatureSetDownlinkPerCC-Id>11</FeatureSetDownlinkPerCC-Id>
+                </featureSetListPerDownlinkCC>
+                <ue-SpecificUL-DL-Assignment><supported/></ue-SpecificUL-DL-Assignment>
+            </FeatureSetDownlink>
+            <FeatureSetDownlink>
+                <featureSetListPerDownlinkCC>
+                    <FeatureSetDownlinkPerCC-Id>12</FeatureSetDownlinkPerCC-Id>
+                </featureSetListPerDownlinkCC>
+                <ue-SpecificUL-DL-Assignment><supported/></ue-SpecificUL-DL-Assignment>
+            </FeatureSetDownlink>
+        </featureSetsDownlink>
+        <featureSetsDownlinkPerCC>
+            <FeatureSetDownlinkPerCC>
+                <supportedSubcarrierSpacingDL><kHz30/></supportedSubcarrierSpacingDL>
+                <supportedBandwidthDL>
+                    <fr1><mhz100/></fr1>
+                </supportedBandwidthDL>
+                <maxNumberMIMO-LayersPDSCH><fourLayers/></maxNumberMIMO-LayersPDSCH>
+                <supportedModulationOrderDL><qam256/></supportedModulationOrderDL>
+            </FeatureSetDownlinkPerCC>
+            <FeatureSetDownlinkPerCC>
+                <supportedSubcarrierSpacingDL><kHz30/></supportedSubcarrierSpacingDL>
+                <supportedBandwidthDL>
+                    <fr1><mhz100/></fr1>
+                </supportedBandwidthDL>
+                <channelBW-90mhz><supported/></channelBW-90mhz>
+                <maxNumberMIMO-LayersPDSCH><fourLayers/></maxNumberMIMO-LayersPDSCH>
+                <supportedModulationOrderDL><qam256/></supportedModulationOrderDL>
+            </FeatureSetDownlinkPerCC>
+            <FeatureSetDownlinkPerCC>
+                <supportedSubcarrierSpacingDL><kHz15/></supportedSubcarrierSpacingDL>
+                <supportedBandwidthDL>
+                    <fr1><mhz20/></fr1>
+                </supportedBandwidthDL>
+                <maxNumberMIMO-LayersPDSCH><twoLayers/></maxNumberMIMO-LayersPDSCH>
+                <supportedModulationOrderDL><qam256/></supportedModulationOrderDL>
+            </FeatureSetDownlinkPerCC>
+            <FeatureSetDownlinkPerCC>
+                <supportedSubcarrierSpacingDL><kHz15/></supportedSubcarrierSpacingDL>
+                <supportedBandwidthDL>
+                    <fr1><mhz40/></fr1>
+                </supportedBandwidthDL>
+                <maxNumberMIMO-LayersPDSCH><fourLayers/></maxNumberMIMO-LayersPDSCH>
+                <supportedModulationOrderDL><qam256/></supportedModulationOrderDL>
+            </FeatureSetDownlinkPerCC>
+            <FeatureSetDownlinkPerCC>
+                <supportedSubcarrierSpacingDL><kHz30/></supportedSubcarrierSpacingDL>
+                <supportedBandwidthDL>
+                    <fr1><mhz40/></fr1>
+                </supportedBandwidthDL>
+                <maxNumberMIMO-LayersPDSCH><fourLayers/></maxNumberMIMO-LayersPDSCH>
+                <supportedModulationOrderDL><qam256/></supportedModulationOrderDL>
+            </FeatureSetDownlinkPerCC>
+            <FeatureSetDownlinkPerCC>
+                <supportedSubcarrierSpacingDL><kHz30/></supportedSubcarrierSpacingDL>
+                <supportedBandwidthDL>
+                    <fr1><mhz80/></fr1>
+                </supportedBandwidthDL>
+                <maxNumberMIMO-LayersPDSCH><fourLayers/></maxNumberMIMO-LayersPDSCH>
+                <supportedModulationOrderDL><qam256/></supportedModulationOrderDL>
+            </FeatureSetDownlinkPerCC>
+            <FeatureSetDownlinkPerCC>
+                <supportedSubcarrierSpacingDL><kHz30/></supportedSubcarrierSpacingDL>
+                <supportedBandwidthDL>
+                    <fr1><mhz20/></fr1>
+                </supportedBandwidthDL>
+                <maxNumberMIMO-LayersPDSCH><fourLayers/></maxNumberMIMO-LayersPDSCH>
+                <supportedModulationOrderDL><qam256/></supportedModulationOrderDL>
+            </FeatureSetDownlinkPerCC>
+            <FeatureSetDownlinkPerCC>
+                <supportedSubcarrierSpacingDL><kHz15/></supportedSubcarrierSpacingDL>
+                <supportedBandwidthDL>
+                    <fr1><mhz30/></fr1>
+                </supportedBandwidthDL>
+                <maxNumberMIMO-LayersPDSCH><twoLayers/></maxNumberMIMO-LayersPDSCH>
+                <supportedModulationOrderDL><qam256/></supportedModulationOrderDL>
+            </FeatureSetDownlinkPerCC>
+            <FeatureSetDownlinkPerCC>
+                <supportedSubcarrierSpacingDL><kHz15/></supportedSubcarrierSpacingDL>
+                <supportedBandwidthDL>
+                    <fr1><mhz20/></fr1>
+                </supportedBandwidthDL>
+                <maxNumberMIMO-LayersPDSCH><fourLayers/></maxNumberMIMO-LayersPDSCH>
+                <supportedModulationOrderDL><qam256/></supportedModulationOrderDL>
+            </FeatureSetDownlinkPerCC>
+            <FeatureSetDownlinkPerCC>
+                <supportedSubcarrierSpacingDL><kHz15/></supportedSubcarrierSpacingDL>
+                <supportedBandwidthDL>
+                    <fr1><mhz15/></fr1>
+                </supportedBandwidthDL>
+                <maxNumberMIMO-LayersPDSCH><twoLayers/></maxNumberMIMO-LayersPDSCH>
+                <supportedModulationOrderDL><qam256/></supportedModulationOrderDL>
+            </FeatureSetDownlinkPerCC>
+            <FeatureSetDownlinkPerCC>
+                <supportedSubcarrierSpacingDL><kHz15/></supportedSubcarrierSpacingDL>
+                <supportedBandwidthDL>
+                    <fr1><mhz30/></fr1>
+                </supportedBandwidthDL>
+                <maxNumberMIMO-LayersPDSCH><fourLayers/></maxNumberMIMO-LayersPDSCH>
+                <supportedModulationOrderDL><qam256/></supportedModulationOrderDL>
+            </FeatureSetDownlinkPerCC>
+            <FeatureSetDownlinkPerCC>
+                <supportedSubcarrierSpacingDL><kHz30/></supportedSubcarrierSpacingDL>
+                <supportedBandwidthDL>
+                    <fr1><mhz60/></fr1>
+                </supportedBandwidthDL>
+                <maxNumberMIMO-LayersPDSCH><fourLayers/></maxNumberMIMO-LayersPDSCH>
+                <supportedModulationOrderDL><qam256/></supportedModulationOrderDL>
+            </FeatureSetDownlinkPerCC>
+        </featureSetsDownlinkPerCC>
+        <featureSetsUplink>
+            <FeatureSetUplink>
+                <featureSetListPerUplinkCC>
+                    <FeatureSetUplinkPerCC-Id>1</FeatureSetUplinkPerCC-Id>
+                </featureSetListPerUplinkCC>
+                <supportedSRS-Resources>
+                    <maxNumberAperiodicSRS-PerBWP><n16/></maxNumberAperiodicSRS-PerBWP>
+                    <maxNumberAperiodicSRS-PerBWP-PerSlot>6</maxNumberAperiodicSRS-PerBWP-PerSlot>
+                    <maxNumberPeriodicSRS-PerBWP><n16/></maxNumberPeriodicSRS-PerBWP>
+                    <maxNumberPeriodicSRS-PerBWP-PerSlot>6</maxNumberPeriodicSRS-PerBWP-PerSlot>
+                    <maxNumberSemiPersistentSRS-PerBWP><n2/></maxNumberSemiPersistentSRS-PerBWP>
+                    <maxNumberSemiPersistentSRS-PerBWP-PerSlot>2</maxNumberSemiPersistentSRS-PerBWP-PerSlot>
+                    <maxNumberSRS-Ports-PerResource><n1/></maxNumberSRS-Ports-PerResource>
+                </supportedSRS-Resources>
+            </FeatureSetUplink>
+            <FeatureSetUplink>
+                <featureSetListPerUplinkCC>
+                    <FeatureSetUplinkPerCC-Id>2</FeatureSetUplinkPerCC-Id>
+                </featureSetListPerUplinkCC>
+                <supportedSRS-Resources>
+                    <maxNumberAperiodicSRS-PerBWP><n16/></maxNumberAperiodicSRS-PerBWP>
+                    <maxNumberAperiodicSRS-PerBWP-PerSlot>6</maxNumberAperiodicSRS-PerBWP-PerSlot>
+                    <maxNumberPeriodicSRS-PerBWP><n16/></maxNumberPeriodicSRS-PerBWP>
+                    <maxNumberPeriodicSRS-PerBWP-PerSlot>6</maxNumberPeriodicSRS-PerBWP-PerSlot>
+                    <maxNumberSemiPersistentSRS-PerBWP><n2/></maxNumberSemiPersistentSRS-PerBWP>
+                    <maxNumberSemiPersistentSRS-PerBWP-PerSlot>2</maxNumberSemiPersistentSRS-PerBWP-PerSlot>
+                    <maxNumberSRS-Ports-PerResource><n1/></maxNumberSRS-Ports-PerResource>
+                </supportedSRS-Resources>
+            </FeatureSetUplink>
+            <FeatureSetUplink>
+                <featureSetListPerUplinkCC>
+                    <FeatureSetUplinkPerCC-Id>3</FeatureSetUplinkPerCC-Id>
+                </featureSetListPerUplinkCC>
+                <supportedSRS-Resources>
+                    <maxNumberAperiodicSRS-PerBWP><n16/></maxNumberAperiodicSRS-PerBWP>
+                    <maxNumberAperiodicSRS-PerBWP-PerSlot>6</maxNumberAperiodicSRS-PerBWP-PerSlot>
+                    <maxNumberPeriodicSRS-PerBWP><n16/></maxNumberPeriodicSRS-PerBWP>
+                    <maxNumberPeriodicSRS-PerBWP-PerSlot>6</maxNumberPeriodicSRS-PerBWP-PerSlot>
+                    <maxNumberSemiPersistentSRS-PerBWP><n2/></maxNumberSemiPersistentSRS-PerBWP>
+                    <maxNumberSemiPersistentSRS-PerBWP-PerSlot>2</maxNumberSemiPersistentSRS-PerBWP-PerSlot>
+                    <maxNumberSRS-Ports-PerResource><n1/></maxNumberSRS-Ports-PerResource>
+                </supportedSRS-Resources>
+            </FeatureSetUplink>
+            <FeatureSetUplink>
+                <featureSetListPerUplinkCC>
+                    <FeatureSetUplinkPerCC-Id>4</FeatureSetUplinkPerCC-Id>
+                </featureSetListPerUplinkCC>
+                <supportedSRS-Resources>
+                    <maxNumberAperiodicSRS-PerBWP><n16/></maxNumberAperiodicSRS-PerBWP>
+                    <maxNumberAperiodicSRS-PerBWP-PerSlot>6</maxNumberAperiodicSRS-PerBWP-PerSlot>
+                    <maxNumberPeriodicSRS-PerBWP><n16/></maxNumberPeriodicSRS-PerBWP>
+                    <maxNumberPeriodicSRS-PerBWP-PerSlot>6</maxNumberPeriodicSRS-PerBWP-PerSlot>
+                    <maxNumberSemiPersistentSRS-PerBWP><n2/></maxNumberSemiPersistentSRS-PerBWP>
+                    <maxNumberSemiPersistentSRS-PerBWP-PerSlot>2</maxNumberSemiPersistentSRS-PerBWP-PerSlot>
+                    <maxNumberSRS-Ports-PerResource><n1/></maxNumberSRS-Ports-PerResource>
+                </supportedSRS-Resources>
+            </FeatureSetUplink>
+            <FeatureSetUplink>
+                <featureSetListPerUplinkCC>
+                    <FeatureSetUplinkPerCC-Id>5</FeatureSetUplinkPerCC-Id>
+                </featureSetListPerUplinkCC>
+                <supportedSRS-Resources>
+                    <maxNumberAperiodicSRS-PerBWP><n16/></maxNumberAperiodicSRS-PerBWP>
+                    <maxNumberAperiodicSRS-PerBWP-PerSlot>6</maxNumberAperiodicSRS-PerBWP-PerSlot>
+                    <maxNumberPeriodicSRS-PerBWP><n16/></maxNumberPeriodicSRS-PerBWP>
+                    <maxNumberPeriodicSRS-PerBWP-PerSlot>6</maxNumberPeriodicSRS-PerBWP-PerSlot>
+                    <maxNumberSemiPersistentSRS-PerBWP><n2/></maxNumberSemiPersistentSRS-PerBWP>
+                    <maxNumberSemiPersistentSRS-PerBWP-PerSlot>2</maxNumberSemiPersistentSRS-PerBWP-PerSlot>
+                    <maxNumberSRS-Ports-PerResource><n1/></maxNumberSRS-Ports-PerResource>
+                </supportedSRS-Resources>
+            </FeatureSetUplink>
+            <FeatureSetUplink>
+                <featureSetListPerUplinkCC>
+                    <FeatureSetUplinkPerCC-Id>6</FeatureSetUplinkPerCC-Id>
+                </featureSetListPerUplinkCC>
+                <supportedSRS-Resources>
+                    <maxNumberAperiodicSRS-PerBWP><n16/></maxNumberAperiodicSRS-PerBWP>
+                    <maxNumberAperiodicSRS-PerBWP-PerSlot>6</maxNumberAperiodicSRS-PerBWP-PerSlot>
+                    <maxNumberPeriodicSRS-PerBWP><n16/></maxNumberPeriodicSRS-PerBWP>
+                    <maxNumberPeriodicSRS-PerBWP-PerSlot>6</maxNumberPeriodicSRS-PerBWP-PerSlot>
+                    <maxNumberSemiPersistentSRS-PerBWP><n2/></maxNumberSemiPersistentSRS-PerBWP>
+                    <maxNumberSemiPersistentSRS-PerBWP-PerSlot>2</maxNumberSemiPersistentSRS-PerBWP-PerSlot>
+                    <maxNumberSRS-Ports-PerResource><n1/></maxNumberSRS-Ports-PerResource>
+                </supportedSRS-Resources>
+            </FeatureSetUplink>
+            <FeatureSetUplink>
+                <featureSetListPerUplinkCC>
+                    <FeatureSetUplinkPerCC-Id>7</FeatureSetUplinkPerCC-Id>
+                </featureSetListPerUplinkCC>
+                <supportedSRS-Resources>
+                    <maxNumberAperiodicSRS-PerBWP><n16/></maxNumberAperiodicSRS-PerBWP>
+                    <maxNumberAperiodicSRS-PerBWP-PerSlot>6</maxNumberAperiodicSRS-PerBWP-PerSlot>
+                    <maxNumberPeriodicSRS-PerBWP><n16/></maxNumberPeriodicSRS-PerBWP>
+                    <maxNumberPeriodicSRS-PerBWP-PerSlot>6</maxNumberPeriodicSRS-PerBWP-PerSlot>
+                    <maxNumberSemiPersistentSRS-PerBWP><n2/></maxNumberSemiPersistentSRS-PerBWP>
+                    <maxNumberSemiPersistentSRS-PerBWP-PerSlot>2</maxNumberSemiPersistentSRS-PerBWP-PerSlot>
+                    <maxNumberSRS-Ports-PerResource><n1/></maxNumberSRS-Ports-PerResource>
+                </supportedSRS-Resources>
+            </FeatureSetUplink>
+            <FeatureSetUplink>
+                <featureSetListPerUplinkCC>
+                    <FeatureSetUplinkPerCC-Id>8</FeatureSetUplinkPerCC-Id>
+                </featureSetListPerUplinkCC>
+                <supportedSRS-Resources>
+                    <maxNumberAperiodicSRS-PerBWP><n16/></maxNumberAperiodicSRS-PerBWP>
+                    <maxNumberAperiodicSRS-PerBWP-PerSlot>6</maxNumberAperiodicSRS-PerBWP-PerSlot>
+                    <maxNumberPeriodicSRS-PerBWP><n16/></maxNumberPeriodicSRS-PerBWP>
+                    <maxNumberPeriodicSRS-PerBWP-PerSlot>6</maxNumberPeriodicSRS-PerBWP-PerSlot>
+                    <maxNumberSemiPersistentSRS-PerBWP><n2/></maxNumberSemiPersistentSRS-PerBWP>
+                    <maxNumberSemiPersistentSRS-PerBWP-PerSlot>2</maxNumberSemiPersistentSRS-PerBWP-PerSlot>
+                    <maxNumberSRS-Ports-PerResource><n1/></maxNumberSRS-Ports-PerResource>
+                </supportedSRS-Resources>
+            </FeatureSetUplink>
+            <FeatureSetUplink>
+                <featureSetListPerUplinkCC>
+                    <FeatureSetUplinkPerCC-Id>9</FeatureSetUplinkPerCC-Id>
+                </featureSetListPerUplinkCC>
+                <supportedSRS-Resources>
+                    <maxNumberAperiodicSRS-PerBWP><n16/></maxNumberAperiodicSRS-PerBWP>
+                    <maxNumberAperiodicSRS-PerBWP-PerSlot>6</maxNumberAperiodicSRS-PerBWP-PerSlot>
+                    <maxNumberPeriodicSRS-PerBWP><n16/></maxNumberPeriodicSRS-PerBWP>
+                    <maxNumberPeriodicSRS-PerBWP-PerSlot>6</maxNumberPeriodicSRS-PerBWP-PerSlot>
+                    <maxNumberSemiPersistentSRS-PerBWP><n2/></maxNumberSemiPersistentSRS-PerBWP>
+                    <maxNumberSemiPersistentSRS-PerBWP-PerSlot>2</maxNumberSemiPersistentSRS-PerBWP-PerSlot>
+                    <maxNumberSRS-Ports-PerResource><n1/></maxNumberSRS-Ports-PerResource>
+                </supportedSRS-Resources>
+            </FeatureSetUplink>
+            <FeatureSetUplink>
+                <featureSetListPerUplinkCC>
+                    <FeatureSetUplinkPerCC-Id>10</FeatureSetUplinkPerCC-Id>
+                </featureSetListPerUplinkCC>
+                <supportedSRS-Resources>
+                    <maxNumberAperiodicSRS-PerBWP><n16/></maxNumberAperiodicSRS-PerBWP>
+                    <maxNumberAperiodicSRS-PerBWP-PerSlot>6</maxNumberAperiodicSRS-PerBWP-PerSlot>
+                    <maxNumberPeriodicSRS-PerBWP><n16/></maxNumberPeriodicSRS-PerBWP>
+                    <maxNumberPeriodicSRS-PerBWP-PerSlot>6</maxNumberPeriodicSRS-PerBWP-PerSlot>
+                    <maxNumberSemiPersistentSRS-PerBWP><n2/></maxNumberSemiPersistentSRS-PerBWP>
+                    <maxNumberSemiPersistentSRS-PerBWP-PerSlot>2</maxNumberSemiPersistentSRS-PerBWP-PerSlot>
+                    <maxNumberSRS-Ports-PerResource><n1/></maxNumberSRS-Ports-PerResource>
+                </supportedSRS-Resources>
+            </FeatureSetUplink>
+            <FeatureSetUplink>
+                <featureSetListPerUplinkCC>
+                    <FeatureSetUplinkPerCC-Id>11</FeatureSetUplinkPerCC-Id>
+                </featureSetListPerUplinkCC>
+                <supportedSRS-Resources>
+                    <maxNumberAperiodicSRS-PerBWP><n16/></maxNumberAperiodicSRS-PerBWP>
+                    <maxNumberAperiodicSRS-PerBWP-PerSlot>6</maxNumberAperiodicSRS-PerBWP-PerSlot>
+                    <maxNumberPeriodicSRS-PerBWP><n16/></maxNumberPeriodicSRS-PerBWP>
+                    <maxNumberPeriodicSRS-PerBWP-PerSlot>6</maxNumberPeriodicSRS-PerBWP-PerSlot>
+                    <maxNumberSemiPersistentSRS-PerBWP><n2/></maxNumberSemiPersistentSRS-PerBWP>
+                    <maxNumberSemiPersistentSRS-PerBWP-PerSlot>2</maxNumberSemiPersistentSRS-PerBWP-PerSlot>
+                    <maxNumberSRS-Ports-PerResource><n1/></maxNumberSRS-Ports-PerResource>
+                </supportedSRS-Resources>
+            </FeatureSetUplink>
+            <FeatureSetUplink>
+                <featureSetListPerUplinkCC>
+                    <FeatureSetUplinkPerCC-Id>12</FeatureSetUplinkPerCC-Id>
+                </featureSetListPerUplinkCC>
+                <supportedSRS-Resources>
+                    <maxNumberAperiodicSRS-PerBWP><n16/></maxNumberAperiodicSRS-PerBWP>
+                    <maxNumberAperiodicSRS-PerBWP-PerSlot>6</maxNumberAperiodicSRS-PerBWP-PerSlot>
+                    <maxNumberPeriodicSRS-PerBWP><n16/></maxNumberPeriodicSRS-PerBWP>
+                    <maxNumberPeriodicSRS-PerBWP-PerSlot>6</maxNumberPeriodicSRS-PerBWP-PerSlot>
+                    <maxNumberSemiPersistentSRS-PerBWP><n2/></maxNumberSemiPersistentSRS-PerBWP>
+                    <maxNumberSemiPersistentSRS-PerBWP-PerSlot>2</maxNumberSemiPersistentSRS-PerBWP-PerSlot>
+                    <maxNumberSRS-Ports-PerResource><n1/></maxNumberSRS-Ports-PerResource>
+                </supportedSRS-Resources>
+            </FeatureSetUplink>
+            <FeatureSetUplink>
+                <featureSetListPerUplinkCC>
+                    <FeatureSetUplinkPerCC-Id>11</FeatureSetUplinkPerCC-Id>
+                </featureSetListPerUplinkCC>
+                <supportedSRS-Resources>
+                    <maxNumberAperiodicSRS-PerBWP><n1/></maxNumberAperiodicSRS-PerBWP>
+                    <maxNumberAperiodicSRS-PerBWP-PerSlot>6</maxNumberAperiodicSRS-PerBWP-PerSlot>
+                    <maxNumberPeriodicSRS-PerBWP><n16/></maxNumberPeriodicSRS-PerBWP>
+                    <maxNumberPeriodicSRS-PerBWP-PerSlot>6</maxNumberPeriodicSRS-PerBWP-PerSlot>
+                    <maxNumberSemiPersistentSRS-PerBWP><n2/></maxNumberSemiPersistentSRS-PerBWP>
+                    <maxNumberSemiPersistentSRS-PerBWP-PerSlot>2</maxNumberSemiPersistentSRS-PerBWP-PerSlot>
+                    <maxNumberSRS-Ports-PerResource><n1/></maxNumberSRS-Ports-PerResource>
+                </supportedSRS-Resources>
+            </FeatureSetUplink>
+        </featureSetsUplink>
+        <featureSetsUplinkPerCC>
+            <FeatureSetUplinkPerCC>
+                <supportedSubcarrierSpacingUL><kHz30/></supportedSubcarrierSpacingUL>
+                <supportedBandwidthUL>
+                    <fr1><mhz100/></fr1>
+                </supportedBandwidthUL>
+                <mimo-CB-PUSCH>
+                    <maxNumberMIMO-LayersCB-PUSCH><oneLayer/></maxNumberMIMO-LayersCB-PUSCH>
+                    <maxNumberSRS-ResourcePerSet>1</maxNumberSRS-ResourcePerSet>
+                </mimo-CB-PUSCH>
+                <supportedModulationOrderUL><qam256/></supportedModulationOrderUL>
+            </FeatureSetUplinkPerCC>
+            <FeatureSetUplinkPerCC>
+                <supportedSubcarrierSpacingUL><kHz30/></supportedSubcarrierSpacingUL>
+                <supportedBandwidthUL>
+                    <fr1><mhz100/></fr1>
+                </supportedBandwidthUL>
+                <channelBW-90mhz><supported/></channelBW-90mhz>
+                <mimo-CB-PUSCH>
+                    <maxNumberMIMO-LayersCB-PUSCH><oneLayer/></maxNumberMIMO-LayersCB-PUSCH>
+                    <maxNumberSRS-ResourcePerSet>1</maxNumberSRS-ResourcePerSet>
+                </mimo-CB-PUSCH>
+                <supportedModulationOrderUL><qam256/></supportedModulationOrderUL>
+            </FeatureSetUplinkPerCC>
+            <FeatureSetUplinkPerCC>
+                <supportedSubcarrierSpacingUL><kHz15/></supportedSubcarrierSpacingUL>
+                <supportedBandwidthUL>
+                    <fr1><mhz20/></fr1>
+                </supportedBandwidthUL>
+                <mimo-CB-PUSCH>
+                    <maxNumberMIMO-LayersCB-PUSCH><oneLayer/></maxNumberMIMO-LayersCB-PUSCH>
+                    <maxNumberSRS-ResourcePerSet>1</maxNumberSRS-ResourcePerSet>
+                </mimo-CB-PUSCH>
+                <supportedModulationOrderUL><qam256/></supportedModulationOrderUL>
+            </FeatureSetUplinkPerCC>
+            <FeatureSetUplinkPerCC>
+                <supportedSubcarrierSpacingUL><kHz15/></supportedSubcarrierSpacingUL>
+                <supportedBandwidthUL>
+                    <fr1><mhz40/></fr1>
+                </supportedBandwidthUL>
+                <mimo-CB-PUSCH>
+                    <maxNumberMIMO-LayersCB-PUSCH><oneLayer/></maxNumberMIMO-LayersCB-PUSCH>
+                    <maxNumberSRS-ResourcePerSet>1</maxNumberSRS-ResourcePerSet>
+                </mimo-CB-PUSCH>
+                <supportedModulationOrderUL><qam256/></supportedModulationOrderUL>
+            </FeatureSetUplinkPerCC>
+            <FeatureSetUplinkPerCC>
+                <supportedSubcarrierSpacingUL><kHz30/></supportedSubcarrierSpacingUL>
+                <supportedBandwidthUL>
+                    <fr1><mhz40/></fr1>
+                </supportedBandwidthUL>
+                <mimo-CB-PUSCH>
+                    <maxNumberMIMO-LayersCB-PUSCH><oneLayer/></maxNumberMIMO-LayersCB-PUSCH>
+                    <maxNumberSRS-ResourcePerSet>1</maxNumberSRS-ResourcePerSet>
+                </mimo-CB-PUSCH>
+                <supportedModulationOrderUL><qam256/></supportedModulationOrderUL>
+            </FeatureSetUplinkPerCC>
+            <FeatureSetUplinkPerCC>
+                <supportedSubcarrierSpacingUL><kHz30/></supportedSubcarrierSpacingUL>
+                <supportedBandwidthUL>
+                    <fr1><mhz80/></fr1>
+                </supportedBandwidthUL>
+                <mimo-CB-PUSCH>
+                    <maxNumberMIMO-LayersCB-PUSCH><oneLayer/></maxNumberMIMO-LayersCB-PUSCH>
+                    <maxNumberSRS-ResourcePerSet>1</maxNumberSRS-ResourcePerSet>
+                </mimo-CB-PUSCH>
+                <supportedModulationOrderUL><qam256/></supportedModulationOrderUL>
+            </FeatureSetUplinkPerCC>
+            <FeatureSetUplinkPerCC>
+                <supportedSubcarrierSpacingUL><kHz30/></supportedSubcarrierSpacingUL>
+                <supportedBandwidthUL>
+                    <fr1><mhz20/></fr1>
+                </supportedBandwidthUL>
+                <mimo-CB-PUSCH>
+                    <maxNumberMIMO-LayersCB-PUSCH><oneLayer/></maxNumberMIMO-LayersCB-PUSCH>
+                    <maxNumberSRS-ResourcePerSet>1</maxNumberSRS-ResourcePerSet>
+                </mimo-CB-PUSCH>
+                <supportedModulationOrderUL><qam256/></supportedModulationOrderUL>
+            </FeatureSetUplinkPerCC>
+            <FeatureSetUplinkPerCC>
+                <supportedSubcarrierSpacingUL><kHz15/></supportedSubcarrierSpacingUL>
+                <supportedBandwidthUL>
+                    <fr1><mhz30/></fr1>
+                </supportedBandwidthUL>
+                <mimo-CB-PUSCH>
+                    <maxNumberMIMO-LayersCB-PUSCH><oneLayer/></maxNumberMIMO-LayersCB-PUSCH>
+                    <maxNumberSRS-ResourcePerSet>1</maxNumberSRS-ResourcePerSet>
+                </mimo-CB-PUSCH>
+                <supportedModulationOrderUL><qam256/></supportedModulationOrderUL>
+            </FeatureSetUplinkPerCC>
+            <FeatureSetUplinkPerCC>
+                <supportedSubcarrierSpacingUL><kHz15/></supportedSubcarrierSpacingUL>
+                <supportedBandwidthUL>
+                    <fr1><mhz15/></fr1>
+                </supportedBandwidthUL>
+                <mimo-CB-PUSCH>
+                    <maxNumberMIMO-LayersCB-PUSCH><oneLayer/></maxNumberMIMO-LayersCB-PUSCH>
+                    <maxNumberSRS-ResourcePerSet>1</maxNumberSRS-ResourcePerSet>
+                </mimo-CB-PUSCH>
+                <supportedModulationOrderUL><qam256/></supportedModulationOrderUL>
+            </FeatureSetUplinkPerCC>
+            <FeatureSetUplinkPerCC>
+                <supportedSubcarrierSpacingUL><kHz30/></supportedSubcarrierSpacingUL>
+                <supportedBandwidthUL>
+                    <fr1><mhz100/></fr1>
+                </supportedBandwidthUL>
+                <mimo-CB-PUSCH>
+                    <maxNumberMIMO-LayersCB-PUSCH><oneLayer/></maxNumberMIMO-LayersCB-PUSCH>
+                    <maxNumberSRS-ResourcePerSet>1</maxNumberSRS-ResourcePerSet>
+                </mimo-CB-PUSCH>
+                <supportedModulationOrderUL><qam256/></supportedModulationOrderUL>
+            </FeatureSetUplinkPerCC>
+            <FeatureSetUplinkPerCC>
+                <supportedSubcarrierSpacingUL><kHz30/></supportedSubcarrierSpacingUL>
+                <supportedBandwidthUL>
+                    <fr1><mhz100/></fr1>
+                </supportedBandwidthUL>
+                <channelBW-90mhz><supported/></channelBW-90mhz>
+                <mimo-CB-PUSCH>
+                    <maxNumberMIMO-LayersCB-PUSCH><oneLayer/></maxNumberMIMO-LayersCB-PUSCH>
+                    <maxNumberSRS-ResourcePerSet>1</maxNumberSRS-ResourcePerSet>
+                </mimo-CB-PUSCH>
+                <supportedModulationOrderUL><qam256/></supportedModulationOrderUL>
+            </FeatureSetUplinkPerCC>
+            <FeatureSetUplinkPerCC>
+                <supportedSubcarrierSpacingUL><kHz30/></supportedSubcarrierSpacingUL>
+                <supportedBandwidthUL>
+                    <fr1><mhz60/></fr1>
+                </supportedBandwidthUL>
+                <mimo-CB-PUSCH>
+                    <maxNumberMIMO-LayersCB-PUSCH><oneLayer/></maxNumberMIMO-LayersCB-PUSCH>
+                    <maxNumberSRS-ResourcePerSet>1</maxNumberSRS-ResourcePerSet>
+                </mimo-CB-PUSCH>
+                <supportedModulationOrderUL><qam256/></supportedModulationOrderUL>
+            </FeatureSetUplinkPerCC>
+        </featureSetsUplinkPerCC>
+        <ext1>
+            <featureSetsDownlink-v1540>
+                <FeatureSetDownlink-v1540>
+                    <oneFL-DMRS-TwoAdditionalDMRS-DL><supported/></oneFL-DMRS-TwoAdditionalDMRS-DL>
+                    <twoFL-DMRS-TwoAdditionalDMRS-DL><supported/></twoFL-DMRS-TwoAdditionalDMRS-DL>
+                </FeatureSetDownlink-v1540>
+                <FeatureSetDownlink-v1540>
+                    <oneFL-DMRS-TwoAdditionalDMRS-DL><supported/></oneFL-DMRS-TwoAdditionalDMRS-DL>
+                    <twoFL-DMRS-TwoAdditionalDMRS-DL><supported/></twoFL-DMRS-TwoAdditionalDMRS-DL>
+                </FeatureSetDownlink-v1540>
+                <FeatureSetDownlink-v1540>
+                    <oneFL-DMRS-TwoAdditionalDMRS-DL><supported/></oneFL-DMRS-TwoAdditionalDMRS-DL>
+                    <twoFL-DMRS-TwoAdditionalDMRS-DL><supported/></twoFL-DMRS-TwoAdditionalDMRS-DL>
+                </FeatureSetDownlink-v1540>
+                <FeatureSetDownlink-v1540>
+                    <oneFL-DMRS-TwoAdditionalDMRS-DL><supported/></oneFL-DMRS-TwoAdditionalDMRS-DL>
+                    <twoFL-DMRS-TwoAdditionalDMRS-DL><supported/></twoFL-DMRS-TwoAdditionalDMRS-DL>
+                </FeatureSetDownlink-v1540>
+                <FeatureSetDownlink-v1540>
+                    <oneFL-DMRS-TwoAdditionalDMRS-DL><supported/></oneFL-DMRS-TwoAdditionalDMRS-DL>
+                    <twoFL-DMRS-TwoAdditionalDMRS-DL><supported/></twoFL-DMRS-TwoAdditionalDMRS-DL>
+                </FeatureSetDownlink-v1540>
+                <FeatureSetDownlink-v1540>
+                    <oneFL-DMRS-TwoAdditionalDMRS-DL><supported/></oneFL-DMRS-TwoAdditionalDMRS-DL>
+                    <twoFL-DMRS-TwoAdditionalDMRS-DL><supported/></twoFL-DMRS-TwoAdditionalDMRS-DL>
+                </FeatureSetDownlink-v1540>
+                <FeatureSetDownlink-v1540>
+                    <oneFL-DMRS-TwoAdditionalDMRS-DL><supported/></oneFL-DMRS-TwoAdditionalDMRS-DL>
+                    <twoFL-DMRS-TwoAdditionalDMRS-DL><supported/></twoFL-DMRS-TwoAdditionalDMRS-DL>
+                </FeatureSetDownlink-v1540>
+                <FeatureSetDownlink-v1540>
+                    <oneFL-DMRS-TwoAdditionalDMRS-DL><supported/></oneFL-DMRS-TwoAdditionalDMRS-DL>
+                    <twoFL-DMRS-TwoAdditionalDMRS-DL><supported/></twoFL-DMRS-TwoAdditionalDMRS-DL>
+                </FeatureSetDownlink-v1540>
+                <FeatureSetDownlink-v1540>
+                    <oneFL-DMRS-TwoAdditionalDMRS-DL><supported/></oneFL-DMRS-TwoAdditionalDMRS-DL>
+                    <twoFL-DMRS-TwoAdditionalDMRS-DL><supported/></twoFL-DMRS-TwoAdditionalDMRS-DL>
+                </FeatureSetDownlink-v1540>
+                <FeatureSetDownlink-v1540>
+                    <oneFL-DMRS-TwoAdditionalDMRS-DL><supported/></oneFL-DMRS-TwoAdditionalDMRS-DL>
+                    <twoFL-DMRS-TwoAdditionalDMRS-DL><supported/></twoFL-DMRS-TwoAdditionalDMRS-DL>
+                </FeatureSetDownlink-v1540>
+                <FeatureSetDownlink-v1540>
+                    <oneFL-DMRS-TwoAdditionalDMRS-DL><supported/></oneFL-DMRS-TwoAdditionalDMRS-DL>
+                    <twoFL-DMRS-TwoAdditionalDMRS-DL><supported/></twoFL-DMRS-TwoAdditionalDMRS-DL>
+                </FeatureSetDownlink-v1540>
+                <FeatureSetDownlink-v1540>
+                    <oneFL-DMRS-TwoAdditionalDMRS-DL><supported/></oneFL-DMRS-TwoAdditionalDMRS-DL>
+                    <twoFL-DMRS-TwoAdditionalDMRS-DL><supported/></twoFL-DMRS-TwoAdditionalDMRS-DL>
+                </FeatureSetDownlink-v1540>
+            </featureSetsDownlink-v1540>
+        </ext1>
+    </featureSets>
+    <featureSetCombinations>
+        <FeatureSetCombination>
+            <FeatureSetsPerBand>
+                    <nr>
+                        <downlinkSetNR>2</downlinkSetNR>
+                        <uplinkSetNR>2</uplinkSetNR>
+                    </nr>
+            </FeatureSetsPerBand>
+        </FeatureSetCombination>
+    </featureSetCombinations>
+    <nonCriticalExtension>
+        <interRAT-Parameters>
+            <eutra>
+                <supportedBandListEUTRA>
+                    <FreqBandIndicatorEUTRA>7</FreqBandIndicatorEUTRA>
+                    <FreqBandIndicatorEUTRA>38</FreqBandIndicatorEUTRA>
+                </supportedBandListEUTRA>
+                <eutra-ParametersCommon>
+                    <mfbi-EUTRA><supported/></mfbi-EUTRA>
+                </eutra-ParametersCommon>
+            </eutra>
+        </interRAT-Parameters>
+        <inactiveState><supported/></inactiveState>
+    </nonCriticalExtension>
+</UE-NR-Capability>