mac: convert per-cell scalar fields in gNB_MAC_INST to [NFAPI_CC_MAX] arrays

Fields that are logically per-cell (frame_structure, beam_info, radio_config, ssb_SubcarrierOffset, ssb_OffsetPointA, ul_tda, ul_next, sched_ctrlSIB1, sched_pdcch_otherSI, cset0_bwp_start/size, type0_PDCCH_CSS_config, first_MIB, sib1_pdsch, ulprbbl, vrb_map_UL_size, UL_tti_req_ahead_size, tag, beam_index_list, precoding_matrix_size) are now indexed by CC_id, consistent with the existing config[], UL_tti_req_ahead[], and common_channels[] arrays. NFAPI_MAX_CC remains 1; all callers use [0] except the three config functions that already carry CC_id (config_common, config_sched_ctrlSIB1, nr_mac_config_scc) which use [CC_id].
mac/config: add CC_id parameter to nr_mac_config_scc and helpers
2026-07-13 04:30:28 +00:00 · 2026-04-26 16:24:15 +00:00 · 2026-04-26 16:24:15 +00:00 · 2026-04-26 16:24:15 +00:00
24 changed files with 384 additions and 375 deletions
--- a/executables/nr-softmodem.c
+++ b/executables/nr-softmodem.c
@@ -417,7 +417,7 @@ int start_L1L2(module_id_t gnb_id)
  /* update config */
  gNB_MAC_INST *mac = RC.nrmac[0];
  NR_ServingCellConfigCommon_t *scc = mac->common_channels[0].ServingCellConfigCommon;
-  nr_mac_config_scc(mac, scc, &mac->radio_config);
+  nr_mac_config_scc(mac, 0, scc, &mac->radio_config[0]);

  NR_BCCH_BCH_Message_t *mib = mac->common_channels[0].mib;
  const NR_BCCH_DL_SCH_Message_t *sib1 = mac->common_channels[0].sib1;
--- a/nfapi/oai_integration/aerial/fapi_nvIPC.c
+++ b/nfapi/oai_integration/aerial/fapi_nvIPC.c
@@ -59,8 +59,8 @@ void nvIPC_send_stop_request()
 }


-static uint16_t old_sfn = 0;
-static uint16_t old_slot = 0;
+static uint16_t old_sfn[NFAPI_CC_MAX];
+static uint16_t old_slot[NFAPI_CC_MAX];
 ////////////////////////////////////////////////////////////////////////
 // Handle an RX message
 static int ipc_handle_rx_msg(nv_ipc_msg_t *msg)
@@ -134,22 +134,28 @@ static int ipc_handle_rx_msg(nv_ipc_msg_t *msg)
          NFAPI_TRACE(NFAPI_TRACE_ERROR, "%s: Failed to unpack message\n", __FUNCTION__);
        } else {
          NFAPI_TRACE(NFAPI_TRACE_DEBUG, "%s: Handling NR SLOT Indication\n", __FUNCTION__);
+          // use transport-level cell_id (0-based) from the nvIPC header —
+          // ind.header.phy_id is not reliably populated by cuBB in incoming messages;
+          // normalize it here so downstream callbacks can rely on it
+          uint8_t cc_id = msg->cell_id;
+          AssertFatal(cc_id < NFAPI_CC_MAX, "cell_id %d exceeds NFAPI_CC_MAX %d\n", cc_id, NFAPI_CC_MAX);
+          ind.header.phy_id = cc_id + 1; // 1-based, consistent with outgoing P7 path
          // check if the sfn/slot unpacked come wrong at any time, should be old + 1 (slot 0 -- 19, sfn 0 -- 1023)
-          // add 1 to current sfn number
-          uint16_t old_slot_plus = ((old_slot + 1) % 20);
-          uint16_t old_sfn_plus = old_slot_plus == 0 ? ((old_sfn + 1) % 1024) : old_sfn;
+          uint16_t old_slot_plus = ((old_slot[cc_id] + 1) % 20);
+          uint16_t old_sfn_plus = old_slot_plus == 0 ? ((old_sfn[cc_id] + 1) % 1024) : old_sfn[cc_id];
          if (old_slot_plus != ind.slot || old_sfn_plus != ind.sfn) {
            LOG_E(NFAPI_VNF,
                  "\n============================================================================\n"
-                  "sfn slot doesn't match unpacked one! L2->L1 %d.%d  vs L1->L2 %d.%d  \n"
+                  "sfn slot doesn't match unpacked one! CC %d L2->L1 %d.%d  vs L1->L2 %d.%d  \n"
                  "============================================================================\n",
-                  old_sfn,
-                  old_slot,
+                  cc_id,
+                  old_sfn[cc_id],
+                  old_slot[cc_id],
                  ind.sfn,
                  ind.slot);
          }
-          old_sfn = ind.sfn;
-          old_slot = ind.slot;
+          old_sfn[cc_id] = ind.sfn;
+          old_slot[cc_id] = ind.slot;
          if (vnf_p7_config->_public.nr_slot_indication) {
            (vnf_p7_config->_public.nr_slot_indication)(&ind);
          }
@@ -210,7 +216,7 @@ bool aerial_nr_send_p5_message(vnf_t *vnf, uint16_t p5_idx, nfapi_nr_p4_p5_messa
  if (pnf) {
    // Create the message
    nv_ipc_msg_t send_msg = {.msg_id = msg->message_id,
-                             .cell_id = 0,
+                             .cell_id = (msg->phy_id > 0) ? msg->phy_id - 1 : 0,
                             // By default, P5 uses only message pool.
                             .data_pool = NV_IPC_MEMPOOL_CPU_MSG,
                             .data_len = 0,
@@ -410,11 +416,11 @@ int nvIPC_Init(nvipc_params_t nvipc_params_s)
  return 0;
 }

-int oai_fapi_ul_tti_req(nfapi_nr_ul_tti_request_t *ul_tti_req)
+int oai_fapi_ul_tti_req(nfapi_nr_ul_tti_request_t *ul_tti_req, uint8_t CC_id)
 {
  nfapi_vnf_p7_config_t *p7_config = get_p7_vnf_config();

-  ul_tti_req->header.phy_id = 1; // DJP HACK TODO FIXME - need to pass this around!!!!
+  ul_tti_req->header.phy_id = CC_id + 1;
  ul_tti_req->header.message_id = NFAPI_NR_PHY_MSG_TYPE_UL_TTI_REQUEST;

  bool retval = p7_config->send_p7_msg(get_p7_vnf(), &ul_tti_req->header);
@@ -431,10 +437,10 @@ int oai_fapi_ul_tti_req(nfapi_nr_ul_tti_request_t *ul_tti_req)
  return retval;
 }

-int oai_fapi_ul_dci_req(nfapi_nr_ul_dci_request_t *ul_dci_req)
+int oai_fapi_ul_dci_req(nfapi_nr_ul_dci_request_t *ul_dci_req, uint8_t CC_id)
 {
  nfapi_vnf_p7_config_t *p7_config = get_p7_vnf_config();
-  ul_dci_req->header.phy_id = 1; // DJP HACK TODO FIXME - need to pass this around!!!!
+  ul_dci_req->header.phy_id = CC_id + 1;
  ul_dci_req->header.message_id = NFAPI_NR_PHY_MSG_TYPE_UL_DCI_REQUEST;

  bool retval = p7_config->send_p7_msg(get_p7_vnf(), &ul_dci_req->header);
@@ -446,10 +452,10 @@ int oai_fapi_ul_dci_req(nfapi_nr_ul_dci_request_t *ul_dci_req)
  return retval;
 }

-int oai_fapi_tx_data_req(nfapi_nr_tx_data_request_t *tx_data_req)
+int oai_fapi_tx_data_req(nfapi_nr_tx_data_request_t *tx_data_req, uint8_t CC_id)
 {
  nfapi_vnf_p7_config_t *p7_config = get_p7_vnf_config();
-  tx_data_req->header.phy_id = 1; // DJP HACK TODO FIXME - need to pass this around!!!!
+  tx_data_req->header.phy_id = CC_id + 1;
  tx_data_req->header.message_id = NFAPI_NR_PHY_MSG_TYPE_TX_DATA_REQUEST;

  bool retval = p7_config->send_p7_msg(get_p7_vnf(), &tx_data_req->header);
@@ -462,11 +468,11 @@ int oai_fapi_tx_data_req(nfapi_nr_tx_data_request_t *tx_data_req)
  return retval;
 }

-int oai_fapi_dl_tti_req(nfapi_nr_dl_tti_request_t *dl_config_req)
+int oai_fapi_dl_tti_req(nfapi_nr_dl_tti_request_t *dl_config_req, uint8_t CC_id)
 {
  nfapi_vnf_p7_config_t *p7_config = get_p7_vnf_config();
  dl_config_req->header.message_id = NFAPI_NR_PHY_MSG_TYPE_DL_TTI_REQUEST;
-  dl_config_req->header.phy_id = 1; // DJP HACK TODO FIXME - need to pass this around!!!!
+  dl_config_req->header.phy_id = CC_id + 1;

  bool retval = p7_config->send_p7_msg(get_p7_vnf(), &dl_config_req->header);
  dl_config_req->dl_tti_request_body.nPDUs = 0;
@@ -478,10 +484,11 @@ int oai_fapi_dl_tti_req(nfapi_nr_dl_tti_request_t *dl_config_req)
  return retval;
 }

-int oai_fapi_send_end_request(uint32_t frame, uint32_t slot)
+int oai_fapi_send_end_request(uint32_t frame, uint32_t slot, uint8_t CC_id)
 {
  nfapi_vnf_p7_config_t *p7_config = get_p7_vnf_config();
-  nfapi_nr_slot_indication_scf_t nr_slot_resp = {.header.message_id = 0x8F, .sfn = frame, .slot = slot};
+  nfapi_nr_slot_indication_scf_t nr_slot_resp = {
+      .header.message_id = 0x8F, .header.phy_id = CC_id + 1, .sfn = frame, .slot = slot};

  bool retval = p7_config->send_p7_msg(get_p7_vnf(), &nr_slot_resp.header);
  if (!retval) {
--- a/nfapi/oai_integration/aerial/fapi_nvIPC.h
+++ b/nfapi/oai_integration/aerial/fapi_nvIPC.h
@@ -24,11 +24,11 @@ void release_msg(nv_ipc_msg_t* send_msg);
 bool send_nvipc_msg(nv_ipc_msg_t* send_msg);
 bool aerial_nr_send_p5_message(vnf_t *vnf, uint16_t p5_idx, nfapi_nr_p4_p5_message_header_t *msg, uint32_t msg_len);
 int nvIPC_Init(nvipc_params_t nvipc_params_s);
-int oai_fapi_send_end_request(uint32_t frame, uint32_t slot);
-int oai_fapi_ul_tti_req(nfapi_nr_ul_tti_request_t *ul_tti_req);
-int oai_fapi_ul_dci_req(nfapi_nr_ul_dci_request_t *ul_dci_req);
-int oai_fapi_tx_data_req(nfapi_nr_tx_data_request_t *tx_data_req);
-int oai_fapi_dl_tti_req(nfapi_nr_dl_tti_request_t *dl_config_req);
+int oai_fapi_send_end_request(uint32_t frame, uint32_t slot, uint8_t CC_id);
+int oai_fapi_ul_tti_req(nfapi_nr_ul_tti_request_t *ul_tti_req, uint8_t CC_id);
+int oai_fapi_ul_dci_req(nfapi_nr_ul_dci_request_t *ul_dci_req, uint8_t CC_id);
+int oai_fapi_tx_data_req(nfapi_nr_tx_data_request_t *tx_data_req, uint8_t CC_id);
+int oai_fapi_dl_tti_req(nfapi_nr_dl_tti_request_t *dl_config_req, uint8_t CC_id);
 void nvIPC_Stop();
 void nvIPC_send_stop_request();
 #endif // OPENAIRINTERFACE_FAPI_NVIPC_H
--- a/nfapi/oai_integration/nfapi_vnf.c
+++ b/nfapi/oai_integration/nfapi_vnf.c
@@ -897,25 +897,27 @@ int phy_nr_slot_indication(nfapi_nr_slot_indication_scf_t *ind)
  ifi->NR_slot_indication(ind, &sched_response);

 #ifdef ENABLE_AERIAL
+    // phy_id is 1-based in cuBB; convert to 0-based CC index
+    uint8_t CC_id = (ind->header.phy_id > 0) ? ind->header.phy_id - 1 : 0;
    bool send_slt_resp = false;
    if (sched_response.DL_req.dl_tti_request_body.nPDUs> 0) {
-      oai_fapi_dl_tti_req(&sched_response.DL_req);
+      oai_fapi_dl_tti_req(&sched_response.DL_req, CC_id);
      send_slt_resp = true;
    }
    if (sched_response.UL_tti_req.n_pdus > 0) {
-      oai_fapi_ul_tti_req(&sched_response.UL_tti_req);
+      oai_fapi_ul_tti_req(&sched_response.UL_tti_req, CC_id);
      send_slt_resp = true;
    }
    if (sched_response.TX_req.Number_of_PDUs > 0) {
-      oai_fapi_tx_data_req(&sched_response.TX_req);
+      oai_fapi_tx_data_req(&sched_response.TX_req, CC_id);
      send_slt_resp = true;
    }
    if (sched_response.UL_dci_req.numPdus > 0) {
-      oai_fapi_ul_dci_req(&sched_response.UL_dci_req);
+      oai_fapi_ul_dci_req(&sched_response.UL_dci_req, CC_id);
      send_slt_resp = true;
    }
    if (send_slt_resp) {
-      oai_fapi_send_end_request(ind->sfn, ind->slot);
+      oai_fapi_send_end_request(ind->sfn, ind->slot, CC_id);
    }
 #else
  if (sched_response.DL_req.dl_tti_request_body.nPDUs > 0)
--- a/openair1/PHY/INIT/nr_init.c
+++ b/openair1/PHY/INIT/nr_init.c
@@ -94,7 +94,7 @@ void phy_init_nr_gNB(PHY_VARS_gNB *gNB)
  common_vars->analog_bf = cfg->analog_beamforming_ve.analog_bf_vendor_ext.value;
  LOG_I(PHY, "L1 configured with%s analog beamforming\n", common_vars->analog_bf ? "" : "out");
  if (common_vars->analog_bf) {
-    // True only if nrmac->beam_info.beam_mode == FAPI_ANALOG_BEAM, thus analog_beamforming=2
+    // True only if nrmac->beam_info[0].beam_mode == FAPI_ANALOG_BEAM, thus analog_beamforming=2
    common_vars->num_beams_period = cfg->analog_beamforming_ve.num_beams_period_vendor_ext.value;
    LOG_I(PHY, "Max number of concurrent beams: %d\n", common_vars->num_beams_period);
  } else
--- a/openair1/SIMULATION/NR_PHY/dlsim.c
+++ b/openair1/SIMULATION/NR_PHY/dlsim.c
@@ -792,7 +792,7 @@ int main(int argc, char **argv)
  RC.nb_nr_macrlc_inst = 1;
  mac_top_init_gNB(ngran_gNB, scc, &conf, &rlc_config);
  gNB_mac = RC.nrmac[0];
-  nr_mac_config_scc(RC.nrmac[0], scc, &conf);
+  nr_mac_config_scc(RC.nrmac[0], 0, scc, &conf);

  gNB_mac->dl_bler.harq_round_max = num_rounds;

--- a/openair1/SIMULATION/NR_PHY/ulsim.c
+++ b/openair1/SIMULATION/NR_PHY/ulsim.c
@@ -817,7 +817,7 @@ int main(int argc, char *argv[])

  RC.nb_nr_macrlc_inst = 1;
  mac_top_init_gNB(ngran_gNB, scc, &conf, &rlc_config);
-  nr_mac_config_scc(RC.nrmac[0], scc, &conf);
+  nr_mac_config_scc(RC.nrmac[0], 0, scc, &conf);

  NR_UE_NR_Capability_t* UE_Capability_nr = CALLOC(1,sizeof(NR_UE_NR_Capability_t));
  prepare_sim_uecap(UE_Capability_nr, scc, mu, N_RB_UL, 0, mcs_table);
--- a/openair2/E2AP/RAN_FUNCTION/CUSTOMIZED/ran_func_mac.c
+++ b/openair2/E2AP/RAN_FUNCTION/CUSTOMIZED/ran_func_mac.c
@@ -43,11 +43,11 @@ bool read_mac_sm(void* data)
    rd->dl_aggr_tbs = UE->mac_stats.dl.total_bytes;
    rd->ul_aggr_tbs = UE->mac_stats.ul.total_bytes;

-    if (is_dl_slot(rd->slot, &RC.nrmac[mod_id]->frame_structure)) {
+    if (is_dl_slot(rd->slot, &RC.nrmac[mod_id]->frame_structure[0])) {
      rd->dl_curr_tbs = UE->mac_stats.dl.current_bytes;
      rd->dl_sched_rb = UE->mac_stats.dl.current_rbs;
    }
-    if (is_ul_slot(rd->slot, &RC.nrmac[mod_id]->frame_structure)) {
+    if (is_ul_slot(rd->slot, &RC.nrmac[mod_id]->frame_structure[0])) {
      rd->ul_curr_tbs = UE->mac_stats.ul.current_bytes;
      rd->ul_sched_rb = UE->mac_stats.ul.current_rbs;
    }
--- a/openair2/GNB_APP/gnb_config.c
+++ b/openair2/GNB_APP/gnb_config.c
@@ -1737,15 +1737,15 @@ void RCconfig_nr_macrlc(configmodule_interface_t *cfg)
      int num_ulprbbl = get_prb_blacklist(prbbl);
      if (num_ulprbbl != -1) {
        LOG_I(NR_PHY, "Copying %d blacklisted PRB to L1 context\n", num_ulprbbl);
-        memcpy(RC.nrmac[j]->ulprbbl, prbbl, MAX_BWP_SIZE * sizeof(prbbl[0]));
+        memcpy(RC.nrmac[j]->ulprbbl[0], prbbl, MAX_BWP_SIZE * sizeof(prbbl[0]));
      }
      // config_get_processedint() takes only paramdef_t *, so cast const away
      paramdef_t *p_ab = (paramdef_t *)gpd(params, np, MACRLC_ANALOG_BEAMFORMING);
-      RC.nrmac[j]->beam_info.beam_mode = config_get_processedint(cfg, p_ab);
-      if (RC.nrmac[j]->beam_info.beam_mode != NO_BEAM_MODE) {
-        if (RC.nrmac[j]->beam_info.beam_mode == PRECONFIGURED_BEAM_IDX)
+      RC.nrmac[j]->beam_info[0].beam_mode = config_get_processedint(cfg, p_ab);
+      if (RC.nrmac[j]->beam_info[0].beam_mode != NO_BEAM_MODE) {
+        if (RC.nrmac[j]->beam_info[0].beam_mode == PRECONFIGURED_BEAM_IDX)
          AssertFatal(NFAPI_MODE == NFAPI_MONOLITHIC, "Analog beamforming only supported for monolithic scenario\n");
-        NR_beam_info_t *beam_info = &RC.nrmac[j]->beam_info;
+        NR_beam_info_t *beam_info = &RC.nrmac[j]->beam_info[0];
        int beams_per_period = *gpd(params, np, MACRLC_BEAMS_PERIOD)->u8ptr;
        beam_info->beam_allocation = malloc16(beams_per_period * sizeof(beam_info->beam_allocation));
        beam_info->beam_duration = *gpd(params, np, MACRLC_BEAM_DURATION)->u8ptr;
@@ -1764,7 +1764,7 @@ void RCconfig_nr_macrlc(configmodule_interface_t *cfg)
      if (n > 0) {
        AssertFatal(!das_enabled, "No need to set beam weights in case of DAS\n");
        int num_beam = n;
-        if (RC.nrmac[j]->beam_info.beam_mode == PRECONFIGURED_BEAM_IDX) {
+        if (RC.nrmac[j]->beam_info[0].beam_mode == PRECONFIGURED_BEAM_IDX) {
          AssertFatal(n % num_tx == 0, "Error! Number of beam input needs to be multiple of TX antennas\n");
          num_beam = n / num_tx;
        }
@@ -1800,7 +1800,7 @@ void RCconfig_nr_macrlc(configmodule_interface_t *cfg)
            read_dbt_from_config(prefix, &config.bt.num_beams, &config.bt.num_weights_per_beam, &config.bt.beam_ids);
      }
      // triggers also PHY initialization in case we have L1 via FAPI
-      nr_mac_config_scc(RC.nrmac[j], scc, &config);
+      nr_mac_config_scc(RC.nrmac[j], 0, scc, &config);
    } //  for (j=0;j<RC.nb_nr_macrlc_inst;j++)

    uint64_t gnb_du_id = 0;
--- a/openair2/LAYER2/NR_MAC_gNB/config.c
+++ b/openair2/LAYER2/NR_MAC_gNB/config.c
@@ -216,8 +216,8 @@ nfapi_nr_pm_list_t init_DL_MIMO_codebook(gNB_MAC_INST *gNB, nr_pdsch_AntennaPort
  for (int i = 0; i < max_mimo_layers; i++) {
    get_K1_K2(N1, N2, &K1, &K2, i + 1);
    int i2_size = i == 0 ? 4 : 2;
-    gNB->precoding_matrix_size[i] = i2_size * N1 * O1 * N2 * O2 * K1 * K2;
-    mat.num_pm_idx += gNB->precoding_matrix_size[i];
+    gNB->precoding_matrix_size[0][i] = i2_size * N1 * O1 * N2 * O2 * K1 * K2;
+    mat.num_pm_idx += gNB->precoding_matrix_size[0][i];
  }

  mat.pmi_pdu = malloc16(mat.num_pm_idx * sizeof(*mat.pmi_pdu));
@@ -403,10 +403,10 @@ int get_ul_slot_offset(const frame_structure_t *fs, int idx, bool count_mixed)
  return ul_slot_idxs[ul_slot_idx_in_period] + period_idx * fs->numb_slots_period;
 }

-static void config_common(gNB_MAC_INST *nrmac, const nr_mac_config_t *config, NR_ServingCellConfigCommon_t *scc)
+static void config_common(gNB_MAC_INST *nrmac, int CC_id, const nr_mac_config_t *config, NR_ServingCellConfigCommon_t *scc)
 {
-  nfapi_nr_config_request_scf_t *cfg = &nrmac->config[0];
-  nrmac->common_channels[0].ServingCellConfigCommon = scc;
+  nfapi_nr_config_request_scf_t *cfg = &nrmac->config[CC_id];
+  nrmac->common_channels[CC_id].ServingCellConfigCommon = scc;
  free_dbt_config(&cfg->dbt_config);
  if (config->bt.num_beams > 0) {
    AssertFatal(config->bt.beam_weights != NULL,
@@ -515,7 +515,7 @@ static void config_common(gNB_MAC_INST *nrmac, const nr_mac_config_t *config, NR
  }

  frame_type_t frame_type = get_frame_type(nr_band, *scc->ssbSubcarrierSpacing);
-  nrmac->common_channels[0].frame_type = frame_type;
+  nrmac->common_channels[CC_id].frame_type = frame_type;

  // Cell configuration
  cfg->cell_config.phy_cell_id.value = *scc->physCellId;
@@ -633,7 +633,7 @@ static void config_common(gNB_MAC_INST *nrmac, const nr_mac_config_t *config, NR
  // compute and store prach duration in slots from rach_ConfigCommon
  NR_RACH_ConfigGeneric_t *rachConfig =
      &scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric;
-  NR_COMMON_channels_t *cc = nrmac->common_channels;
+  NR_COMMON_channels_t *cc = &nrmac->common_channels[CC_id];
  const uint32_t pointA = scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA;
  const int prach_fmt = (get_nr_prach_format_from_index(rachConfig->prach_ConfigurationIndex, pointA, cc->frame_type) & 0xff);
  cc->prach_len = (prach_fmt < 4) ? get_long_prach_dur(prach_fmt, *scc->ssbSubcarrierSpacing) : 1;
@@ -661,14 +661,14 @@ static void config_common(gNB_MAC_INST *nrmac, const nr_mac_config_t *config, NR
  cfg->ssb_table.case_v3.tl.tag = NFAPI_NR_FAPI_SSB_CASE_VENDOR_EXTENSION_TAG;
  cfg->num_tlv++;

-  uint8_t *mib_payload = nrmac->common_channels[0].MIB_pdu;
+  uint8_t *mib_payload = nrmac->common_channels[CC_id].MIB_pdu;
  uint32_t mib = (mib_payload[2] << 16) | (mib_payload[1] << 8) | mib_payload[0];
  cfg->ssb_table.MIB.tl.tag = NFAPI_NR_CONFIG_MIB_TAG;
  cfg->ssb_table.MIB.value = mib;
  cfg->num_tlv++;

-  nrmac->ssb_SubcarrierOffset = cfg->ssb_table.ssb_subcarrier_offset.value;
-  nrmac->ssb_OffsetPointA = cfg->ssb_table.ssb_offset_point_a.value;
+  nrmac->ssb_SubcarrierOffset[CC_id] = cfg->ssb_table.ssb_subcarrier_offset.value;
+  nrmac->ssb_OffsetPointA[CC_id] = cfg->ssb_table.ssb_offset_point_a.value;
  LOG_D(NR_MAC,
        "ssb_OffsetPointA %d, ssb_SubcarrierOffset %d\n",
        cfg->ssb_table.ssb_offset_point_a.value,
@@ -743,7 +743,7 @@ static void config_common(gNB_MAC_INST *nrmac, const nr_mac_config_t *config, NR
  cfg->num_tlv++;
  cfg->num_tlv++;
 #ifdef ENABLE_AERIAL
-  if (nrmac->beam_info.beam_mode == PRECONFIGURED_BEAM_IDX) {
+  if (nrmac->beam_info[CC_id].beam_mode == PRECONFIGURED_BEAM_IDX) {
    // if we are doing BF in Aerial we need these Custom TLV
    cfg->carrier_config.num_rx_ant.value = 64; //TOOD: Read number of baseband ports (phy ant) from Config?
    cfg->carrier_config.num_tx_ant.value = 64; //TOOD: Read number of baseband ports (phy ant) from Config? 
@@ -763,7 +763,7 @@ static void config_common(gNB_MAC_INST *nrmac, const nr_mac_config_t *config, NR
    cfg->tdd_table.tdd_period.value = get_tdd_period_idx(scc->tdd_UL_DL_ConfigurationCommon);
    LOG_D(NR_MAC, "Setting TDD configuration period to %d\n", cfg->tdd_table.tdd_period.value);
  }
-  frame_structure_t *fs = &nrmac->frame_structure;
+  frame_structure_t *fs = &nrmac->frame_structure[CC_id];
  config_frame_structure(mu,
                         scc->tdd_UL_DL_ConfigurationCommon,
                         cfg->tdd_table.tdd_period.value,
@@ -775,10 +775,10 @@ static void config_common(gNB_MAC_INST *nrmac, const nr_mac_config_t *config, NR
  // precoding matrix configuration (to be improved)
  cfg->pmi_list = init_DL_MIMO_codebook(nrmac, pdsch_AntennaPorts);

-  if (nrmac->beam_info.beam_mode != NO_BEAM_MODE) {
+  if (nrmac->beam_info[CC_id].beam_mode != NO_BEAM_MODE) {
    LOG_I(NR_MAC, "Configuring analog beamforming in config_request message\n");
    cfg->analog_beamforming_ve.num_beams_period_vendor_ext.tl.tag = NFAPI_NR_FAPI_NUM_BEAMS_PERIOD_VENDOR_EXTENSION_TAG;
-    cfg->analog_beamforming_ve.num_beams_period_vendor_ext.value = nrmac->beam_info.beams_per_period;
+    cfg->analog_beamforming_ve.num_beams_period_vendor_ext.value = nrmac->beam_info[CC_id].beams_per_period;
    cfg->num_tlv++;
    cfg->analog_beamforming_ve.analog_bf_vendor_ext.tl.tag = NFAPI_NR_FAPI_ANALOG_BF_VENDOR_EXTENSION_TAG;
    cfg->analog_beamforming_ve.analog_bf_vendor_ext.value = 1;  // analog BF enabled
@@ -844,13 +844,13 @@ static void initialize_beam_information(NR_beam_info_t *beam_info, int mu, int s
  }
 }

-static void config_sched_ctrlSIB1(gNB_MAC_INST *nr_mac)
+static void config_sched_ctrlSIB1(gNB_MAC_INST *nr_mac, int CC_id)
 {
-  const NR_MIB_t *mib = nr_mac->common_channels[0].mib->message.choice.mib;
-  NR_ServingCellConfigCommon_t *scc = nr_mac->common_channels[0].ServingCellConfigCommon;
+  const NR_MIB_t *mib = nr_mac->common_channels[CC_id].mib->message.choice.mib;
+  NR_ServingCellConfigCommon_t *scc = nr_mac->common_channels[CC_id].ServingCellConfigCommon;

  NR_sched_ctrl_sib1_t *sched_ctrlCommon = calloc_or_fail(1, sizeof(*sched_ctrlCommon));
-  nr_mac->sched_ctrlSIB1 = sched_ctrlCommon;
+  nr_mac->sched_ctrlSIB1[CC_id] = sched_ctrlCommon;

  NR_SubcarrierSpacing_t scs = *scc->ssbSubcarrierSpacing;
  const long band = *scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0];
@@ -860,9 +860,9 @@ static void config_sched_ctrlSIB1(gNB_MAC_INST *nr_mac)
  if (ssb_period > 1)
    ssb_frame_periodicity = 1 << (ssb_period - 1);

-  const int8_t numb_slots_frame = nr_mac->frame_structure.numb_slots_frame;
+  const int8_t numb_slots_frame = nr_mac->frame_structure[CC_id].numb_slots_frame;
  frequency_range_t frequency_range = scc->ssb_PositionsInBurst->present == 3 ? FR2 : FR1;
-  const int prb_offset = frequency_range == FR1 ? nr_mac->ssb_OffsetPointA >> scs : nr_mac->ssb_OffsetPointA >> (scs - 2);
+  const int prb_offset = frequency_range == FR1 ? nr_mac->ssb_OffsetPointA[CC_id] >> scs : nr_mac->ssb_OffsetPointA[CC_id] >> (scs - 2);

  NR_Type0_PDCCH_CSS_config_t type0_PDCCH_CSS_config = {0};
  for (int i = 0; i < get_max_ssbs(scc); i++) {
@@ -872,7 +872,7 @@ static void config_sched_ctrlSIB1(gNB_MAC_INST *nr_mac)
                                            0,
                                            mib,
                                            numb_slots_frame,
-                                            nr_mac->ssb_SubcarrierOffset,
+                                            nr_mac->ssb_SubcarrierOffset[CC_id],
                                            ssb_start_symbol,
                                            scs,
                                            frequency_range,
@@ -886,8 +886,8 @@ static void config_sched_ctrlSIB1(gNB_MAC_INST *nr_mac)
  }
  // CSET0 doesn't depend on SSB index
  fill_coresetZero(&sched_ctrlCommon->coreset, &type0_PDCCH_CSS_config);
-  nr_mac->cset0_bwp_start = type0_PDCCH_CSS_config.cset_start_rb;
-  nr_mac->cset0_bwp_size = type0_PDCCH_CSS_config.num_rbs;
+  nr_mac->cset0_bwp_start[CC_id] = type0_PDCCH_CSS_config.cset_start_rb;
+  nr_mac->cset0_bwp_size[CC_id] = type0_PDCCH_CSS_config.num_rbs;
  if (type0_PDCCH_CSS_config.type0_pdcch_ss_mux_pattern > 1) {
    int bwp_start = NRRIV2PRBOFFSET(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,
                                    MAX_BWP_SIZE);
@@ -895,8 +895,8 @@ static void config_sched_ctrlSIB1(gNB_MAC_INST *nr_mac)
    // we need to configure a commonControlResourceSet != 0
    // because CSET0 would start from a symbol != 0 and that's unwanted for anything but SIB1
    // The network configures the commonControlResourceSet in SIB1 so that it is contained in the bandwidth of CSET0
-    bool do_TCI = nr_mac->radio_config.do_TCI;
-    configure_coreset_for_mux23(scc, nr_mac->cset0_bwp_start - bwp_start, nr_mac->cset0_bwp_size, bwp_start, bwp_size, do_TCI);
+    bool do_TCI = nr_mac->radio_config[CC_id].do_TCI;
+    configure_coreset_for_mux23(scc, nr_mac->cset0_bwp_start[CC_id] - bwp_start, nr_mac->cset0_bwp_size[CC_id], bwp_start, bwp_size, do_TCI);
  }
 }

@@ -922,7 +922,7 @@ static void init_ul_tda_info(const NR_PUSCH_TimeDomainResourceAllocationList_t *
  }
 }

-void nr_mac_config_scc(gNB_MAC_INST *nrmac, NR_ServingCellConfigCommon_t *scc, const nr_mac_config_t *config)
+void nr_mac_config_scc(gNB_MAC_INST *nrmac, int CC_id, NR_ServingCellConfigCommon_t *scc, const nr_mac_config_t *config)
 {
  DevAssert(nrmac != NULL);
  DevAssert(scc != NULL);
@@ -935,31 +935,31 @@ void nr_mac_config_scc(gNB_MAC_INST *nrmac, NR_ServingCellConfigCommon_t *scc, c
  const int NTN_gNB_Koffset = get_NTN_Koffset(scc);
  const int n = get_slots_per_frame_from_scs(*scc->ssbSubcarrierSpacing);
  const int size = n << (int)ceil(log2((NTN_gNB_Koffset + 13) / n + 1)); // 13 is upper limit for max_fb_time
-  nrmac->vrb_map_UL_size = size;
+  nrmac->vrb_map_UL_size[CC_id] = size;

  int num_beams = 1;
-  if(nrmac->beam_info.beam_mode != NO_BEAM_MODE)
-    num_beams = nrmac->beam_info.beams_per_period;
+  if(nrmac->beam_info[CC_id].beam_mode != NO_BEAM_MODE)
+    num_beams = nrmac->beam_info[CC_id].beams_per_period;
  for (int i = 0; i < num_beams; i++) {
-    nrmac->common_channels[0].vrb_map_UL[i] = calloc(size * MAX_BWP_SIZE, sizeof(uint16_t));
-    AssertFatal(nrmac->common_channels[0].vrb_map_UL[i],
-                "could not allocate memory for RC.nrmac[]->common_channels[0].vrb_map_UL[%d]\n", i);
+    nrmac->common_channels[CC_id].vrb_map_UL[i] = calloc(size * MAX_BWP_SIZE, sizeof(uint16_t));
+    AssertFatal(nrmac->common_channels[CC_id].vrb_map_UL[i],
+                "could not allocate memory for RC.nrmac[]->common_channels[%d].vrb_map_UL[%d]\n", CC_id, i);
  }

-  nrmac->UL_tti_req_ahead_size = size;
-  nrmac->UL_tti_req_ahead[0] = calloc(size, sizeof(nfapi_nr_ul_tti_request_t));
-  AssertFatal(nrmac->UL_tti_req_ahead[0], "could not allocate memory for nrmac->UL_tti_req_ahead[0]\n");
+  nrmac->UL_tti_req_ahead_size[CC_id] = size;
+  nrmac->UL_tti_req_ahead[CC_id] = calloc(size, sizeof(nfapi_nr_ul_tti_request_t));
+  AssertFatal(nrmac->UL_tti_req_ahead[CC_id], "could not allocate memory for nrmac->UL_tti_req_ahead[%d]\n", CC_id);

-  initialize_beam_information(&nrmac->beam_info, *scc->ssbSubcarrierSpacing, n);
+  initialize_beam_information(&nrmac->beam_info[CC_id], *scc->ssbSubcarrierSpacing, n);

  LOG_D(NR_MAC, "Configuring common parameters from NR ServingCellConfig\n");

-  config_common(nrmac, config, scc);
+  config_common(nrmac, CC_id, config, scc);
  fill_beam_index_list(scc, config, nrmac);

  if (NFAPI_MODE == NFAPI_MONOLITHIC) {
    // nothing to be sent in the other cases
-    NR_PHY_Config_t phycfg = {.Mod_id = 0, .CC_id = 0, .cfg = &nrmac->config[0]};
+    NR_PHY_Config_t phycfg = {.Mod_id = 0, .CC_id = CC_id, .cfg = &nrmac->config[CC_id]};
    DevAssert(nrmac->if_inst->NR_PHY_config_req);
    nrmac->if_inst->NR_PHY_config_req(&phycfg);
  }
@@ -967,10 +967,10 @@ void nr_mac_config_scc(gNB_MAC_INST *nrmac, NR_ServingCellConfigCommon_t *scc, c
  find_SSB_and_RO_available(nrmac);

  if (IS_SA_MODE(get_softmodem_params()))
-    config_sched_ctrlSIB1(nrmac);
+    config_sched_ctrlSIB1(nrmac, CC_id);

-  seq_arr_init(&nrmac->ul_tda, sizeof(NR_tda_info_t));
-  init_ul_tda_info(scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList, &nrmac->ul_tda);
+  seq_arr_init(&nrmac->ul_tda[CC_id], sizeof(NR_tda_info_t));
+  init_ul_tda_info(scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList, &nrmac->ul_tda[CC_id]);
 }

 bool nr_mac_configure_other_sib(gNB_MAC_INST *nrmac, int num_cu_sib, const f1ap_sib_msg_t cu_sib[num_cu_sib])
@@ -1213,7 +1213,7 @@ void nr_mac_configure_sib1(gNB_MAC_INST *nrmac, const plmn_id_t *plmn, uint64_t

  NR_COMMON_channels_t *cc = &nrmac->common_channels[0];
  NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
-  NR_BCCH_DL_SCH_Message_t *sib1 = get_SIB1_NR(scc, plmn, cellID, tac, &nrmac->radio_config);
+  NR_BCCH_DL_SCH_Message_t *sib1 = get_SIB1_NR(scc, plmn, cellID, tac, &nrmac->radio_config[0]);
  cc->sib1 = sib1;
  cc->sib1_bcch_length = encode_SIB_NR(sib1, cc->sib1_bcch_pdu, sizeof(cc->sib1_bcch_pdu));
  AssertFatal(cc->sib1_bcch_length > 0, "could not encode SIB1\n");
@@ -1235,7 +1235,7 @@ bool nr_mac_add_test_ue(gNB_MAC_INST *nrmac, uint32_t rnti, NR_CellGroupConfig_t
  DevAssert(get_softmodem_params()->phy_test);
  NR_SCHED_LOCK(&nrmac->sched_lock);

-  NR_UE_info_t *UE = get_new_nr_ue_inst(&nrmac->UE_info.uid_allocator, rnti, CellGroup, &nrmac->radio_config);
+  NR_UE_info_t *UE = get_new_nr_ue_inst(&nrmac->UE_info.uid_allocator, rnti, CellGroup, &nrmac->radio_config[0]);
  DevAssert(UE->uid < MAX_MOBILES_PER_GNB); // physical simulators: we assume we can always create a UE
  free_and_zero(UE->ra); // physical simulators: UE will not do RA
  UE->local_bwp_id = 1;  // for physical simulators
--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
@@ -33,7 +33,7 @@ uint8_t nr_get_rv(int rel_round)
 void clear_nr_nfapi_information(gNB_MAC_INST *gNB, int CC_idP, frame_t frameP, slot_t slotP)
 {
  /* called below and in simulators, so we assume a lock but don't require it */
-  const int num_slots = gNB->frame_structure.numb_slots_frame;
+  const int num_slots = gNB->frame_structure[0].numb_slots_frame;
  UL_tti_req_ahead_initialization(gNB, num_slots, CC_idP, frameP, slotP);

  nfapi_nr_dl_tti_pdcch_pdu_rel15_t **pdcch = (nfapi_nr_dl_tti_pdcch_pdu_rel15_t **)gNB->pdcch_pdu_idx[CC_idP];
@@ -43,7 +43,7 @@ void clear_nr_nfapi_information(gNB_MAC_INST *gNB, int CC_idP, frame_t frameP, s
  memset(pdcch, 0, sizeof(*pdcch) * MAX_NUM_CORESET);

  /* advance last round's future UL_tti_req to be ahead of current frame/slot */
-  const int size = gNB->UL_tti_req_ahead_size;
+  const int size = gNB->UL_tti_req_ahead_size[0];
  const int prev_slot = frameP * num_slots + slotP + size - 1;
  nfapi_nr_ul_tti_request_t *future_ul_tti_req = &gNB->UL_tti_req_ahead[CC_idP][prev_slot % size];
  future_ul_tti_req->SFN = (prev_slot / num_slots) % 1024;
@@ -125,21 +125,21 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frame, slot_t slo
  NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;

  NR_SCHED_LOCK(&gNB->sched_lock);
-  int slots_frame = gNB->frame_structure.numb_slots_frame;
-  clear_beam_information(&gNB->beam_info, frame, slot, slots_frame);
+  int slots_frame = gNB->frame_structure[0].numb_slots_frame;
+  clear_beam_information(&gNB->beam_info[0], frame, slot, slots_frame);

  gNB->frame = frame;
  start_meas(&gNB->gNB_scheduler);

  for (int CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
    int num_beams = 1;
-    if(gNB->beam_info.beam_mode != NO_BEAM_MODE)
-      num_beams = gNB->beam_info.beams_per_period;
+    if(gNB->beam_info[0].beam_mode != NO_BEAM_MODE)
+      num_beams = gNB->beam_info[0].beams_per_period;
    // clear vrb_maps
    for (int i = 0; i < num_beams; i++)
      memset(cc[CC_id].vrb_map[i], 0, sizeof(uint16_t) * MAX_BWP_SIZE);
    // clear last scheduled slot's content (only)!
-    const int size = gNB->vrb_map_UL_size;
+    const int size = gNB->vrb_map_UL_size[0];
    const int prev_slot = frame * slots_frame + slot + size - 1;
    for (int i = 0; i < num_beams; i++) {
      uint16_t *vrb_map_UL = cc[CC_id].vrb_map_UL[i];
@@ -229,7 +229,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frame, slot_t slo
   * is more than 1 CC supported?
   */
  AssertFatal(MAX_NUM_CCs == 1, "only 1 CC supported\n");
-  const int current_index = ul_buffer_index(frame, slot, slots_frame, gNB->UL_tti_req_ahead_size);
+  const int current_index = ul_buffer_index(frame, slot, slots_frame, gNB->UL_tti_req_ahead_size[0]);
  copy_ul_tti_req(&sched_info->UL_tti_req, &gNB->UL_tti_req_ahead[0][current_index]);

  stop_meas(&gNB->gNB_scheduler);
--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
@@ -209,16 +209,16 @@ static void schedule_nr_MsgA_pusch(NR_UplinkConfigCommon_t *uplinkConfigCommon,
  NR_MsgA_PUSCH_Resource_r16_t *msgA_PUSCH_Resource = uplinkConfigCommon->initialUplinkBWP->ext1->msgA_ConfigCommon_r16->choice
                                                          .setup->msgA_PUSCH_Config_r16->msgA_PUSCH_ResourceGroupA_r16;

-  const int n_slots_frame = nr_mac->frame_structure.numb_slots_frame;
+  const int n_slots_frame = nr_mac->frame_structure[0].numb_slots_frame;
  slot_t msgA_pusch_slot = (slotP + msgA_PUSCH_Resource->msgA_PUSCH_TimeDomainOffset_r16) % n_slots_frame;
  frame_t msgA_pusch_frame = (frameP + ((slotP + msgA_PUSCH_Resource->msgA_PUSCH_TimeDomainOffset_r16) / n_slots_frame)) % 1024;

-  int index = ul_buffer_index((int)msgA_pusch_frame, (int)msgA_pusch_slot, n_slots_frame, nr_mac->UL_tti_req_ahead_size);
+  int index = ul_buffer_index((int)msgA_pusch_frame, (int)msgA_pusch_slot, n_slots_frame, nr_mac->UL_tti_req_ahead_size[0]);
  nfapi_nr_ul_tti_request_t *UL_tti_req = &nr_mac[module_idP].UL_tti_req_ahead[0][index];

  UL_tti_req->SFN = msgA_pusch_frame;
  UL_tti_req->Slot = msgA_pusch_slot;
-  AssertFatal(is_ul_slot(msgA_pusch_slot, &nr_mac->frame_structure),
+  AssertFatal(is_ul_slot(msgA_pusch_slot, &nr_mac->frame_structure[0]),
              "Slot %d is not an Uplink slot, invalid msgA_PUSCH_TimeDomainOffset_r16 %ld\n",
              msgA_pusch_slot,
              msgA_PUSCH_Resource->msgA_PUSCH_TimeDomainOffset_r16);
@@ -331,12 +331,12 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, slot_t slotP)
  NR_MsgA_ConfigCommon_r16_t *msgacc = NULL;
  if (initialUplinkBWP->ext1 && initialUplinkBWP->ext1->msgA_ConfigCommon_r16)
    msgacc = initialUplinkBWP->ext1->msgA_ConfigCommon_r16->choice.setup;
-  int slots_frame = gNB->frame_structure.numb_slots_frame;
-  int index = ul_buffer_index(frameP, slotP, slots_frame, gNB->UL_tti_req_ahead_size);
+  int slots_frame = gNB->frame_structure[0].numb_slots_frame;
+  int index = ul_buffer_index(frameP, slotP, slots_frame, gNB->UL_tti_req_ahead_size[0]);
  nfapi_nr_ul_tti_request_t *UL_tti_req = &gNB->UL_tti_req_ahead[0][index];
  nfapi_nr_config_request_scf_t *cfg = &gNB->config[0];

-  if (is_ul_slot(slotP, &gNB->frame_structure)) {
+  if (is_ul_slot(slotP, &gNB->frame_structure[0])) {
    const NR_RACH_ConfigGeneric_t *rach_ConfigGeneric = &rach_ConfigCommon->rach_ConfigGeneric;
    uint8_t config_index = rach_ConfigGeneric->prach_ConfigurationIndex;
    int slot_index = 0;
@@ -398,7 +398,7 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, slot_t slotP)
            // fapi beam index
            beam_index = get_beam_from_ssbidx(gNB, cc->ssb_index[n_ssb]);
            // multi-beam allocation structure
-            beam = beam_allocation_procedure(&gNB->beam_info, frameP, slotP, beam_index, slots_frame);
+            beam = beam_allocation_procedure(&gNB->beam_info[0], frameP, slotP, beam_index, slots_frame);
            AssertFatal(beam.idx >= 0, "Cannot allocate PRACH corresponding to %d SSB transmitted in any available beam\n", n_ssb + 1);
          } else {
            int first_ssb_index = (prach_occasion_id * (int)num_ssb_per_RO) % cc->num_active_ssb;
@@ -406,7 +406,7 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, slot_t slotP)
              // fapi beam index
              beam_index = get_beam_from_ssbidx(gNB, cc->ssb_index[j]);
              // multi-beam allocation structure
-              beam = beam_allocation_procedure(&gNB->beam_info, frameP, slotP, beam_index, slots_frame);
+              beam = beam_allocation_procedure(&gNB->beam_info[0], frameP, slotP, beam_index, slots_frame);
              AssertFatal(beam.idx >= 0, "Cannot allocate PRACH corresponding to SSB %d in any available beam\n", j);
            }
          }
@@ -491,7 +491,7 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, slot_t slotP)
          prach_pdu->beamforming.num_prgs = 1;
          prach_pdu->beamforming.prg_size = n_ra_rb;
          prach_pdu->beamforming.dig_bf_interface = num_td_occ;
-          const uint16_t fapi_beam = convert_to_fapi_beam(beam_index, gNB->beam_info.beam_mode);
+          const uint16_t fapi_beam = convert_to_fapi_beam(beam_index, gNB->beam_info[0].beam_mode);
          prach_pdu->beamforming.prgs_list[0].dig_bf_interface_list[num_td_occ - 1].beam_idx = fapi_beam;

          LOG_D(NR_MAC,
@@ -527,7 +527,7 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, slot_t slotP)
                 slotP + i,
                 n_ra_rb * fdm,
                 beam.idx,
-                 gNB->vrb_map_UL_size,
+                 gNB->vrb_map_UL_size[0],
                 slots_frame,
                 bwp_start + rach_ConfigGeneric->msg1_FrequencyStart,
                 start_symb,
@@ -695,7 +695,7 @@ void nr_initiate_ra_proc(module_id_t module_idP,
      return;
    }

-    UE = get_new_nr_ue_inst(&nr_mac->UE_info.uid_allocator, rnti, NULL, &nr_mac->radio_config);
+    UE = get_new_nr_ue_inst(&nr_mac->UE_info.uid_allocator, rnti, NULL, &nr_mac->radio_config[0]);
    if (!add_new_UE_RA(nr_mac, UE)) {
      LOG_E(NR_MAC, "FAILURE: %4d.%2d initiating RA procedure for preamble index %d: no free RA process\n", frame, slot, preamble_index);
      delete_nr_ue_data(UE, &nr_mac->UE_info.uid_allocator);
@@ -783,27 +783,27 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP,
                                           TYPE_TC_RNTI_,
                                           ra->Msg3_tda_id);

-  int slots_frame = nr_mac->frame_structure.numb_slots_frame;
+  int slots_frame = nr_mac->frame_structure[0].numb_slots_frame;
  uint16_t K2 = tda_info.k2 + get_NTN_Koffset(scc);
  const int sched_frame = (frame + (slot + K2) / slots_frame) % MAX_FRAME_NUMBER;
  const int sched_slot = (slot + K2) % slots_frame;
-  uint16_t slot_bitmap = get_ul_bitmap(&nr_mac->frame_structure, sched_slot);
+  uint16_t slot_bitmap = get_ul_bitmap(&nr_mac->frame_structure[0], sched_slot);
  uint16_t msg3_mask = SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols);

-  if (!is_dl_slot(slot, &nr_mac->frame_structure)
-      || !is_ul_slot(sched_slot, &nr_mac->frame_structure)
+  if (!is_dl_slot(slot, &nr_mac->frame_structure[0])
+      || !is_ul_slot(sched_slot, &nr_mac->frame_structure[0])
      || !((msg3_mask & slot_bitmap) == msg3_mask))
    return;

-  NR_beam_alloc_t beam_ul = beam_allocation_procedure(&nr_mac->beam_info, sched_frame, sched_slot, UE->UE_beam_index, slots_frame);
+  NR_beam_alloc_t beam_ul = beam_allocation_procedure(&nr_mac->beam_info[0], sched_frame, sched_slot, UE->UE_beam_index, slots_frame);
  if (beam_ul.idx < 0)
    return;
-  NR_beam_alloc_t beam_dci = beam_allocation_procedure(&nr_mac->beam_info, frame, slot, UE->UE_beam_index, slots_frame);
+  NR_beam_alloc_t beam_dci = beam_allocation_procedure(&nr_mac->beam_info[0], frame, slot, UE->UE_beam_index, slots_frame);
  if (beam_dci.idx < 0) {
-    reset_beam_status(&nr_mac->beam_info, sched_frame, sched_slot, UE->UE_beam_index, slots_frame, beam_ul.new_beam);
+    reset_beam_status(&nr_mac->beam_info[0], sched_frame, sched_slot, UE->UE_beam_index, slots_frame, beam_ul.new_beam);
    return;
  }
-  int buffer_index = ul_buffer_index(sched_frame, sched_slot, slots_frame, nr_mac->vrb_map_UL_size);
+  int buffer_index = ul_buffer_index(sched_frame, sched_slot, slots_frame, nr_mac->vrb_map_UL_size[0]);
  uint16_t *vrb_map_UL = &nr_mac->common_channels[CC_id].vrb_map_UL[beam_ul.idx][buffer_index * MAX_BWP_SIZE];

  NR_pusch_dmrs_t dmrs_info = get_ul_dmrs_params(scc, ul_bwp, &tda_info, 1);
@@ -842,8 +842,8 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP,
  int rbSize = 0;
  if (!get_rb_alloc(ra->msg3_nb_rb, ra->msg3_nb_rb, bwpStart, bwpSize, vrb_map_UL, msg3_mask, &rbStart, &rbSize)) {
    // cannot find free vrb_map for msg3 retransmission in this slot
-    reset_beam_status(&nr_mac->beam_info, sched_frame, sched_slot, UE->UE_beam_index, slots_frame, beam_ul.new_beam);
-    reset_beam_status(&nr_mac->beam_info, frame, slot, UE->UE_beam_index, slots_frame, beam_dci.new_beam);
+    reset_beam_status(&nr_mac->beam_info[0], sched_frame, sched_slot, UE->UE_beam_index, slots_frame, beam_ul.new_beam);
+    reset_beam_status(&nr_mac->beam_info[0], frame, slot, UE->UE_beam_index, slots_frame, beam_dci.new_beam);
    return;
  }

@@ -857,7 +857,7 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP,
        sched_frame,
        sched_slot);

-  buffer_index = ul_buffer_index(sched_frame, sched_slot, slots_frame, nr_mac->UL_tti_req_ahead_size);
+  buffer_index = ul_buffer_index(sched_frame, sched_slot, slots_frame, nr_mac->UL_tti_req_ahead_size[0]);
  nfapi_nr_ul_tti_request_t *future_ul_tti_req = &nr_mac->UL_tti_req_ahead[CC_id][buffer_index];
  AssertFatal(future_ul_tti_req->SFN == sched_frame
              && future_ul_tti_req->Slot == sched_slot,
@@ -880,7 +880,7 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP,
                                                      ra->msg3_round,
                                                      ul_bwp->pusch_Config && ul_bwp->pusch_Config->frequencyHopping,
                                                      UE->rnti,
-                                                      nr_mac->beam_info.beam_mode);
+                                                      nr_mac->beam_info[0].beam_mode);
  future_ul_tti_req->n_pdus += 1;

  // generation of DCI 0_0 to schedule msg3 retransmission
@@ -907,13 +907,13 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP,
                               0);
  if (CCEIndex < 0) {
    LOG_E(NR_MAC, "UE %04x cannot find free CCE!\n", UE->rnti);
-    reset_beam_status(&nr_mac->beam_info, sched_frame, sched_slot, UE->UE_beam_index, slots_frame, beam_ul.new_beam);
-    reset_beam_status(&nr_mac->beam_info, frame, slot, UE->UE_beam_index, slots_frame, beam_dci.new_beam);
+    reset_beam_status(&nr_mac->beam_info[0], sched_frame, sched_slot, UE->UE_beam_index, slots_frame, beam_ul.new_beam);
+    reset_beam_status(&nr_mac->beam_info[0], frame, slot, UE->UE_beam_index, slots_frame, beam_dci.new_beam);
    return;
  }

  // Fill PDCCH DL DCI PDU
-  const uint16_t fapi_beam = convert_to_fapi_beam(UE->UE_beam_index, nr_mac->beam_info.beam_mode);
+  const uint16_t fapi_beam = convert_to_fapi_beam(UE->UE_beam_index, nr_mac->beam_info[0].beam_mode);
  nfapi_nr_dl_dci_pdu_t *dci_pdu =
      prepare_dci_pdu(pdcch_pdu_rel15, scc, ss, coreset, aggregation_level, CCEIndex, fapi_beam, UE->rnti);
  pdcch_pdu_rel15->numDlDci++;
@@ -943,7 +943,7 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP,
                     ss,
                     coreset,
                     0, // parameter not needed for DCI 0_0
-                     nr_mac->cset0_bwp_size);
+                     nr_mac->cset0_bwp_size[0]);

  // Mark the corresponding RBs as used
  fill_pdcch_vrb_map(nr_mac,
@@ -1162,8 +1162,8 @@ static bool nr_get_Msg3alloc(gNB_MAC_INST *mac, int CC_id, int current_slot, fra

  const int buffer_index = ul_buffer_index(ra->Msg3_frame,
                                           ra->Msg3_slot,
-                                           mac->frame_structure.numb_slots_frame,
-                                           mac->vrb_map_UL_size);
+                                           mac->frame_structure[0].numb_slots_frame,
+                                           mac->vrb_map_UL_size[0]);
  uint16_t *vrb_map_UL = &mac->common_channels[CC_id].vrb_map_UL[ra->Msg3_beam.idx][buffer_index * MAX_BWP_SIZE];

  int bwpSize = sc_info->initial_ul_BWPSize;
@@ -1212,8 +1212,8 @@ static void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, slot_
  }

  const uint16_t mask = SL_to_bitmap(ra->msg3_startsymb, ra->msg3_nbSymb);
-  int slots_frame = mac->frame_structure.numb_slots_frame;
-  int buffer_index = ul_buffer_index(ra->Msg3_frame, ra->Msg3_slot, slots_frame, mac->vrb_map_UL_size);
+  int slots_frame = mac->frame_structure[0].numb_slots_frame;
+  int buffer_index = ul_buffer_index(ra->Msg3_frame, ra->Msg3_slot, slots_frame, mac->vrb_map_UL_size[0]);
  uint16_t *vrb_map_UL = &mac->common_channels[CC_id].vrb_map_UL[ra->Msg3_beam.idx][buffer_index * MAX_BWP_SIZE];
  for (int i = 0; i < ra->msg3_nb_rb; ++i) {
    AssertFatal(!(vrb_map_UL[i + ra->msg3_first_rb + ra->msg3_bwp_start] & mask),
@@ -1225,7 +1225,7 @@ static void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, slot_
  }

  LOG_D(NR_MAC, "UE %04x: %d.%d RA is active, Msg3 in (%d,%d)\n", UE->rnti, frameP, slotP, ra->Msg3_frame, ra->Msg3_slot);
-  buffer_index = ul_buffer_index(ra->Msg3_frame, ra->Msg3_slot, slots_frame, mac->UL_tti_req_ahead_size);
+  buffer_index = ul_buffer_index(ra->Msg3_frame, ra->Msg3_slot, slots_frame, mac->UL_tti_req_ahead_size[0]);
  nfapi_nr_ul_tti_request_t *future_ul_tti_req = &mac->UL_tti_req_ahead[CC_id][buffer_index];
  AssertFatal(future_ul_tti_req->SFN == ra->Msg3_frame
              && future_ul_tti_req->Slot == ra->Msg3_slot,
@@ -1290,7 +1290,7 @@ static void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, slot_
                                                      0,
                                                      ul_bwp->pusch_Config && ul_bwp->pusch_Config->frequencyHopping,
                                                      UE->rnti,
-                                                      mac->beam_info.beam_mode);
+                                                      mac->beam_info[0].beam_mode);
  future_ul_tti_req->n_pdus += 1;

  // calling function to fill rar message
@@ -1415,7 +1415,7 @@ static void prepare_dl_pdus(gNB_MAC_INST *nr_mac,
  NR_COMMON_channels_t *cc = &nr_mac->common_channels[CC_id];
  NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
  NR_UE_DL_BWP_t *dl_bwp = &UE->current_DL_BWP;
-  const uint16_t fapi_beam = convert_to_fapi_beam(UE->UE_beam_index, nr_mac->beam_info.beam_mode);
+  const uint16_t fapi_beam = convert_to_fapi_beam(UE->UE_beam_index, nr_mac->beam_info[0].beam_mode);
  nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = prepare_pdsch_pdu(dl_tti_pdsch_pdu,
                                                                         nr_mac,
                                                                         UE,
@@ -1480,7 +1480,7 @@ static void prepare_dl_pdus(gNB_MAC_INST *nr_mac,
                     sched_ctrl->search_space,
                     coreset,
                     0, // parameter not needed for DCI 1_0
-                     nr_mac->cset0_bwp_size);
+                     nr_mac->cset0_bwp_size[0]);

  LOG_D(NR_MAC, "BWPSize: %i\n", pdcch_pdu_rel15->BWPSize);
  LOG_D(NR_MAC, "BWPStart: %i\n", pdcch_pdu_rel15->BWPStart);
@@ -1510,7 +1510,7 @@ static void nr_generate_Msg2(module_id_t module_idP,
  gNB_MAC_INST *nr_mac = RC.nrmac[module_idP];

  // no DL -> cannot send Msg2
-  if (!is_dl_slot(slotP, &nr_mac->frame_structure)) {
+  if (!is_dl_slot(slotP, &nr_mac->frame_structure[0])) {
    return;
  }

@@ -1520,7 +1520,7 @@ static void nr_generate_Msg2(module_id_t module_idP,
  NR_RA_t *ra = UE->ra;
  long rrc_ra_ResponseWindow =
      scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.ra_ResponseWindow;
-  const int n_slots_frame = nr_mac->frame_structure.numb_slots_frame;
+  const int n_slots_frame = nr_mac->frame_structure[0].numb_slots_frame;
  if (!msg2_in_response_window(ra->preamble_frame, ra->preamble_slot, n_slots_frame, rrc_ra_ResponseWindow, frameP, slotP)) {
    LOG_E(NR_MAC,
          "sfn: %d.%d UE RA-RNTI %04x TC-RNTI %04x: exceeded RA window, cannot schedule Msg2\n",
@@ -1538,7 +1538,7 @@ static void nr_generate_Msg2(module_id_t module_idP,
    LOG_E(NR_MAC, "UE RA-RNTI %04x TC-RNTI %04x: Msg2 not monitored by UE\n", ra->RA_rnti, UE->rnti);
    return;
  }
-  NR_beam_alloc_t beam = beam_allocation_procedure(&nr_mac->beam_info, frameP, slotP, UE->UE_beam_index, n_slots_frame);
+  NR_beam_alloc_t beam = beam_allocation_procedure(&nr_mac->beam_info[0], frameP, slotP, UE->UE_beam_index, n_slots_frame);
  if (beam.idx < 0)
    return;

@@ -1554,12 +1554,12 @@ static void nr_generate_Msg2(module_id_t module_idP,
                                   frameP,
                                   slotP,
                                   ra,
-                                   &nr_mac->beam_info,
+                                   &nr_mac->beam_info[0],
                                   UE->UE_beam_index,
-                                   &nr_mac->frame_structure);
+                                   &nr_mac->frame_structure[0]);
  if (!ret || ra->Msg3_tda_id > 15) {
    LOG_D(NR_MAC, "UE RNTI %04x %d.%d: infeasible Msg3 TDA\n", UE->rnti, frameP, slotP);
-    reset_beam_status(&nr_mac->beam_info, frameP, slotP, UE->UE_beam_index, n_slots_frame, beam.new_beam);
+    reset_beam_status(&nr_mac->beam_info[0], frameP, slotP, UE->UE_beam_index, n_slots_frame, beam.new_beam);
    return;
  }

@@ -1569,7 +1569,7 @@ static void nr_generate_Msg2(module_id_t module_idP,
  // Calculate number of symbols
  int time_domain_assignment = get_dl_tda(nr_mac, slotP);
  int ssb_index = get_ssbidx_from_beam(nr_mac, UE->UE_beam_index);
-  NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config = &nr_mac->type0_PDCCH_CSS_config[ssb_index];
+  NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config = &nr_mac->type0_PDCCH_CSS_config[0][ssb_index];
  int mux_pattern = type0_PDCCH_CSS_config ? type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern : 1;
  NR_tda_info_t tda_info = get_dl_tda_info(dl_bwp,
                                           ss->searchSpaceType->present,
@@ -1590,8 +1590,8 @@ static void nr_generate_Msg2(module_id_t module_idP,
  uint16_t *vrb_map = cc[CC_id].vrb_map[beam.idx];
  if (!get_rb_alloc(msg2_nb_rb, msg2_nb_rb, bwp_info.bwpStart, bwp_info.bwpSize, vrb_map, msg2_mask, &rbStart, &rbSize)) {
    LOG_W(NR_MAC, "Cannot find free vrb_map for RA RNTI %04x!\n", ra->RA_rnti);
-    reset_beam_status(&nr_mac->beam_info, ra->Msg3_frame, ra->Msg3_slot, UE->UE_beam_index, n_slots_frame, ra->Msg3_beam.new_beam);
-    reset_beam_status(&nr_mac->beam_info, frameP, slotP, UE->UE_beam_index, n_slots_frame, beam.new_beam);
+    reset_beam_status(&nr_mac->beam_info[0], ra->Msg3_frame, ra->Msg3_slot, UE->UE_beam_index, n_slots_frame, ra->Msg3_beam.new_beam);
+    reset_beam_status(&nr_mac->beam_info[0], frameP, slotP, UE->UE_beam_index, n_slots_frame, beam.new_beam);
    return;
  }

@@ -1599,8 +1599,8 @@ static void nr_generate_Msg2(module_id_t module_idP,
  nfapi_nr_dl_tti_request_body_t *dl_req = &DL_req->dl_tti_request_body;
  if (dl_req->nPDUs > NFAPI_NR_MAX_DL_TTI_PDUS - 2) {
    LOG_W(NR_MAC, "UE %04x: %d.%d FAPI DL structure is full\n", UE->rnti, frameP, slotP);
-    reset_beam_status(&nr_mac->beam_info, ra->Msg3_frame, ra->Msg3_slot, UE->UE_beam_index, n_slots_frame, ra->Msg3_beam.new_beam);
-    reset_beam_status(&nr_mac->beam_info, frameP, slotP, UE->UE_beam_index, n_slots_frame, beam.new_beam);
+    reset_beam_status(&nr_mac->beam_info[0], ra->Msg3_frame, ra->Msg3_slot, UE->UE_beam_index, n_slots_frame, ra->Msg3_beam.new_beam);
+    reset_beam_status(&nr_mac->beam_info[0], frameP, slotP, UE->UE_beam_index, n_slots_frame, beam.new_beam);
    return;
  }

@@ -1609,16 +1609,16 @@ static void nr_generate_Msg2(module_id_t module_idP,

  if (CCEIndex < 0) {
    LOG_W(NR_MAC, "UE %04x: %d.%d cannot find free CCE for Msg2!\n", UE->rnti, frameP, slotP);
-    reset_beam_status(&nr_mac->beam_info, ra->Msg3_frame, ra->Msg3_slot, UE->UE_beam_index, n_slots_frame, ra->Msg3_beam.new_beam);
-    reset_beam_status(&nr_mac->beam_info, frameP, slotP, UE->UE_beam_index, n_slots_frame, beam.new_beam);
+    reset_beam_status(&nr_mac->beam_info[0], ra->Msg3_frame, ra->Msg3_slot, UE->UE_beam_index, n_slots_frame, ra->Msg3_beam.new_beam);
+    reset_beam_status(&nr_mac->beam_info[0], frameP, slotP, UE->UE_beam_index, n_slots_frame, beam.new_beam);
    return;
  }

  // get an actual Msg3 allocation in CBRA
  bool msg3_ret = nr_get_Msg3alloc(nr_mac, CC_id, slotP, frameP, UE);
  if (!msg3_ret) {
-    reset_beam_status(&nr_mac->beam_info, ra->Msg3_frame, ra->Msg3_slot, UE->UE_beam_index, n_slots_frame, ra->Msg3_beam.new_beam);
-    reset_beam_status(&nr_mac->beam_info, frameP, slotP, UE->UE_beam_index, n_slots_frame, beam.new_beam);
+    reset_beam_status(&nr_mac->beam_info[0], ra->Msg3_frame, ra->Msg3_slot, UE->UE_beam_index, n_slots_frame, ra->Msg3_beam.new_beam);
+    reset_beam_status(&nr_mac->beam_info[0], frameP, slotP, UE->UE_beam_index, n_slots_frame, beam.new_beam);
    return;
  }

@@ -1766,7 +1766,7 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP,
  NR_UE_DL_BWP_t *dl_bwp = &UE->current_DL_BWP;

  // if it is a DL slot, if the RA is in MSG4 state
-  if (is_dl_slot(slotP, &nr_mac->frame_structure)) {
+  if (is_dl_slot(slotP, &nr_mac->frame_structure[0])) {
    NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
    NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl;
    NR_SearchSpace_t *ss = sched_ctrl->search_space;
@@ -1799,8 +1799,8 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP,
      }
    }

-    const int n_slots_frame = nr_mac->frame_structure.numb_slots_frame;
-    NR_beam_alloc_t beam = beam_allocation_procedure(&nr_mac->beam_info, frameP, slotP, UE->UE_beam_index, n_slots_frame);
+    const int n_slots_frame = nr_mac->frame_structure[0].numb_slots_frame;
+    NR_beam_alloc_t beam = beam_allocation_procedure(&nr_mac->beam_info[0], frameP, slotP, UE->UE_beam_index, n_slots_frame);
    if (beam.idx < 0)
      return;

@@ -1817,7 +1817,7 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP,

    if (CCEIndex < 0) {
      LOG_E(NR_MAC, "Cannot find free CCE for RA RNTI 0x%04x!\n", UE->rnti);
-      reset_beam_status(&nr_mac->beam_info, frameP, slotP, UE->UE_beam_index, n_slots_frame, beam.new_beam);
+      reset_beam_status(&nr_mac->beam_info[0], frameP, slotP, UE->UE_beam_index, n_slots_frame, beam.new_beam);
      return;
    }

@@ -1825,12 +1825,12 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP,
    nfapi_nr_dl_tti_request_body_t *dl_req = &DL_req->dl_tti_request_body;
    if (dl_req->nPDUs > NFAPI_NR_MAX_DL_TTI_PDUS - 2) {
      LOG_I(NR_MAC, "UE %04x: %d.%d FAPI DL structure is full\n", UE->rnti, frameP, slotP);
-      reset_beam_status(&nr_mac->beam_info, frameP, slotP, UE->UE_beam_index, n_slots_frame, beam.new_beam);
+      reset_beam_status(&nr_mac->beam_info[0], frameP, slotP, UE->UE_beam_index, n_slots_frame, beam.new_beam);
      return;
    }
    int ssb_index = get_ssbidx_from_beam(nr_mac, UE->UE_beam_index);
    uint8_t time_domain_assignment = get_dl_tda(nr_mac, slotP);
-    NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config = &nr_mac->type0_PDCCH_CSS_config[ssb_index];
+    NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config = &nr_mac->type0_PDCCH_CSS_config[0][ssb_index];
    int mux_pattern = type0_PDCCH_CSS_config ? type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern : 1;
    NR_tda_info_t msg4_tda = get_dl_tda_info(dl_bwp,
                                             ss->searchSpaceType->present,
@@ -1841,7 +1841,7 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP,
                                             coreset->controlResourceSetId,
                                             false);
    if (!msg4_tda.valid_tda) {
-      reset_beam_status(&nr_mac->beam_info, frameP, slotP, UE->UE_beam_index, n_slots_frame, beam.new_beam);
+      reset_beam_status(&nr_mac->beam_info[0], frameP, slotP, UE->UE_beam_index, n_slots_frame, beam.new_beam);
      return;
    }

@@ -1887,7 +1887,7 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP,
    uint16_t *vrb_map = cc[CC_id].vrb_map[beam.idx];
    if (!get_rb_alloc(msg4_nr_rb, msg4_nr_rb, bwp_info.bwpStart, bwp_info.bwpSize, vrb_map, msg4_mask, &rbStart, &rbSize)) {
      LOG_E(NR_MAC, "Cannot find free vrb_map for RNTI %04x!\n", UE->rnti);
-      reset_beam_status(&nr_mac->beam_info, frameP, slotP, UE->UE_beam_index, n_slots_frame, beam.new_beam);
+      reset_beam_status(&nr_mac->beam_info[0], frameP, slotP, UE->UE_beam_index, n_slots_frame, beam.new_beam);
      return;
    }

@@ -1896,7 +1896,7 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP,
    int alloc = nr_acknack_scheduling(nr_mac, UE, frameP, slotP, UE->UE_beam_index, r_pucch, 1);
    if (alloc < 0) {
      LOG_D(NR_MAC,"Couldn't find a pucch allocation for ack nack (msg4) in frame %d slot %d\n", frameP, slotP);
-      reset_beam_status(&nr_mac->beam_info, frameP, slotP, UE->UE_beam_index, n_slots_frame, beam.new_beam);
+      reset_beam_status(&nr_mac->beam_info[0], frameP, slotP, UE->UE_beam_index, n_slots_frame, beam.new_beam);
      return;
    }

--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
@@ -141,16 +141,16 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, slot_t slotP, nfapi
    NR_COMMON_channels_t *cc = &gNB->common_channels[CC_id];
    const NR_MIB_t *mib = cc->mib->message.choice.mib;
    NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
-    const int slots_per_frame = gNB->frame_structure.numb_slots_frame;
+    const int slots_per_frame = gNB->frame_structure[0].numb_slots_frame;
    dl_req = &DL_req->dl_tti_request_body;

    // get MIB every 8 frames
    if(((slotP == 0) && (frameP & 7) == 0) ||
-       gNB->first_MIB) {
+       gNB->first_MIB[0]) {
      int mib_sdu_length = encode_mib(cc->mib, frameP, cc->MIB_pdu, sizeof(cc->MIB_pdu));

      // flag to avoid sending an empty MIB in the first frames of execution since gNB doesn't get at the beginning in frame 0 slot 0
-      gNB->first_MIB = false;
+      gNB->first_MIB[0] = false;

      LOG_D(MAC,
            "[gNB %d] Frame %d : MIB->BCH  CC_id %d, Received %d bytes\n",
@@ -179,8 +179,8 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, slot_t slotP, nfapi
      NR_SubcarrierSpacing_t scs = *scc->ssbSubcarrierSpacing;
      const long band = *scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0];
      const int bw = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
-      const uint16_t offset_pointa = gNB->ssb_OffsetPointA;
-      uint8_t ssbSubcarrierOffset = gNB->ssb_SubcarrierOffset;
+      const uint16_t offset_pointa = gNB->ssb_OffsetPointA[0];
+      uint8_t ssbSubcarrierOffset = gNB->ssb_SubcarrierOffset[0];
      const int L_max = get_max_ssbs(scc);
      const frequency_range_t frequency_range = scc->ssb_PositionsInBurst->present == 3 ? FR2 : FR1;
      const int prb_offset = frequency_range == FR1 ? offset_pointa >> scs : offset_pointa >> (scs - 2);
@@ -189,18 +189,18 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, slot_t slotP, nfapi
          uint16_t ssb_start_symbol = get_ssb_start_symbol(band, scs, i_ssb);
          // if start symbol is in current slot, schedule current SSB, fill VRB map and call get_type0_PDCCH_CSS_config_parameters
          if ((ssb_start_symbol / 14) == rel_slot) {
-            NR_beam_alloc_t beam = beam_allocation_procedure(&gNB->beam_info,
+            NR_beam_alloc_t beam = beam_allocation_procedure(&gNB->beam_info[0],
                                                             frameP,
                                                             slotP,
                                                             get_beam_from_ssbidx(gNB, i_ssb),
                                                             slots_per_frame);
            AssertFatal(beam.idx >= 0, "Cannot allocate SSB %d in any available beam\n", i_ssb);
-            const uint16_t alloc_beam_idx = get_allocated_beam(&gNB->beam_info, frameP, slotP, slots_per_frame, beam.idx);
-            const uint16_t fapi_beam = convert_to_fapi_beam(alloc_beam_idx, gNB->beam_info.beam_mode);
+            const uint16_t alloc_beam_idx = get_allocated_beam(&gNB->beam_info[0], frameP, slotP, slots_per_frame, beam.idx);
+            const uint16_t fapi_beam = convert_to_fapi_beam(alloc_beam_idx, gNB->beam_info[0].beam_mode);
            schedule_ssb(frameP, slotP, scc, dl_req, i_ssb, fapi_beam, ssbSubcarrierOffset, offset_pointa, mib_pdu);
            fill_ssb_vrb_map(cc, prb_offset, ssbSubcarrierOffset, ssb_start_symbol, CC_id, beam.idx);
            if (IS_SA_MODE(get_softmodem_params())) {
-              get_type0_PDCCH_CSS_config_parameters(&gNB->type0_PDCCH_CSS_config[i_ssb],
+              get_type0_PDCCH_CSS_config_parameters(&gNB->type0_PDCCH_CSS_config[0][i_ssb],
                                                    frameP,
                                                    mib,
                                                    slots_per_frame,
@@ -213,7 +213,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, slot_t slotP, nfapi
                                                    i_ssb,
                                                    ssb_frame_periodicity,
                                                    prb_offset);
-              gNB->type0_PDCCH_CSS_config[i_ssb].active = true;
+              gNB->type0_PDCCH_CSS_config[0][i_ssb].active = true;
            }
          }
        }
@@ -348,7 +348,7 @@ static void nr_fill_nfapi_dl_SIB_pdu(gNB_MAC_INST *gNB_mac,
  dl_tti_pdsch_pdu->PDUSize = (uint16_t)(4+sizeof(nfapi_nr_dl_tti_pdsch_pdu));
  dl_req->nPDUs += 1;

-  const uint16_t fapi_beam = convert_to_fapi_beam(beam_index, gNB_mac->beam_info.beam_mode);
+  const uint16_t fapi_beam = convert_to_fapi_beam(beam_index, gNB_mac->beam_info[0].beam_mode);
  nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 =
      prepare_pdsch_pdu(dl_tti_pdsch_pdu, gNB_mac, NULL, pdsch, NULL, is_sib1, 0, SI_RNTI, fapi_beam, 1, pdu_index);
  LOG_D(NR_MAC,
@@ -389,7 +389,7 @@ static void nr_fill_nfapi_dl_SIB_pdu(gNB_MAC_INST *gNB_mac,
                     search_space,
                     coreset,
                     0,
-                     gNB_mac->cset0_bwp_size);
+                     gNB_mac->cset0_bwp_size[0]);

  LOG_D(MAC,
        "BWPSize: %3i, BWPStart: %3i, SubcarrierSpacing: %i, CyclicPrefix: %i, StartSymbolIndex: %i, DurationSymbols: %i, "
@@ -421,7 +421,7 @@ static bool check_sib1_tda(gNB_MAC_INST *gNB_mac,
 {
  NR_COMMON_channels_t *cc = &gNB_mac->common_channels[CC_id];
  NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
-  NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config = &gNB_mac->type0_PDCCH_CSS_config[ssb_index];
+  NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config = &gNB_mac->type0_PDCCH_CSS_config[0][ssb_index];
  default_table_type_t table_type = get_default_table_type(type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern);
  // If the PDSCH was scheduled with SI-RNTI in PDCCH Type0 common search space,
  // the UE may assume that this PDSCH resource allocation is not applied (Table 5.1.2.1.1-4 and 5 in 38.214)
@@ -438,7 +438,7 @@ static bool check_sib1_tda(gNB_MAC_INST *gNB_mac,
  if (tda_info.startSymbolIndex < type0_PDCCH_CSS_config->first_symbol_index + type0_PDCCH_CSS_config->num_symbols)
    return false;

-  gNB_mac->sib1_pdsch[ssb_index] = allocate_sib1(gNB_mac,
+  gNB_mac->sib1_pdsch[0][ssb_index] = allocate_sib1(gNB_mac,
                                                 CC_id,
                                                 sched_pdcch,
                                                 type0_PDCCH_CSS_config,
@@ -449,7 +449,7 @@ static bool check_sib1_tda(gNB_MAC_INST *gNB_mac,
                                                 beam->idx,
                                                 cc->sib1_bcch_length);

-  if (gNB_mac->sib1_pdsch[ssb_index].tb_size > 0) {
+  if (gNB_mac->sib1_pdsch[0][ssb_index].tb_size > 0) {
    LOG_D(NR_MAC, "Found TDA for SIB1: %d\n", tda);
    return true;
  } else {
@@ -499,25 +499,25 @@ void schedule_nr_sib1(module_id_t module_idP,

  for (int i = 0; i < L_max; i++) {

-    NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config = &gNB_mac->type0_PDCCH_CSS_config[i];
+    NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config = &gNB_mac->type0_PDCCH_CSS_config[0][i];

    if(check_frame_sib1(scc, type0_PDCCH_CSS_config, frameP) &&
       (slotP == type0_PDCCH_CSS_config->slot) &&
       (type0_PDCCH_CSS_config->num_rbs > 0) &&
       (type0_PDCCH_CSS_config->active == true)) {

-      AssertFatal(is_dl_slot(slotP, &gNB_mac->frame_structure),
+      AssertFatal(is_dl_slot(slotP, &gNB_mac->frame_structure[0]),
                  "Trying to schedule SIB1 for SSB %d in slot %d which is not DL. Check searchSpaceZero configuration.\n",
                  type0_PDCCH_CSS_config->ssb_index,
                  slotP);
-      const int n_slots_frame = gNB_mac->frame_structure.numb_slots_frame;
+      const int n_slots_frame = gNB_mac->frame_structure[0].numb_slots_frame;
      int beam_index = get_beam_from_ssbidx(gNB_mac, i);
-      NR_beam_alloc_t beam = beam_allocation_procedure(&gNB_mac->beam_info, frameP, slotP, beam_index, n_slots_frame);
+      NR_beam_alloc_t beam = beam_allocation_procedure(&gNB_mac->beam_info[0], frameP, slotP, beam_index, n_slots_frame);
      AssertFatal(beam.idx >= 0, "Cannot allocate SIB1 corresponding to SSB %d in any available beam\n", i);
      LOG_D(NR_MAC,"(%d.%d) SIB1 transmission: ssb_index %d\n", frameP, slotP, type0_PDCCH_CSS_config->ssb_index);
      NR_sched_pdcch_t sched_pdcch = set_pdcch_structure(NULL,
-                                                         &gNB_mac->sched_ctrlSIB1->search_space[i],
-                                                         &gNB_mac->sched_ctrlSIB1->coreset,
+                                                         &gNB_mac->sched_ctrlSIB1[0]->search_space[i],
+                                                         &gNB_mac->sched_ctrlSIB1[0]->coreset,
                                                         scc,
                                                         NULL,
                                                         type0_PDCCH_CSS_config);
@@ -526,7 +526,7 @@ void schedule_nr_sib1(module_id_t module_idP,
      for (int c = 0; c < 3; c++) {
        find_aggregation_candidates(&aggregation_level,
                                    &nr_of_candidates,
-                                    &gNB_mac->sched_ctrlSIB1->search_space[i],
+                                    &gNB_mac->sched_ctrlSIB1[0]->search_space[i],
                                    4 << c);
        if (nr_of_candidates > 0)
          break; // choosing the lower value of aggregation level available
@@ -538,11 +538,11 @@ void schedule_nr_sib1(module_id_t module_idP,
                                           nr_of_candidates,
                                           beam.idx,
                                           &sched_pdcch,
-                                           &gNB_mac->sched_ctrlSIB1->coreset,
+                                           &gNB_mac->sched_ctrlSIB1[0]->coreset,
                                           0);

      bool res = false;
-      if (gNB_mac->sib1_pdsch[i].time_domain_allocation < 0) {
+      if (gNB_mac->sib1_pdsch[0][i].time_domain_allocation < 0) {
        for (int t = 0; t < 16; t++) {
          if (check_sib1_tda(gNB_mac, &sched_pdcch, &beam, aggregation_level, cce_index, t, i, CC_id)) {
            res = true;
@@ -550,25 +550,25 @@ void schedule_nr_sib1(module_id_t module_idP,
          }
        }
      }
-      AssertFatal(gNB_mac->sib1_pdsch[i].time_domain_allocation >= 0, "Couldn't select any TDA for SIB1\n");
+      AssertFatal(gNB_mac->sib1_pdsch[0][i].time_domain_allocation >= 0, "Couldn't select any TDA for SIB1\n");
      if (!res)
        res = check_sib1_tda(gNB_mac,
                             &sched_pdcch,
                             &beam,
                             aggregation_level,
                             cce_index,
-                             gNB_mac->sib1_pdsch[i].time_domain_allocation,
+                             gNB_mac->sib1_pdsch[0][i].time_domain_allocation,
                             i,
                             CC_id);
-      int tb_size = gNB_mac->sib1_pdsch[i].tb_size;
+      int tb_size = gNB_mac->sib1_pdsch[0][i].tb_size;
      AssertFatal(res && tb_size > 0, "Couldn't allocate TB for SIB1 for an already allocated TDA\n");
      nfapi_nr_dl_tti_request_body_t *dl_req = &DL_req->dl_tti_request_body;
      int pdu_index = gNB_mac->pdu_index[0]++;
      nr_fill_nfapi_dl_SIB_pdu(gNB_mac,
-                               &gNB_mac->sib1_pdsch[i],
+                               &gNB_mac->sib1_pdsch[0][i],
                               &sched_pdcch,
-                               &gNB_mac->sched_ctrlSIB1->search_space[i],
-                               &gNB_mac->sched_ctrlSIB1->coreset,
+                               &gNB_mac->sched_ctrlSIB1[0]->search_space[i],
+                               &gNB_mac->sched_ctrlSIB1[0]->coreset,
                               aggregation_level,
                               cce_index,
                               dl_req,
@@ -629,19 +629,19 @@ static void other_sib_sched_control(module_id_t module_idP,
                                    int payload_idx)
 {
  gNB_MAC_INST *gNB_mac = RC.nrmac[module_idP];
-  AssertFatal(is_dl_slot(slot, &gNB_mac->frame_structure),
+  AssertFatal(is_dl_slot(slot, &gNB_mac->frame_structure[0]),
              "Trying to schedule otherSIB in slot %d which is not DL. Wrong Configuration\n",
              slot);
  NR_ServingCellConfigCommon_t *scc = gNB_mac->common_channels[0].ServingCellConfigCommon;
-  int n_slots_frame = gNB_mac->frame_structure.numb_slots_frame;
+  int n_slots_frame = gNB_mac->frame_structure[0].numb_slots_frame;
  beam_index = get_beam_from_ssbidx(gNB_mac, beam_index);
-  NR_beam_alloc_t beam = beam_allocation_procedure(&gNB_mac->beam_info, frame, slot, beam_index, n_slots_frame);
+  NR_beam_alloc_t beam = beam_allocation_procedure(&gNB_mac->beam_info[0], frame, slot, beam_index, n_slots_frame);
  AssertFatal(beam.idx >= 0, "Cannot allocate otherSIB corresponding for SSB number %d in any available beam\n", beam_index);
  LOG_D(NR_MAC, "(%d.%d) otherSIB payload %d transmission for ssb number %d\n", frame, slot, payload_idx, beam_index);

  NR_COMMON_channels_t *cc = &gNB_mac->common_channels[0];
  int ssb_index = get_ssbidx_from_beam(gNB_mac, beam_index);
-  NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config = &gNB_mac->type0_PDCCH_CSS_config[ssb_index];
+  NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config = &gNB_mac->type0_PDCCH_CSS_config[0][ssb_index];
  NR_PDSCH_ConfigCommon_t *pdsch_ConfigCommon = scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup;
  int time_domain_allocation = 1;
  NR_tda_info_t tda_info = set_tda_info_from_list(pdsch_ConfigCommon->pdsch_TimeDomainAllocationList, time_domain_allocation);
@@ -660,23 +660,23 @@ static void other_sib_sched_control(module_id_t module_idP,
  AssertFatal(nr_of_candidates > 0, "nr_of_candidates is 0\n");
  AssertFatal(ss->controlResourceSetId, "ss->controlResourceSetId is NULL\n");
  NR_ControlResourceSet_t *coreset = get_coreset(gNB_mac, scc, NULL, *ss->controlResourceSetId);
-  if (!gNB_mac->sched_pdcch_otherSI) {
-    gNB_mac->sched_pdcch_otherSI = calloc(1, sizeof(*gNB_mac->sched_pdcch_otherSI));
-    *gNB_mac->sched_pdcch_otherSI = set_pdcch_structure(gNB_mac, ss, coreset, scc, NULL, type0_PDCCH_CSS_config);
+  if (!gNB_mac->sched_pdcch_otherSI[0]) {
+    gNB_mac->sched_pdcch_otherSI[0] = calloc(1, sizeof(*gNB_mac->sched_pdcch_otherSI[0]));
+    *gNB_mac->sched_pdcch_otherSI[0] = set_pdcch_structure(gNB_mac, ss, coreset, scc, NULL, type0_PDCCH_CSS_config);
  }
  int cce_index = find_pdcch_candidate(gNB_mac,
                                       0,
                                       aggregation_level,
                                       nr_of_candidates,
                                       beam.idx,
-                                       gNB_mac->sched_pdcch_otherSI,
+                                       gNB_mac->sched_pdcch_otherSI[0],
                                       coreset,
                                       0);

  AssertFatal(cce_index >= 0, "Could not find CCE for otherSIB DCI\n");

  // Mark the corresponding RBs as used
-  fill_pdcch_vrb_map(gNB_mac, 0, gNB_mac->sched_pdcch_otherSI, cce_index, aggregation_level, beam.idx);
+  fill_pdcch_vrb_map(gNB_mac, 0, gNB_mac->sched_pdcch_otherSI[0], cce_index, aggregation_level, beam.idx);

  NR_sched_pdsch_t sched_pdsch_otherSI = {0};
  sched_pdsch_otherSI.time_domain_allocation = time_domain_allocation;
@@ -701,7 +701,7 @@ static void other_sib_sched_control(module_id_t module_idP,
  nfapi_nr_dl_tti_request_body_t *dl_req = &DL_req->dl_tti_request_body;
  nr_fill_nfapi_dl_SIB_pdu(gNB_mac,
                           &sched_pdsch_otherSI,
-                           gNB_mac->sched_pdcch_otherSI,
+                           gNB_mac->sched_pdcch_otherSI[0],
                           ss,
                           coreset,
                           aggregation_level,
@@ -786,7 +786,7 @@ void schedule_nr_other_sib(module_id_t module_idP,
    }
  }

-  int n_slots_frame = gNB_mac->frame_structure.numb_slots_frame;
+  int n_slots_frame = gNB_mac->frame_structure[0].numb_slots_frame;
  int window_length_sl = 5 << schedInfo->si_WindowLength;
  int window_length_f = (window_length_sl / n_slots_frame) + ((window_length_sl % n_slots_frame) > 0);
  int num_ssb = cc->num_active_ssb;
@@ -806,7 +806,7 @@ void schedule_nr_other_sib(module_id_t module_idP,
  int ssb = 0;
  while (ssb < num_ssb) {
    AssertFatal(temp_frame < window_length_f, "Couldn't fit %d SSB in window length of %d slots\n", num_ssb, window_length_sl);
-    if (is_dl_slot(temp_slot, &gNB_mac->frame_structure)) {
+    if (is_dl_slot(temp_slot, &gNB_mac->frame_structure[0])) {
      rel_slot[ssb] = temp_slot;
      rel_frame[ssb] = temp_frame;
      ssb++;
--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
@@ -32,7 +32,7 @@
 int get_dl_tda(const gNB_MAC_INST *nrmac, int slot)
 {
  /* we assume that this function is mutex-protected from outside */
-  const frame_structure_t *fs = &nrmac->frame_structure;
+  const frame_structure_t *fs = &nrmac->frame_structure[0];

  // Use special TDA in case of CSI-RS
  if (nrmac->UE_info.sched_csirs > 0)
@@ -90,7 +90,7 @@ int nr_write_ce_dlsch_pdu(module_id_t module_idP,
    AssertFatal(timing_advance_cmd < 64, "timing_advance_cmd %d > 63\n", timing_advance_cmd);
    ((NR_MAC_CE_TA *) ce_ptr)->TA_COMMAND = timing_advance_cmd;    //(timing_advance_cmd+31)&0x3f;

-    tag_id = gNB->tag->tag_Id;
+    tag_id = gNB->tag[0]->tag_Id;
    ((NR_MAC_CE_TA *) ce_ptr)->TAGID = tag_id;

    LOG_D(NR_MAC, "NR MAC CE timing advance command = %d (%d) TAG ID = %d\n", timing_advance_cmd, ((NR_MAC_CE_TA *) ce_ptr)->TA_COMMAND, tag_id);
@@ -366,8 +366,8 @@ bwp_info_t get_pdsch_bwp_start_size(gNB_MAC_INST *nr_mac, NR_UE_info_t *UE)
 {
  bwp_info_t bwp_info;
  if (!UE) {
-    bwp_info.bwpStart = nr_mac->cset0_bwp_start;
-    bwp_info.bwpSize = nr_mac->cset0_bwp_size;
+    bwp_info.bwpStart = nr_mac->cset0_bwp_start[0];
+    bwp_info.bwpSize = nr_mac->cset0_bwp_size[0];
    return bwp_info;
  }
  NR_UE_DL_BWP_t *dl_bwp = &UE->current_DL_BWP;
@@ -387,13 +387,13 @@ bwp_info_t get_pdsch_bwp_start_size(gNB_MAC_INST *nr_mac, NR_UE_info_t *UE)
      && sched_ctrl->search_space->searchSpaceType
      && sched_ctrl->search_space->searchSpaceType->present == NR_SearchSpace__searchSpaceType_PR_common) {
    if (sched_ctrl->coreset->controlResourceSetId == 0) {
-      bwp_info.bwpStart = nr_mac->cset0_bwp_start;
+      bwp_info.bwpStart = nr_mac->cset0_bwp_start[0];
    } else {
      int additional_offset = (dl_bwp->BWPStart + 5) / 6 * 6 - dl_bwp->BWPStart;
      bwp_info.bwpStart = dl_bwp->BWPStart + sched_ctrl->sched_pdcch.rb_start + additional_offset;
    }
-    if (nr_mac->cset0_bwp_size > 0) {
-      bwp_info.bwpSize = min(dl_bwp->BWPSize, nr_mac->cset0_bwp_size);
+    if (nr_mac->cset0_bwp_size[0] > 0) {
+      bwp_info.bwpSize = min(dl_bwp->BWPSize, nr_mac->cset0_bwp_size[0]);
    } else {
      bwp_info.bwpSize = min(dl_bwp->BWPSize, UE->sc_info.initial_dl_BWPSize);
    }
@@ -421,7 +421,7 @@ static bool allocate_dl_retransmission(gNB_MAC_INST *nr_mac,
  NR_UE_UL_BWP_t *ul_bwp = &UE->current_UL_BWP;
  NR_sched_pdsch_t new_sched = sched_ctrl->harq_processes[current_harq_pid].sched_pdsch;
  int layers = get_dl_nrOfLayers(sched_ctrl, dl_bwp->dci_format);
-  int pm_index = get_pm_index(nr_mac, UE, dl_bwp->dci_format, layers, nr_mac->radio_config.pdsch_AntennaPorts.XP);
+  int pm_index = get_pm_index(nr_mac, UE, dl_bwp->dci_format, layers, nr_mac->radio_config[0].pdsch_AntennaPorts.XP);

  // If the RI changed between current rtx and a previous transmission
  // we need to verify if it is not decreased
@@ -625,7 +625,7 @@ static void pf_dl(gNB_MAC_INST *mac,
    remainUEs[i] = max_num_ue;
  int numUE = 0;
  int CC_id = 0;
-  int slots_per_frame = mac->frame_structure.numb_slots_frame;
+  int slots_per_frame = mac->frame_structure[0].numb_slots_frame;

  /* Loop UE_info->list to check retransmission */
  UE_iterator(UE_list, UE) {
@@ -659,14 +659,14 @@ static void pf_dl(gNB_MAC_INST *mac,

    /* retransmission */
    if (harq_pid >= 0) {
-      NR_beam_alloc_t beam = beam_allocation_procedure(&mac->beam_info, frame, slot, UE->UE_beam_index, slots_per_frame);
+      NR_beam_alloc_t beam = beam_allocation_procedure(&mac->beam_info[0], frame, slot, UE->UE_beam_index, slots_per_frame);
      bool sch_ret = beam.idx >= 0;
      /* Allocate retransmission */
      if (sch_ret)
        sch_ret = allocate_dl_retransmission(mac, pp_pdsch, &n_rb_sched[beam.idx], UE, beam.idx, harq_pid);
      if (!sch_ret) {
        LOG_D(NR_MAC, "[UE %04x][%4d.%2d] DL retransmission could not be allocated\n", UE->rnti, frame, slot);
-        reset_beam_status(&mac->beam_info, frame, slot, UE->UE_beam_index, slots_per_frame, beam.new_beam);
+        reset_beam_status(&mac->beam_info[0], frame, slot, UE->UE_beam_index, slots_per_frame, beam.new_beam);
        continue;
      }
      /* reduce max_num_ue once we are sure UE can be allocated, i.e., has CCE */
@@ -751,7 +751,7 @@ static void pf_dl(gNB_MAC_INST *mac,
      continue;
    }

-    NR_beam_alloc_t beam = beam_allocation_procedure(&mac->beam_info, frame, slot, iterator->UE->UE_beam_index, slots_per_frame);
+    NR_beam_alloc_t beam = beam_allocation_procedure(&mac->beam_info[0], frame, slot, iterator->UE->UE_beam_index, slots_per_frame);

    if (beam.idx < 0) {
      // no available beam
@@ -759,7 +759,7 @@ static void pf_dl(gNB_MAC_INST *mac,
      continue;
    }
    if (remainUEs[beam.idx] == 0 || n_rb_sched[beam.idx] < min_rbSize) {
-      reset_beam_status(&mac->beam_info, frame, slot, iterator->UE->UE_beam_index, slots_per_frame, beam.new_beam);
+      reset_beam_status(&mac->beam_info[0], frame, slot, iterator->UE->UE_beam_index, slots_per_frame, beam.new_beam);
      iterator++;
      continue;
    }
@@ -796,7 +796,7 @@ static void pf_dl(gNB_MAC_INST *mac,
            rnti,
            rbStart,
            max_rbSize);
-      reset_beam_status(&mac->beam_info, frame, slot, iterator->UE->UE_beam_index, slots_per_frame, beam.new_beam);
+      reset_beam_status(&mac->beam_info[0], frame, slot, iterator->UE->UE_beam_index, slots_per_frame, beam.new_beam);
      iterator++;
      continue;
    }
@@ -814,7 +814,7 @@ static void pf_dl(gNB_MAC_INST *mac,
    if (CCEIndex < 0) {
      sched_ctrl->dl_cce_fail++;
      LOG_D(NR_MAC, "[UE %04x][%4d.%2d] could not find free CCE for DL DCI\n", rnti, frame, slot);
-      reset_beam_status(&mac->beam_info, frame, slot, iterator->UE->UE_beam_index, slots_per_frame, beam.new_beam);
+      reset_beam_status(&mac->beam_info[0], frame, slot, iterator->UE->UE_beam_index, slots_per_frame, beam.new_beam);
      iterator++;
      continue;
    }
@@ -828,7 +828,7 @@ static void pf_dl(gNB_MAC_INST *mac,
      alloc = nr_acknack_scheduling(mac, iterator->UE, frame, slot, iterator->UE->UE_beam_index, r_pucch, 0);
      if (alloc < 0) {
        LOG_D(NR_MAC, "[UE %04x][%4d.%2d] could not find PUCCH for DL DCI\n", rnti, frame, slot);
-        reset_beam_status(&mac->beam_info, frame, slot, iterator->UE->UE_beam_index, slots_per_frame, beam.new_beam);
+        reset_beam_status(&mac->beam_info[0], frame, slot, iterator->UE->UE_beam_index, slots_per_frame, beam.new_beam);
        iterator++;
        continue;
      }
@@ -847,7 +847,7 @@ static void pf_dl(gNB_MAC_INST *mac,
      // tb_size below
      .dl_harq_pid = sched_ctrl->available_dl_harq.head,
      .pucch_allocation = alloc,
-      .pm_index = get_pm_index(mac, iterator->UE, dl_bwp->dci_format, l, mac->radio_config.pdsch_AntennaPorts.XP),
+      .pm_index = get_pm_index(mac, iterator->UE, dl_bwp->dci_format, l, mac->radio_config[0].pdsch_AntennaPorts.XP),
      .nrOfLayers = l,
      .bwp_info = bwp_info,
      .dmrs_parms = get_dl_dmrs_params(scc, dl_bwp, &tda_info, l),
@@ -900,7 +900,7 @@ static void nr_dlsch_preprocessor(gNB_MAC_INST *mac, post_process_pdsch_t *pp_pd

  NR_ServingCellConfigCommon_t *scc = mac->common_channels[0].ServingCellConfigCommon;
  int bw = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
-  int num_beams = mac->beam_info.beam_allocation ? mac->beam_info.beams_per_period : 1;
+  int num_beams = mac->beam_info[0].beam_allocation ? mac->beam_info[0].beams_per_period : 1;
  int n_rb_sched[num_beams];
  for (int i = 0; i < num_beams; i++)
    n_rb_sched[i] = bw;
@@ -1113,7 +1113,7 @@ void post_process_dlsch(gNB_MAC_INST *nr_mac, post_process_pdsch_t *pdsch, NR_UE
    maxMIMO_Layers = 1;
  }
  const int nl_tbslbrm = min(maxMIMO_Layers, 4);
-  const uint16_t fapi_beam = convert_to_fapi_beam(UE->UE_beam_index, nr_mac->beam_info.beam_mode);
+  const uint16_t fapi_beam = convert_to_fapi_beam(UE->UE_beam_index, nr_mac->beam_info[0].beam_mode);
  nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu = prepare_pdsch_pdu(dl_tti_pdsch_pdu,
                                                                   nr_mac,
                                                                   UE,
@@ -1187,7 +1187,7 @@ void post_process_dlsch(gNB_MAC_INST *nr_mac, post_process_pdsch_t *pdsch, NR_UE
                     sched_ctrl->search_space,
                     sched_ctrl->coreset,
                     UE->pdsch_HARQ_ACK_Codebook,
-                     nr_mac->cset0_bwp_size);
+                     nr_mac->cset0_bwp_size[0]);

  LOG_D(NR_MAC,
        "coreset params: FreqDomainResource %llx, start_symbol %d  n_symb %d\n",
@@ -1377,7 +1377,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
  AssertFatal(pthread_mutex_trylock(&gNB_mac->sched_lock) == EBUSY,
              "this function should be called with the scheduler mutex locked\n");

-  if (!is_dl_slot(slot, &gNB_mac->frame_structure))
+  if (!is_dl_slot(slot, &gNB_mac->frame_structure[0]))
    return;

  NR_ServingCellConfigCommon_t *scc = gNB_mac->common_channels[CC_id].ServingCellConfigCommon;
--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
@@ -46,7 +46,7 @@ void nr_preprocessor_phytest(gNB_MAC_INST *mac, post_process_pdsch_t *pp_pdsch)
  slot_t slot = pp_pdsch->slot;

  /* already mutex protected: held in gNB_dlsch_ulsch_scheduler() */
-  int slot_period = slot % mac->frame_structure.numb_slots_period;
+  int slot_period = slot % mac->frame_structure[0].numb_slots_period;
  if (!is_xlsch_in_slot(dlsch_slot_bitmap, dlsch_slot_modval, slot_period))
    return;
  NR_UE_info_t *UE = mac->UE_info.connected_ue_list[0];
@@ -89,16 +89,16 @@ void nr_preprocessor_phytest(gNB_MAC_INST *mac, post_process_pdsch_t *pp_pdsch)
      const long band = *scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0];
      uint16_t ssb_start_symbol = get_ssb_start_symbol(band, scs, i_ssb);
      // select beam for PDSCH in current slot based on SSB beam
-      if ((ssb_start_symbol / NR_SYMBOLS_PER_SLOT) == (slot % mac->frame_structure.numb_slots_period)) {
+      if ((ssb_start_symbol / NR_SYMBOLS_PER_SLOT) == (slot % mac->frame_structure[0].numb_slots_period)) {
        ssb_idx_beam = i_ssb;
        break;
      }
    }
  }
  int beam_idx = get_beam_from_ssbidx(mac, ssb_idx_beam);
-  NR_beam_alloc_t beam = beam_allocation_procedure(&mac->beam_info, frame, slot, beam_idx, mac->frame_structure.numb_slots_frame);
+  NR_beam_alloc_t beam = beam_allocation_procedure(&mac->beam_info[0], frame, slot, beam_idx, mac->frame_structure[0].numb_slots_frame);
  AssertFatal(beam.idx > -1, "Can't allocate beam %d in phytest scheduler\n", beam_idx);
-  UE->UE_beam_index = get_allocated_beam(&mac->beam_info, frame, slot, mac->frame_structure.numb_slots_frame, beam.idx);
+  UE->UE_beam_index = get_allocated_beam(&mac->beam_info[0], frame, slot, mac->frame_structure[0].numb_slots_frame, beam.idx);

  int rbStart = 0;
  int rbSize = 0;
@@ -219,7 +219,7 @@ void nr_ul_preprocessor_phytest(gNB_MAC_INST *nr_mac, post_process_pusch_t *pp_p
  uint16_t rbStart = 0;
  uint16_t rbSize = min(bw, target_ul_bw);

-  DevAssert(seq_arr_size(&nr_mac->ul_tda) > 0);
+  DevAssert(seq_arr_size(&nr_mac->ul_tda[0]) > 0);
  const int tda = 0;
  NR_tda_info_t tda_info = get_ul_tda_info(ul_bwp,
                                           sched_ctrl->coreset->controlResourceSetId,
@@ -229,14 +229,14 @@ void nr_ul_preprocessor_phytest(gNB_MAC_INST *nr_mac, post_process_pusch_t *pp_p
  DevAssert(tda_info.valid_tda);

  int K2 = tda_info.k2 + get_NTN_Koffset(scc);
-  int slots_frame = nr_mac->frame_structure.numb_slots_frame;
+  int slots_frame = nr_mac->frame_structure[0].numb_slots_frame;
  const int sched_frame = (frame + (slot + K2) / slots_frame) % MAX_FRAME_NUMBER;
  const int sched_slot = (slot + K2) % slots_frame;

  /* check if slot is UL, and that slot is 8 (assuming K2=6 because of UE
   * limitations).  Note that if K2 or the TDD configuration is changed, below
   * conditions might exclude each other and never be true */
-  int slot_period = sched_slot % nr_mac->frame_structure.numb_slots_period;
+  int slot_period = sched_slot % nr_mac->frame_structure[0].numb_slots_period;
  if (!is_xlsch_in_slot(ulsch_slot_bitmap, ulsch_slot_modval, slot_period))
    return;

@@ -250,7 +250,7 @@ void nr_ul_preprocessor_phytest(gNB_MAC_INST *nr_mac, post_process_pusch_t *pp_p
  get_best_ul_tda(nr_mac, beam, tda_p, 1, sched_frame, sched_slot, &rb_s, &rb_l);
  DevAssert(rb_s == rbStart && rb_l == rbSize);

-  const int buffer_index = ul_buffer_index(sched_frame, sched_slot, slots_frame, nr_mac->vrb_map_UL_size);
+  const int buffer_index = ul_buffer_index(sched_frame, sched_slot, slots_frame, nr_mac->vrb_map_UL_size[0]);
  uint16_t *vrb_map_UL = &nr_mac->common_channels[CC_id].vrb_map_UL[beam][buffer_index * MAX_BWP_SIZE];
  for (int i = rbStart; i < rbStart + rbSize; ++i) {
    if ((vrb_map_UL[i+BWPStart] & SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols)) != 0) {
--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
@@ -95,7 +95,7 @@ static const uint16_t cqi_table3[16][2] = {{0, 0},
 int get_ssbidx_from_beam(gNB_MAC_INST *mac, int beam_idx)
 {
  for (int i = 0; i < MAX_NUM_OF_SSB; i++)
-    if (beam_idx == mac->beam_index_list[i])
+    if (beam_idx == mac->beam_index_list[0][i])
      return i;
  AssertFatal(false, "beam_idx %d not found\n", beam_idx);
  return 0;
@@ -182,7 +182,7 @@ uint16_t get_pm_index(const gNB_MAC_INST *nrmac,

  int prev_layers_size = 0;
  for (int i = 1; i < layers; i++)
-    prev_layers_size += nrmac->precoding_matrix_size[i - 1];
+    prev_layers_size += nrmac->precoding_matrix_size[0][i - 1];

  // need to return PM index to matrix initialized in init_DL_MIMO_codebook
  // index 0 is for identity matrix
@@ -371,7 +371,7 @@ NR_ControlResourceSet_t *get_coreset(gNB_MAC_INST *nrmac,
                                     NR_ControlResourceSetId_t coreset_id)
 {
  if (coreset_id == 0) {
-    return &nrmac->sched_ctrlSIB1->coreset; // this is coreset 0
+    return &nrmac->sched_ctrlSIB1[0]->coreset; // this is coreset 0
  }
  if (bwp_dedicated) {
    const int n = bwp_dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList->list.count;
@@ -459,8 +459,8 @@ NR_sched_pdcch_t set_pdcch_structure(gNB_MAC_INST *gNB_mac,
  NR_sched_pdcch_t pdcch;
  if (bwp) { // This is not for SIB1
    if(coreset->controlResourceSetId == 0) {
-      pdcch.BWPSize = gNB_mac->cset0_bwp_size;
-      pdcch.BWPStart = gNB_mac->cset0_bwp_start;
+      pdcch.BWPSize = gNB_mac->cset0_bwp_size[0];
+      pdcch.BWPStart = gNB_mac->cset0_bwp_start[0];
    } else {
      pdcch.BWPSize = NRRIV2BW(bwp->locationAndBandwidth, MAX_BWP_SIZE);
      pdcch.BWPStart = NRRIV2PRBOFFSET(bwp->locationAndBandwidth, MAX_BWP_SIZE);
@@ -905,10 +905,10 @@ dci_pdu_rel15_t prepare_dci_dl_payload(const gNB_MAC_INST *gNB_mac,
  dci_payload.vrb_to_prb_mapping.val = 0;
  int riv_bwp = pdsch_pdu->BWPSize;
  if (!UE)
-    riv_bwp = gNB_mac->cset0_bwp_size;
+    riv_bwp = gNB_mac->cset0_bwp_size[0];
  else if (dl_BWP->dci_format == NR_DL_DCI_FORMAT_1_0 && ss_type == NR_SearchSpace__searchSpaceType_PR_common) {
-    if (gNB_mac->cset0_bwp_size > 0)
-      riv_bwp = gNB_mac->cset0_bwp_size;
+    if (gNB_mac->cset0_bwp_size[0] > 0)
+      riv_bwp = gNB_mac->cset0_bwp_size[0];
    else
      riv_bwp = UE->sc_info.initial_dl_BWPSize;
  }
@@ -2900,7 +2900,7 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
                                                  sched_ctrl->coreset,
                                                  scc,
                                                  &dl_genericParameters,
-                                                  nr_mac->type0_PDCCH_CSS_config);
+                                                  nr_mac->type0_PDCCH_CSS_config[0]);

    // set DL DCI format
    DL_BWP->dci_format = (sched_ctrl->search_space->searchSpaceType &&
@@ -2941,7 +2941,7 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
                                                  sched_ctrl->coreset,
                                                  scc,
                                                  &dl_genericParameters,
-                                                  &nr_mac->type0_PDCCH_CSS_config[ssb_index]);
+                                                  &nr_mac->type0_PDCCH_CSS_config[0][ssb_index]);

    UL_BWP->dci_format = NR_UL_DCI_FORMAT_0_0;
    DL_BWP->dci_format = NR_DL_DCI_FORMAT_1_0;
@@ -2952,7 +2952,7 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
  create_ul_harq_list(sched_ctrl, sc_info, format_00_10);

  set_max_fb_time(UL_BWP);
-  set_sched_pucch_list(sched_ctrl, UL_BWP, scc, &nr_mac->frame_structure);
+  set_sched_pucch_list(sched_ctrl, UL_BWP, scc, &nr_mac->frame_structure[0]);

  // Set MCS tables
  long *dl_mcs_Table = DL_BWP->pdsch_Config ? DL_BWP->pdsch_Config->mcs_Table : NULL;
@@ -3216,7 +3216,7 @@ void nr_csirs_scheduling(int Mod_idP, frame_t frame, slot_t slot, nfapi_nr_dl_tt
  int CC_id = 0;
  NR_UEs_t *UE_info = &RC.nrmac[Mod_idP]->UE_info;
  gNB_MAC_INST *gNB_mac = RC.nrmac[Mod_idP];
-  int n_slots_frame = gNB_mac->frame_structure.numb_slots_frame;
+  int n_slots_frame = gNB_mac->frame_structure[0].numb_slots_frame;
  NR_SCHED_ENSURE_LOCKED(&gNB_mac->sched_lock);

  UE_info->sched_csirs = 0;
@@ -3270,7 +3270,7 @@ void nr_csirs_scheduling(int Mod_idP, frame_t frame, slot_t slot, nfapi_nr_dl_tt
        if((frame * n_slots_frame + slot - offset) % period == 0) {

          LOG_D(NR_MAC,"Scheduling CSI-RS in frame %d slot %d Resource ID %ld\n", frame, slot, nzpcsi->nzp_CSI_RS_ResourceId);
-          NR_beam_alloc_t beam_csi = beam_allocation_procedure(&gNB_mac->beam_info, frame, slot, UE->UE_beam_index, n_slots_frame);
+          NR_beam_alloc_t beam_csi = beam_allocation_procedure(&gNB_mac->beam_info[0], frame, slot, UE->UE_beam_index, n_slots_frame);
          AssertFatal(beam_csi.idx >= 0, "Cannot allocate CSI-RS in any available beam\n");
          uint16_t *vrb_map = gNB_mac->common_channels[CC_id].vrb_map[beam_csi.idx];
          UE_info->sched_csirs |= (1 << dl_bwp->bwp_id);
@@ -3285,7 +3285,7 @@ void nr_csirs_scheduling(int Mod_idP, frame_t frame, slot_t slot, nfapi_nr_dl_tt
          csirs_pdu_rel15->precodingAndBeamforming.prg_size = resourceMapping.freqBand.nrofRBs; //1 PRG of max size
          csirs_pdu_rel15->precodingAndBeamforming.dig_bf_interfaces = 1;
          csirs_pdu_rel15->precodingAndBeamforming.prgs_list[0].pm_idx = 0;
-          const uint16_t fapi_beam = convert_to_fapi_beam(UE->UE_beam_index, gNB_mac->beam_info.beam_mode);
+          const uint16_t fapi_beam = convert_to_fapi_beam(UE->UE_beam_index, gNB_mac->beam_info[0].beam_mode);
          csirs_pdu_rel15->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = fapi_beam;
          csirs_pdu_rel15->bwp_size = dl_bwp->BWPSize;
          csirs_pdu_rel15->bwp_start = dl_bwp->BWPStart;
@@ -3483,7 +3483,7 @@ void nr_measgap_scheduling(gNB_MAC_INST *nr_mac, frame_t frame, sub_frame_t slot
    if (!mgc->enable)
      continue;

-    const int slots_frame = nr_mac->frame_structure.numb_slots_frame;
+    const int slots_frame = nr_mac->frame_structure[0].numb_slots_frame;
    const frame_t f = (frame + (slot + mgc->n_slots_advance) / slots_frame) % MAX_FRAME_NUMBER;
    const slot_t s = (slot + mgc->n_slots_advance) % slots_frame;

@@ -3662,9 +3662,9 @@ void UL_tti_req_ahead_initialization(gNB_MAC_INST *gNB, int n, int CCid, frame_t
  /* fill in slot/frame numbers: slot is fixed, frame will be updated by scheduler
   * consider that scheduler runs sl_ahead: the first sl_ahead slots are
   * already "in the past" and thus we put frame 1 instead of 0! */
-  for (int i = 0; i < gNB->UL_tti_req_ahead_size; ++i) {
+  for (int i = 0; i < gNB->UL_tti_req_ahead_size[0]; ++i) {
    int abs_slot = frameP * n + slotP + i;
-    nfapi_nr_ul_tti_request_t *req = &gNB->UL_tti_req_ahead[CCid][abs_slot % gNB->UL_tti_req_ahead_size];
+    nfapi_nr_ul_tti_request_t *req = &gNB->UL_tti_req_ahead[CCid][abs_slot % gNB->UL_tti_req_ahead_size[0]];
    req->SFN = (abs_slot / n) % MAX_FRAME_NUMBER;
    req->Slot = abs_slot % n;
  }
@@ -3672,7 +3672,7 @@ void UL_tti_req_ahead_initialization(gNB_MAC_INST *gNB, int n, int CCid, frame_t

 int get_beam_from_ssbidx(gNB_MAC_INST *mac, int ssb_idx)
 {
-  int beam_idx = mac->beam_index_list[ssb_idx];
+  int beam_idx = mac->beam_index_list[0][ssb_idx];
  AssertFatal(beam_idx >= 0, "Invalid beamforming index %d\n", beam_idx);
  return beam_idx;
 }
@@ -3699,7 +3699,7 @@ uint64_t get_ssb_bitmap_and_len(const NR_ServingCellConfigCommon_t *scc, uint8_t
 // for now the fapi beam index is the number of SSBs transmitted before ssb_index i
 void fill_beam_index_list(NR_ServingCellConfigCommon_t *scc, const nr_mac_config_t *config, gNB_MAC_INST *mac)
 {
-  if (mac->beam_info.beam_mode == NO_BEAM_MODE)
+  if (mac->beam_info[0].beam_mode == NO_BEAM_MODE)
    return;

  uint8_t len = 0;
@@ -3707,11 +3707,11 @@ void fill_beam_index_list(NR_ServingCellConfigCommon_t *scc, const nr_mac_config
  int index = 0;
  for (int i = 0; i < len; ++i) {
    if (IS_BIT_SET(ssbBitmap, (63 - i))) {
-      int fapi_index = mac->beam_info.beam_mode == LOPHY_BEAM_IDX ? config->bw_list[index] : index;
-      mac->beam_index_list[i] = fapi_index;
+      int fapi_index = mac->beam_info[0].beam_mode == LOPHY_BEAM_IDX ? config->bw_list[index] : index;
+      mac->beam_index_list[0][i] = fapi_index;
      index++;
    } else
-      mac->beam_index_list[i] = -1;
+      mac->beam_index_list[0][i] = -1;
  }
 }

@@ -3773,14 +3773,14 @@ void reset_beam_status(NR_beam_info_t *beam_info, int frame, int slot, int16_t b
 int beam_selection_procedures(gNB_MAC_INST *mac, NR_UE_info_t *UE)
 {
  // do not perform beam procedures if there is no beam information
-  if (mac->beam_info.beam_mode == NO_BEAM_MODE)
+  if (mac->beam_info[0].beam_mode == NO_BEAM_MODE)
    return -1;

  // simple beam switching algorithm -> we select beam with highest RSRP from CSI report
  NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl;
  RSRP_report_list_t *rsrp_report = &sched_ctrl->CSI_report.ssb_rsrp_report;
  int new_bf_index = get_beam_from_ssbidx(mac, rsrp_report->r[0].resource_id);
-  if (!mac->radio_config.do_TCI) { // if not TCI is configure we switch beam directly
+  if (!mac->radio_config[0].do_TCI) { // if not TCI is configure we switch beam directly
    if (UE->UE_beam_index == new_bf_index)
      return -1; // no beam change needed
    return new_bf_index;
@@ -3857,10 +3857,10 @@ bool prepare_initial_ul_rrc_message(gNB_MAC_INST *mac, NR_UE_info_t *UE)
  int srb_id = 1;
  const NR_ServingCellConfigCommon_t *scc = mac->common_channels[CC_id].ServingCellConfigCommon;
  int ssb_index = get_ssbidx_from_beam(mac, UE->UE_beam_index);
-  NR_CellGroupConfig_t *cellGroupConfig = get_initial_cellGroupConfig(UE->uid, scc, &mac->radio_config, &mac->rlc_config, ssb_index);
+  NR_CellGroupConfig_t *cellGroupConfig = get_initial_cellGroupConfig(UE->uid, scc, &mac->radio_config[0], &mac->rlc_config, ssb_index);
  ASN_STRUCT_FREE(asn_DEF_NR_CellGroupConfig, UE->CellGroup);
  UE->CellGroup = cellGroupConfig;
-  UE->local_bwp_id = mac->radio_config.first_active_bwp;
+  UE->local_bwp_id = mac->radio_config[0].first_active_bwp;

  if (!cellGroupConfig)
    return true;
@@ -3993,7 +3993,7 @@ void nr_mac_trigger_reconfiguration(const gNB_MAC_INST *nrmac, NR_UE_info_t *UE,
      current_BWP->srs_Config = NULL;
      int ssb_index = nrmac->common_channels[0].ssb_index[UE->UE_beam_index];
      cellGroup_for_UE = update_cellGroupConfig_for_beam_switch(UE->CellGroup,
-                                                               &nrmac->radio_config,
+                                                               &nrmac->radio_config[0],
                                                               UE->capability,
                                                               nrmac->common_channels[0].ServingCellConfigCommon,
                                                               UE->uid,
@@ -4002,14 +4002,14 @@ void nr_mac_trigger_reconfiguration(const gNB_MAC_INST *nrmac, NR_UE_info_t *UE,
  } else {
    if (new_bwp_id >= 0) {
      AssertFatal(UE->current_DL_BWP.bwp_id == UE->current_UL_BWP.bwp_id, "We only support same BWP for UL and DL\n");
-      if (!verify_bwp_switch(UE, &nrmac->radio_config, new_bwp_id))
+      if (!verify_bwp_switch(UE, &nrmac->radio_config[0], new_bwp_id))
        return;
      else {
        UE->sc_info.csi_MeasConfig = NULL;  // to avoid segfault when freeing csi_MeasConfig in configDedicated
        UE->local_bwp_id = new_bwp_id;
        int ssb_index = nrmac->common_channels[0].ssb_index[UE->UE_beam_index];
        cellGroup_for_UE = update_cellGroupConfig_for_BWP_switch(UE->CellGroup,
-                                                                &nrmac->radio_config,
+                                                                &nrmac->radio_config[0],
                                                                UE->capability,
                                                                nrmac->common_channels[0].ServingCellConfigCommon,
                                                                UE->uid,
--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c
@@ -456,9 +456,9 @@ static void nr_configure_srs(gNB_MAC_INST *nrmac,
    srs_pdu->beamforming.num_prgs = m_SRS[srs_pdu->config_index];
    srs_pdu->beamforming.prg_size = srs_pdu->srs_parameters_v4.srs_bandwidth_size;
  }
-  const uint16_t fapi_beam = convert_to_fapi_beam(UE->UE_beam_index, nrmac->beam_info.beam_mode);
+  const uint16_t fapi_beam = convert_to_fapi_beam(UE->UE_beam_index, nrmac->beam_info[0].beam_mode);
  srs_pdu->beamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = fapi_beam;
-  NR_beam_alloc_t beam = beam_allocation_procedure(&nrmac->beam_info, frame, slot, UE->UE_beam_index, slots_per_frame);
+  NR_beam_alloc_t beam = beam_allocation_procedure(&nrmac->beam_info[0], frame, slot, UE->UE_beam_index, slots_per_frame);
  AssertFatal(beam.idx >= 0, "Cannot allocate SRS in any available beam\n");
  uint16_t *vrb_map_UL = &nrmac->common_channels[CC_id].vrb_map_UL[beam.idx][buffer_index * MAX_BWP_SIZE];
  uint16_t num = 1 << srs_pdu->num_symbols; // 0,1,2 means 1,2,4 symbols, see 222.10.04 table 3-105
@@ -468,7 +468,7 @@ static void nr_configure_srs(gNB_MAC_INST *nrmac,
  for (int i = 0; i < srs_pdu->bwp_size; ++i) {
    int rb = i + srs_pdu->bwp_start;
    uint16_t alloc = vrb_map_UL[rb] & mask;
-    AssertFatal(nrmac->ulprbbl[rb] != 0 || alloc == 0, "RB %d not free for SRS: alloc 0x%02x for mask 0x%02x\n", rb, alloc, mask);
+    AssertFatal(nrmac->ulprbbl[0][rb] != 0 || alloc == 0, "RB %d not free for SRS: alloc 0x%02x for mask 0x%02x\n", rb, alloc, mask);
    vrb_map_UL[rb] |= mask;
  }
 }
@@ -481,8 +481,8 @@ static void nr_fill_nfapi_srs(gNB_MAC_INST *nrmac,
                              NR_SRS_ResourceSet_t *srs_resource_set,
                              NR_SRS_Resource_t *srs_resource)
 {
-  int slots_frame = nrmac->frame_structure.numb_slots_frame;
-  int index = ul_buffer_index(frame, slot, slots_frame, nrmac->UL_tti_req_ahead_size);
+  int slots_frame = nrmac->frame_structure[0].numb_slots_frame;
+  int index = ul_buffer_index(frame, slot, slots_frame, nrmac->UL_tti_req_ahead_size[0]);
  nfapi_nr_ul_tti_request_t *future_ul_tti_req = &nrmac->UL_tti_req_ahead[0][index];
  AssertFatal(future_ul_tti_req->n_pdus <
              sizeof(future_ul_tti_req->pdus_list) / sizeof(future_ul_tti_req->pdus_list[0]),
@@ -492,7 +492,7 @@ static void nr_fill_nfapi_srs(gNB_MAC_INST *nrmac,
  nfapi_nr_srs_pdu_t *srs_pdu = &future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].srs_pdu;
  memset(srs_pdu, 0, sizeof(nfapi_nr_srs_pdu_t));
  future_ul_tti_req->n_pdus += 1;
-  index = ul_buffer_index(frame, slot, slots_frame, nrmac->vrb_map_UL_size);
+  index = ul_buffer_index(frame, slot, slots_frame, nrmac->vrb_map_UL_size[0]);
  nr_configure_srs(nrmac, srs_pdu, frame, slot, CC_id, UE, srs_resource_set, srs_resource, index, slots_frame);
 }

@@ -555,7 +555,7 @@ void nr_schedule_srs(int module_id, frame_t frame, int slot)
      }

      // we are sheduling SRS max_k2 slot in advance for the presence of SRS to be taken into account when scheduling PUSCH
-      const int n_slots_frame = nrmac->frame_structure.numb_slots_frame;
+      const int n_slots_frame = nrmac->frame_structure[0].numb_slots_frame;
      const int n_ahead = n_slots_frame - 1 + get_NTN_Koffset(nrmac->common_channels[0].ServingCellConfigCommon);
      const int sched_slot = (slot + n_ahead) % n_slots_frame;
      const int sched_frame = (frame + (slot + n_ahead) / n_slots_frame) % MAX_FRAME_NUMBER;
--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c
@@ -20,8 +20,8 @@ static void nr_fill_nfapi_pucch(gNB_MAC_INST *nrmac, frame_t frame, slot_t slot,

  const int index = ul_buffer_index(pucch->frame,
                                    pucch->ul_slot,
-                                    nrmac->frame_structure.numb_slots_frame,
-                                    nrmac->UL_tti_req_ahead_size);
+                                    nrmac->frame_structure[0].numb_slots_frame,
+                                    nrmac->UL_tti_req_ahead_size[0]);
  nfapi_nr_ul_tti_request_t *future_ul_tti_req = &nrmac->UL_tti_req_ahead[0][index];
  if (future_ul_tti_req->SFN != pucch->frame || future_ul_tti_req->Slot != pucch->ul_slot)
    LOG_W(NR_MAC,
@@ -78,7 +78,7 @@ static void nr_fill_nfapi_pucch(gNB_MAC_INST *nrmac, frame_t frame, slot_t slot,
                     pucch->dai_c,
                     pucch->sr_flag,
                     pucch->r_pucch,
-                     nrmac->beam_info.beam_mode);
+                     nrmac->beam_info[0].beam_mode);
 }

 //Differential RSRP values Table 10.1.6.1-2 from 38.133
@@ -136,7 +136,7 @@ static int get_pucch_index(int frame, int slot, const frame_structure_t *fs, int
 static void schedule_pucch_core(gNB_MAC_INST *nrmac, NR_UE_info_t *UE, frame_t frame, slot_t slot)
 {
  NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl;
-  const int pucch_index = get_pucch_index(frame, slot, &nrmac->frame_structure, sched_ctrl->sched_pucch_size);
+  const int pucch_index = get_pucch_index(frame, slot, &nrmac->frame_structure[0], sched_ctrl->sched_pucch_size);
  NR_sched_pucch_t *curr_pucch = &UE->UE_sched_ctrl.sched_pucch[pucch_index];
  if (!curr_pucch->active)
    return;
@@ -171,7 +171,7 @@ void nr_schedule_pucch(gNB_MAC_INST *nrmac, frame_t frame, slot_t slot)
  /* already mutex protected: held in gNB_dlsch_ulsch_scheduler() */
  NR_SCHED_ENSURE_LOCKED(&nrmac->sched_lock);

-  if (!is_ul_slot(slot, &nrmac->frame_structure))
+  if (!is_ul_slot(slot, &nrmac->frame_structure[0]))
    return;

  UE_iterator(nrmac->UE_info.access_ue_list, init_UE) {
@@ -197,7 +197,7 @@ void nr_csi_meas_reporting(int Mod_idP,frame_t frame, slot_t slot)
  UE_iterator(nrmac->UE_info.connected_ue_list, UE) {
    NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl;
    NR_UE_UL_BWP_t *ul_bwp = &UE->current_UL_BWP;
-    const int n_slots_frame = nrmac->frame_structure.numb_slots_frame;
+    const int n_slots_frame = nrmac->frame_structure[0].numb_slots_frame;
    if (!nr_mac_ue_is_active(UE) && !get_softmodem_params()->phy_test) {
      continue;
    }
@@ -228,7 +228,7 @@ void nr_csi_meas_reporting(int Mod_idP,frame_t frame, slot_t slot)
      if ((sched_frame * n_slots_frame + sched_slot - offset) % period != 0)
        continue;

-      AssertFatal(is_ul_slot(sched_slot, &nrmac->frame_structure), "CSI reporting slot %d is not set for an uplink slot\n", sched_slot);
+      AssertFatal(is_ul_slot(sched_slot, &nrmac->frame_structure[0]), "CSI reporting slot %d is not set for an uplink slot\n", sched_slot);
      LOG_D(NR_MAC, "CSI reporting in frame %d slot %d CSI report ID %ld\n", sched_frame, sched_slot, csirep->reportConfigId);

      const NR_PUCCH_ResourceSet_t *pucchresset = pucch_Config->resourceSetToAddModList->list.array[1]; // set with formats >1
@@ -240,7 +240,7 @@ void nr_csi_meas_reporting(int Mod_idP,frame_t frame, slot_t slot)
      AssertFatal(res_index < n,
                  "CSI pucch resource %ld not found among PUCCH resources\n", pucchcsires->pucch_Resource);

-      const int pucch_index = get_pucch_index(sched_frame, sched_slot, &nrmac->frame_structure, sched_ctrl->sched_pucch_size);
+      const int pucch_index = get_pucch_index(sched_frame, sched_slot, &nrmac->frame_structure[0], sched_ctrl->sched_pucch_size);
      NR_sched_pucch_t *curr_pucch = &sched_ctrl->sched_pucch[pucch_index];
      if (curr_pucch->active) {
        LOG_E(NR_MAC, "CSI structure is scheduled in advance. It should be free!\n");
@@ -256,9 +256,9 @@ void nr_csi_meas_reporting(int Mod_idP,frame_t frame, slot_t slot)
      int bwp_start = ul_bwp->BWPStart;

      // going through the list of PUCCH resources to find the one indexed by resource_id
-      NR_beam_alloc_t beam = beam_allocation_procedure(&nrmac->beam_info, sched_frame, sched_slot, UE->UE_beam_index, n_slots_frame);
+      NR_beam_alloc_t beam = beam_allocation_procedure(&nrmac->beam_info[0], sched_frame, sched_slot, UE->UE_beam_index, n_slots_frame);
      AssertFatal(beam.idx >= 0, "Cannot allocate CSI measurements on PUCCH in any available beam\n");
-      const int index = ul_buffer_index(sched_frame, sched_slot, n_slots_frame, nrmac->vrb_map_UL_size);
+      const int index = ul_buffer_index(sched_frame, sched_slot, n_slots_frame, nrmac->vrb_map_UL_size[0]);
      uint16_t *vrb_map_UL = &nrmac->common_channels[0].vrb_map_UL[beam.idx][index * MAX_BWP_SIZE];
      const int m = pucch_Config->resourceToAddModList->list.count;
      for (int j = 0; j < m; j++) {
@@ -712,7 +712,7 @@ static void extract_pucch_csi_report(NR_CSI_MeasConfig_t *csi_MeasConfig,
      NR_CSI_ReportConfig__ext2__reportQuantity_r16_PR_NOTHING;
  NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl;
  NR_UE_DL_BWP_t *dl_bwp = &UE->current_DL_BWP;
-  const int n_slots_frame = nrmac->frame_structure.numb_slots_frame;
+  const int n_slots_frame = nrmac->frame_structure[0].numb_slots_frame;
  int cumul_bits = 0;
  int r_index = -1;
  int new_bf_index = -1;
@@ -810,7 +810,7 @@ static void extract_pucch_csi_report(NR_CSI_MeasConfig_t *csi_MeasConfig,
      }
    }
  }
-  if ((new_bf_index !=-1) && !nrmac->radio_config.do_TCI)
+  if ((new_bf_index !=-1) && !nrmac->radio_config[0].do_TCI)
    // Trigger RRCReconfiguration. Need to be out of the for loop as it may modify csi_MeasConfig
    beam_switching_procedure(nrmac, UE, new_bf_index);
 }
@@ -898,7 +898,7 @@ void handle_nr_uci_pucch_0_1(module_id_t mod_id, frame_t frame, slot_t slot, con
      bool success = harq_value == 0 && harq_confidence == 0;
      // TCI state switch occurs at the first slot that is after slot n_+ T_HARQ + 3N_sf_slot (8.10.3 of 38.133)
      if (success && harq->start_tci_timer) {
-        int slots = 3 * nrmac->frame_structure.numb_slots_frame / 10;
+        int slots = 3 * nrmac->frame_structure[0].numb_slots_frame / 10;
        nr_timer_setup(&sched_ctrl->tci_beam_switch, slots, 1);
        nr_timer_start(&sched_ctrl->tci_beam_switch);
        harq->start_tci_timer = false;
@@ -998,7 +998,7 @@ void handle_nr_uci_pucch_2_3_4(module_id_t mod_id, frame_t frame, slot_t slot, c
      // TCI state switch occurs at the first slot that is after slot n_+ T_HARQ + 3N_sf_slot (8.10.3 of 38.133)
      bool success = uci_234->harq.harq_crc != 1 && acknack;
      if (success && harq->start_tci_timer) {
-        int slots = 3 * nrmac->frame_structure.numb_slots_frame / 10;
+        int slots = 3 * nrmac->frame_structure[0].numb_slots_frame / 10;
        nr_timer_setup(&sched_ctrl->tci_beam_switch, slots, 1);
        nr_timer_start(&sched_ctrl->tci_beam_switch);
        harq->start_tci_timer = false;
@@ -1142,9 +1142,9 @@ int nr_acknack_scheduling(gNB_MAC_INST *mac,
  const NR_ServingCellConfigCommon_t *scc = mac->common_channels[CC_id].ServingCellConfigCommon;
  const int NTN_gNB_Koffset = get_NTN_Koffset(scc);

-  const int minfbtime = mac->radio_config.minRXTXTIME + NTN_gNB_Koffset;
+  const int minfbtime = mac->radio_config[0].minRXTXTIME + NTN_gNB_Koffset;
  const NR_UE_UL_BWP_t *ul_bwp = &UE->current_UL_BWP;
-  const frame_structure_t *fs = &mac->frame_structure;
+  const frame_structure_t *fs = &mac->frame_structure[0];
  const int n_slots_frame = fs->numb_slots_frame;

  NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl;
@@ -1176,7 +1176,7 @@ int nr_acknack_scheduling(gNB_MAC_INST *mac,
    }
    const int pucch_frame = (frame + ((slot + pdsch_to_harq_feedback[f] + NTN_gNB_Koffset) / n_slots_frame)) % MAX_FRAME_NUMBER;
    // we store PUCCH resources according to slot, TDD configuration and size of the vector containing PUCCH structures
-    const int pucch_index = get_pucch_index(pucch_frame, pucch_slot, &mac->frame_structure, sched_ctrl->sched_pucch_size);
+    const int pucch_index = get_pucch_index(pucch_frame, pucch_slot, &mac->frame_structure[0], sched_ctrl->sched_pucch_size);
    NR_sched_pucch_t *curr_pucch = &sched_ctrl->sched_pucch[pucch_index];
    if (curr_pucch->active &&
        curr_pucch->frame == pucch_frame &&
@@ -1224,7 +1224,7 @@ int nr_acknack_scheduling(gNB_MAC_INST *mac,
    else { // unoccupied occasion
      // checking if in ul_slot the resources potentially to be assigned to this PUCCH are available
      set_pucch_allocation(ul_bwp, r_pucch, bwp_size, curr_pucch);
-      NR_beam_alloc_t beam = beam_allocation_procedure(&mac->beam_info, pucch_frame, pucch_slot, ue_beam, n_slots_frame);
+      NR_beam_alloc_t beam = beam_allocation_procedure(&mac->beam_info[0], pucch_frame, pucch_slot, ue_beam, n_slots_frame);
      if (beam.idx < 0) {
        LOG_D(NR_MAC,
              "DL %4d.%2d, UL_ACK %4d.%2d beam resources for this occasion are already occupied, move to the following occasion\n",
@@ -1234,7 +1234,7 @@ int nr_acknack_scheduling(gNB_MAC_INST *mac,
              pucch_slot);
        continue;
      }
-      const int index = ul_buffer_index(pucch_frame, pucch_slot, n_slots_frame, mac->vrb_map_UL_size);
+      const int index = ul_buffer_index(pucch_frame, pucch_slot, n_slots_frame, mac->vrb_map_UL_size[0]);
      uint16_t *vrb_map_UL = &mac->common_channels[CC_id].vrb_map_UL[beam.idx][index * MAX_BWP_SIZE];
      bool ret = test_pucch0_vrb_occupation(curr_pucch, vrb_map_UL, bwp_start);
      if(!ret) {
@@ -1244,7 +1244,7 @@ int nr_acknack_scheduling(gNB_MAC_INST *mac,
              slot,
              pucch_frame,
              pucch_slot);
-        reset_beam_status(&mac->beam_info, pucch_frame, pucch_slot, ue_beam, n_slots_frame, beam.new_beam);
+        reset_beam_status(&mac->beam_info[0], pucch_frame, pucch_slot, ue_beam, n_slots_frame, beam.new_beam);
        continue;
      }
      // allocating a new PUCCH structure for this occasion
@@ -1275,13 +1275,13 @@ void nr_sr_reporting(gNB_MAC_INST *nrmac, frame_t SFN, slot_t slot)
  /* already mutex protected: held in gNB_dlsch_ulsch_scheduler() */
  NR_SCHED_ENSURE_LOCKED(&nrmac->sched_lock);

-  if (!is_ul_slot(slot, &nrmac->frame_structure))
+  if (!is_ul_slot(slot, &nrmac->frame_structure[0]))
    return;
  const int CC_id = 0;
  UE_iterator(nrmac->UE_info.connected_ue_list, UE) {
    NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl;
    NR_UE_UL_BWP_t *ul_bwp = &UE->current_UL_BWP;
-    const int n_slots_frame = nrmac->frame_structure.numb_slots_frame;
+    const int n_slots_frame = nrmac->frame_structure[0].numb_slots_frame;
    if (!nr_mac_ue_is_active(UE))
      continue;
    NR_PUCCH_Config_t *pucch_Config = ul_bwp->pucch_Config;
@@ -1314,7 +1314,7 @@ void nr_sr_reporting(gNB_MAC_INST *nrmac, frame_t SFN, slot_t slot)
      }
      AssertFatal(idx > -1, "SR resource not found among PUCCH resources");

-      const int pucch_index = get_pucch_index(SFN, slot, &nrmac->frame_structure, sched_ctrl->sched_pucch_size);
+      const int pucch_index = get_pucch_index(SFN, slot, &nrmac->frame_structure[0], sched_ctrl->sched_pucch_size);
      NR_sched_pucch_t *curr_pucch = &sched_ctrl->sched_pucch[pucch_index];

      if (curr_pucch->active && curr_pucch->frame == SFN && curr_pucch->ul_slot == slot && curr_pucch->resource_indicator == idx)
@@ -1330,9 +1330,9 @@ void nr_sr_reporting(gNB_MAC_INST *nrmac, frame_t SFN, slot_t slot)
        continue;
      }
      else {
-        NR_beam_alloc_t beam = beam_allocation_procedure(&nrmac->beam_info, SFN, slot, UE->UE_beam_index, n_slots_frame);
+        NR_beam_alloc_t beam = beam_allocation_procedure(&nrmac->beam_info[0], SFN, slot, UE->UE_beam_index, n_slots_frame);
        AssertFatal(beam.idx >= 0, "Cannot allocate SR in any available beam\n");
-        const int index = ul_buffer_index(SFN, slot, n_slots_frame, nrmac->vrb_map_UL_size);
+        const int index = ul_buffer_index(SFN, slot, n_slots_frame, nrmac->vrb_map_UL_size[0]);
        uint16_t *vrb_map_UL = &nrmac->common_channels[CC_id].vrb_map_UL[beam.idx][index * MAX_BWP_SIZE];
        const int bwp_start = ul_bwp->BWPStart;
        const int bwp_size = ul_bwp->BWPSize;
--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
@@ -25,9 +25,9 @@ int get_num_ul_tda(gNB_MAC_INST *nrmac, int slot, int k2, const NR_tda_info_t **
  /* we assume that this function is mutex-protected from outside */
  NR_SCHED_ENSURE_LOCKED(&nrmac->sched_lock);

-  const uint16_t ul_bitmap = get_ul_bitmap(&nrmac->frame_structure, slot);
+  const uint16_t ul_bitmap = get_ul_bitmap(&nrmac->frame_structure[0], slot);
  *first_idx = NULL;
-  FOR_EACH_SEQ_ARR(NR_tda_info_t *, tda, &nrmac->ul_tda) {
+  FOR_EACH_SEQ_ARR(NR_tda_info_t *, tda, &nrmac->ul_tda[0]) {
    DevAssert(tda->valid_tda);
    // nr_rrc_config_ul_tda() orders by k2, so skip smaller and return for
    // bigger ones
@@ -49,19 +49,19 @@ int get_num_ul_tda(gNB_MAC_INST *nrmac, int slot, int k2, const NR_tda_info_t **
  if (*first_idx == NULL) /* nothing fit */
    return 0;

-  NR_tda_info_t *end_it = seq_arr_next(&nrmac->ul_tda, *first_idx);
-  while (end_it != seq_arr_end(&nrmac->ul_tda) && end_it->k2 == k2) {
+  NR_tda_info_t *end_it = seq_arr_next(&nrmac->ul_tda[0], *first_idx);
+  while (end_it != seq_arr_end(&nrmac->ul_tda[0]) && end_it->k2 == k2) {
    /* the following TDAs should all fit as long as the k2 is the same */
    uint16_t tda_bitmap = SL_to_bitmap(end_it->startSymbolIndex, end_it->nrOfSymbols);
    AssertFatal((tda_bitmap & ul_bitmap) == tda_bitmap,
                "TDA should fit inside slot, but is not the case for k2 %ld bitmap 0x%04x\n",
                end_it->k2,
                tda_bitmap);
-    end_it = seq_arr_next(&nrmac->ul_tda, end_it);
+    end_it = seq_arr_next(&nrmac->ul_tda[0], end_it);
  }

-  ptrdiff_t diff = seq_arr_dist(&nrmac->ul_tda, *first_idx, end_it);
-  AssertFatal(diff > 0 && diff <= seq_arr_size(&nrmac->ul_tda), "dist %ld\n", diff);
+  ptrdiff_t diff = seq_arr_dist(&nrmac->ul_tda[0], *first_idx, end_it);
+  AssertFatal(diff > 0 && diff <= seq_arr_size(&nrmac->ul_tda[0]), "dist %ld\n", diff);
  return diff;
 }

@@ -96,8 +96,8 @@ static void get_max_rb_range(const uint16_t *vrb_map_ul, const uint16_t *ulprbbl
 const NR_tda_info_t *get_best_ul_tda(const gNB_MAC_INST *nrmac, int beam, const NR_tda_info_t *tdas, int n_tda, int frame, int slot, int *rb_start, int *rb_len)
 {
  /* there is a mixed slot only when in TDD */
-  const frame_structure_t *fs = &nrmac->frame_structure;
-  const int index = ul_buffer_index(frame, slot, fs->numb_slots_frame, nrmac->vrb_map_UL_size);
+  const frame_structure_t *fs = &nrmac->frame_structure[0];
+  const int index = ul_buffer_index(frame, slot, fs->numb_slots_frame, nrmac->vrb_map_UL_size[0]);
  uint16_t *vrb_map_UL = &nrmac->common_channels[0].vrb_map_UL[beam][index * MAX_BWP_SIZE];

  DevAssert(n_tda <= 16);
@@ -110,7 +110,7 @@ const NR_tda_info_t *get_best_ul_tda(const gNB_MAC_INST *nrmac, int beam, const
    int start = check_rb_start;
    int len = check_rb_len;
    uint16_t tda_mask = SL_to_bitmap(tdas->startSymbolIndex, tdas->nrOfSymbols);
-    get_max_rb_range(vrb_map_UL, nrmac->ulprbbl, tda_mask, &start, &len);
+    get_max_rb_range(vrb_map_UL, nrmac->ulprbbl[0], tda_mask, &start, &len);
    uint64_t s = (uint64_t)tdas->nrOfSymbols * len;
    if (s > score) {
      best_tda = tdas;
@@ -647,7 +647,7 @@ static void abort_nr_ul_harq(NR_UE_info_t *UE, int8_t harq_pid)

 static void handle_nr_ul_harq(gNB_MAC_INST *nrmac, NR_UE_info_t *UE, rnti_t rnti, int crc_harq_id, bool crc_status)
 {
-  if (nrmac->radio_config.disable_harq) {
+  if (nrmac->radio_config[0].disable_harq) {
    LOG_D(NR_MAC, "skipping UL feedback handling as HARQ is disabled\n");
    return;
  }
@@ -906,7 +906,7 @@ static void _nr_rx_sdu(const module_id_t gnb_mod_idP,
  gNB_MAC_INST *gNB_mac = RC.nrmac[gnb_mod_idP];
  const int current_rnti = rntiP;
  LOG_D(NR_MAC, "rx_sdu for rnti %04x\n", current_rnti);
-  const int pusch_failure_thres = gNB_mac->radio_config.pusch.failure_thres;
+  const int pusch_failure_thres = gNB_mac->radio_config[0].pusch.failure_thres;
  NR_UE_info_t *UE = find_nr_UE(&gNB_mac->UE_info, current_rnti);
  if (UE) {
    NR_UE_sched_ctrl_t *UE_scheduling_control = &UE->UE_sched_ctrl;
@@ -1527,8 +1527,8 @@ void handle_nr_srs_measurements(const module_id_t module_id,

      sprintf(stats->srs_stats, "UL-SNR %i dB", wide_band_snr_dB);

-      const int ul_prbblack_SNR_threshold = nr_mac->radio_config.ul_prbblack_SNR_threshold;
-      uint16_t *ulprbbl = nr_mac->ulprbbl;
+      const int ul_prbblack_SNR_threshold = nr_mac->radio_config[0].ul_prbblack_SNR_threshold;
+      uint16_t *ulprbbl = nr_mac->ulprbbl[0];

      uint16_t num_rbs = nr_srs_bf_report.prg_size * nr_srs_bf_report.reported_symbol_list[0].num_prgs;
      memset(ulprbbl, 0, num_rbs * sizeof(uint16_t));
@@ -1736,7 +1736,7 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac,
  LOG_D(NR_MAC,"retInfo->time_domain_allocation = %d, tda = %d\n", retInfo->time_domain_allocation, tda);

  /* mark when retransmission will happen */
-  int slots_frame = nrmac->frame_structure.numb_slots_frame;
+  int slots_frame = nrmac->frame_structure[0].numb_slots_frame;
  new_sched.frame = (frame + (slot + tda_info->k2 + get_NTN_Koffset(scc)) / slots_frame) % MAX_FRAME_NUMBER;
  new_sched.slot = (slot + tda_info->k2 + get_NTN_Koffset(scc)) % slots_frame;
  new_sched.bwp_info = bwp_info;
@@ -1886,12 +1886,12 @@ static int  pf_ul(gNB_MAC_INST *nrmac,
  int frame = pp_pusch->frame;
  int slot = pp_pusch->slot;
  NR_ServingCellConfigCommon_t *scc = nrmac->common_channels[CC_id].ServingCellConfigCommon;
-  int slots_per_frame = nrmac->frame_structure.numb_slots_frame;
+  int slots_per_frame = nrmac->frame_structure[0].numb_slots_frame;
  DevAssert(tda_info->valid_tda);
  const int k2 = tda_info->k2 + get_NTN_Koffset(scc);
  const int sched_frame = (frame + (slot + k2) / slots_per_frame) % MAX_FRAME_NUMBER;
  const int sched_slot = (slot + k2) % slots_per_frame;
-  DevAssert(is_ul_slot(sched_slot, &nrmac->frame_structure));
+  DevAssert(is_ul_slot(sched_slot, &nrmac->frame_structure[0]));

  const int min_rb = nrmac->min_grant_prb;
  // UEs that could be scheduled
@@ -1928,19 +1928,19 @@ static int  pf_ul(gNB_MAC_INST *nrmac,
    if (total_rem_ues == 0)
      continue;

-    NR_beam_alloc_t dci_beam = beam_allocation_procedure(&nrmac->beam_info, frame, slot, UE->UE_beam_index, slots_per_frame);
+    NR_beam_alloc_t dci_beam = beam_allocation_procedure(&nrmac->beam_info[0], frame, slot, UE->UE_beam_index, slots_per_frame);
    if (dci_beam.idx < 0) {
      LOG_D(NR_MAC, "[UE %04x][%4d.%2d] ULSCH DCI Beam could not be allocated\n", UE->rnti, frame, slot);
      continue;
    }

-    NR_beam_alloc_t beam = beam_allocation_procedure(&nrmac->beam_info, sched_frame, sched_slot, UE->UE_beam_index, slots_per_frame);
+    NR_beam_alloc_t beam = beam_allocation_procedure(&nrmac->beam_info[0], sched_frame, sched_slot, UE->UE_beam_index, slots_per_frame);
    if (beam.idx < 0) {
      LOG_D(NR_MAC, "[UE %04x][%4d.%2d] ULSCH Beam could not be allocated\n", UE->rnti, frame, slot);
-      reset_beam_status(&nrmac->beam_info, frame, slot, UE->UE_beam_index, slots_per_frame, dci_beam.new_beam);
+      reset_beam_status(&nrmac->beam_info[0], frame, slot, UE->UE_beam_index, slots_per_frame, dci_beam.new_beam);
      continue;
    }
-    const int index = ul_buffer_index(sched_frame, sched_slot, slots_per_frame, nrmac->vrb_map_UL_size);
+    const int index = ul_buffer_index(sched_frame, sched_slot, slots_per_frame, nrmac->vrb_map_UL_size[0]);
    uint16_t *rballoc_mask = &nrmac->common_channels[CC_id].vrb_map_UL[beam.idx][index * MAX_BWP_SIZE];

    /* Check if retransmission is necessary */
@@ -1960,8 +1960,8 @@ static int  pf_ul(gNB_MAC_INST *nrmac,
                                          tda_info);
      if (!r) {
        LOG_D(NR_MAC, "[UE %04x][%4d.%2d] UL retransmission could not be allocated\n", UE->rnti, frame, slot);
-        reset_beam_status(&nrmac->beam_info, sched_frame, sched_slot, UE->UE_beam_index, slots_per_frame, beam.new_beam);
-        reset_beam_status(&nrmac->beam_info, frame, slot, UE->UE_beam_index, slots_per_frame, dci_beam.new_beam);
+        reset_beam_status(&nrmac->beam_info[0], sched_frame, sched_slot, UE->UE_beam_index, slots_per_frame, beam.new_beam);
+        reset_beam_status(&nrmac->beam_info[0], frame, slot, UE->UE_beam_index, slots_per_frame, dci_beam.new_beam);
        continue;
      }
      else
@@ -1978,15 +1978,15 @@ static int  pf_ul(gNB_MAC_INST *nrmac,
     * if the UE disconnected in L2sim, in which case the gNB is not notified
     * (this can be considered a design flaw) */
    if (sched_ctrl->available_ul_harq.head < 0) {
-      reset_beam_status(&nrmac->beam_info, sched_frame, sched_slot, UE->UE_beam_index, slots_per_frame, beam.new_beam);
-      reset_beam_status(&nrmac->beam_info, frame, slot, UE->UE_beam_index, slots_per_frame, dci_beam.new_beam);
+      reset_beam_status(&nrmac->beam_info[0], sched_frame, sched_slot, UE->UE_beam_index, slots_per_frame, beam.new_beam);
+      reset_beam_status(&nrmac->beam_info[0], frame, slot, UE->UE_beam_index, slots_per_frame, dci_beam.new_beam);
      LOG_D(NR_MAC, "[UE %04x][%4d.%2d] has no free UL HARQ process, skipping\n", UE->rnti, frame, slot);
      continue;
    }

    const int B = max(0, sched_ctrl->estimated_ul_buffer - sched_ctrl->sched_ul_bytes);
    /* preprocessor computed sched_frame/sched_slot */
-    const bool do_sched = nr_UE_is_to_be_scheduled(&nrmac->frame_structure,
+    const bool do_sched = nr_UE_is_to_be_scheduled(&nrmac->frame_structure[0],
                                                   UE,
                                                   sched_frame,
                                                   sched_slot,
@@ -1994,8 +1994,8 @@ static int  pf_ul(gNB_MAC_INST *nrmac,

    LOG_D(NR_MAC,"pf_ul: do_sched UE %04x => %s\n", UE->rnti, do_sched ? "yes" : "no");
    if ((B == 0 && !do_sched) || nr_timer_is_active(&sched_ctrl->transm_interrupt)) {
-      reset_beam_status(&nrmac->beam_info, sched_frame, sched_slot, UE->UE_beam_index, slots_per_frame, beam.new_beam);
-      reset_beam_status(&nrmac->beam_info, frame, slot, UE->UE_beam_index, slots_per_frame, dci_beam.new_beam);
+      reset_beam_status(&nrmac->beam_info[0], sched_frame, sched_slot, UE->UE_beam_index, slots_per_frame, beam.new_beam);
+      reset_beam_status(&nrmac->beam_info[0], frame, slot, UE->UE_beam_index, slots_per_frame, dci_beam.new_beam);
      continue;
    }

@@ -2053,7 +2053,7 @@ static int  pf_ul(gNB_MAC_INST *nrmac,
    NR_UE_UL_BWP_t *current_BWP = &iterator->UE->current_UL_BWP;
    NR_UE_sched_ctrl_t *sched_ctrl = &iterator->UE->UE_sched_ctrl;

-    NR_beam_alloc_t beam = beam_allocation_procedure(&nrmac->beam_info, sched_frame, sched_slot, iterator->UE->UE_beam_index, slots_per_frame);
+    NR_beam_alloc_t beam = beam_allocation_procedure(&nrmac->beam_info[0], sched_frame, sched_slot, iterator->UE->UE_beam_index, slots_per_frame);
    if (beam.idx < 0) {
      LOG_D(NR_MAC, "[UE %04x][%4d.%2d] ULSCH Beam could not be allocated\n", iterator->UE->rnti, sched_frame, sched_slot);
      iterator++;
@@ -2061,15 +2061,15 @@ static int  pf_ul(gNB_MAC_INST *nrmac,
    }

    if (remainUEs[beam.idx] == 0 || n_rb_sched[beam.idx] < min_rb) {
-      reset_beam_status(&nrmac->beam_info, sched_frame, sched_slot, iterator->UE->UE_beam_index, slots_per_frame, beam.new_beam);
+      reset_beam_status(&nrmac->beam_info[0], sched_frame, sched_slot, iterator->UE->UE_beam_index, slots_per_frame, beam.new_beam);
      iterator++;
      continue;
    }

-    NR_beam_alloc_t dci_beam = beam_allocation_procedure(&nrmac->beam_info, frame, slot, iterator->UE->UE_beam_index, slots_per_frame);
+    NR_beam_alloc_t dci_beam = beam_allocation_procedure(&nrmac->beam_info[0], frame, slot, iterator->UE->UE_beam_index, slots_per_frame);
    if (dci_beam.idx < 0) {
      LOG_D(NR_MAC, "[UE %04x][%4d.%2d] ULSCH DCI Beam could not be allocated\n", iterator->UE->rnti, frame, slot);
-      reset_beam_status(&nrmac->beam_info, sched_frame, sched_slot, iterator->UE->UE_beam_index, slots_per_frame, beam.new_beam);
+      reset_beam_status(&nrmac->beam_info[0], sched_frame, sched_slot, iterator->UE->UE_beam_index, slots_per_frame, beam.new_beam);
      iterator++;
      continue;
    }
@@ -2085,8 +2085,8 @@ static int  pf_ul(gNB_MAC_INST *nrmac,

    if (CCEIndex < 0) {
      sched_ctrl->ul_cce_fail++;
-      reset_beam_status(&nrmac->beam_info, frame, slot, iterator->UE->UE_beam_index, slots_per_frame, dci_beam.new_beam);
-      reset_beam_status(&nrmac->beam_info, sched_frame, sched_slot, iterator->UE->UE_beam_index, slots_per_frame, beam.new_beam);
+      reset_beam_status(&nrmac->beam_info[0], frame, slot, iterator->UE->UE_beam_index, slots_per_frame, dci_beam.new_beam);
+      reset_beam_status(&nrmac->beam_info[0], sched_frame, sched_slot, iterator->UE->UE_beam_index, slots_per_frame, beam.new_beam);
      LOG_D(NR_MAC, "[UE %04x][%4d.%2d] no free CCE for UL DCI\n", iterator->UE->rnti, frame, slot);
      iterator++;
      continue;
@@ -2094,7 +2094,7 @@ static int  pf_ul(gNB_MAC_INST *nrmac,
    else
      LOG_D(NR_MAC, "%4d.%2d free CCE for UL DCI UE %04x\n", frame, slot, iterator->UE->rnti);

-    const int index = ul_buffer_index(sched_frame, sched_slot, slots_per_frame, nrmac->vrb_map_UL_size);
+    const int index = ul_buffer_index(sched_frame, sched_slot, slots_per_frame, nrmac->vrb_map_UL_size[0]);
    uint16_t *rballoc_mask = &nrmac->common_channels[CC_id].vrb_map_UL[beam.idx][index * MAX_BWP_SIZE];

    /* find maximum amount of RBs that we can schedule starting from first free RB */
@@ -2106,8 +2106,8 @@ static int  pf_ul(gNB_MAC_INST *nrmac,
     * would be the maximum */
    uint16_t max_rbSize = iterator->sched_inactive ? min_rb : bi.bwpSize;
    if (!get_rb_alloc(min_rb, max_rbSize, bi.bwpStart, bi.bwpSize, rballoc_mask, slbitmap, &rbStart, &available_rb)) {
-      reset_beam_status(&nrmac->beam_info, frame, slot, iterator->UE->UE_beam_index, slots_per_frame, dci_beam.new_beam);
-      reset_beam_status(&nrmac->beam_info, sched_frame, sched_slot, iterator->UE->UE_beam_index, slots_per_frame, beam.new_beam);
+      reset_beam_status(&nrmac->beam_info[0], frame, slot, iterator->UE->UE_beam_index, slots_per_frame, dci_beam.new_beam);
+      reset_beam_status(&nrmac->beam_info[0], sched_frame, sched_slot, iterator->UE->UE_beam_index, slots_per_frame, beam.new_beam);
      LOG_D(NR_MAC, "[UE %04x][%4d.%2d] could not allocate UL data: no resources (rbStart %d, min_rb %d, bwpSize %d)\n",
            iterator->UE->rnti,
            frame,
@@ -2349,7 +2349,7 @@ void post_process_ulsch(gNB_MAC_INST *nr_mac, post_process_pusch_t *pusch, NR_UE
  }
  NR_UE_ul_harq_t *cur_harq = &sched_ctrl->ul_harq_processes[harq_id];
  DevAssert(!cur_harq->is_waiting);
-  if (nr_mac->radio_config.disable_harq) {
+  if (nr_mac->radio_config[0].disable_harq) {
    finish_nr_ul_harq(sched_ctrl, harq_id);
  } else {
    add_tail_nr_list(&sched_ctrl->feedback_ul_harq, harq_id);
@@ -2385,8 +2385,8 @@ void post_process_ulsch(gNB_MAC_INST *nr_mac, post_process_pusch_t *pusch, NR_UE
  /* PUSCH in a later slot, but corresponding DCI now! */
  const int index = ul_buffer_index(sched_pusch->frame,
                                    sched_pusch->slot,
-                                    nr_mac->frame_structure.numb_slots_frame,
-                                    nr_mac->UL_tti_req_ahead_size);
+                                    nr_mac->frame_structure[0].numb_slots_frame,
+                                    nr_mac->UL_tti_req_ahead_size[0]);
  nfapi_nr_ul_tti_request_t *req = &nr_mac->UL_tti_req_ahead[0][index];
  if (req->SFN != sched_pusch->frame || req->Slot != sched_pusch->slot)
    LOG_W(NR_MAC,
@@ -2412,7 +2412,7 @@ void post_process_ulsch(gNB_MAC_INST *nr_mac, post_process_pusch_t *pusch, NR_UE
                                                      cur_harq->round,
                                                      current_BWP->pusch_Config && current_BWP->pusch_Config->frequencyHopping,
                                                      UE->rnti,
-                                                      nr_mac->beam_info.beam_mode);
+                                                      nr_mac->beam_info[0].beam_mode);
  req->n_pdus += 1;

  // Calculate the normalized tx_power for PHR
@@ -2479,7 +2479,7 @@ void post_process_ulsch(gNB_MAC_INST *nr_mac, post_process_pusch_t *pusch, NR_UE
                                                   coreset,
                                                   sched_ctrl->aggregation_level,
                                                   sched_ctrl->cce_index,
-                                                   convert_to_fapi_beam(UE->UE_beam_index, nr_mac->beam_info.beam_mode),
+                                                   convert_to_fapi_beam(UE->UE_beam_index, nr_mac->beam_info[0].beam_mode),
                                                   UE->rnti);
  pdcch_pdu->numDlDci++;

@@ -2523,7 +2523,7 @@ void post_process_ulsch(gNB_MAC_INST *nr_mac, post_process_pusch_t *pusch, NR_UE
                     ss,
                     coreset,
                     UE->pdsch_HARQ_ACK_Codebook,
-                     nr_mac->cset0_bwp_size);
+                     nr_mac->cset0_bwp_size[0]);
 }

 static void nr_ulsch_preprocessor(gNB_MAC_INST *nr_mac, post_process_pusch_t *pp_pusch)
@@ -2534,13 +2534,13 @@ static void nr_ulsch_preprocessor(gNB_MAC_INST *nr_mac, post_process_pusch_t *pp
  NR_COMMON_channels_t *cc = nr_mac->common_channels;
  NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
  AssertFatal(scc, "We need one serving cell config common\n");
-  const frame_structure_t *fs = &nr_mac->frame_structure;
+  const frame_structure_t *fs = &nr_mac->frame_structure[0];

  // we assume the same K2 for all UEs
  const int koffset = get_NTN_Koffset(scc);
-  const int min_rxtx = nr_mac->radio_config.minRXTXTIME + koffset;
+  const int min_rxtx = nr_mac->radio_config[0].minRXTXTIME + koffset;

-  int num_beams = nr_mac->beam_info.beam_allocation ? nr_mac->beam_info.beams_per_period : 1;
+  int num_beams = nr_mac->beam_info[0].beam_allocation ? nr_mac->beam_info[0].beams_per_period : 1;
  int bw = scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth;

  int average_agg_level = 4; // TODO find a better estimation
@@ -2556,7 +2556,7 @@ static void nr_ulsch_preprocessor(gNB_MAC_INST *nr_mac, post_process_pusch_t *pp
   * might starve HARQ processes that need a retransmission in a specific slot
   * but we might not necessarily reach it */
  bool last_dl = (current.s % fs->numb_slots_period) == (fs->period_cfg.num_dl_slots - 1);
-  fsn_t *next = &nr_mac->ul_next;
+  fsn_t *next = &nr_mac->ul_next[0];
  while (max_dci > 0) {
    /* go to the next UL slot, skipping DL if necessary */
    *next = fsn_get_max(*next, min_next);
@@ -2584,7 +2584,7 @@ static void nr_ulsch_preprocessor(gNB_MAC_INST *nr_mac, post_process_pusch_t *pp
    int rb_len = bw;
    tda_info = get_best_ul_tda(nr_mac, beam, tda_info, n_tda, next->f, next->s, &rb_start, &rb_len);
    DevAssert(tda_info->valid_tda);
-    int tda = seq_arr_dist(&nr_mac->ul_tda, seq_arr_front(&nr_mac->ul_tda), tda_info);
+    int tda = seq_arr_dist(&nr_mac->ul_tda[0], seq_arr_front(&nr_mac->ul_tda[0]), tda_info);
    AssertFatal(tda >= 0 && tda < 16, "illegal TDA index %d\n", tda);

    nr_mac->mac_stats.ul.total_prb_aggregate += bw;
--- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h
+++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h
@@ -35,7 +35,7 @@ void mac_top_init_gNB(ngran_node_t node_type,
 void mac_top_destroy_gNB(gNB_MAC_INST *mac);
 void nr_mac_send_f1_setup_req(void);
 int get_ssbidx_from_beam(gNB_MAC_INST *mac, int beam_idx);
-void nr_mac_config_scc(gNB_MAC_INST *nrmac, NR_ServingCellConfigCommon_t *scc, const nr_mac_config_t *mac_config);
+void nr_mac_config_scc(gNB_MAC_INST *nrmac, int CC_id, NR_ServingCellConfigCommon_t *scc, const nr_mac_config_t *mac_config);
 void nr_mac_configure_sib1(gNB_MAC_INST *nrmac, const plmn_id_t *plmn, uint64_t cellID, int tac);
 bool nr_mac_configure_other_sib(gNB_MAC_INST *nrmac, int num_cu_sib, const f1ap_sib_msg_t cu_sib[num_cu_sib]);
 bool nr_mac_add_test_ue(gNB_MAC_INST *nrmac, uint32_t rnti, NR_CellGroupConfig_t *CellGroup);
--- a/openair2/LAYER2/NR_MAC_gNB/mac_rrc_dl_handler.c
+++ b/openair2/LAYER2/NR_MAC_gNB/mac_rrc_dl_handler.c
@@ -548,16 +548,16 @@ static NR_UE_info_t *create_new_UE(gNB_MAC_INST *mac, uint32_t cu_id, const NR_C
  bool success = du_add_f1_ue_data(rnti, &new_ue_data);
  DevAssert(success);

-  NR_UE_info_t *UE = get_new_nr_ue_inst(&mac->UE_info.uid_allocator, rnti, NULL, &mac->radio_config);
+  NR_UE_info_t *UE = get_new_nr_ue_inst(&mac->UE_info.uid_allocator, rnti, NULL, &mac->radio_config[0]);
  AssertFatal(UE->uid < MAX_MOBILES_PER_GNB, "cannot create UE context, UE context setup failure not implemented\n");

  NR_CellGroupConfig_t *cellGroupConfig = NULL;
  NR_COMMON_channels_t *cc = &mac->common_channels[CC_id];
  const NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
-  const nr_mac_config_t *configuration = &mac->radio_config;
+  const nr_mac_config_t *configuration = &mac->radio_config[0];
  int ssb_index = get_ssbidx_from_beam(mac, UE->UE_beam_index);
  if (is_SA) {
-    cellGroupConfig = get_initial_cellGroupConfig(UE->uid, scc, &mac->radio_config, &mac->rlc_config, ssb_index);
+    cellGroupConfig = get_initial_cellGroupConfig(UE->uid, scc, &mac->radio_config[0], &mac->rlc_config, ssb_index);
    cellGroupConfig->spCellConfig->reconfigurationWithSync = get_reconfiguration_with_sync(UE->rnti, UE->uid, scc, mac->frame);
  } else {
    NR_UE_NR_Capability_t *cap = get_ue_nr_cap_from_cg_config_info(cgci);
@@ -748,7 +748,7 @@ void ue_context_setup_request(const f1ap_ue_context_setup_req_t *req)
  if (ue_cap != NULL && cg_configinfo == NULL) {
    // store the new UE capabilities, and update the cellGroupConfig
    // only to be done if we did not already update through the cg_configinfo
-    update_cellGroupConfig(new_CellGroup, UE->uid, UE->capability, &mac->radio_config, scc);
+    update_cellGroupConfig(new_CellGroup, UE->uid, UE->capability, &mac->radio_config[0], scc);
  }

  /* During re-establishment, prepare CellGroupConfig for UE Context Setup response.
@@ -779,7 +779,7 @@ void ue_context_setup_request(const f1ap_ue_context_setup_req_t *req)

  if (mtc) {
    /* creates a suitable measGap config to be used in the gNB */
-    UE->measgap_config = create_measgap_config(mtc, UE->current_DL_BWP.scs, mac->radio_config.minRXTXTIME);
+    UE->measgap_config = create_measgap_config(mtc, UE->current_DL_BWP.scs, mac->radio_config[0].minRXTXTIME);
    /* encodes the measGapConfig created, if useful (or not!) */
    byte_array_t *mgc = calloc_or_fail(1, sizeof(*mgc));
    mgc->buf = calloc_or_fail(1, 1024);
@@ -875,7 +875,7 @@ void ue_context_modification_request(const f1ap_ue_context_mod_req_t *req)
    ASN_STRUCT_FREE(asn_DEF_NR_UE_NR_Capability, UE->capability);
    UE->capability = ue_cap;
    LOG_I(NR_MAC, "UE %04x: received capabilities, updating CellGroupConfig\n", UE->rnti);
-    update_cellGroupConfig(new_CellGroup, UE->uid, UE->capability, &mac->radio_config, scc);
+    update_cellGroupConfig(new_CellGroup, UE->uid, UE->capability, &mac->radio_config[0], scc);
  }

  /* 3GPP TS 38.473 Clause 8.3.4: If gNB-DU Configuration Query is present, include CellGroupConfig
--- a/openair2/LAYER2/NR_MAC_gNB/main.c
+++ b/openair2/LAYER2/NR_MAC_gNB/main.c
@@ -278,22 +278,22 @@ void mac_top_init_gNB(ngran_node_t node_type,
      
      RC.nrmac[i]->Mod_id = i;

-      RC.nrmac[i]->tag = (NR_TAG_t*)malloc(sizeof(NR_TAG_t));
-      memset((void*)RC.nrmac[i]->tag,0,sizeof(NR_TAG_t));
+      RC.nrmac[i]->tag[0] = (NR_TAG_t*)malloc(sizeof(NR_TAG_t));
+      memset((void*)RC.nrmac[i]->tag[0],0,sizeof(NR_TAG_t));
      for(int n = 0; n < MAX_NUM_OF_SSB; n++)
-        RC.nrmac[i]->sib1_pdsch[n].time_domain_allocation = -1;
+        RC.nrmac[i]->sib1_pdsch[0][n].time_domain_allocation = -1;
      RC.nrmac[i]->common_channels[0].ServingCellConfigCommon = scc;
-      RC.nrmac[i]->radio_config = *config;
+      RC.nrmac[i]->radio_config[0] = *config;
      RC.nrmac[i]->rlc_config = *default_rlc_config;

-      RC.nrmac[i]->first_MIB = true;
+      RC.nrmac[i]->first_MIB[0] = true;
      RC.nrmac[i]->num_scheduled_prach_rx = 0;
      RC.nrmac[i]->common_channels[0].mib = get_new_MIB_NR(scc);

-      RC.nrmac[i]->cset0_bwp_start = 0;
-      RC.nrmac[i]->cset0_bwp_size = 0;
+      RC.nrmac[i]->cset0_bwp_start[0] = 0;
+      RC.nrmac[i]->cset0_bwp_size[0] = 0;

-      RC.nrmac[i]->ul_next = (fsn_t) {.mu = *scc->ssbSubcarrierSpacing};
+      RC.nrmac[i]->ul_next[0] = (fsn_t) {.mu = *scc->ssbSubcarrierSpacing};
      RC.nrmac[i]->print_ue_stats = true;

      pthread_mutex_init(&RC.nrmac[i]->sched_lock, NULL);
--- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
+++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
@@ -904,20 +904,20 @@ typedef struct gNB_MAC_INST_s {
  /// Module
  module_id_t                     Mod_id;
  /// timing advance group
-  NR_TAG_t                        *tag;
+  NR_TAG_t                        *tag[NFAPI_CC_MAX];
  /// Pointer to IF module instance for PHY
  NR_IF_Module_t                  *if_inst;
  pthread_t                       stats_thread;
  /// Subcarrier Offset
-  int                             ssb_SubcarrierOffset;
-  int                             ssb_OffsetPointA;
+  int                             ssb_SubcarrierOffset[NFAPI_CC_MAX];
+  int                             ssb_OffsetPointA[NFAPI_CC_MAX];

  /// Common cell resources
  NR_COMMON_channels_t common_channels[NFAPI_CC_MAX];
  /// current PDU index (BCH,DLSCH)
  uint16_t pdu_index[NFAPI_CC_MAX];
  /// UL PRBs blacklist
-  uint16_t ulprbbl[MAX_BWP_SIZE];
+  uint16_t ulprbbl[NFAPI_CC_MAX][MAX_BWP_SIZE];
  /// NFAPI Config Request Structure
  nfapi_nr_config_request_scf_t     config[NFAPI_CC_MAX];
  /// a PDCCH PDU groups DCIs per BWP and CORESET. The following structure
@@ -927,8 +927,8 @@ typedef struct gNB_MAC_INST_s {
  /// NFAPI UL TTI Request Structure for future TTIs, dynamically allocated
  /// because length depends on number of slots
  nfapi_nr_ul_tti_request_t        *UL_tti_req_ahead[NFAPI_CC_MAX];
-  int UL_tti_req_ahead_size;
-  int vrb_map_UL_size;
+  int UL_tti_req_ahead_size[NFAPI_CC_MAX];
+  int vrb_map_UL_size[NFAPI_CC_MAX];

  NR_UEs_t UE_info;

@@ -950,40 +950,40 @@ typedef struct gNB_MAC_INST_s {
  /// processing time of gNB ULSCH reception
  time_stats_t rx_ulsch_sdu;  // include rlc_data_ind

-  NR_beam_info_t beam_info;
+  NR_beam_info_t beam_info[NFAPI_CC_MAX];

  /// maximum number of slots before a UE will be scheduled ULSCH automatically
  uint32_t ulsch_max_frame_inactivity;
  /// instance of the frame structure configuration
-  frame_structure_t frame_structure;
+  frame_structure_t frame_structure[NFAPI_CC_MAX];

  /// DL preprocessor for differentiated scheduling
  nr_pp_impl_dl pre_processor_dl;
  /// UL preprocessor for differentiated scheduling
  nr_pp_impl_ul pre_processor_ul;

-  nr_mac_config_t radio_config;
+  nr_mac_config_t radio_config[NFAPI_CC_MAX];
  nr_rlc_configuration_t rlc_config;

-  NR_sched_ctrl_sib1_t *sched_ctrlSIB1;
-  NR_sched_pdcch_t *sched_pdcch_otherSI;
-  uint16_t cset0_bwp_start;
-  uint16_t cset0_bwp_size;
-  NR_Type0_PDCCH_CSS_config_t type0_PDCCH_CSS_config[MAX_NUM_OF_SSB];
+  NR_sched_ctrl_sib1_t *sched_ctrlSIB1[NFAPI_CC_MAX];
+  NR_sched_pdcch_t *sched_pdcch_otherSI[NFAPI_CC_MAX];
+  uint16_t cset0_bwp_start[NFAPI_CC_MAX];
+  uint16_t cset0_bwp_size[NFAPI_CC_MAX];
+  NR_Type0_PDCCH_CSS_config_t type0_PDCCH_CSS_config[NFAPI_CC_MAX][MAX_NUM_OF_SSB];

-  bool first_MIB;
+  bool first_MIB[NFAPI_CC_MAX];
  NR_bler_options_t dl_bler;
  NR_bler_options_t ul_bler;
  uint16_t min_grant_prb;
  bool identity_pm;
-  int precoding_matrix_size[NR_MAX_NB_LAYERS];
-  int beam_index_list[MAX_NUM_OF_SSB];
-  NR_sched_pdsch_t sib1_pdsch[MAX_NUM_OF_SSB];
+  int precoding_matrix_size[NFAPI_CC_MAX][NR_MAX_NB_LAYERS];
+  int beam_index_list[NFAPI_CC_MAX][MAX_NUM_OF_SSB];
+  NR_sched_pdsch_t sib1_pdsch[NFAPI_CC_MAX][MAX_NUM_OF_SSB];

  /// dedicate UL TDA, common for all UEs
-  seq_arr_t ul_tda;
+  seq_arr_t ul_tda[NFAPI_CC_MAX];
  /// next UL slot to schedule
-  fsn_t ul_next;
+  fsn_t ul_next[NFAPI_CC_MAX];

  nr_mac_rrc_ul_if_t mac_rrc;
  f1_config_t f1_config;
--- a/openair2/LAYER2/NR_MAC_gNB/nr_radio_config.c
+++ b/openair2/LAYER2/NR_MAC_gNB/nr_radio_config.c
@@ -356,7 +356,7 @@ static bool check_periodicity(int val, int ideal_period, const frame_structure_t

 static int set_ideal_period(bool is_csi)
 {
-  const frame_structure_t *fs = &RC.nrmac[0]->frame_structure;
+  const frame_structure_t *fs = &RC.nrmac[0]->frame_structure[0];
  const int nb_slots_per_period = fs->numb_slots_period;
  const int n_ul_slots_per_period = get_ul_slots_per_period(fs); // full UL + mixed with UL symbols
  // 2 reports per UE (RSRP and RI-PMI-CQI)
@@ -504,7 +504,7 @@ static void config_csirs(const NR_ServingCellConfigCommon_t *servingcellconfigco
    nzpcsi0->scramblingID = *servingcellconfigcommon->physCellId;

    const int ideal_period = set_ideal_period(true); // same periodicity as CSI measurement report
-    const frame_structure_t *fs = &(RC.nrmac[0]->frame_structure);
+    const frame_structure_t *fs = &(RC.nrmac[0]->frame_structure[0]);
    set_csirs_periodicity(nzpcsi0, id, ideal_period, fs);

    nzpcsi0->qcl_InfoPeriodicCSI_RS = calloc(1,sizeof(*nzpcsi0->qcl_InfoPeriodicCSI_RS));
@@ -664,7 +664,7 @@ static void set_dl_maxmimolayers(NR_PDSCH_ServingCellConfig_t *pdsch_servingcell

 static struct NR_SRS_Resource__resourceType__periodic *configure_periodic_srs(const int uid)
 {
-  frame_structure_t *fs = &RC.nrmac[0]->frame_structure;
+  frame_structure_t *fs = &RC.nrmac[0]->frame_structure[0];
  int offset = get_ul_slot_offset(fs, uid, false); // only full UL slots for SRS
  // checked for validity in verify_radio_configuration
  AssertFatal(offset < 2560, "Cannot allocate SRS configuration for uid %d, not enough resources\n", uid);
@@ -1330,7 +1330,7 @@ static void set_pucch_power_config(NR_PUCCH_Config_t *pucch_Config)

 static void set_SR_periodandoffset(NR_SchedulingRequestResourceConfig_t *schedulingRequestResourceConfig, int scs)
 {
-  const frame_structure_t *fs = &RC.nrmac[0]->frame_structure;
+  const frame_structure_t *fs = &RC.nrmac[0]->frame_structure[0];
  int sr_slot = 1; // in FDD SR in slot 1
  if (fs->frame_type == TDD)
    sr_slot = get_first_ul_slot(fs, true);
@@ -1935,7 +1935,7 @@ static void set_csi_meas_periodicity(const NR_ServingCellConfigCommon_t *scc,
  const int ideal_period = set_ideal_period(true);
  const int num_pucch2 = get_nb_pucch2_per_slot(scc, curr_bwp, antennaports);
  const int idx = (uid * 2 / num_pucch2) + is_rsrp;
-  frame_structure_t *fs = &RC.nrmac[0]->frame_structure;
+  frame_structure_t *fs = &RC.nrmac[0]->frame_structure[0];
  int offset = get_ul_slot_offset(fs, idx, true);
  LOG_D(NR_MAC, "set_csi_meas_periodicity: uid = %d, offset = %d, ideal_period = %d", uid, offset, ideal_period);
  // checked for validity in verify_radio_configuration
@@ -3718,7 +3718,7 @@ NR_RLC_BearerConfig_t *get_DRB_RLC_BearerConfig(long lcChannelId,

 static bool verify_radio_configuration(int uid, const NR_ServingCellConfigCommon_t *scc, const nr_mac_config_t *configuration)
 {
-  frame_structure_t *fs = &RC.nrmac[0]->frame_structure;
+  frame_structure_t *fs = &RC.nrmac[0]->frame_structure[0];
  int srs_offset = get_ul_slot_offset(fs, uid, false);
  // see configure_periodic_srs
  if (srs_offset >= 2560) {