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19 Commits
ue-halts-c
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develop-si
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3185d596ef |
@@ -484,7 +484,7 @@ add_list1_option(NB_ANTENNAS_RX "2" "Number of antennas in reception" "1" "2" "4
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add_list1_option(NB_ANTENNAS_TX "4" "Number of antennas in transmission" "1" "2" "4")
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add_list1_option(NB_ANTENNAS_TXRX "2" "Number of antennas in ????" "1" "2" "4")
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add_list2_option(RF_BOARD "EXMIMO" "RF head type" "None" "EXMIMO" "OAI_USRP" "OAI_BLADERF" "CPRIGW" "OAI_LMSSDR")
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add_list2_option(RF_BOARD "EXMIMO" "RF head type" "None" "EXMIMO" "OAI_USRP" "OAI_BLADERF" "OAI_SKIQ" "CPRIGW" "OAI_LMSSDR")
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add_list2_option(TRANSP_PRO "None" "Transport protocol type" "None" "ETHERNET")
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@@ -515,6 +515,18 @@ set(HWLIB_BLADERF_SOURCE
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add_library(oai_bladerfdevif MODULE ${HWLIB_BLADERF_SOURCE} )
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target_link_libraries(oai_bladerfdevif bladeRF)
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set (SKIQ_SDK $ENV{SKIQ_SDK})
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include_directories("${OPENAIR_TARGETS}/ARCH/SKIQ/USERSPACE/LIB/")
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set (option_HWSKIQLIB_lib "-L ${SKIQ_SDK}/lib/support/x86_64.gcc/usr/lib/epiq ${SKIQ_SDK}/lib/libsidekiq__x86_64.gcc.a ${SKIQ_SDK}/arg_parser/lib/arg_parser__x86_64.gcc.a -lglib-2.0 -Wl,--enable-new-dtags -Wl,-rpath,/usr/lib/epiq ")
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set(HWLIB_SKIQ_SOURCE
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${OPENAIR_TARGETS}/ARCH/SKIQ/USERSPACE/LIB/skiq_lib.c
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)
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add_library(oai_skiqdevif MODULE ${HWLIB_SKIQ_SOURCE} )
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FIND_LIBRARY(LIBSIDEKIQ NAMES "libsidekiq__x86_64.gcc.a" "arg_parser__x86_64.gcc.a" PATHS ${SKIQ_SDK}/lib NO_DEFAULT_PATH)
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target_link_libraries(oai_skiqdevif ${LIBSIDEKIQ})
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target_include_directories(oai_skiqdevif PRIVATE "${SKIQ_SDK}/sidekiq_core/inc")
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set (CMAKE_SHARED_LINKER_FLAGS "-lglib-2.0 -Wl,--enable-new-dtags -Wl,-rpath,/usr/lib/epiq")
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include_directories("${OPENAIR_TARGETS}/ARCH/LMSSDR/USERSPACE/LIB/")
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set(HWLIB_LMSSDR_SOURCE
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@@ -108,7 +108,7 @@ Options
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Rel8 limits the implementation to 3GPP Release 8 version
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Rel10 limits the implementation to 3GPP Release 10 version
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-w | --hardware
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EXMIMO, USRP, BLADERF, ETHERNET, LMSSDR, None (Default)
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EXMIMO, USRP, SKIQ, BLADERF, ETHERNET, LMSSDR, None (Default)
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Adds this RF board support (in external packages installation and in compilation)
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-t | --transport protocol
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ETHERNET , None
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@@ -227,7 +227,7 @@ function main() {
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-w | --hardware)
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HW="$2" #"${i#*=}"
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# Use OAI_USRP as the key word USRP is used inside UHD driver
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if [ "$HW" != "BLADERF" -a "$HW" != "USRP" -a "$HW" != "LMSSDR" -a "$HW" != "None" -a "$HW" != "EXMIMO" ] ; then
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if [ "$HW" != "SKIQ" -a "$HW" != "BLADERF" -a "$HW" != "USRP" -a "$HW" != "LMSSDR" -a "$HW" != "None" -a "$HW" != "EXMIMO" ] ; then
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echo_fatal "Unknown HW type $HW will exit..."
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else
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if [ "$HW" == "USRP" ] ; then
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@@ -236,6 +236,9 @@ function main() {
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if [ "$HW" == "BLADERF" ] ; then
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HW="OAI_BLADERF"
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fi
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if [ "$HW" == "SKIQ" ] ; then
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HW="OAI_SKIQ"
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fi
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if [ "$HW" == "LMSSDR" ] ; then
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HW="OAI_LMSSDR"
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fi
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@@ -389,6 +392,7 @@ function main() {
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#Now we set flags to enable deadline scheduler settings
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#By default: USRP: disable,
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#By default: BLADERF: enable,
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#By default: SKIQ: enable,
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#By default: EXMIMO: enable
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if [ "$FORCE_DEADLINE_SCHEDULER_FLAG_USER" = "" ]; then
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if [ "$HW" = "EXMIMO" ] ; then
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@@ -398,7 +402,9 @@ function main() {
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elif [ "$HW" = "OAI_USRP" ] ; then
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DEADLINE_SCHEDULER_FLAG_USER="False"
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elif [ "$HW" = "OAI_BLADERF" ] ; then
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DEADLINE_SCHEDULER_FLAG_USER="False"
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DEADLINE_SCHEDULER_FLAG_USER="False"
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elif [ "$HW" = "OAI_SKIQ" ] ; then
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DEADLINE_SCHEDULER_FLAG_USER="False"
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elif [ "$HW" = "OAI_LMSSDR" ] ; then
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DEADLINE_SCHEDULER_FLAG_USER="False"
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elif [ "$HW" = "None" ] ; then
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@@ -469,6 +475,13 @@ function main() {
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flash_firmware_bladerf
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fi
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fi
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if [ "$HW" == "OAI_SKIQ" ] ; then
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echo_info "installing packages for SKIQ support"
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check_install_skiq_driver
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if [ ! "$DISABLE_HARDWARE_DEPENDENCY" == "True" ]; then
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install_usrp_uhd_driver
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fi
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fi
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if [ "$FLEXRAN_AGENT" == "1" ] ; then
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echo_info "installing protobuf/protobuf-c for flexran agent support"
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install_protobuf_from_source
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@@ -540,7 +553,7 @@ function main() {
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fi
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echo 'include(${CMAKE_CURRENT_SOURCE_DIR}/../CMakeLists.txt)' >> $cmake_file
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cd $DIR/$lte_build_dir/build
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eval $CMAKE_CMD
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eval $CMAKE_CMD
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fi
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if [ "$eNB" = "1" -o "$UE" = "1" ] ; then
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@@ -845,9 +858,19 @@ function main() {
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liboai_bladerfdevif.so $dbin/liboai_bladerfdevif.so.$REL
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fi
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ln -sf liboai_bladerfdevif.so liboai_device.so
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ln -sf $dbin/liboai_bladerfdevif.so.$REL $dbin/liboai_device.so
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echo_info "liboai_device.so is linked to BLADERF device library"
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ln -s liboai_bladerfdevif.so liboai_device.so
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ln -s $dbin/liboai_bladerfdevif.so.$REL $dbin/liboai_device.so
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echo_info "liboai_device.so is linked to BLADERF device library"
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elif [ "$HW" == "OAI_SKIQ" ] ; then
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if [ -f $SKIQ_SDK/sidekiq_core/inc ] ; then
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compilations \
|
||||
$build_dir oai_skiqdevif \
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liboai_skiqdevif.so $dbin/liboai_skiqdevif.so.$REL
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fi
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ln -s liboai_skiqdevif.so liboai_device.so
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ln -s $dbin/liboai_skiqdevif.so.$REL $dbin/liboai_device.so
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echo_info "liboai_device.so is linked to SIDEKIQ device library"
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||||
elif [ "$HW" == "OAI_LMSSDR" ] ; then
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# if [ -f "/usr/include/libbladeRF.h" ] ; then
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compilations \
|
||||
|
||||
@@ -557,9 +557,9 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode)
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ue->frame_parms.nb_antenna_ports_eNB);
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#endif
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|
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#if defined(OAI_USRP) || defined(EXMIMO) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
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#if defined(OAI_USRP) || defined(EXMIMO) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_SKIQ)
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# if DISABLE_LOG_X
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printf("[UE %d] Frame %d Measured Carrier Frequency %.0f Hz (offset %d Hz)\n",
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LOG_I(PHY,"[UE %d] Frame %d Measured Carrier Frequency %.0f Hz (offset %d Hz)\n",
|
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ue->Mod_id,
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ue->proc.proc_rxtx[0].frame_rx,
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openair0_cfg[0].rx_freq[0]-ue->common_vars.freq_offset,
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@@ -621,22 +621,26 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode)
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#ifndef OAI_USRP
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#ifndef OAI_BLADERF
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#ifndef OAI_LMSSDR
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#ifndef OAI_SKIQ
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phy_adjust_gain(ue,ue->measurements.rx_power_avg_dB[0],0);
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#endif
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#endif
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#endif
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#endif
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}
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else {
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#ifndef OAI_USRP
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#ifndef OAI_BLADERF
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#ifndef OAI_LMSSDR
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#ifndef OAI_SKIQ
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phy_adjust_gain(ue,dB_fixed(ue->measurements.rssi),0);
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#endif
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#endif
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#endif
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#endif
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||||
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||||
}
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// exit_fun("debug exit");
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||||
@@ -494,7 +494,7 @@ void fill_dci(DCI_PDU *DCI_pdu,PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc)
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((DCI0_5MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->type = 0;
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((DCI0_5MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->hopping = 0;
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((DCI0_5MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->rballoc = computeRIV(25,1,20);
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printf("rballoc %d\n",((DCI0_5MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->rballoc);
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//printf("rballoc %d\n",((DCI0_5MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->rballoc);
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((DCI0_5MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->mcs = eNB->target_ue_ul_mcs;
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((DCI0_5MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->ndi = proc->frame_tx&1;
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((DCI0_5MHz_FDD_t*)&DCI_pdu->dci_alloc[1].dci_pdu[0])->TPC = 0;
|
||||
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||||
@@ -2675,9 +2675,11 @@ void ue_measurement_procedures(
|
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#ifndef OAI_USRP
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#ifndef OAI_BLADERF
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#ifndef OAI_LMSSDR
|
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#ifndef OAI_SKIQ
|
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phy_adjust_gain (ue,dB_fixed(ue->measurements.rssi),0);
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#endif
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#endif
|
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#endif
|
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#endif
|
||||
|
||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_GAIN_CONTROL, VCD_FUNCTION_OUT);
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@@ -47,7 +47,7 @@ int set_device(openair0_device *device) {
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case USRP_B200_DEV:
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printf("[%s] has loaded USRP B200 device.\n",((device->host_type == BBU_HOST) ? "BBU": "RRH"));
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break;
|
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case USRP_X300_DEV:
|
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case USRP_X300_DEV:
|
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printf("[%s] has loaded USRP X300 device.\n",((device->host_type == BBU_HOST) ? "BBU": "RRH"));
|
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break;
|
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case BLADERF_DEV:
|
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@@ -56,6 +56,9 @@ case USRP_X300_DEV:
|
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case LMSSDR_DEV:
|
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printf("[%s] has loaded LMSSDR device.\n",((device->host_type == BBU_HOST) ? "BBU": "RRH"));
|
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break;
|
||||
case SKIQ_DEV:
|
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printf("[%s] has loaded Sidekiq device.\n",((device->host_type == BBU_HOST) ? "BBU": "RRH"));
|
||||
break;
|
||||
case NONE_DEV:
|
||||
printf("[%s] has not loaded a HW device.\n",((device->host_type == BBU_HOST) ? "BBU": "RRH"));
|
||||
break;
|
||||
|
||||
@@ -95,6 +95,8 @@ typedef enum {
|
||||
BLADERF_DEV,
|
||||
/*!\brief device is LMSSDR (SoDeRa)*/
|
||||
LMSSDR_DEV,
|
||||
/*!\brief device is SKIQ*/
|
||||
SKIQ_DEV,
|
||||
/*!\brief device is NONE*/
|
||||
NONE_DEV,
|
||||
MAX_RF_DEV_TYPE
|
||||
|
||||
1260
targets/ARCH/SKIQ/USERSPACE/LIB/skiq_lib.c
Executable file
1260
targets/ARCH/SKIQ/USERSPACE/LIB/skiq_lib.c
Executable file
File diff suppressed because it is too large
Load Diff
19
targets/PROJECTS/GENERIC-LTE-EPC/CONF/rru.oaisim.lo.conf
Normal file
19
targets/PROJECTS/GENERIC-LTE-EPC/CONF/rru.oaisim.lo.conf
Normal file
@@ -0,0 +1,19 @@
|
||||
RUs = (
|
||||
{
|
||||
local_if_name = "lo";
|
||||
remote_address = "127.0.0.2";
|
||||
local_address = "127.0.0.1";
|
||||
local_portc = 50000;
|
||||
remote_portc = 50000;
|
||||
local_portd = 50001;
|
||||
remote_portd = 50001;
|
||||
local_rf = "yes"
|
||||
tr_preference = "udp_if4p5";
|
||||
nb_tx = 1;
|
||||
nb_rx = 1;
|
||||
max_pdschReferenceSignalPower = -29;
|
||||
max_rxgain = 120;
|
||||
bands = [7,13];
|
||||
}
|
||||
);
|
||||
|
||||
@@ -324,51 +324,18 @@ void do_OFDM_mod_rt(int subframe,PHY_VARS_eNB *phy_vars_eNB)
|
||||
|
||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_OFDM_MODULATION,0);
|
||||
|
||||
|
||||
/*
|
||||
for (aa=0; aa<phy_vars_eNB->frame_parms.nb_antennas_tx; aa++) {
|
||||
if (phy_vars_eNB->frame_parms.Ncp == EXTENDED) {
|
||||
PHY_ofdm_mod(&phy_vars_eNB->common_vars.txdataF[0][aa][slot_offset_F],
|
||||
dummy_tx_b,
|
||||
phy_vars_eNB->frame_parms.ofdm_symbol_size,
|
||||
6,
|
||||
phy_vars_eNB->frame_parms.nb_prefix_samples,
|
||||
CYCLIC_PREFIX);
|
||||
if (subframe_select(&phy_vars_eNB->frame_parms,subframe) == SF_DL)
|
||||
PHY_ofdm_mod(&phy_vars_eNB->common_vars.txdataF[0][aa][slot_offset_F+slot_sizeF],
|
||||
dummy_tx_b+(phy_vars_eNB->frame_parms.samples_per_tti>>1),
|
||||
phy_vars_eNB->frame_parms.ofdm_symbol_size,
|
||||
6,
|
||||
phy_vars_eNB->frame_parms.nb_prefix_samples,
|
||||
CYCLIC_PREFIX);
|
||||
} else {
|
||||
normal_prefix_mod(&phy_vars_eNB->common_vars.txdataF[0][aa][slot_offset_F],
|
||||
dummy_tx_b,
|
||||
7,
|
||||
&(phy_vars_eNB->frame_parms));
|
||||
// if S-subframe generate first slot only
|
||||
if (subframe_select(&phy_vars_eNB->frame_parms,subframe) == SF_DL)
|
||||
normal_prefix_mod(&phy_vars_eNB->common_vars.txdataF[0][aa][slot_offset_F+slot_sizeF],
|
||||
dummy_tx_b+(phy_vars_eNB->frame_parms.samples_per_tti>>1),
|
||||
7,
|
||||
&(phy_vars_eNB->frame_parms));
|
||||
}
|
||||
} */
|
||||
|
||||
/*
|
||||
int16_t tmp;
|
||||
|
||||
for (aa=0; aa<phy_vars_eNB->frame_parms.nb_antennas_tx; aa++) {
|
||||
// if S-subframe generate first slot only
|
||||
if (subframe_select(&phy_vars_eNB->frame_parms,subframe) == SF_S)
|
||||
len = phy_vars_eNB->frame_parms.samples_per_tti>>1;
|
||||
else
|
||||
len = phy_vars_eNB->frame_parms.samples_per_tti;
|
||||
/*
|
||||
for (i=0;i<len;i+=4) {
|
||||
dummy_tx_b[i] = 0x100;
|
||||
dummy_tx_b[i+1] = 0x01000000;
|
||||
dummy_tx_b[i+2] = 0xff00;
|
||||
dummy_tx_b[i+3] = 0xff000000;
|
||||
}*/
|
||||
|
||||
for (i=0; i<len; i++) {
|
||||
|
||||
tx_offset = (int)slot_offset+time_offset[aa]+i;
|
||||
|
||||
|
||||
@@ -378,40 +345,37 @@ void do_OFDM_mod_rt(int subframe,PHY_VARS_eNB *phy_vars_eNB)
|
||||
if (tx_offset>=(LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*phy_vars_eNB->frame_parms.samples_per_tti))
|
||||
tx_offset -= LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*phy_vars_eNB->frame_parms.samples_per_tti;
|
||||
|
||||
/* ((short*)&phy_vars_eNB->common_vars.txdata[0][aa][tx_offset])[0] = ((short*)dummy_tx_b)[2*i]<<openair0_cfg[0].iq_txshift;
|
||||
|
||||
((short*)&phy_vars_eNB->common_vars.txdata[0][aa][tx_offset])[1] = ((short*)dummy_tx_b)[2*i+1]<<openair0_cfg[0].iq_txshift; */
|
||||
|
||||
((short*)&phy_vars_eNB->common_vars.txdata[0][aa][tx_offset])[0] = ((short*)&phy_vars_eNB->common_vars.txdata[0][aa][tx_offset])[0]<<openair0_cfg[CC_id].iq_txshift;
|
||||
|
||||
((short*)&phy_vars_eNB->common_vars.txdata[0][aa][tx_offset])[1] = ((short*)&phy_vars_eNB->common_vars.txdata[0][aa][tx_offset])[1]<<openair0_cfg[CC_id].iq_txshift;
|
||||
}
|
||||
tmp = ((short*)&phy_vars_eNB->common_vars.txdata[0][aa][tx_offset])[1];//<<openair0_cfg[CC_id].iq_txshift;
|
||||
((short*)&phy_vars_eNB->common_vars.txdata[0][aa][tx_offset])[0] = tmp;
|
||||
((short*)&phy_vars_eNB->common_vars.txdata[0][aa][tx_offset])[1] = ((short*)&phy_vars_eNB->common_vars.txdata[0][aa][tx_offset])[0];//<<openair0_cfg[CC_id].iq_txshift;
|
||||
}
|
||||
// if S-subframe switch to RX in second subframe
|
||||
if (subframe_select(&phy_vars_eNB->frame_parms,subframe) == SF_S) {
|
||||
for (i=0; i<len; i++) {
|
||||
phy_vars_eNB->common_vars.txdata[0][aa][tx_offset++] = 0x00010001;
|
||||
}
|
||||
}
|
||||
|
||||
if ((((phy_vars_eNB->frame_parms.tdd_config==0) ||
|
||||
(phy_vars_eNB->frame_parms.tdd_config==1) ||
|
||||
(phy_vars_eNB->frame_parms.tdd_config==2) ||
|
||||
(phy_vars_eNB->frame_parms.tdd_config==6)) &&
|
||||
(subframe==0)) || (subframe==5)) {
|
||||
// turn on tx switch N_TA_offset before
|
||||
//LOG_D(HW,"subframe %d, time to switch to tx (N_TA_offset %d, slot_offset %d) \n",subframe,phy_vars_eNB->N_TA_offset,slot_offset);
|
||||
for (i=0; i<phy_vars_eNB->N_TA_offset; i++) {
|
||||
tx_offset = (int)slot_offset+time_offset[aa]+i-phy_vars_eNB->N_TA_offset;
|
||||
if (tx_offset<0)
|
||||
tx_offset += LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*phy_vars_eNB->frame_parms.samples_per_tti;
|
||||
|
||||
if (tx_offset>=(LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*phy_vars_eNB->frame_parms.samples_per_tti))
|
||||
tx_offset -= LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*phy_vars_eNB->frame_parms.samples_per_tti;
|
||||
|
||||
phy_vars_eNB->common_vars.txdata[0][aa][tx_offset] = 0x00000000;
|
||||
}
|
||||
}
|
||||
if (subframe_select(&phy_vars_eNB->frame_parms,subframe) == SF_S) {
|
||||
for (i=0; i<len; i++) {
|
||||
phy_vars_eNB->common_vars.txdata[0][aa][tx_offset++] = 0x00010001;
|
||||
}
|
||||
}
|
||||
|
||||
if ((((phy_vars_eNB->frame_parms.tdd_config==0) ||
|
||||
(phy_vars_eNB->frame_parms.tdd_config==1) ||
|
||||
(phy_vars_eNB->frame_parms.tdd_config==2) ||
|
||||
(phy_vars_eNB->frame_parms.tdd_config==6)) &&
|
||||
(subframe==0)) || (subframe==5)) {
|
||||
// turn on tx switch N_TA_offset before
|
||||
//LOG_D(HW,"subframe %d, time to switch to tx (N_TA_offset %d, slot_offset %d) \n",subframe,phy_vars_eNB->N_TA_offset,slot_offset);
|
||||
for (i=0; i<phy_vars_eNB->N_TA_offset; i++) {
|
||||
tx_offset = (int)slot_offset+time_offset[aa]+i-phy_vars_eNB->N_TA_offset;
|
||||
if (tx_offset<0)
|
||||
tx_offset += LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*phy_vars_eNB->frame_parms.samples_per_tti;
|
||||
|
||||
if (tx_offset>=(LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*phy_vars_eNB->frame_parms.samples_per_tti))
|
||||
tx_offset -= LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*phy_vars_eNB->frame_parms.samples_per_tti;
|
||||
|
||||
phy_vars_eNB->common_vars.txdata[0][aa][tx_offset] = 0x00000000;
|
||||
}
|
||||
}
|
||||
}
|
||||
*/
|
||||
}
|
||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_SFGEN , 0 );
|
||||
}
|
||||
@@ -1474,7 +1438,7 @@ static void* eNB_thread_FH( void* param ) {
|
||||
wait_sync("eNB_thread_FH");
|
||||
|
||||
#if defined(ENABLE_ITTI) && defined(ENABLE_USE_MME)
|
||||
if (eNB->node_function < NGFI_RRU_IF5)
|
||||
if ((eNB->node_function < NGFI_RRU_IF5) && (eNB->mac_enabled == 1))
|
||||
wait_system_ready ("Waiting for eNB application to be ready %s\r", &start_eNB);
|
||||
#endif
|
||||
|
||||
@@ -1766,8 +1730,9 @@ void init_eNB_proc(int inst) {
|
||||
proc->instance_cnt_FH = -1;
|
||||
proc->instance_cnt_asynch_rxtx = -1;
|
||||
proc->CC_id = CC_id;
|
||||
|
||||
proc->first_rx=100;
|
||||
proc->instance_cnt_synch = -1;
|
||||
|
||||
proc->first_rx=1;
|
||||
proc->first_tx=1;
|
||||
proc->frame_offset = 0;
|
||||
@@ -2089,6 +2054,8 @@ void init_eNB(eNB_func_t node_function[], eNB_timing_t node_timing[],int nb_inst
|
||||
eNB->start_rf = start_rf;
|
||||
eNB->start_if = start_if;
|
||||
eNB->fh_asynch = fh_if5_asynch_DL;
|
||||
eNB->rfdevice.host_type = RRH_HOST;
|
||||
eNB->ifdevice.host_type = RRH_HOST;
|
||||
if (oaisim_flag == 0) {
|
||||
ret = openair0_device_load(&eNB->rfdevice, &openair0_cfg[CC_id]);
|
||||
if (ret<0) {
|
||||
@@ -2096,8 +2063,6 @@ void init_eNB(eNB_func_t node_function[], eNB_timing_t node_timing[],int nb_inst
|
||||
exit(-1);
|
||||
}
|
||||
}
|
||||
eNB->rfdevice.host_type = RRH_HOST;
|
||||
eNB->ifdevice.host_type = RRH_HOST;
|
||||
ret = openair0_transport_load(&eNB->ifdevice, &openair0_cfg[CC_id], eNB->eth_params);
|
||||
printf("openair0_transport_init returns %d for CC_id %d\n",ret,CC_id);
|
||||
if (ret<0) {
|
||||
@@ -2119,6 +2084,8 @@ void init_eNB(eNB_func_t node_function[], eNB_timing_t node_timing[],int nb_inst
|
||||
eNB->fh_asynch = fh_if4p5_asynch_DL;
|
||||
eNB->start_rf = start_rf;
|
||||
eNB->start_if = start_if;
|
||||
eNB->rfdevice.host_type = RRH_HOST;
|
||||
eNB->ifdevice.host_type = RRH_HOST;
|
||||
if (oaisim_flag == 0) {
|
||||
ret = openair0_device_load(&eNB->rfdevice, &openair0_cfg[CC_id]);
|
||||
if (ret<0) {
|
||||
@@ -2126,8 +2093,7 @@ void init_eNB(eNB_func_t node_function[], eNB_timing_t node_timing[],int nb_inst
|
||||
exit(-1);
|
||||
}
|
||||
}
|
||||
eNB->rfdevice.host_type = RRH_HOST;
|
||||
eNB->ifdevice.host_type = RRH_HOST;
|
||||
|
||||
printf("loading transport interface ...\n");
|
||||
ret = openair0_transport_load(&eNB->ifdevice, &openair0_cfg[CC_id], eNB->eth_params);
|
||||
printf("openair0_transport_init returns %d for CC_id %d\n",ret,CC_id);
|
||||
@@ -2152,6 +2118,9 @@ void init_eNB(eNB_func_t node_function[], eNB_timing_t node_timing[],int nb_inst
|
||||
eNB->start_rf = start_rf;
|
||||
eNB->start_if = NULL;
|
||||
eNB->fh_asynch = NULL;
|
||||
eNB->rfdevice.host_type = BBU_HOST;
|
||||
eNB->ifdevice.host_type = BBU_HOST;
|
||||
|
||||
if (oaisim_flag == 0) {
|
||||
ret = openair0_device_load(&eNB->rfdevice, &openair0_cfg[CC_id]);
|
||||
if (ret<0) {
|
||||
@@ -2159,8 +2128,6 @@ void init_eNB(eNB_func_t node_function[], eNB_timing_t node_timing[],int nb_inst
|
||||
exit(-1);
|
||||
}
|
||||
}
|
||||
eNB->rfdevice.host_type = BBU_HOST;
|
||||
eNB->ifdevice.host_type = BBU_HOST;
|
||||
break;
|
||||
case eNodeB_3GPP_BBU:
|
||||
eNB->do_precoding = eNB->frame_parms.nb_antennas_tx!=eNB->frame_parms.nb_antenna_ports_eNB;
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -63,9 +63,9 @@ extern double cpuf;
|
||||
#define FIFO_PRIORITY 40
|
||||
|
||||
typedef enum {
|
||||
pss=0,
|
||||
pbch=1,
|
||||
si=2
|
||||
pss=0,
|
||||
pbch=1,
|
||||
si=2
|
||||
} sync_mode_t;
|
||||
|
||||
void init_UE_threads(PHY_VARS_UE *UE);
|
||||
@@ -79,100 +79,100 @@ int32_t **txdata;
|
||||
#define MHz (1000*KHz)
|
||||
|
||||
typedef struct eutra_band_s {
|
||||
int16_t band;
|
||||
uint32_t ul_min;
|
||||
uint32_t ul_max;
|
||||
uint32_t dl_min;
|
||||
uint32_t dl_max;
|
||||
lte_frame_type_t frame_type;
|
||||
int16_t band;
|
||||
uint32_t ul_min;
|
||||
uint32_t ul_max;
|
||||
uint32_t dl_min;
|
||||
uint32_t dl_max;
|
||||
lte_frame_type_t frame_type;
|
||||
} eutra_band_t;
|
||||
|
||||
typedef struct band_info_s {
|
||||
int nbands;
|
||||
eutra_band_t band_info[100];
|
||||
int nbands;
|
||||
eutra_band_t band_info[100];
|
||||
} band_info_t;
|
||||
|
||||
band_info_t bands_to_scan;
|
||||
|
||||
static const eutra_band_t eutra_bands[] = {
|
||||
{ 1, 1920 * MHz, 1980 * MHz, 2110 * MHz, 2170 * MHz, FDD},
|
||||
{ 2, 1850 * MHz, 1910 * MHz, 1930 * MHz, 1990 * MHz, FDD},
|
||||
{ 3, 1710 * MHz, 1785 * MHz, 1805 * MHz, 1880 * MHz, FDD},
|
||||
{ 4, 1710 * MHz, 1755 * MHz, 2110 * MHz, 2155 * MHz, FDD},
|
||||
{ 5, 824 * MHz, 849 * MHz, 869 * MHz, 894 * MHz, FDD},
|
||||
{ 6, 830 * MHz, 840 * MHz, 875 * MHz, 885 * MHz, FDD},
|
||||
{ 7, 2500 * MHz, 2570 * MHz, 2620 * MHz, 2690 * MHz, FDD},
|
||||
{ 8, 880 * MHz, 915 * MHz, 925 * MHz, 960 * MHz, FDD},
|
||||
{ 9, 1749900 * KHz, 1784900 * KHz, 1844900 * KHz, 1879900 * KHz, FDD},
|
||||
{10, 1710 * MHz, 1770 * MHz, 2110 * MHz, 2170 * MHz, FDD},
|
||||
{11, 1427900 * KHz, 1452900 * KHz, 1475900 * KHz, 1500900 * KHz, FDD},
|
||||
{12, 698 * MHz, 716 * MHz, 728 * MHz, 746 * MHz, FDD},
|
||||
{13, 777 * MHz, 787 * MHz, 746 * MHz, 756 * MHz, FDD},
|
||||
{14, 788 * MHz, 798 * MHz, 758 * MHz, 768 * MHz, FDD},
|
||||
{17, 704 * MHz, 716 * MHz, 734 * MHz, 746 * MHz, FDD},
|
||||
{20, 832 * MHz, 862 * MHz, 791 * MHz, 821 * MHz, FDD},
|
||||
{22, 3510 * MHz, 3590 * MHz, 3410 * MHz, 3490 * MHz, FDD},
|
||||
{33, 1900 * MHz, 1920 * MHz, 1900 * MHz, 1920 * MHz, TDD},
|
||||
{34, 2010 * MHz, 2025 * MHz, 2010 * MHz, 2025 * MHz, TDD},
|
||||
{35, 1850 * MHz, 1910 * MHz, 1850 * MHz, 1910 * MHz, TDD},
|
||||
{36, 1930 * MHz, 1990 * MHz, 1930 * MHz, 1990 * MHz, TDD},
|
||||
{37, 1910 * MHz, 1930 * MHz, 1910 * MHz, 1930 * MHz, TDD},
|
||||
{38, 2570 * MHz, 2620 * MHz, 2570 * MHz, 2630 * MHz, TDD},
|
||||
{39, 1880 * MHz, 1920 * MHz, 1880 * MHz, 1920 * MHz, TDD},
|
||||
{40, 2300 * MHz, 2400 * MHz, 2300 * MHz, 2400 * MHz, TDD},
|
||||
{41, 2496 * MHz, 2690 * MHz, 2496 * MHz, 2690 * MHz, TDD},
|
||||
{42, 3400 * MHz, 3600 * MHz, 3400 * MHz, 3600 * MHz, TDD},
|
||||
{43, 3600 * MHz, 3800 * MHz, 3600 * MHz, 3800 * MHz, TDD},
|
||||
{44, 703 * MHz, 803 * MHz, 703 * MHz, 803 * MHz, TDD},
|
||||
{ 1, 1920 * MHz, 1980 * MHz, 2110 * MHz, 2170 * MHz, FDD},
|
||||
{ 2, 1850 * MHz, 1910 * MHz, 1930 * MHz, 1990 * MHz, FDD},
|
||||
{ 3, 1710 * MHz, 1785 * MHz, 1805 * MHz, 1880 * MHz, FDD},
|
||||
{ 4, 1710 * MHz, 1755 * MHz, 2110 * MHz, 2155 * MHz, FDD},
|
||||
{ 5, 824 * MHz, 849 * MHz, 869 * MHz, 894 * MHz, FDD},
|
||||
{ 6, 830 * MHz, 840 * MHz, 875 * MHz, 885 * MHz, FDD},
|
||||
{ 7, 2500 * MHz, 2570 * MHz, 2620 * MHz, 2690 * MHz, FDD},
|
||||
{ 8, 880 * MHz, 915 * MHz, 925 * MHz, 960 * MHz, FDD},
|
||||
{ 9, 1749900 * KHz, 1784900 * KHz, 1844900 * KHz, 1879900 * KHz, FDD},
|
||||
{10, 1710 * MHz, 1770 * MHz, 2110 * MHz, 2170 * MHz, FDD},
|
||||
{11, 1427900 * KHz, 1452900 * KHz, 1475900 * KHz, 1500900 * KHz, FDD},
|
||||
{12, 698 * MHz, 716 * MHz, 728 * MHz, 746 * MHz, FDD},
|
||||
{13, 777 * MHz, 787 * MHz, 746 * MHz, 756 * MHz, FDD},
|
||||
{14, 788 * MHz, 798 * MHz, 758 * MHz, 768 * MHz, FDD},
|
||||
{17, 704 * MHz, 716 * MHz, 734 * MHz, 746 * MHz, FDD},
|
||||
{20, 832 * MHz, 862 * MHz, 791 * MHz, 821 * MHz, FDD},
|
||||
{22, 3510 * MHz, 3590 * MHz, 3410 * MHz, 3490 * MHz, FDD},
|
||||
{33, 1900 * MHz, 1920 * MHz, 1900 * MHz, 1920 * MHz, TDD},
|
||||
{34, 2010 * MHz, 2025 * MHz, 2010 * MHz, 2025 * MHz, TDD},
|
||||
{35, 1850 * MHz, 1910 * MHz, 1850 * MHz, 1910 * MHz, TDD},
|
||||
{36, 1930 * MHz, 1990 * MHz, 1930 * MHz, 1990 * MHz, TDD},
|
||||
{37, 1910 * MHz, 1930 * MHz, 1910 * MHz, 1930 * MHz, TDD},
|
||||
{38, 2570 * MHz, 2620 * MHz, 2570 * MHz, 2630 * MHz, TDD},
|
||||
{39, 1880 * MHz, 1920 * MHz, 1880 * MHz, 1920 * MHz, TDD},
|
||||
{40, 2300 * MHz, 2400 * MHz, 2300 * MHz, 2400 * MHz, TDD},
|
||||
{41, 2496 * MHz, 2690 * MHz, 2496 * MHz, 2690 * MHz, TDD},
|
||||
{42, 3400 * MHz, 3600 * MHz, 3400 * MHz, 3600 * MHz, TDD},
|
||||
{43, 3600 * MHz, 3800 * MHz, 3600 * MHz, 3800 * MHz, TDD},
|
||||
{44, 703 * MHz, 803 * MHz, 703 * MHz, 803 * MHz, TDD},
|
||||
};
|
||||
|
||||
void init_thread(int sched_runtime, int sched_deadline, int sched_fifo, cpu_set_t *cpuset, char * name) {
|
||||
|
||||
#ifdef DEADLINE_SCHEDULER
|
||||
if (sched_runtime!=0) {
|
||||
struct sched_attr attr= {0};
|
||||
attr.size = sizeof(attr);
|
||||
attr.sched_policy = SCHED_DEADLINE;
|
||||
attr.sched_runtime = sched_runtime;
|
||||
attr.sched_deadline = sched_deadline;
|
||||
attr.sched_period = 0;
|
||||
AssertFatal(sched_setattr(0, &attr, 0) == 0,
|
||||
"[SCHED] %s thread: sched_setattr failed %s \n", name, strerror(errno));
|
||||
LOG_I(HW,"[SCHED][eNB] %s deadline thread %lu started on CPU %d\n",
|
||||
name, (unsigned long)gettid(), sched_getcpu());
|
||||
}
|
||||
if (sched_runtime!=0) {
|
||||
struct sched_attr attr= {0};
|
||||
attr.size = sizeof(attr);
|
||||
attr.sched_policy = SCHED_DEADLINE;
|
||||
attr.sched_runtime = sched_runtime;
|
||||
attr.sched_deadline = sched_deadline;
|
||||
attr.sched_period = 0;
|
||||
AssertFatal(sched_setattr(0, &attr, 0) == 0,
|
||||
"[SCHED] %s thread: sched_setattr failed %s \n", name, strerror(errno));
|
||||
LOG_I(HW,"[SCHED][eNB] %s deadline thread %lu started on CPU %d\n",
|
||||
name, (unsigned long)gettid(), sched_getcpu());
|
||||
}
|
||||
|
||||
#else
|
||||
if (CPU_COUNT(cpuset) > 0)
|
||||
AssertFatal( 0 == pthread_setaffinity_np(pthread_self(), sizeof(cpu_set_t), cpuset), "");
|
||||
struct sched_param sp;
|
||||
sp.sched_priority = sched_fifo;
|
||||
AssertFatal(pthread_setschedparam(pthread_self(),SCHED_FIFO,&sp)==0,
|
||||
"Can't set thread priority, Are you root?\n");
|
||||
/* Check the actual affinity mask assigned to the thread */
|
||||
cpu_set_t *cset=CPU_ALLOC(CPU_SETSIZE);
|
||||
if (0 == pthread_getaffinity_np(pthread_self(), CPU_ALLOC_SIZE(CPU_SETSIZE), cset)) {
|
||||
char txt[512]={0};
|
||||
for (int j = 0; j < CPU_SETSIZE; j++)
|
||||
if (CPU_ISSET(j, cset))
|
||||
sprintf(txt+strlen(txt), " %d ", j);
|
||||
printf("CPU Affinity of thread %s is %s\n", name, txt);
|
||||
}
|
||||
CPU_FREE(cset);
|
||||
if (CPU_COUNT(cpuset) > 0)
|
||||
AssertFatal( 0 == pthread_setaffinity_np(pthread_self(), sizeof(cpu_set_t), cpuset), "");
|
||||
struct sched_param sp;
|
||||
sp.sched_priority = sched_fifo;
|
||||
AssertFatal(pthread_setschedparam(pthread_self(),SCHED_FIFO,&sp)==0,
|
||||
"Can't set thread priority, Are you root?\n");
|
||||
/* Check the actual affinity mask assigned to the thread */
|
||||
cpu_set_t *cset=CPU_ALLOC(CPU_SETSIZE);
|
||||
if (0 == pthread_getaffinity_np(pthread_self(), CPU_ALLOC_SIZE(CPU_SETSIZE), cset)) {
|
||||
char txt[512]={0};
|
||||
for (int j = 0; j < CPU_SETSIZE; j++)
|
||||
if (CPU_ISSET(j, cset))
|
||||
sprintf(txt+strlen(txt), " %d ", j);
|
||||
printf("CPU Affinity of thread %s is %s\n", name, txt);
|
||||
}
|
||||
CPU_FREE(cset);
|
||||
#endif
|
||||
|
||||
// Lock memory from swapping. This is a process wide call (not constraint to this thread).
|
||||
mlockall(MCL_CURRENT | MCL_FUTURE);
|
||||
pthread_setname_np( pthread_self(), name );
|
||||
// Lock memory from swapping. This is a process wide call (not constraint to this thread).
|
||||
mlockall(MCL_CURRENT | MCL_FUTURE);
|
||||
pthread_setname_np( pthread_self(), name );
|
||||
|
||||
// LTS: this sync stuff should be wrong
|
||||
printf("waiting for sync (%s)\n",name);
|
||||
pthread_mutex_lock(&sync_mutex);
|
||||
printf("Locked sync_mutex, waiting (%s)\n",name);
|
||||
while (sync_var<0)
|
||||
pthread_cond_wait(&sync_cond, &sync_mutex);
|
||||
pthread_mutex_unlock(&sync_mutex);
|
||||
printf("started %s as PID: %ld\n",name, gettid());
|
||||
// LTS: this sync stuff should be wrong
|
||||
printf("waiting for sync (%s)\n",name);
|
||||
pthread_mutex_lock(&sync_mutex);
|
||||
printf("Locked sync_mutex, waiting (%s)\n",name);
|
||||
while (sync_var<0)
|
||||
pthread_cond_wait(&sync_cond, &sync_mutex);
|
||||
pthread_mutex_unlock(&sync_mutex);
|
||||
printf("started %s as PID: %ld\n",name, gettid());
|
||||
}
|
||||
|
||||
void init_UE(int nb_inst)
|
||||
@@ -205,69 +205,69 @@ void init_UE(int nb_inst)
|
||||
* \returns a pointer to an int. The storage is not on the heap and must not be freed.
|
||||
*/
|
||||
static void *UE_thread_synch(void *arg) {
|
||||
static int __thread UE_thread_synch_retval;
|
||||
int i, hw_slot_offset;
|
||||
PHY_VARS_UE *UE = (PHY_VARS_UE*) arg;
|
||||
int current_band = 0;
|
||||
int current_offset = 0;
|
||||
sync_mode_t sync_mode = pbch;
|
||||
int CC_id = UE->CC_id;
|
||||
int freq_offset=0;
|
||||
char threadname[128];
|
||||
static int __thread UE_thread_synch_retval;
|
||||
int i, hw_slot_offset;
|
||||
PHY_VARS_UE *UE = (PHY_VARS_UE*) arg;
|
||||
int current_band = 0;
|
||||
int current_offset = 0;
|
||||
sync_mode_t sync_mode = pbch;
|
||||
int CC_id = UE->CC_id;
|
||||
int freq_offset=0;
|
||||
char threadname[128];
|
||||
|
||||
cpu_set_t cpuset;
|
||||
CPU_ZERO(&cpuset);
|
||||
if ( threads.iq != -1 )
|
||||
CPU_SET(threads.iq, &cpuset);
|
||||
// this thread priority must be lower that the main acquisition thread
|
||||
sprintf(threadname, "sync UE %d\n", UE->Mod_id);
|
||||
init_thread(100000, 500000, FIFO_PRIORITY-1, &cpuset, threadname);
|
||||
cpu_set_t cpuset;
|
||||
CPU_ZERO(&cpuset);
|
||||
if ( threads.iq != -1 )
|
||||
CPU_SET(threads.iq, &cpuset);
|
||||
// this thread priority must be lower that the main acquisition thread
|
||||
sprintf(threadname, "sync UE %d\n", UE->Mod_id);
|
||||
init_thread(100000, 500000, FIFO_PRIORITY-1, &cpuset, threadname);
|
||||
|
||||
UE->is_synchronized = 0;
|
||||
UE->is_synchronized = 0;
|
||||
|
||||
if (UE->UE_scan == 0) {
|
||||
int ind;
|
||||
for ( ind=0;
|
||||
ind < sizeof(eutra_bands) / sizeof(eutra_bands[0]);
|
||||
ind++) {
|
||||
current_band = eutra_bands[ind].band;
|
||||
LOG_D(PHY, "Scanning band %d, dl_min %"PRIu32", ul_min %"PRIu32"\n", current_band, eutra_bands[ind].dl_min,eutra_bands[ind].ul_min);
|
||||
if ( eutra_bands[ind].dl_min <= downlink_frequency[0][0] && eutra_bands[ind].dl_max >= downlink_frequency[0][0] ) {
|
||||
for (i=0; i<4; i++)
|
||||
uplink_frequency_offset[CC_id][i] = eutra_bands[ind].ul_min - eutra_bands[ind].dl_min;
|
||||
break;
|
||||
}
|
||||
}
|
||||
AssertFatal( ind < sizeof(eutra_bands) / sizeof(eutra_bands[0]), "Can't find EUTRA band for frequency");
|
||||
|
||||
LOG_I( PHY, "[SCHED][UE] Check absolute frequency DL %"PRIu32", UL %"PRIu32" (oai_exit %d, rx_num_channels %d)\n",
|
||||
downlink_frequency[0][0], downlink_frequency[0][0]+uplink_frequency_offset[0][0],
|
||||
oai_exit, openair0_cfg[0].rx_num_channels);
|
||||
|
||||
for (i=0; i<openair0_cfg[UE->rf_map.card].rx_num_channels; i++) {
|
||||
openair0_cfg[UE->rf_map.card].rx_freq[UE->rf_map.chain+i] = downlink_frequency[CC_id][i];
|
||||
openair0_cfg[UE->rf_map.card].tx_freq[UE->rf_map.chain+i] =
|
||||
downlink_frequency[CC_id][i]+uplink_frequency_offset[CC_id][i];
|
||||
openair0_cfg[UE->rf_map.card].autocal[UE->rf_map.chain+i] = 1;
|
||||
if (uplink_frequency_offset[CC_id][i] != 0) //
|
||||
openair0_cfg[UE->rf_map.card].duplex_mode = duplex_mode_FDD;
|
||||
else //FDD
|
||||
openair0_cfg[UE->rf_map.card].duplex_mode = duplex_mode_TDD;
|
||||
}
|
||||
sync_mode = pbch;
|
||||
|
||||
} else {
|
||||
current_band=0;
|
||||
for (i=0; i<openair0_cfg[UE->rf_map.card].rx_num_channels; i++) {
|
||||
downlink_frequency[UE->rf_map.card][UE->rf_map.chain+i] = bands_to_scan.band_info[CC_id].dl_min;
|
||||
uplink_frequency_offset[UE->rf_map.card][UE->rf_map.chain+i] =
|
||||
bands_to_scan.band_info[CC_id].ul_min-bands_to_scan.band_info[CC_id].dl_min;
|
||||
openair0_cfg[UE->rf_map.card].rx_freq[UE->rf_map.chain+i] = downlink_frequency[CC_id][i];
|
||||
openair0_cfg[UE->rf_map.card].tx_freq[UE->rf_map.chain+i] =
|
||||
downlink_frequency[CC_id][i]+uplink_frequency_offset[CC_id][i];
|
||||
openair0_cfg[UE->rf_map.card].rx_gain[UE->rf_map.chain+i] = UE->rx_total_gain_dB;
|
||||
}
|
||||
if (UE->UE_scan == 0) {
|
||||
int ind;
|
||||
for ( ind=0;
|
||||
ind < sizeof(eutra_bands) / sizeof(eutra_bands[0]);
|
||||
ind++) {
|
||||
current_band = eutra_bands[ind].band;
|
||||
LOG_D(PHY, "Scanning band %d, dl_min %"PRIu32", ul_min %"PRIu32"\n", current_band, eutra_bands[ind].dl_min,eutra_bands[ind].ul_min);
|
||||
if ( eutra_bands[ind].dl_min <= downlink_frequency[0][0] && eutra_bands[ind].dl_max >= downlink_frequency[0][0] ) {
|
||||
for (i=0; i<4; i++)
|
||||
uplink_frequency_offset[CC_id][i] = eutra_bands[ind].ul_min - eutra_bands[ind].dl_min;
|
||||
break;
|
||||
}
|
||||
}
|
||||
AssertFatal( ind < sizeof(eutra_bands) / sizeof(eutra_bands[0]), "Can't find EUTRA band for frequency");
|
||||
|
||||
LOG_I( PHY, "[SCHED][UE] Check absolute frequency DL %"PRIu32", UL %"PRIu32" (oai_exit %d, rx_num_channels %d)\n",
|
||||
downlink_frequency[0][0], downlink_frequency[0][0]+uplink_frequency_offset[0][0],
|
||||
oai_exit, openair0_cfg[0].rx_num_channels);
|
||||
|
||||
for (i=0; i<openair0_cfg[UE->rf_map.card].rx_num_channels; i++) {
|
||||
openair0_cfg[UE->rf_map.card].rx_freq[UE->rf_map.chain+i] = downlink_frequency[CC_id][i];
|
||||
openair0_cfg[UE->rf_map.card].tx_freq[UE->rf_map.chain+i] =
|
||||
downlink_frequency[CC_id][i]+uplink_frequency_offset[CC_id][i];
|
||||
openair0_cfg[UE->rf_map.card].autocal[UE->rf_map.chain+i] = 1;
|
||||
if (uplink_frequency_offset[CC_id][i] != 0) //
|
||||
openair0_cfg[UE->rf_map.card].duplex_mode = duplex_mode_FDD;
|
||||
else //FDD
|
||||
openair0_cfg[UE->rf_map.card].duplex_mode = duplex_mode_TDD;
|
||||
}
|
||||
sync_mode = pbch;
|
||||
|
||||
} else {
|
||||
current_band=0;
|
||||
for (i=0; i<openair0_cfg[UE->rf_map.card].rx_num_channels; i++) {
|
||||
downlink_frequency[UE->rf_map.card][UE->rf_map.chain+i] = bands_to_scan.band_info[CC_id].dl_min;
|
||||
uplink_frequency_offset[UE->rf_map.card][UE->rf_map.chain+i] =
|
||||
bands_to_scan.band_info[CC_id].ul_min-bands_to_scan.band_info[CC_id].dl_min;
|
||||
openair0_cfg[UE->rf_map.card].rx_freq[UE->rf_map.chain+i] = downlink_frequency[CC_id][i];
|
||||
openair0_cfg[UE->rf_map.card].tx_freq[UE->rf_map.chain+i] =
|
||||
downlink_frequency[CC_id][i]+uplink_frequency_offset[CC_id][i];
|
||||
openair0_cfg[UE->rf_map.card].rx_gain[UE->rf_map.chain+i] = UE->rx_total_gain_dB;
|
||||
}
|
||||
}
|
||||
|
||||
// AssertFatal(UE->rfdevice.trx_start_func(&UE->rfdevice) == 0, "Could not start the device\n");
|
||||
|
||||
@@ -618,9 +618,9 @@ static void *UE_thread_rxn_txnp4(void *arg) {
|
||||
}
|
||||
}
|
||||
|
||||
// thread finished
|
||||
free(arg);
|
||||
return &UE_thread_rxtx_retval;
|
||||
// thread finished
|
||||
free(arg);
|
||||
return &UE_thread_rxtx_retval;
|
||||
}
|
||||
|
||||
/*!
|
||||
@@ -660,10 +660,11 @@ void *UE_thread(void *arg) {
|
||||
pthread_setname_np(pthread_self(), threadname);
|
||||
init_UE_threads(UE);
|
||||
|
||||
|
||||
#ifdef NAS_UE
|
||||
MessageDef *message_p;
|
||||
message_p = itti_alloc_new_message(TASK_NAS_UE, INITIALIZE_MESSAGE);
|
||||
itti_send_msg_to_task (TASK_NAS_UE, UE->Mod_id + NB_eNB_INST, message_p);
|
||||
MessageDef *message_p;
|
||||
message_p = itti_alloc_new_message(TASK_NAS_UE, INITIALIZE_MESSAGE);
|
||||
itti_send_msg_to_task (TASK_NAS_UE, UE->Mod_id + NB_eNB_INST, message_p);
|
||||
#endif
|
||||
|
||||
int sub_frame=-1;
|
||||
@@ -892,6 +893,7 @@ void *UE_thread(void *arg) {
|
||||
* and the locking between them.
|
||||
*/
|
||||
void init_UE_threads(PHY_VARS_UE *UE) {
|
||||
|
||||
struct rx_tx_thread_data *rtd;
|
||||
|
||||
pthread_attr_init (&UE->proc.attr_ue);
|
||||
@@ -927,76 +929,77 @@ void init_UE_threads(PHY_VARS_UE *UE) {
|
||||
|
||||
}
|
||||
pthread_create(&UE->proc.pthread_synch,NULL,UE_thread_synch,(void*)UE);
|
||||
|
||||
}
|
||||
|
||||
|
||||
#ifdef OPENAIR2
|
||||
void fill_ue_band_info(void) {
|
||||
|
||||
UE_EUTRA_Capability_t *UE_EUTRA_Capability = UE_rrc_inst[0].UECap->UE_EUTRA_Capability;
|
||||
int i,j;
|
||||
|
||||
bands_to_scan.nbands = UE_EUTRA_Capability->rf_Parameters.supportedBandListEUTRA.list.count;
|
||||
|
||||
for (i=0; i<bands_to_scan.nbands; i++) {
|
||||
|
||||
for (j=0; j<sizeof (eutra_bands) / sizeof (eutra_bands[0]); j++)
|
||||
if (eutra_bands[j].band == UE_EUTRA_Capability->rf_Parameters.supportedBandListEUTRA.list.array[i]->bandEUTRA) {
|
||||
memcpy(&bands_to_scan.band_info[i],
|
||||
&eutra_bands[j],
|
||||
sizeof(eutra_band_t));
|
||||
|
||||
printf("Band %d (%lu) : DL %u..%u Hz, UL %u..%u Hz, Duplex %s \n",
|
||||
bands_to_scan.band_info[i].band,
|
||||
UE_EUTRA_Capability->rf_Parameters.supportedBandListEUTRA.list.array[i]->bandEUTRA,
|
||||
bands_to_scan.band_info[i].dl_min,
|
||||
bands_to_scan.band_info[i].dl_max,
|
||||
bands_to_scan.band_info[i].ul_min,
|
||||
bands_to_scan.band_info[i].ul_max,
|
||||
(bands_to_scan.band_info[i].frame_type==FDD) ? "FDD" : "TDD");
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
UE_EUTRA_Capability_t *UE_EUTRA_Capability = UE_rrc_inst[0].UECap->UE_EUTRA_Capability;
|
||||
int i,j;
|
||||
|
||||
bands_to_scan.nbands = UE_EUTRA_Capability->rf_Parameters.supportedBandListEUTRA.list.count;
|
||||
|
||||
for (i=0; i<bands_to_scan.nbands; i++) {
|
||||
|
||||
for (j=0; j<sizeof (eutra_bands) / sizeof (eutra_bands[0]); j++)
|
||||
if (eutra_bands[j].band == UE_EUTRA_Capability->rf_Parameters.supportedBandListEUTRA.list.array[i]->bandEUTRA) {
|
||||
memcpy(&bands_to_scan.band_info[i],
|
||||
&eutra_bands[j],
|
||||
sizeof(eutra_band_t));
|
||||
|
||||
printf("Band %d (%lu) : DL %u..%u Hz, UL %u..%u Hz, Duplex %s \n",
|
||||
bands_to_scan.band_info[i].band,
|
||||
UE_EUTRA_Capability->rf_Parameters.supportedBandListEUTRA.list.array[i]->bandEUTRA,
|
||||
bands_to_scan.band_info[i].dl_min,
|
||||
bands_to_scan.band_info[i].dl_max,
|
||||
bands_to_scan.band_info[i].ul_min,
|
||||
bands_to_scan.band_info[i].ul_max,
|
||||
(bands_to_scan.band_info[i].frame_type==FDD) ? "FDD" : "TDD");
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
int setup_ue_buffers(PHY_VARS_UE **phy_vars_ue, openair0_config_t *openair0_cfg) {
|
||||
|
||||
int i, CC_id;
|
||||
LTE_DL_FRAME_PARMS *frame_parms;
|
||||
openair0_rf_map *rf_map;
|
||||
|
||||
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
||||
rf_map = &phy_vars_ue[CC_id]->rf_map;
|
||||
|
||||
AssertFatal( phy_vars_ue[CC_id] !=0, "");
|
||||
frame_parms = &(phy_vars_ue[CC_id]->frame_parms);
|
||||
|
||||
// replace RX signal buffers with mmaped HW versions
|
||||
rxdata = (int32_t**)malloc16( frame_parms->nb_antennas_rx*sizeof(int32_t*) );
|
||||
txdata = (int32_t**)malloc16( frame_parms->nb_antennas_tx*sizeof(int32_t*) );
|
||||
|
||||
int i, CC_id;
|
||||
LTE_DL_FRAME_PARMS *frame_parms;
|
||||
openair0_rf_map *rf_map;
|
||||
|
||||
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
||||
rf_map = &phy_vars_ue[CC_id]->rf_map;
|
||||
|
||||
AssertFatal( phy_vars_ue[CC_id] !=0, "");
|
||||
frame_parms = &(phy_vars_ue[CC_id]->frame_parms);
|
||||
|
||||
// replace RX signal buffers with mmaped HW versions
|
||||
rxdata = (int32_t**)malloc16( frame_parms->nb_antennas_rx*sizeof(int32_t*) );
|
||||
txdata = (int32_t**)malloc16( frame_parms->nb_antennas_tx*sizeof(int32_t*) );
|
||||
|
||||
for (i=0; i<frame_parms->nb_antennas_rx; i++) {
|
||||
LOG_I(PHY, "Mapping UE CC_id %d, rx_ant %d, freq %u on card %d, chain %d\n",
|
||||
CC_id, i, downlink_frequency[CC_id][i], rf_map->card, rf_map->chain+i );
|
||||
free( phy_vars_ue[CC_id]->common_vars.rxdata[i] );
|
||||
rxdata[i] = (int32_t*)malloc16_clear( 307200*sizeof(int32_t) );
|
||||
phy_vars_ue[CC_id]->common_vars.rxdata[i] = rxdata[i]; // what about the "-N_TA_offset" ? // N_TA offset for TDD
|
||||
}
|
||||
|
||||
for (i=0; i<frame_parms->nb_antennas_tx; i++) {
|
||||
LOG_I(PHY, "Mapping UE CC_id %d, tx_ant %d, freq %u on card %d, chain %d\n",
|
||||
CC_id, i, downlink_frequency[CC_id][i], rf_map->card, rf_map->chain+i );
|
||||
free( phy_vars_ue[CC_id]->common_vars.txdata[i] );
|
||||
txdata[i] = (int32_t*)malloc16_clear( 307200*sizeof(int32_t) );
|
||||
phy_vars_ue[CC_id]->common_vars.txdata[i] = txdata[i];
|
||||
}
|
||||
|
||||
// rxdata[x] points now to the same memory region as phy_vars_ue[CC_id]->common_vars.rxdata[x]
|
||||
// txdata[x] points now to the same memory region as phy_vars_ue[CC_id]->common_vars.txdata[x]
|
||||
// be careful when releasing memory!
|
||||
// because no "release_ue_buffers"-function is available, at least rxdata and txdata memory will leak (only some bytes)
|
||||
for (i=0; i<frame_parms->nb_antennas_rx; i++) {
|
||||
LOG_I(PHY, "Mapping UE CC_id %d, rx_ant %d, freq %u on card %d, chain %d\n",
|
||||
CC_id, i, downlink_frequency[CC_id][i], rf_map->card, rf_map->chain+i );
|
||||
free( phy_vars_ue[CC_id]->common_vars.rxdata[i] );
|
||||
rxdata[i] = (int32_t*)malloc16_clear( 307200*sizeof(int32_t) );
|
||||
phy_vars_ue[CC_id]->common_vars.rxdata[i] = rxdata[i]; // what about the "-N_TA_offset" ? // N_TA offset for TDD
|
||||
}
|
||||
return 0;
|
||||
|
||||
for (i=0; i<frame_parms->nb_antennas_tx; i++) {
|
||||
LOG_I(PHY, "Mapping UE CC_id %d, tx_ant %d, freq %u on card %d, chain %d\n",
|
||||
CC_id, i, downlink_frequency[CC_id][i], rf_map->card, rf_map->chain+i );
|
||||
free( phy_vars_ue[CC_id]->common_vars.txdata[i] );
|
||||
txdata[i] = (int32_t*)malloc16_clear( 307200*sizeof(int32_t) );
|
||||
phy_vars_ue[CC_id]->common_vars.txdata[i] = txdata[i];
|
||||
}
|
||||
|
||||
// rxdata[x] points now to the same memory region as phy_vars_ue[CC_id]->common_vars.rxdata[x]
|
||||
// txdata[x] points now to the same memory region as phy_vars_ue[CC_id]->common_vars.txdata[x]
|
||||
// be careful when releasing memory!
|
||||
// because no "release_ue_buffers"-function is available, at least rxdata and txdata memory will leak (only some bytes)
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
Reference in New Issue
Block a user