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- make internal links relative where applicable - delete link to the wiki, as the documentation is in the main repo, not the wiki - remove some "example in oai code" as the examples either don't exist, or are not in that place, and we can reasonably expect people to grep Signed-off-by: Robert Schmidt <robert.schmidt@openairinterface.org>
333 lines
12 KiB
Markdown
333 lines
12 KiB
Markdown
<!-- SPDX-License-Identifier: CC-BY-4.0 -->
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# OAI LDPC offload (O-RAN AAL/DPDK BBDEV)
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**Table of Contents**
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[[_TOC_]]
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This documentation describes the integration of LDPC coding for lookaside acceleration using O-RAN AAL/DPDK BBDEV in OAI, along with its usage.
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For details on the implementation, please consult the [developer notes](../openair1/PHY/CODING/nrLDPC_coding/nrLDPC_coding_aal/README.md).
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## Requirements
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In principle, any lookaside LDPC accelerator supporting the O-RAN AAL/DPDK BBDEV should work.
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However, the current implementation has only been validated for the Xilinx T2, Intel ACC100, and Intel ACC200 (VRB1).
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Therefore, your mileage may vary when using other BBDEV devices as there may be some hardware-specific changes required -- contributions are welcome!
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### DPDK Version Requirements
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The following DPDK versions are supported:
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- For the Xilinx T2 card, DPDK20.11+ is supported.
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- As for the Intel ACC100/ACC200, only DPDK22.11+ is supported.
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### Tested Devices/ DPDK versions
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#### Xilinx T2
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- DPDK20.11.9*.
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- DPDK22.11.7*.
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> Note: FPGA bitstream image and the corresponding patch file (e.g., `ACCL_BBDEV_DPDK20.11.3_ldpc_3.1.918.patch` for DPDK20.11) from Accelercomm required.
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#### Intel ACC100
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- DPDK22.11.7*.
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- DPDK23.11.3*.
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- DPDK24.11.2.
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> Note: [Patch]((https://github.com/DPDK/dpdk/commit/fdde63a1dfc129d0a510a831aa98253b36a2a1cd)) required for pre-DPDK24.11 versions when using the Intel ACC100.
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#### Intel ACC200 (also known as VRB1)
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- DPDK22.11.7.
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- DPDK23.11.3.
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- DPDK24.11.2.
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## System Setup
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### DPDK installation
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> Important:
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> - If you are using the Xilinx T2 card, you will need to apply the vendor-supplied patches before compiling DPDK.
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> - If you are using the Intel ACC100, you will need to [patch](https://github.com/DPDK/dpdk/commit/fdde63a1dfc129d0a510a831aa98253b36a2a1cd) the ACC100's driver if you are using DPDK22.11 or DPDK23.11.
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Refer to the guide [here](./ORAN_FHI7.2_Tutorial.md?ref_type=heads#dpdk-data-plane-development-kit) to install, and then validate your DPDK installation.
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<details open>
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<summary> Notes on DPDK patching/installation for Xilinx T2. </summary>
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*Note: The following instructions apply to `ACCL_BBDEV_DPDK20.11.3_ldpc_3.1.918.patch`, compatible with DPDK 20.11.9. For older patches (e.g., `ACL_BBDEV_DPDK20.11.3_BL_1006_build_1105_dev_branch_MCT_optimisations_1106_physical_std.patch`), refer to the T2 documentation in `2023.w48`.*
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```bash
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# Get DPDK source code
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git clone https://github.com/DPDK/dpdk-stable.git ~/dpdk-stable
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cd ~/dpdk-stable
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git checkout v20.11.9
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git apply ~/ACL_BBDEV_DPDK20.11.3_ldpc_3.1.918.patch
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```
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Replace `~/ACL_BBDEV_DPDK20.11.3_ldpc_3.1.918.patch` by patch file provided by
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Accelercomm.
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If you would like to install DPDK to a custom directory, here is an example.
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```bash
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cd ~/dpdk-stable
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# meson setup build
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meson setup --prefix=/opt/dpdk-t2 build # for installation with non-default installation prefix
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cd build
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ninja
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sudo ninja install
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sudo ldconfig
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```
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</details>
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### System configuration
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#### Setting up Hugepages
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First, we must setup hugepages on the system.
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In our setup, we setup 16 of the 1G hugepages.
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Apart from 1G, 2MB hugepages works too, but make sure to allocate a sufficient number of them.
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```
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# sudo dpdk-hugepages.py -p 1G --setup 16G
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```
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#### Locating the Accelerator
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Next, we check whether our system can detect our accelerator using `dpdk-devbind.py`.
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You should see Baseband devices detected by DPDK, as follows:
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```
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# sudo dpdk-devbind.py -s
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...
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Baseband devices using DPDK-compatible driver
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=============================================
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0000:f7:00.0 'Device 57c0' unused=vfio-pci
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...
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```
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As you can see here, our Intel ACC200 has the address of `0000:f7:00.0`.
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Depending on the accelerator you are using, the address may vary.
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#### Loading VFIO-PCI and enabling SR-IOV
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Following, make sure to load the `vfio-pci` kernel modules and ensure that SR-IOV is enabled.
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```
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# sudo modprobe vfio-pci enable_sriov=1 disable_idle_d3=1
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```
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#### Binding the Accelerator with `vfio-pci`
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Lastly, we bind our accelerator with the `vfio-pci` driver.
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```
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# sudo dpdk-devbind.py --bind=vfio-pci 0000:f7:00.0
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```
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> Note: For the Xilinx T2, we can use this device directly.
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If you use an Intel vRAN accelerator, read on.
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#### Additional Steps for Intel vRAN Accelerators
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> IMPORTANT NOTE:
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> - Currently, we only support using the Virtual Functions (VFs) of the Intel vRAN accelerators, but not the Physical Function (PF).
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> - One key advantage of using VFs is that this allows us to share the accelerator with other DU instances on the same machine, which is common in practice.
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If you are using an Intel vRAN accelerator, you will need to use the [pf_bb_config](https://github.com/intel/pf-bb-config) tool to configure the accelerator beforehand.
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##### pf_bb_config
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For more details, please consult the `pf_bb_config` README.
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```
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# git clone https://github.com/intel/pf-bb-config
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# cd ~/pf-bb-config
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# ./build.sh
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```
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This clones and builds the `pf_bb_config` binary.
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Next, we show an example for the Intel ACC200.
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We use an existing configuration located at `./vrb1/vrb1_config_16vf.cfg`.
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Here, it is necessary to specify a VFIO token (in this case, we use the UUID `00112233-4455-6677-8899-aabbccddeeff`).
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Note that in practice, a random UUID should be used.
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```
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# sudo ./pf_bb_config VRB1 -v 00112233-4455-6677-8899-aabbccddeeff -c vrb1/vrb1_config_16vf.cfg
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== pf_bb_config Version v25.01-0-g812e032 ==
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VRB1 PF [0000:f7:00.0] configuration complete!
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Log file = /var/log/pf_bb_cfg_0000:f7:00.0.log
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```
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##### Creating VFs
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Finally, we create the VF(s) for our accelerator.
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In this example, we only create one SR-IOV VF.
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```
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# echo 1 | sudo tee /sys/bus/pci/devices/0000:f7:00.0/sriov_numvfs
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```
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If you encounter any error when creating the VF(s), e.g., `tee: '/sys/bus/pci/devices/0000:f7:00.0/sriov_numvfs': No such file or directory`, then try enabling SR-IOV again.
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```
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# echo 1 | sudo tee /sys/module/vfio_pci/parameters/enable_sriov
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```
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After you have successfully created the VF, you should see an additional baseband device, in our case, it is `0000:f7:00.1`.
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We will use this device with OAI later.
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The newly created VF should also be using the same `vfio-pci` driver as the PF, if it is not, you will need to do a `dpdk-devbind.py` to bind it with `vfio-pci`.
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```
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# sudo dpdk-devbind.py -s
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...
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Baseband devices using DPDK-compatible driver
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=============================================
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0000:f7:00.0 'Device 57c0' drv=vfio-pci unused=
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0000:f7:00.1 'Device 57c0' drv=vfio-pci unused=
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...
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```
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## Building OAI with ORAN-AAL
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OTA deployment is precisely described in the following tutorial:
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- [NR_SA_Tutorial_COTS_UE](./NR_SA_Tutorial_COTS_UE.md)
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Instead of section *3.2 Build OAI gNB* from the tutorial, run the following commands:
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```bash
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# Get openairinterface5g source code
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git clone https://github.com/duranta-project/openairinterface5g.git ~/openairinterface5g
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cd ~/openairinterface5g
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git checkout develop
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# Install OAI dependencies
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cd ~/openairinterface5g/cmake_targets
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./build_oai -I
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# Build OAI gNB
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cd ~/openairinterface5g
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source oaienv
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cd cmake_targets
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./build_oai -w USRP --ninja --gNB -P --build-lib "ldpc_aal" -C
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```
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A shared object file `libldpc_aal.so` will be created during the compilation.
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This object is conditionally compiled.
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The selection of the library to compile is done using `--build-lib ldpc_aal`.
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> Note: The required DPDK poll mode driver has to be present on the host machine and required DPDK version has to be installed on the host, prior to building OAI.
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## O-RAN AAL DPDK EAL parameters
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To configure O-RAN AAL/DPDK BBDEV, you can set the following parameters via the command line of PHY simulators or nr-softmodem:
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> Note: the group parameter name has been renamed from `nrLDPC_coding_t2` to
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> `nrLDPC_coding_aal` to better reflect that it is a generic AAL accelerator
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> card.
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- `nrLDPC_coding_aal.dpdk_dev` - **mandatory** parameter, specifies the PCI address of our accelerator. It must follow the format `WWWW:XX:YY.Z`.
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- `nrLDPC_coding_aal.dpdk_core_list` - **mandatory** parameter, specifies the CPU cores assigned to DPDK .
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Ensure that the CPU cores specified in `nrLDPC_coding_aal.dpdk_core_list` are available and not used by other processes to avoid conflicts.
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- `nrLDPC_coding_aal.dpdk_prefix` - optional parameter, DPDK shared data file prefix, by default set to *b6*.
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- `nrLDPC_coding_aal.vfio_vf_token` - optional parameter, VFIO token set for the VF, if applicable.
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- `nrLDPC_coding_aal.num_harq_codeblock` - optional parameter, size of the HARQ buffer in terms of the number of 32kB blocks, by default set to *512* (maximum for the T2; as for the ACCs, this can be further increased).
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- `nrLDPC_coding_aal.is_t2` - optional parameter, set this to 1 when using the Xilinx T2 card.
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**Note:** These parameters can also be provided in a configuration file.
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Example for the ACC200:
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```
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nrLDPC_coding_aal : {
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dpdk_dev : "0000:f7:00.1";
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dpdk_core_list : "14-15";
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vfio_vf_token: "00112233-4455-6677-8899-aabbccddeeff";
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};
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loader : {
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ldpc : {
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shlibversion : "_aal";
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};
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};
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```
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## Running OAI with O-RAN AAL
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In general, to offload of the channel coding to the LDPC accelerator, we use use the `--loader.ldpc.shlibversion _aal` option.
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Reminder, if you are using the Xilinx T2 card, make sure to set `--nrLDPC_coding_aal.is_t2 1`.
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### 5G PHY simulators
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#### nr_ulsim
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Example command:
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```bash
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cd ~/openairinterface5g
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source oaienv
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cd cmake_targets/ran_build/build
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sudo ./nr_ulsim -n100 -s20 -m20 -r273 -R273 --loader.ldpc.shlibversion _aal --nrLDPC_coding_aal.dpdk_dev 0000:f7:00.1 --nrLDPC_coding_aal.dpdk_core_list 0-1 --nrLDPC_coding_aal.vfio_vf_token 00112233-4455-6677-8899-aabbccddeeff
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```
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#### nr_dlsim
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Example command:
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```bash
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cd ~/openairinterface5g
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source oaienv
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cd cmake_targets/ran_build/build
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sudo ./nr_dlsim -n300 -s30 -R 106 -e 27 --loader.ldpc.shlibversion _aal --nrLDPC_coding_aal.dpdk_dev 0000:f7:00.1 --nrLDPC_coding_aal.dpdk_core_list 0-1 --nrLDPC_coding_aal.vfio_vf_token 00112233-4455-6677-8899-aabbccddeeff
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```
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### OTA test
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#### Running OAI gNB with USRP B210/FHI72
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When running the gNB **with FHI 7.2**, it is not necessary to provide the `--nrLDPC_coding_aal.dpdk_core_list` argument
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since the core list specified for FHI 7.2 will be used for DPDK.
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If it is provided, the AAL core list wil be ignored.
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Example command:
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```bash
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cd ~/openairinterface5g
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source oaienv
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cd cmake_targets/ran_build/build
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sudo ./nr-softmodem -O ~/gnb.conf --loader.ldpc.shlibversion _aal --nrLDPC_coding_aal.dpdk_dev 0000:f7:00.1 --nrLDPC_coding_aal.dpdk_core_list 14-15 --nrLDPC_coding_aal.vfio_vf_token 00112233-4455-6677-8899-aabbccddeeff
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```
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## Known Issue(s)
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### Potential Low Throughput
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The current implementation has been tested to work in an end-to-end setup and is functional.
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However, depending on the accelerator in use,
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there are still opportunities for optimization, particularly in LDPC decoding performance, which is an area of ongoing improvement.
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As such, downlink/uplink throughput may be suboptimal with the default configurations, but enhancements are actively being explored.
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For example, to achieve better E2E performance with the current implementation with Intel ACC 100 and 200 (vRAN Boost),
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we recommend the following adjustments:
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1. Increasing the number of LDPC decoding iterations of the L1, e.g., `max_ldpc_iterations` to 200.
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2. Increasing the BLER targets of the MAC scheduler.
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Example configuration snippet:
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```
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...
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MACRLCs = (
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{
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tr_s_preference = "local_L1";
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tr_n_preference = "local_RRC";
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pusch_TargetSNRx10 = 180;
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pucch_TargetSNRx10 = 220;
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dl_bler_target_upper = .35;
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dl_bler_target_lower = .15;
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ul_bler_target_upper = .35;
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ul_bler_target_lower = .15;
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pusch_FailureThres = 1000;
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ul_max_mcs = 28;
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}
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);
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L1s = (
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{
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tr_n_preference = "local_mac";
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prach_dtx_threshold = 120;
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pucch0_dtx_threshold = 100;
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ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0
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max_ldpc_iterations = 200;
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}
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);
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...
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```
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