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22 Commits

Author SHA1 Message Date
Raymond Knopp
f78c1fb4d8 Merge branch 'phr_handling_for_develop' into rk_integration 2024-01-31 16:25:42 +01:00
Raymond Knopp
6b56104054 Merge branch 'phr_handling_for_develop' of https://gitlab.eurecom.fr/oai/openairinterface5g into phr_handling_for_develop 2024-01-30 11:35:09 +01:00
Raymond Knopp
0861c315d2 addition of control of deltaMCS from configuration file. This was
ommitted when bringing the changes in from PHR_handling branch.
2024-01-30 11:28:17 +01:00
Raymond Knopp
d3fe2e6460 power control changes for deltaMCS mode. 2024-01-30 11:08:50 +01:00
Raymond Knopp
34937cce73 power control changes for deltaMCS mode. 2024-01-28 23:24:46 +01:00
Raymond Knopp
c5909cf64c this limits PUCCH payload to 11 bits, 7 CSI + 3 ACKNACK + 1 SR maximum. 2024-01-24 22:06:12 +01:00
Robert Schmidt
9127b83b3b REVIEW: changement bizarre 2024-01-22 13:22:10 +01:00
Raymond Knopp
8f0b76da19 rollback to 10ms updates during freerun period of rf simulator 2024-01-22 13:22:10 +01:00
Raymond Knopp
02e36aa56e synchronization of RU and L1 threads to avoid race condition with
rfsimulator
2024-01-22 13:22:10 +01:00
Raymond Knopp
434da2b513 removed LOG_W when freeing unused ULSCH resources (for CI) 2024-01-22 13:22:10 +01:00
Raymond Knopp
79876cb1e9 fixes for phy/mac interface for L1_tx_thread 2024-01-22 13:22:10 +01:00
Raymond Knopp
ab057d9edd remove LOG_I in tx_func() 2024-01-22 13:22:10 +01:00
Robert Schmidt
c1a054e96d Trigger RX processing after scheduler has been triggered
The scheduler prepares PRACH/PUSCH/PUCCH FAPI PDUs. As of this commit,
the scheduler runs in the TX processing chain, whereas these PDUs are
destined for RX processing.

To avoid data races, instead of triggering the RX processing at the same
time as TX processing in the RU thread, this commit changes the code to
trigger RX processing after the scheduler has been run in TX processing
to avoid data races.
2024-01-22 13:22:10 +01:00
Robert Schmidt
e216f2ef47 Handle case that pullNotifiedFIFO() returns NULL 2024-01-22 13:22:10 +01:00
Robert Schmidt
6a0172f630 Remove dead code 2024-01-22 13:22:10 +01:00
Raphael Defosseux
71dc80e7cd fix(sched-nr): removed unused variables
Signed-off-by: Raphael Defosseux <raphael.defosseux@eurecom.fr>
2024-01-22 13:22:10 +01:00
Robert Schmidt
703a700a37 Only call UL indication (for scheduler) in UL slots
The UL indication previously (until HEAD^^^) triggered the DL
scheduler -- hence, it had to be called in every slot. Now, the DL
scheduler is moved out into the DL thread. We therefore don't have to
call the scheduler in every slot anymore.
2024-01-22 13:22:10 +01:00
Robert Schmidt
23f64dcde2 Remove unused UL_INFO_mutex
The UL_INFO_mutex is used in only one place, and therefore useless.
Also, the scheduler uses a lock internally to prevent concurrent access.
Hence, the UL_INFO_mutex is not needed.
2024-01-22 13:22:10 +01:00
Raymond Knopp
6f99087450 Introduce separate thread to handle gNB TX processing
This commit introduces a separate thread (l1_tx_thread) that processes
gNB DL/TX slots. It receives a message from the ru_thread when a new
slot started, and starts processing.

The DL scheduler part is now split from the UL indication. It is
executed in l1_tx_thread, and thereby also decoupled from the UL
indication part, which is executed in the RX chain. The UL indication
for the UL part remains.

The reorder thread is removed, as reordering with this scheme is
not necessary anymore.

The main advantage of this version is that the TX can be scheduled
earlier (sl_ahead). Further, there can no longer be race conditions in
the TX path, since the scheduler/L2, TX L1 processing and the RU tx
function are all execute in the same thread (L1_tX_thread).

Co-authored-by: kiran <saikiran@iitj.ac.in>
2024-01-22 13:22:10 +01:00
Raymond Knopp
08bf9d1b0c Update sample config gnb.sa.band41.fr1.106PRB.usrpb210.conf 2024-01-22 13:22:10 +01:00
Raymond Knopp
297ccb6551 Update logs to NR_ version and add some new 2024-01-22 13:22:10 +01:00
Raymond Knopp
29bab525e1 Remove commented code 2024-01-22 13:22:10 +01:00
34 changed files with 414 additions and 443 deletions

View File

@@ -52,6 +52,8 @@
#include "PHY/MODULATION/nr_modulation.h"
#include "PHY/NR_TRANSPORT/nr_dlsch.h"
#include "openair2/NR_PHY_INTERFACE/nr_sched_response.h"
#include "LAYER2/NR_MAC_COMMON/nr_mac_extern.h"
#include "LAYER2/NR_MAC_gNB/mac_proto.h"
#undef MALLOC //there are two conflicting definitions, so we better make sure we don't use it at all
//#undef FRAME_LENGTH_COMPLEX_SAMPLES //there are two conflicting definitions, so we better make sure we don't use it at all
@@ -110,41 +112,67 @@ time_stats_t softmodem_stats_rx_sf; // total rx time
#define L1STATSSTRLEN 16384
void tx_func(void *param)
static void tx_func(void *param)
{
processingData_L1tx_t *info = (processingData_L1tx_t *) param;
PHY_VARS_gNB *gNB = info->gNB;
int frame_tx = info->frame;
int slot_tx = info->slot;
int cumul_samples = gNB->frame_parms.get_samples_per_slot(0, &gNB->frame_parms);
int i = 1;
for (; i < gNB->frame_parms.slots_per_subframe / 2; i++)
cumul_samples += gNB->frame_parms.get_samples_per_slot(i, &gNB->frame_parms);
int samples = cumul_samples / i;
int absslot_tx = info->timestamp_tx / samples;
int absslot_rx = absslot_tx - gNB->RU_list[0]->sl_ahead;
int frame_rx = info->frame_rx;
int slot_rx = info->slot_rx;
int absslot_tx = info->timestamp_tx / info->gNB->frame_parms.get_samples_per_slot(slot_tx, &info->gNB->frame_parms);
int absslot_rx = absslot_tx - info->gNB->RU_list[0]->sl_ahead;
int rt_prof_idx = absslot_rx % RT_PROF_DEPTH;
start_meas(&gNB->phy_proc_tx);
clock_gettime(CLOCK_MONOTONIC, &gNB->rt_L1_profiling.start_L1_TX[rt_prof_idx]);
phy_procedures_gNB_TX(info,
frame_tx,
slot_tx,
1);
clock_gettime(CLOCK_MONOTONIC, &gNB->rt_L1_profiling.return_L1_TX[rt_prof_idx]);
LOG_D(NR_PHY, "%d.%d running tx_func\n", frame_tx, slot_tx);
PHY_VARS_gNB *gNB = info->gNB;
module_id_t module_id = gNB->Mod_id;
uint8_t CC_id = gNB->CC_id;
NR_IF_Module_t *ifi = gNB->if_inst;
nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
if (get_softmodem_params()->reorder_thread_disable) {
processingData_RU_t syncMsgRU;
syncMsgRU.frame_tx = frame_tx;
syncMsgRU.slot_tx = slot_tx;
syncMsgRU.ru = gNB->RU_list[0];
syncMsgRU.timestamp_tx = info->timestamp_tx;
LOG_D(PHY,"gNB: %d.%d : calling RU TX function\n",syncMsgRU.frame_tx,syncMsgRU.slot_tx);
ru_tx_func((void*)&syncMsgRU);
T(T_GNB_PHY_DL_TICK, T_INT(gNB->Mod_id), T_INT(frame_tx), T_INT(slot_tx));
reset_active_stats(gNB, frame_rx);
reset_active_ulsch(gNB, frame_rx);
if (1) {
ifi->NR_mac_scheduler(module_id, CC_id, frame_tx, slot_tx);
gNB->msgDataTx->timestamp_tx = info->timestamp_tx;
info = gNB->msgDataTx;
info->gNB = gNB;
// At this point, MAC scheduler just ran, including scheduling
// PRACH/PUCCH/PUSCH, so trigger RX chain processing
LOG_D(NR_PHY, "%s() trigger RX for %d.%d\n", __func__,frame_rx,slot_rx);
notifiedFIFO_elt_t *res = newNotifiedFIFO_elt(sizeof(processingData_L1_t), 0, &gNB->resp_L1, NULL);
processingData_L1_t *syncMsg = NotifiedFifoData(res);
syncMsg->gNB = gNB;
syncMsg->frame_rx = frame_rx;
syncMsg->slot_rx = slot_rx;
syncMsg->timestamp_tx = info->timestamp_tx;
res->key = slot_rx;
pushNotifiedFIFO(&gNB->resp_L1, res);
int tx_slot_type = nr_slot_select(cfg, frame_tx, slot_tx);
if ((tx_slot_type == NR_DOWNLINK_SLOT || tx_slot_type == NR_MIXED_SLOT) && NFAPI_MODE != NFAPI_MODE_PNF) {
start_meas(&info->gNB->phy_proc_tx);
phy_procedures_gNB_TX(info, frame_tx, slot_tx, 1);
clock_gettime(CLOCK_MONOTONIC, &info->gNB->rt_L1_profiling.return_L1_TX[rt_prof_idx]);
PHY_VARS_gNB *gNB = info->gNB;
processingData_RU_t syncMsgRU;
syncMsgRU.frame_tx = frame_tx;
syncMsgRU.slot_tx = slot_tx;
syncMsgRU.ru = gNB->RU_list[0];
syncMsgRU.timestamp_tx = info->timestamp_tx;
LOG_D(PHY, "gNB: %d.%d : calling RU TX function\n", syncMsgRU.frame_tx, syncMsgRU.slot_tx);
ru_tx_func((void *)&syncMsgRU);
}
/* this thread is done with the sched_info, decrease the reference counter */
LOG_D(NR_PHY, "Calling deref_sched_response for id %d (tx_func) in %d.%d\n", info->sched_response_id, frame_tx, slot_tx);
deref_sched_response(info->sched_response_id);
}
/* this thread is done with the sched_info, decrease the reference counter */
deref_sched_response(info->sched_response_id);
stop_meas(&gNB->phy_proc_tx);
}
@@ -154,7 +182,7 @@ void *L1_rx_thread(void *arg)
while (oai_exit == 0) {
notifiedFIFO_elt_t *res = pullNotifiedFIFO(&gNB->resp_L1);
if (res == NULL)
if (res == NULL) // stopping condition, happens only when queue is freed
break;
processingData_L1_t *info = (processingData_L1_t *)NotifiedFifoData(res);
rx_func(info);
@@ -162,27 +190,27 @@ void *L1_rx_thread(void *arg)
}
return NULL;
}
/* to be added for URLLC, requires MAC scheduling to be split from UL indication
// Added for URLLC, requires MAC scheduling to be split from UL indication
void *L1_tx_thread(void *arg) {
PHY_VARS_gNB *gNB = (PHY_VARS_gNB*)arg;
while (oai_exit == 0) {
notifiedFIFO_elt_t *res = pullNotifiedFIFO(&gNB->L1_tx_out);
if (res == NULL) // stopping condition, happens only when queue is freed
break;
processingData_L1tx_t *info = (processingData_L1tx_t *)NotifiedFifoData(res);
tx_func(info);
delNotifiedFIFO_elt(res);
}
return NULL;
}
*/
void rx_func(void *param)
{
processingData_L1_t *info = (processingData_L1_t *) param;
PHY_VARS_gNB *gNB = info->gNB;
int frame_rx = info->frame_rx;
int slot_rx = info->slot_rx;
int frame_tx = info->frame_tx;
int slot_tx = info->slot_tx;
nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
int cumul_samples = gNB->frame_parms.get_samples_per_slot(0, &gNB->frame_parms);
int i = 1;
@@ -204,32 +232,15 @@ void rx_func(void *param)
handle_nr_slot_ind(frame_rx, slot_rx);
stop_meas(&nfapi_meas);
/*if (gNB->UL_INFO.rx_ind.rx_indication_body.number_of_pdus||
gNB->UL_INFO.harq_ind.harq_indication_body.number_of_harqs ||
gNB->UL_INFO.crc_ind.crc_indication_body.number_of_crcs ||
gNB->UL_INFO.rach_ind.number_of_pdus ||
gNB->UL_INFO.cqi_ind.number_of_cqis
) {
LOG_D(PHY, "UL_info[rx_ind:%05d:%d harqs:%05d:%d crcs:%05d:%d rach_pdus:%0d.%d:%d cqis:%d] RX:%04d%d TX:%04d%d \n",
NFAPI_SFNSF2DEC(gNB->UL_INFO.rx_ind.sfn_sf), gNB->UL_INFO.rx_ind.rx_indication_body.number_of_pdus,
NFAPI_SFNSF2DEC(gNB->UL_INFO.harq_ind.sfn_sf), gNB->UL_INFO.harq_ind.harq_indication_body.number_of_harqs,
NFAPI_SFNSF2DEC(gNB->UL_INFO.crc_ind.sfn_sf), gNB->UL_INFO.crc_ind.crc_indication_body.number_of_crcs,
gNB->UL_INFO.rach_ind.sfn, gNB->UL_INFO.rach_ind.slot,gNB->UL_INFO.rach_ind.number_of_pdus,
gNB->UL_INFO.cqi_ind.number_of_cqis,
frame_rx, slot_rx,
frame_tx, slot_tx);
}*/
}
// ****************************************
T(T_GNB_PHY_DL_TICK, T_INT(gNB->Mod_id), T_INT(frame_tx), T_INT(slot_tx));
reset_active_stats(gNB, frame_tx);
reset_active_ulsch(gNB, frame_tx);
// RX processing
int rx_slot_type = nr_slot_select(cfg, frame_rx, slot_rx);
if (rx_slot_type == NR_UPLINK_SLOT || rx_slot_type == NR_MIXED_SLOT) {
LOG_D(NR_PHY,"%d.%d Starting RX processing\n",frame_rx,slot_rx);
// UE-specific RX processing for subframe n
// TODO: check if this is correct for PARALLEL_RU_L1_TRX_SPLIT
@@ -252,98 +263,30 @@ void rx_func(void *param)
}
}
phy_procedures_gNB_uespec_RX(gNB, frame_rx, slot_rx);
// Call the scheduler
start_meas(&gNB->ul_indication_stats);
gNB->UL_INFO.frame = frame_rx;
gNB->UL_INFO.slot = slot_rx;
gNB->UL_INFO.module_id = gNB->Mod_id;
gNB->UL_INFO.CC_id = gNB->CC_id;
gNB->if_inst->NR_UL_indication(&gNB->UL_INFO);
stop_meas(&gNB->ul_indication_stats);
notifiedFIFO_elt_t *res = newNotifiedFIFO_elt(sizeof(processingData_L1_t), 0, &gNB->L1_rx_out, NULL);
processingData_L1_t *syncMsg = NotifiedFifoData(res);
syncMsg->gNB = gNB;
syncMsg->frame_rx = frame_rx;
syncMsg->slot_rx = slot_rx;
res->key = slot_rx;
LOG_D(NR_PHY,"Signaling completion for %d.%d (mod_slot %d) on L1_rx_out\n",frame_rx,slot_rx,slot_rx % RU_RX_SLOT_DEPTH);
pushNotifiedFIFO(&gNB->L1_rx_out, res);
}
stop_meas( &softmodem_stats_rxtx_sf );
LOG_D(PHY,"%s() Exit proc[rx:%d%d tx:%d%d]\n", __FUNCTION__, frame_rx, slot_rx, frame_tx, slot_tx);
clock_gettime(CLOCK_MONOTONIC,&info->gNB->rt_L1_profiling.return_L1_RX[rt_prof_idx]);
// Call the scheduler
start_meas(&gNB->ul_indication_stats);
// pthread_mutex_lock(&gNB->UL_INFO_mutex);
gNB->UL_INFO.frame = frame_rx;
gNB->UL_INFO.slot = slot_rx;
gNB->UL_INFO.module_id = gNB->Mod_id;
gNB->UL_INFO.CC_id = gNB->CC_id;
gNB->if_inst->NR_UL_indication(&gNB->UL_INFO);
// pthread_mutex_unlock(&gNB->UL_INFO_mutex);
stop_meas(&gNB->ul_indication_stats);
int tx_slot_type = nr_slot_select(cfg,frame_tx,slot_tx);
if ((tx_slot_type == NR_DOWNLINK_SLOT || tx_slot_type == NR_MIXED_SLOT) && NFAPI_MODE != NFAPI_MODE_PNF) {
notifiedFIFO_elt_t *res;
processingData_L1tx_t *syncMsg;
// Its a FIFO so it maitains the order in which the MAC fills the messages
// so no need for checking for right slot
if (get_softmodem_params()->reorder_thread_disable) {
// call the TX function directly from this thread
syncMsg = gNB->msgDataTx;
syncMsg->gNB = gNB;
syncMsg->timestamp_tx = info->timestamp_tx;
tx_func(syncMsg);
} else {
res = pullTpool(&gNB->L1_tx_filled, &gNB->threadPool);
if (res == NULL)
return; // Tpool has been stopped
syncMsg = (processingData_L1tx_t *)NotifiedFifoData(res);
syncMsg->gNB = gNB;
syncMsg->timestamp_tx = info->timestamp_tx;
res->key = slot_tx;
pushTpool(&gNB->threadPool, res);
}
} else if (get_softmodem_params()->continuous_tx) {
notifiedFIFO_elt_t *res = pullNotifiedFIFO(&gNB->L1_tx_free);
if (res == NULL)
return; // Tpool has been stopped
processingData_L1tx_t *syncMsg = (processingData_L1tx_t *)NotifiedFifoData(res);
syncMsg->gNB = gNB;
syncMsg->timestamp_tx = info->timestamp_tx;
syncMsg->frame = frame_tx;
syncMsg->slot = slot_tx;
res->key = slot_tx;
pushNotifiedFIFO(&gNB->L1_tx_out, res);
}
#if 0
LOG_D(PHY, "rxtx:%lld nfapi:%lld phy:%lld tx:%lld rx:%lld prach:%lld ofdm:%lld ",
softmodem_stats_rxtx_sf.diff_now, nfapi_meas.diff_now,
TICK_TO_US(gNB->phy_proc),
TICK_TO_US(gNB->phy_proc_tx),
TICK_TO_US(gNB->phy_proc_rx),
TICK_TO_US(gNB->rx_prach),
TICK_TO_US(gNB->ofdm_mod_stats),
softmodem_stats_rxtx_sf.diff_now, nfapi_meas.diff_now);
LOG_D(PHY,
"dlsch[enc:%lld mod:%lld scr:%lld rm:%lld t:%lld i:%lld] rx_dft:%lld ",
TICK_TO_US(gNB->dlsch_encoding_stats),
TICK_TO_US(gNB->dlsch_modulation_stats),
TICK_TO_US(gNB->dlsch_scrambling_stats),
TICK_TO_US(gNB->dlsch_rate_matching_stats),
TICK_TO_US(gNB->dlsch_turbo_encoding_stats),
TICK_TO_US(gNB->dlsch_interleaving_stats),
TICK_TO_US(gNB->rx_dft_stats));
LOG_D(PHY," ulsch[ch:%lld freq:%lld dec:%lld demod:%lld ru:%lld ",
TICK_TO_US(gNB->ulsch_channel_estimation_stats),
TICK_TO_US(gNB->ulsch_freq_offset_estimation_stats),
TICK_TO_US(gNB->ulsch_decoding_stats),
TICK_TO_US(gNB->ulsch_demodulation_stats),
TICK_TO_US(gNB->ulsch_rate_unmatching_stats));
LOG_D(PHY, "td:%lld dei:%lld dem:%lld llr:%lld tci:%lld ",
TICK_TO_US(gNB->ulsch_turbo_decoding_stats),
TICK_TO_US(gNB->ulsch_deinterleaving_stats),
TICK_TO_US(gNB->ulsch_demultiplexing_stats),
TICK_TO_US(gNB->ulsch_llr_stats),
TICK_TO_US(gNB->ulsch_tc_init_stats));
LOG_D(PHY, "tca:%lld tcb:%lld tcg:%lld tce:%lld l1:%lld l2:%lld]\n\n",
TICK_TO_US(gNB->ulsch_tc_alpha_stats),
TICK_TO_US(gNB->ulsch_tc_beta_stats),
TICK_TO_US(gNB->ulsch_tc_gamma_stats),
TICK_TO_US(gNB->ulsch_tc_ext_stats),
TICK_TO_US(gNB->ulsch_tc_intl1_stats),
TICK_TO_US(gNB->ulsch_tc_intl2_stats)
);
#endif
}
static size_t dump_L1_meas_stats(PHY_VARS_gNB *gNB, RU_t *ru, char *output, size_t outputlen) {
const char *begin = output;
const char *end = output + outputlen;
@@ -421,60 +364,6 @@ void *nrL1_stats_thread(void *param) {
return(NULL);
}
// This thread reads the finished L1 tx jobs from threaPool
// and pushes RU tx thread in the right order. It works only
// two parallel L1 tx threads.
void *tx_reorder_thread(void* param) {
PHY_VARS_gNB *gNB = (PHY_VARS_gNB *)param;
notifiedFIFO_elt_t *resL1Reserve = pullNotifiedFIFO(&gNB->L1_tx_out);
AssertFatal(resL1Reserve != NULL, "pullTpool() did not return start message in %s\n", __func__);
int next_tx_slot=((processingData_L1tx_t *)NotifiedFifoData(resL1Reserve))->slot;
LOG_I(PHY,"tx_reorder_thread started\n");
while (!oai_exit) {
notifiedFIFO_elt_t *resL1;
if (resL1Reserve) {
resL1=resL1Reserve;
if (((processingData_L1tx_t *)NotifiedFifoData(resL1))->slot != next_tx_slot) {
LOG_E(PHY,"order mistake\n");
resL1Reserve = NULL;
resL1 = pullNotifiedFIFO(&gNB->L1_tx_out);
}
} else {
resL1 = pullNotifiedFIFO(&gNB->L1_tx_out);
if (resL1 != NULL && ((processingData_L1tx_t *)NotifiedFifoData(resL1))->slot != next_tx_slot) {
if (resL1Reserve)
LOG_E(PHY,"error, have a stored packet, then a second one\n");
resL1Reserve = resL1;
resL1 = pullNotifiedFIFO(&gNB->L1_tx_out);
if (((processingData_L1tx_t *)NotifiedFifoData(resL1))->slot != next_tx_slot)
LOG_E(PHY,"error, pull two msg, none is good\n");
}
}
if (resL1 == NULL)
break; // Tpool has been stopped
processingData_L1tx_t *syncMsgL1= (processingData_L1tx_t *)NotifiedFifoData(resL1);
processingData_RU_t syncMsgRU;
syncMsgRU.frame_tx = syncMsgL1->frame;
syncMsgRU.slot_tx = syncMsgL1->slot;
syncMsgRU.timestamp_tx = syncMsgL1->timestamp_tx;
syncMsgRU.ru = gNB->RU_list[0];
if (get_softmodem_params()->continuous_tx) {
int slots_per_frame = gNB->frame_parms.slots_per_frame;
next_tx_slot = (syncMsgRU.slot_tx + 1) % slots_per_frame;
} else
next_tx_slot = get_next_downlink_slot(gNB, &gNB->gNB_config, syncMsgRU.frame_tx, syncMsgRU.slot_tx);
pushNotifiedFIFO(&gNB->L1_tx_free, resL1);
if (resL1==resL1Reserve)
resL1Reserve=NULL;
LOG_D(PHY,"gNB: %d.%d : calling RU TX function\n",syncMsgL1->frame,syncMsgL1->slot);
ru_tx_func((void*)&syncMsgRU);
}
return(NULL);
}
void init_gNB_Tpool(int inst) {
PHY_VARS_gNB *gNB;
gNB = RC.gNB[inst];
@@ -487,47 +376,26 @@ void init_gNB_Tpool(int inst) {
initNotifiedFIFO(&gNB->respPuschSymb);
initNotifiedFIFO(&gNB->respDecode);
// L1 RX result FIFO
// L1 RX result FIFO
initNotifiedFIFO(&gNB->resp_L1);
if (!get_softmodem_params()->reorder_thread_disable) {
notifiedFIFO_elt_t *msg = newNotifiedFIFO_elt(sizeof(processingData_L1_t), 0, &gNB->resp_L1, rx_func);
pushNotifiedFIFO(&gNB->resp_L1, msg); // to unblock the process in the beginning
}
// L1 TX result FIFO
initNotifiedFIFO(&gNB->L1_tx_free);
initNotifiedFIFO(&gNB->L1_tx_filled);
initNotifiedFIFO(&gNB->L1_tx_out);
if (get_softmodem_params()->reorder_thread_disable) {
// create the RX thread responsible for triggering RX processing and then TX processing if a single thread is used
threadCreate(&gNB->L1_rx_thread, L1_rx_thread, (void *)gNB, "L1_rx_thread",
gNB->L1_rx_thread_core, OAI_PRIORITY_RT_MAX);
// if separate threads are used for RX and TX, create the TX thread
// threadCreate(&gNB->L1_tx_thread, L1_tx_thread, (void *)gNB, "L1_tx_thread",
// gNB->L1_tx_thread_core, OAI_PRIORITY_RT_MAX);
initNotifiedFIFO(&gNB->L1_rx_out);
notifiedFIFO_elt_t *msgL1Tx = newNotifiedFIFO_elt(sizeof(processingData_L1tx_t), 0, &gNB->L1_tx_out, tx_func);
processingData_L1tx_t *msgDataTx = (processingData_L1tx_t *)NotifiedFifoData(msgL1Tx);
memset(msgDataTx, 0, sizeof(processingData_L1tx_t));
init_DLSCH_struct(gNB, msgDataTx);
memset(msgDataTx->ssb, 0, 64*sizeof(NR_gNB_SSB_t));
// this will be removed when the msgDataTx is not necessary anymore
gNB->msgDataTx = msgDataTx;
} else {
// we create 2 threads for L1 tx processing
for (int i=0; i < 2; i++) {
notifiedFIFO_elt_t *msgL1Tx = newNotifiedFIFO_elt(sizeof(processingData_L1tx_t), 0, &gNB->L1_tx_out, tx_func);
processingData_L1tx_t *msgDataTx = (processingData_L1tx_t *)NotifiedFifoData(msgL1Tx);
memset(msgDataTx, 0, sizeof(processingData_L1tx_t));
init_DLSCH_struct(gNB, msgDataTx);
memset(msgDataTx->ssb, 0, 64*sizeof(NR_gNB_SSB_t));
pushNotifiedFIFO(&gNB->L1_tx_free, msgL1Tx); // to unblock the process in the beginning
}
LOG_I(PHY,"Creating thread for TX reordering and dispatching to RU\n");
threadCreate(&proc->pthread_tx_reorder, tx_reorder_thread, (void *)gNB, "thread_tx_reorder",
gNB->RU_list[0] ? gNB->RU_list[0]->tpcores[1] : -1, OAI_PRIORITY_RT_MAX);
}
// create the RX thread responsible for triggering RX processing and then TX processing if a single thread is used
threadCreate(&gNB->L1_rx_thread, L1_rx_thread, (void *)gNB, "L1_rx_thread", gNB->L1_rx_thread_core, OAI_PRIORITY_RT_MAX);
// if separate threads are used for RX and TX, create the TX thread
threadCreate(&gNB->L1_tx_thread, L1_tx_thread, (void *)gNB, "L1_tx_thread", gNB->L1_tx_thread_core, OAI_PRIORITY_RT_MAX);
notifiedFIFO_elt_t *msgL1Tx = newNotifiedFIFO_elt(sizeof(processingData_L1tx_t), 0, &gNB->L1_tx_out, tx_func);
processingData_L1tx_t *msgDataTx = (processingData_L1tx_t *)NotifiedFifoData(msgL1Tx);
memset(msgDataTx, 0, sizeof(processingData_L1tx_t));
init_DLSCH_struct(gNB, msgDataTx);
memset(msgDataTx->ssb, 0, 64 * sizeof(NR_gNB_SSB_t));
// this will be removed when the msgDataTx is not necessary anymore
gNB->msgDataTx = msgDataTx;
if ((!get_softmodem_params()->emulate_l1) && (!IS_SOFTMODEM_NOSTATS_BIT) && (NFAPI_MODE!=NFAPI_MODE_VNF))
threadCreate(&proc->L1_stats_thread,nrL1_stats_thread,(void*)gNB,"L1_stats",-1,OAI_PRIORITY_RT_LOW);
@@ -543,6 +411,7 @@ void term_gNB_Tpool(int inst) {
abortNotifiedFIFO(&gNB->L1_tx_free);
abortNotifiedFIFO(&gNB->L1_tx_filled);
abortNotifiedFIFO(&gNB->L1_tx_out);
abortNotifiedFIFO(&gNB->L1_rx_out);
gNB_L1_proc_t *proc = &gNB->proc;
if (!get_softmodem_params()->emulate_l1)
@@ -558,9 +427,10 @@ void kill_gNB_proc(int inst) {
PHY_VARS_gNB *gNB;
gNB=RC.gNB[inst];
/*
LOG_I(PHY, "Destroying UL_INFO mutex\n");
pthread_mutex_destroy(&gNB->UL_INFO_mutex);
*/
}
@@ -601,7 +471,6 @@ void init_eNB_afterRU(void) {
gNB = RC.gNB[inst];
gNB->ldpc_offload_flag = get_softmodem_params()->ldpc_offload_flag;
gNB->reorder_thread_disable = get_softmodem_params()->reorder_thread_disable;
phy_init_nr_gNB(gNB);
@@ -692,6 +561,5 @@ void stop_gNB(int nb_inst) {
for (int inst=0; inst<nb_inst; inst++) {
LOG_I(PHY,"Killing gNB %d processing threads\n",inst);
term_gNB_Tpool(inst);
kill_gNB_proc(inst);
}
}

View File

@@ -283,7 +283,7 @@ void fh_if5_south_out(RU_t *ru, int frame, int slot, uint64_t timestamp) {
for (int aid=0;aid<ru->nb_tx;aid++) buffs[aid] = (void*)&ru->common.txdata[aid][offset];
struct timespec txmeas;
clock_gettime(CLOCK_MONOTONIC, &txmeas);
LOG_D(PHY,"IF5 TX %d.%d, TS %llu, buffs[0] %p, buffs[1] %p ener0 %f dB, tx start %d\n",frame,slot,(unsigned long long)timestamp,buffs[0],buffs[1],
LOG_D(NR_PHY,"IF5 TX %d.%d, TS %llu, buffs[0] %p, buffs[1] %p ener0 %f dB, tx start %d\n",frame,slot,(unsigned long long)timestamp,buffs[0],buffs[1],
10*log10((double)signal_energy(buffs[0],ru->nr_frame_parms->get_samples_per_slot(slot,ru->nr_frame_parms))),(int)txmeas.tv_nsec);
ru->ifdevice.trx_write_func2(&ru->ifdevice,
timestamp,
@@ -1169,6 +1169,7 @@ void *ru_thread( void *param ) {
int initial_wait=0;
int opp_enabled0 = opp_enabled;
bool rx_tti_busy[RU_RX_SLOT_DEPTH]={false};
nfapi_nr_config_request_scf_t *cfg = &ru->config;
// set default return value
ru_thread_status = 0;
@@ -1233,9 +1234,6 @@ void *ru_thread( void *param ) {
pthread_mutex_unlock(&RC.ru_mutex);
wait_sync("ru_thread");
processingData_L1_t *syncMsg;
notifiedFIFO_elt_t *res;
if(!emulate_rf) {
// Start RF device if any
if (ru->start_rf) {
@@ -1299,14 +1297,13 @@ void *ru_thread( void *param ) {
if (ru->fh_south_in) ru->fh_south_in(ru,&frame,&slot);
else AssertFatal(1==0, "No fronthaul interface at south port");
if (initial_wait == 1 && proc->frame_rx < 300 && ru->fh_south_in == rx_rf) {
if (proc->frame_rx>0 && ((proc->frame_rx % 100) == 0) && proc->tti_rx==0) {
LOG_I(PHY,"delay processing to let RX stream settle, frame %d (trials %d)\n",proc->frame_rx,ru->rx_fhaul.trials);
print_meas(&ru->rx_fhaul,"rx_fhaul",NULL,NULL);
reset_meas(&ru->rx_fhaul);
}
continue;
if (initial_wait == 1 && proc->frame_rx < 300) {
if (proc->frame_rx > 0 && ((proc->frame_rx % 100) == 0) && proc->tti_rx == 0) {
LOG_D(PHY, "delay processing to let RX stream settle, frame %d (trials %d)\n", proc->frame_rx, ru->rx_fhaul.trials);
print_meas(&ru->rx_fhaul, "rx_fhaul", NULL, NULL);
reset_meas(&ru->rx_fhaul);
}
continue;
}
if (proc->frame_rx>=300) {
initial_wait=0;
@@ -1335,12 +1332,43 @@ void *ru_thread( void *param ) {
if (ru->idx!=0) proc->frame_tx = (proc->frame_tx+proc->frame_offset)&1023;
LOG_D(NR_PHY,"In %d.%d: Checking L1 status\n",proc->frame_rx,proc->tti_rx);
for (int n=0;n<RU_RX_SLOT_DEPTH;n++)
LOG_D(NR_PHY,"slot n %d => %d\n",n,rx_tti_busy[n]);
// handle potential race by blocking if rxdataF is being used by L1
// first empty L1 return fifo and block on current slot if needed
notifiedFIFO_elt_t *res = pollNotifiedFIFO(&gNB->L1_rx_out);
LOG_D(NR_PHY,"%d.%d Polling L1_rx_out %p\n",proc->frame_rx,proc->tti_rx,res);
while (res) {
processingData_L1_t *info = (processingData_L1_t*)NotifiedFifoData(res);
LOG_D(NR_PHY,"%d.%d res %d.%d completed, clearing %d\n",proc->frame_rx,proc->tti_rx,info->frame_rx,info->slot_rx,info->slot_rx%RU_RX_SLOT_DEPTH);
rx_tti_busy[info->slot_rx%RU_RX_SLOT_DEPTH] = false;
res = pollNotifiedFIFO(&gNB->L1_rx_out);
}
LOG_D(NR_PHY,"%d.%d Done polling\n",proc->frame_rx,proc->tti_rx);
// do RX front-end processing (frequency-shift, dft) if needed
int slot_type = nr_slot_select(cfg,proc->frame_rx,proc->tti_rx);
if (slot_type == NR_UPLINK_SLOT || slot_type == NR_MIXED_SLOT) {
if (ru->feprx) {
if (rx_tti_busy[proc->tti_rx%RU_RX_SLOT_DEPTH]) {
bool not_done=true;
LOG_D(NR_PHY,"%d.%d Waiting to access RX slot %d\n",proc->frame_rx,proc->tti_rx,proc->tti_rx%RU_RX_SLOT_DEPTH);
while (not_done) {
res = pullNotifiedFIFO(&gNB->L1_rx_out);
if (!res) break;
processingData_L1_t *info = (processingData_L1_t*)NotifiedFifoData(res);
LOG_D(NR_PHY,"%d.%d Got access to RX slot %d.%d (%d)\n",proc->frame_rx,proc->tti_rx,info->frame_rx,info->slot_rx,proc->tti_rx%RU_RX_SLOT_DEPTH);
rx_tti_busy[info->slot_rx%RU_RX_SLOT_DEPTH] = false;
if ((info->slot_rx%RU_RX_SLOT_DEPTH) == (proc->tti_rx%RU_RX_SLOT_DEPTH)) not_done=false;
}
if (!res) break;
}
ru->feprx(ru,proc->tti_rx);
//set the tti that was generated to busy
LOG_D(NR_PHY,"Setting %d.%d (%d) to busy\n",proc->frame_rx,proc->tti_rx,proc->tti_rx%RU_RX_SLOT_DEPTH);
rx_tti_busy[proc->tti_rx%RU_RX_SLOT_DEPTH] = true;
clock_gettime(CLOCK_MONOTONIC,&ru->rt_ru_profiling.return_RU_feprx[rt_prof_idx]);
//LOG_M("rxdata.m","rxs",ru->common.rxdata[0],1228800,1,1);
LOG_D(PHY,"RU proc: frame_rx = %d, tti_rx = %d\n", proc->frame_rx, proc->tti_rx);
@@ -1383,26 +1411,16 @@ void *ru_thread( void *param ) {
}
} // end if (slot_type == NR_UPLINK_SLOT || slot_type == NR_MIXED_SLOT) {
// At this point, all information for subframe has been received on FH interface
if (!get_softmodem_params()->reorder_thread_disable) {
res = pullTpool(&gNB->resp_L1, &gNB->threadPool);
if (res == NULL)
break; // Tpool has been stopped
} else {
res=newNotifiedFIFO_elt(sizeof(processingData_L1_t),0, &gNB->resp_L1,NULL);
}
syncMsg = (processingData_L1_t *)NotifiedFifoData(res);
syncMsg->gNB = gNB;
syncMsg->frame_rx = proc->frame_rx;
syncMsg->slot_rx = proc->tti_rx;
syncMsg->frame_tx = proc->frame_tx;
syncMsg->slot_tx = proc->tti_tx;
syncMsg->timestamp_tx = proc->timestamp_tx;
res->key = proc->tti_rx;
if (!get_softmodem_params()->reorder_thread_disable)
pushTpool(&gNB->threadPool, res);
else
pushNotifiedFIFO(&gNB->resp_L1, res);
notifiedFIFO_elt_t *resTx = newNotifiedFIFO_elt(sizeof(processingData_L1tx_t), 0, &gNB->L1_tx_out, NULL);
processingData_L1tx_t *syncMsgTx = NotifiedFifoData(resTx);
syncMsgTx->gNB = gNB;
syncMsgTx->frame = proc->frame_tx;
syncMsgTx->slot = proc->tti_tx;
syncMsgTx->frame_rx = proc->frame_rx;
syncMsgTx->slot_rx = proc->tti_rx;
syncMsgTx->timestamp_tx = proc->timestamp_tx;
resTx->key = proc->tti_tx;
pushNotifiedFIFO(&gNB->L1_tx_out, resTx);
}
printf( "Exiting ru_thread \n");

View File

@@ -47,7 +47,6 @@ extern char *uecap_file;
// In nr-gnb.c
extern void init_gNB(int single_thread_flag,int wait_for_sync);
extern void stop_gNB(int);
extern void kill_gNB_proc(int inst);
// In nr-ru.c
extern void init_NR_RU(configmodule_interface_t *cfg, char *);

View File

@@ -375,7 +375,6 @@ extern uint16_t sl_ahead;
extern uint16_t sf_ahead;
extern int oai_exit;
void tx_func(void *param);
void rx_func(void *param);
void ru_tx_func(void *param);
extern uint8_t nfapi_mode;

View File

@@ -1244,7 +1244,6 @@ int phy_nr_slot_indication(nfapi_nr_slot_indication_scf_t *ind) {
int phy_nr_srs_indication(nfapi_nr_srs_indication_t *ind) {
struct PHY_VARS_gNB_s *gNB = RC.gNB[0];
pthread_mutex_lock(&gNB->UL_INFO_mutex);
gNB->UL_INFO.srs_ind = *ind;
@@ -1260,8 +1259,6 @@ int phy_nr_srs_indication(nfapi_nr_srs_indication_t *ind) {
);
}
pthread_mutex_unlock(&gNB->UL_INFO_mutex);
return 1;
}
//end NR phy indication

View File

@@ -182,7 +182,6 @@ int nfapi_nr_vnf_p7_start(nfapi_vnf_p7_config_t* config)
NFAPI_TRACE(NFAPI_TRACE_DEBUG, "This is the slot_ind queue size %ld in %s():%d\n",
gnb_slot_ind_queue.num_items, __FUNCTION__, __LINE__);
if (slot_ind) {
pthread_mutex_lock(&gNB->UL_INFO_mutex);
gNB->UL_INFO.frame = slot_ind->sfn;
gNB->UL_INFO.slot = slot_ind->slot;
@@ -198,7 +197,6 @@ int nfapi_nr_vnf_p7_start(nfapi_vnf_p7_config_t* config)
gNB->if_inst->NR_UL_indication(&gNB->UL_INFO);
prev_slot = gNB->UL_INFO.slot;
}
pthread_mutex_unlock(&gNB->UL_INFO_mutex);
free(slot_ind);
slot_ind = NULL;
}

View File

@@ -76,11 +76,11 @@ void nr_fill_prach(PHY_VARS_gNB *gNB,
nfapi_nr_prach_pdu_t *prach_pdu) {
int prach_id = find_nr_prach(gNB,SFN,Slot,SEARCH_EXIST_OR_FREE);
AssertFatal( ((prach_id>=0) && (prach_id<NUMBER_OF_NR_PRACH_MAX)) || (prach_id < 0),
"illegal or no prach_id found!!! prach_id %d\n",prach_id);
AssertFatal(((prach_id >= 0) && (prach_id < NUMBER_OF_NR_PRACH_MAX)), "illegal or no prach_id found!!! prach_id %d\n", prach_id);
gNB->prach_vars.list[prach_id].frame=SFN;
gNB->prach_vars.list[prach_id].slot=Slot;
LOG_D(NR_PHY,"Copying prach pdu %d bytes to index %d\n",(int)sizeof(*prach_pdu),prach_id);
memcpy((void*)&gNB->prach_vars.list[prach_id].pdu,(void*)prach_pdu,sizeof(*prach_pdu));
}

View File

@@ -74,8 +74,8 @@ void nr_fill_ulsch(PHY_VARS_gNB *gNB, int frame, int slot, nfapi_nr_pusch_pdu_t
NR_UL_gNB_HARQ_t *harq = ulsch->harq_process;
if (ulsch_pdu->pusch_data.new_data_indicator)
harq->harq_to_be_cleared = true;
LOG_D(PHY,
"%d.%d RNTI %x HARQ PID %d new data indicator %d\n",
LOG_D(NR_PHY,
"NEW ULSCH %d.%d RNTI %x HARQ PID %d new data indicator %d\n",
frame,
slot,
ulsch_pdu->rnti,
@@ -98,8 +98,11 @@ void reset_active_ulsch(PHY_VARS_gNB *gNB, int frame)
// assuming UE disconnected or some other error occurred
for (int i = 0; i < gNB->max_nb_pusch; i++) {
NR_gNB_ULSCH_t *ulsch = &gNB->ulsch[i];
if (ulsch->active && (((frame - ulsch->frame + 1024) % 1024) > NUMBER_FRAMES_PHY_UE_INACTIVE))
int diff = (frame - ulsch->frame + 1024) & 1023;
if (ulsch->active && diff > NUMBER_FRAMES_PHY_UE_INACTIVE && diff < 100) {
ulsch->active = false;
LOG_D(NR_PHY,"Frame %d: resetting ulsch %d harq %d (programmed in %d.%d)\n",frame,i,ulsch->harq_pid,ulsch->frame,ulsch->slot);
}
}
}

View File

@@ -1409,7 +1409,7 @@ static void nr_pusch_symbol_processing(void *arg)
if (gNB->pusch_vars[ulsch_id].ul_valid_re_per_slot[symbol] == 0)
continue;
int soffset = (slot&3)*frame_parms->symbols_per_slot*frame_parms->ofdm_symbol_size;
int soffset = (slot%RU_RX_SLOT_DEPTH)*frame_parms->symbols_per_slot*frame_parms->ofdm_symbol_size;
inner_rx(gNB,
ulsch_id,
slot,
@@ -1591,7 +1591,7 @@ int nr_rx_pusch_tp(PHY_VARS_gNB *gNB,
// extract the first dmrs for the channel level computation
// extract the data in the OFDM frame, to the start of the array
int soffset = (slot&3)*frame_parms->symbols_per_slot*frame_parms->ofdm_symbol_size;
int soffset = (slot%RU_RX_SLOT_DEPTH)*frame_parms->symbols_per_slot*frame_parms->ofdm_symbol_size;
nb_re_pusch = (nb_re_pusch + 15) & ~15;

View File

@@ -501,7 +501,7 @@ void nr_decode_pucch1(c16_t **rxdataF,
* Implement TS 38.211 Subclause 6.3.2.4.1 Sequence modulation
*
*/
const int soffset = (nr_tti_tx & 3) * frame_parms->symbols_per_slot * frame_parms->ofdm_symbol_size;
const int soffset = (nr_tti_tx%RU_RX_SLOT_DEPTH) * frame_parms->symbols_per_slot * frame_parms->ofdm_symbol_size;
// lprime is the index of the OFDM symbol in the slot that corresponds to the first OFDM symbol of the PUCCH transmission in the slot given by [5, TS 38.213]
const int lprime = startingSymbolIndex;
// mcs = 0 except for PUCCH format 0
@@ -1019,16 +1019,12 @@ void nr_decode_pucch2(PHY_VARS_gNB *gNB,
pucch_pdu->prb_start);
//extract pucch and dmrs first
int l2 = pucch_pdu->start_symbol_index;
int soffset = (slot & 3) * frame_parms->symbols_per_slot * frame_parms->ofdm_symbol_size;
int soffset=(slot % RU_RX_SLOT_DEPTH) * frame_parms->symbols_per_slot * frame_parms->ofdm_symbol_size;
int re_offset[2];
re_offset[0] =
(12 * (pucch_pdu->prb_start + pucch_pdu->bwp_start) + frame_parms->first_carrier_offset) % frame_parms->ofdm_symbol_size;
if (re_offset[0]>= frame_parms->ofdm_symbol_size)
re_offset[0]-=frame_parms->ofdm_symbol_size;
if (pucch_pdu->freq_hop_flag == 0)
re_offset[1] = re_offset[0];
else {

View File

@@ -34,6 +34,7 @@
#include "PHY/impl_defs_nr.h"
#include "PHY/defs_nr_common.h"
#include "PHY/defs_gNB.h"
#include "PHY/defs_RU.h"
#include "PHY/CODING/nrSmallBlock/nr_small_block_defs.h"
#include "PHY/NR_UE_TRANSPORT/srs_modulation_nr.h"
#include "common/utils/LOG/log.h"
@@ -75,7 +76,7 @@ int nr_get_srs_signal(PHY_VARS_gNB *gNB,
c16_t **rxdataF = gNB->common_vars.rxdataF;
const NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
const uint16_t n_symbols = (slot&3)*frame_parms->symbols_per_slot; // number of symbols until this slot
const uint16_t n_symbols = (slot%RU_RX_SLOT_DEPTH)*frame_parms->symbols_per_slot; // number of symbols until this slot
const uint8_t l0 = frame_parms->symbols_per_slot - 1 - srs_pdu->time_start_position; // starting symbol in this slot
const uint64_t symbol_offset = (n_symbols+l0)*frame_parms->ofdm_symbol_size;
const uint64_t subcarrier_offset = frame_parms->first_carrier_offset + srs_pdu->bwp_start*NR_NB_SC_PER_RB;

View File

@@ -197,7 +197,7 @@ typedef struct {
#define NUMBER_OF_NR_RU_PRACH_MAX 8
#define NUMBER_OF_NR_RU_PRACH_OCCASIONS_MAX 12
#define RU_RX_SLOT_DEPTH 4
typedef struct RU_proc_t_s {
/// Pointer to associated RU descriptor
struct RU_t_s *ru;

View File

@@ -562,7 +562,6 @@ typedef struct PHY_VARS_gNB_s {
PHY_MEASUREMENTS_gNB measurements;
NR_IF_Module_t *if_inst;
NR_UL_IND_t UL_INFO;
pthread_mutex_t UL_INFO_mutex;
/// NFAPI RX ULSCH information
nfapi_nr_rx_data_pdu_t rx_pdu_list[MAX_UL_PDUS_PER_SLOT];
@@ -640,8 +639,6 @@ typedef struct PHY_VARS_gNB_s {
int ldpc_offload_flag;
int reorder_thread_disable;
int max_ldpc_iterations;
/// indicate the channel estimation technique in time domain
int chest_time;
@@ -719,6 +716,7 @@ typedef struct PHY_VARS_gNB_s {
notifiedFIFO_t L1_tx_free;
notifiedFIFO_t L1_tx_filled;
notifiedFIFO_t L1_tx_out;
notifiedFIFO_t L1_rx_out;
notifiedFIFO_t resp_RU_tx;
tpool_t threadPool;
int nbSymb;
@@ -796,9 +794,7 @@ union ldpcReqUnion {
typedef struct processingData_L1 {
int frame_rx;
int frame_tx;
int slot_rx;
int slot_tx;
openair0_timestamp timestamp_tx;
PHY_VARS_gNB *gNB;
} processingData_L1_t;
@@ -812,6 +808,8 @@ typedef enum {
typedef struct processingData_L1tx {
int frame;
int slot;
int frame_rx;
int slot_rx;
openair0_timestamp timestamp_tx;
PHY_VARS_gNB *gNB;
nfapi_nr_dl_tti_pdcch_pdu pdcch_pdu[NFAPI_NR_MAX_NB_CORESETS];
@@ -826,4 +824,9 @@ typedef struct processingData_L1tx {
int sched_response_id;
} processingData_L1tx_t;
typedef struct processingData_L1rx {
int frame_rx;
int slot_rx;
PHY_VARS_gNB *gNB;
} processingData_L1rx_t;
#endif

View File

@@ -55,7 +55,7 @@ void handle_nr_nfapi_ssb_pdu(processingData_L1tx_t *msgTx,int frame,int slot,
uint8_t i_ssb = dl_tti_pdu->ssb_pdu.ssb_pdu_rel15.SsbBlockIndex;
LOG_D(PHY,"%d.%d : ssb index %d pbch_pdu: %x\n",frame,slot,i_ssb,dl_tti_pdu->ssb_pdu.ssb_pdu_rel15.bchPayload);
LOG_D(NR_PHY,"%d.%d : ssb index %d pbch_pdu: %x\n",frame,slot,i_ssb,dl_tti_pdu->ssb_pdu.ssb_pdu_rel15.bchPayload);
if (msgTx->ssb[i_ssb].active)
AssertFatal(1==0,"SSB PDU with index %d already active\n",i_ssb);
else {
@@ -109,7 +109,7 @@ void handle_nfapi_nr_csirs_pdu(processingData_L1tx_t *msgTx, int frame, int slot
for (int id = 0; id < NR_SYMBOLS_PER_SLOT; id++) {
NR_gNB_CSIRS_t *csirs = &msgTx->csirs_pdu[id];
if (csirs->active == 0) {
LOG_D(PHY,"Frame %d Slot %d CSI_RS with ID %d is now active\n",frame,slot,id);
LOG_D(NR_PHY,"Frame %d Slot %d CSI_RS with ID %d is now active\n",frame,slot,id);
csirs->active = 1;
memcpy((void*)&csirs->csirs_pdu, (void*)csirs_pdu, sizeof(nfapi_nr_dl_tti_csi_rs_pdu));
found = 1;
@@ -158,19 +158,8 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO)
if (NFAPI_MODE == NFAPI_MONOLITHIC){
if (slot_type == NR_DOWNLINK_SLOT || slot_type == NR_MIXED_SLOT) {
notifiedFIFO_elt_t *res=NULL;
processingData_L1tx_t *msgTx=NULL;
if (!gNB->reorder_thread_disable) {
res = pullNotifiedFIFO(&gNB->L1_tx_free);
if (res == NULL)
return; // Tpool has been stopped, nothing to process
msgTx = (processingData_L1tx_t *)NotifiedFifoData(res);
} else {
msgTx = gNB->msgDataTx; //newNotifiedFIFO_elt(sizeof(processingData_L1tx_t),0, &gNB->L1_tx_out,NULL);
}
/*const time_stats_t ts = exec_time_stats_NotifiedFIFO(res);
merge_meas(&gNB->phy_proc_tx, &ts);
*/
msgTx = gNB->msgDataTx;
msgTx->num_pdsch_slot = 0;
msgTx->num_dl_pdcch = 0;
msgTx->num_ul_pdcch = number_ul_dci_pdu;
@@ -181,7 +170,7 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO)
for (int i=0;i<number_dl_pdu;i++) {
nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdu = &DL_req->dl_tti_request_body.dl_tti_pdu_list[i];
LOG_D(PHY,"NFAPI: dl_pdu %d : type %d\n",i,dl_tti_pdu->PDUType);
LOG_D(NR_PHY,"NFAPI: dl_pdu %d : type %d\n",i,dl_tti_pdu->PDUType);
switch (dl_tti_pdu->PDUType) {
case NFAPI_NR_DL_TTI_SSB_PDU_TYPE:
handle_nr_nfapi_ssb_pdu(msgTx,frame,slot,
@@ -189,18 +178,18 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO)
break;
case NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE:
LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE for %d.%d\n",frame,slot,DL_req->SFN,DL_req->Slot);
LOG_D(NR_PHY,"frame %d, slot %d, Got NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE for %d.%d\n",frame,slot,DL_req->SFN,DL_req->Slot);
msgTx->pdcch_pdu[msgTx->num_dl_pdcch] = dl_tti_pdu->pdcch_pdu;
msgTx->num_dl_pdcch++;
break;
case NFAPI_NR_DL_TTI_CSI_RS_PDU_TYPE:
LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_DL_TTI_CSI_RS_PDU_TYPE for %d.%d\n",frame,slot,DL_req->SFN,DL_req->Slot);
LOG_D(NR_PHY,"frame %d, slot %d, Got NFAPI_NR_DL_TTI_CSI_RS_PDU_TYPE for %d.%d\n",frame,slot,DL_req->SFN,DL_req->Slot);
handle_nfapi_nr_csirs_pdu(msgTx,frame,slot,&dl_tti_pdu->csi_rs_pdu);
break;
case NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE:
LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE for %d.%d\n",frame,slot,DL_req->SFN,DL_req->Slot);
LOG_D(NR_PHY,"frame %d, slot %d, Got NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE for %d.%d\n",frame,slot,DL_req->SFN,DL_req->Slot);
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = &dl_tti_pdu->pdsch_pdu.pdsch_pdu_rel15;
uint16_t pduIndex = pdsch_pdu_rel15->pduIndex;
AssertFatal(TX_req->pdu_list[pduIndex].num_TLV == 1, "TX_req->pdu_list[%d].num_TLV %d != 1\n",
@@ -222,29 +211,27 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO)
* released only when both threads are done with it.
*/
inc_ref_sched_response(Sched_INFO->sched_response_id);
if (!gNB->reorder_thread_disable)
pushNotifiedFIFO(&gNB->L1_tx_filled,res);
}
for (int i = 0; i < number_ul_tti_pdu; i++) {
switch (UL_tti_req->pdus_list[i].pdu_type) {
case NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE:
LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_UL_TTI_PUSCH_PDU_TYPE for %d.%d\n", frame, slot, UL_tti_req->SFN, UL_tti_req->Slot);
LOG_D(NR_PHY,"frame %d, slot %d, Got NFAPI_NR_UL_TTI_PUSCH_PDU_TYPE for %d.%d\n", frame, slot, UL_tti_req->SFN, UL_tti_req->Slot);
nr_fill_ulsch(gNB,UL_tti_req->SFN, UL_tti_req->Slot, &UL_tti_req->pdus_list[i].pusch_pdu);
break;
case NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE:
LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_UL_TTI_PUCCH_PDU_TYPE for %d.%d\n", frame, slot, UL_tti_req->SFN, UL_tti_req->Slot);
LOG_D(NR_PHY,"frame %d, slot %d, Got NFAPI_NR_UL_TTI_PUCCH_PDU_TYPE for %d.%d\n", frame, slot, UL_tti_req->SFN, UL_tti_req->Slot);
nr_fill_pucch(gNB,UL_tti_req->SFN, UL_tti_req->Slot, &UL_tti_req->pdus_list[i].pucch_pdu);
break;
case NFAPI_NR_UL_CONFIG_PRACH_PDU_TYPE:
LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_UL_TTI_PRACH_PDU_TYPE for %d.%d\n", frame, slot, UL_tti_req->SFN, UL_tti_req->Slot);
LOG_D(NR_PHY,"frame %d, slot %d, Got NFAPI_NR_UL_TTI_PRACH_PDU_TYPE for %d.%d\n", frame, slot, UL_tti_req->SFN, UL_tti_req->Slot);
nfapi_nr_prach_pdu_t *prach_pdu = &UL_tti_req->pdus_list[i].prach_pdu;
nr_fill_prach(gNB, UL_tti_req->SFN, UL_tti_req->Slot, prach_pdu);
if (gNB->RU_list[0]->if_south == LOCAL_RF ||
gNB->RU_list[0]->if_south == REMOTE_IF5) nr_fill_prach_ru(gNB->RU_list[0], UL_tti_req->SFN, UL_tti_req->Slot, prach_pdu);
break;
case NFAPI_NR_UL_CONFIG_SRS_PDU_TYPE:
LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_UL_CONFIG_SRS_PDU_TYPE for %d.%d\n", frame, slot, UL_tti_req->SFN, UL_tti_req->Slot);
LOG_D(NR_PHY,"frame %d, slot %d, Got NFAPI_NR_UL_CONFIG_SRS_PDU_TYPE for %d.%d\n", frame, slot, UL_tti_req->SFN, UL_tti_req->Slot);
nr_fill_srs(gNB,UL_tti_req->SFN, UL_tti_req->Slot, &UL_tti_req->pdus_list[i].srs_pdu);
break;
}
@@ -267,7 +254,9 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO)
}
/* this thread is done with the sched_info, decrease the reference counter */
deref_sched_response(Sched_INFO->sched_response_id);
if (slot_type == NR_DOWNLINK_SLOT || slot_type == NR_MIXED_SLOT) {
LOG_D(NR_PHY, "Calling dref_sched_response for id %d in %d.%d (sched_response)\n", Sched_INFO->sched_response_id, frame, slot);
deref_sched_response(Sched_INFO->sched_response_id);
}
stop_meas(&gNB->schedule_response_stats);
}

View File

@@ -120,6 +120,7 @@ void L1_nr_prach_procedures(PHY_VARS_gNB *gNB,int frame,int slot) {
int prach_id=find_nr_prach(gNB,frame,slot,SEARCH_EXIST);
if (prach_id>=0) {
LOG_D(NR_PHY,"%d.%d Got prach entry id %d\n",frame,slot,prach_id);
nfapi_nr_prach_pdu_t *prach_pdu = &gNB->prach_vars.list[prach_id].pdu;
uint8_t prachStartSymbol;
uint8_t N_dur = get_nr_prach_duration(prach_pdu->prach_format);
@@ -140,9 +141,9 @@ void L1_nr_prach_procedures(PHY_VARS_gNB *gNB,int frame,int slot) {
&max_preamble[0],
&max_preamble_energy[0],
&max_preamble_delay[0]);
LOG_D(NR_PHY,"Freeing PRACH entry %d\n",prach_id);
free_nr_prach_entry(gNB,prach_id);
LOG_D(PHY,"[RAPROC] Frame %d, slot %d, occasion %d (prachStartSymbol %d) : Most likely preamble %d, energy %d.%d dB delay %d (prach_energy counter %d)\n",
LOG_D(NR_PHY,"[RAPROC] Frame %d, slot %d, occasion %d (prachStartSymbol %d) : Most likely preamble %d, energy %d.%d dB delay %d (prach_energy counter %d)\n",
frame,slot,prach_oc,prachStartSymbol,
max_preamble[0],
max_preamble_energy[0]/10,

View File

@@ -242,7 +242,7 @@ void nr_fep_full(RU_t *ru, int slot) {
// remove_7_5_kHz(ru,proc->tti_rx<<1);
// remove_7_5_kHz(ru,1+(proc->tti_rx<<1));
int offset = (proc->tti_rx&3)*(fp->symbols_per_slot * fp->ofdm_symbol_size);
int offset = (proc->tti_rx%RU_RX_SLOT_DEPTH)*(fp->symbols_per_slot * fp->ofdm_symbol_size);
for (l = 0; l < fp->symbols_per_slot; l++) {
for (aa = 0; aa < fp->nb_antennas_rx; aa++) {
nr_slot_fep_ul(fp,
@@ -378,7 +378,7 @@ void nr_fep(void* arg) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPRX+aid, 1);
int offset = (tti_rx&3) * fp->symbols_per_slot * fp->ofdm_symbol_size;
int offset = (tti_rx%RU_RX_SLOT_DEPTH) * fp->symbols_per_slot * fp->ofdm_symbol_size;
for (int l = startSymbol; l <= endSymbol; l++)
nr_slot_fep_ul(fp,
ru->common.rxdata[aid],

View File

@@ -272,10 +272,11 @@ static void nr_postDecode(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req)
}
if (crc_valid && !check_abort(&ulsch_harq->abort_decode) && !gNB->pusch_vars[rdata->ulsch_id].DTX) {
LOG_D(PHY,
"[gNB %d] ULSCH: Setting ACK for SFN/SF %d.%d (rnti %x, pid %d, ndi %d, status %d, round %d, TBS %d, Max interation "
LOG_D(NR_PHY,
"[gNB %d] ULSCH %d: Setting ACK for SFN/SF %d.%d (rnti %x, pid %d, ndi %d, status %d, round %d, TBS %d, Max interation "
"(all seg) %d)\n",
gNB->Mod_id,
rdata->ulsch_id,
ulsch->frame,
ulsch->slot,
ulsch->rnti,
@@ -316,7 +317,7 @@ static void nr_postDecode(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req)
if (ulsch_harq->ulsch_pdu.mcs_index == 0 && dumpsig==1) {
int off = ((ulsch_harq->ulsch_pdu.rb_size&1) == 1)? 4:0;
LOG_M("rxsigF0.m","rxsF0",&gNB->common_vars.rxdataF[0][(ulsch_harq->slot&3)*gNB->frame_parms.ofdm_symbol_size*gNB->frame_parms.symbols_per_slot],gNB->frame_parms.ofdm_symbol_size*gNB->frame_parms.symbols_per_slot,1,1);
LOG_M("rxsigF0.m","rxsF0",&gNB->common_vars.rxdataF[0][(ulsch_harq->slot%RU_RX_SLOT_DEPTH)*gNB->frame_parms.ofdm_symbol_size*gNB->frame_parms.symbols_per_slot],gNB->frame_parms.ofdm_symbol_size*gNB->frame_parms.symbols_per_slot,1,1);
LOG_M("rxsigF0_ext.m","rxsF0_ext",
&gNB->pusch_vars[0].rxdataF_ext[0][ulsch_harq->ulsch_pdu.start_symbol_index*NR_NB_SC_PER_RB *
ulsch_harq->ulsch_pdu.rb_size],ulsch_harq->ulsch_pdu.nr_of_symbols*(off+(NR_NB_SC_PER_RB *
@@ -410,9 +411,6 @@ static int nr_ulsch_procedures(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int
void nr_fill_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int ULSCH_id, uint8_t harq_pid, uint8_t crc_flag, int dtx_flag)
{
if (!get_softmodem_params()->reorder_thread_disable)
pthread_mutex_lock(&gNB->UL_INFO_mutex);
NR_gNB_ULSCH_t *ulsch = &gNB->ulsch[ULSCH_id];
NR_UL_gNB_HARQ_t *harq_process = ulsch->harq_process;
NR_gNB_PHY_STATS_t *stats = get_phy_stats(gNB, ulsch->rnti);
@@ -467,7 +465,7 @@ void nr_fill_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int ULSCH_id,
__attribute__((unused))
int off = ((pusch_pdu->rb_size&1) == 1)? 4:0;
LOG_M("rxsigF0.m","rxsF0",&gNB->common_vars.rxdataF[0][(slot_rx&3)*gNB->frame_parms.ofdm_symbol_size*gNB->frame_parms.symbols_per_slot],gNB->frame_parms.ofdm_symbol_size*gNB->frame_parms.symbols_per_slot,1,1);
LOG_M("rxsigF0.m","rxsF0",&gNB->common_vars.rxdataF[0][(slot_rx%RU_RX_SLOT_DEPTH)*gNB->frame_parms.ofdm_symbol_size*gNB->frame_parms.symbols_per_slot],gNB->frame_parms.ofdm_symbol_size*gNB->frame_parms.symbols_per_slot,1,1);
LOG_M("chestF0.m",
"chF0",
&gNB->pusch_vars[0].ul_ch_estimates[0][pusch_pdu->start_symbol_index * gNB->frame_parms.ofdm_symbol_size],
@@ -494,7 +492,7 @@ void nr_fill_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int ULSCH_id,
1,
0);
if (gNB->frame_parms.nb_antennas_rx > 1) {
LOG_M("rxsigF1.m","rxsF1",&gNB->common_vars.rxdataF[1][(slot_rx&3)*gNB->frame_parms.ofdm_symbol_size*gNB->frame_parms.symbols_per_slot],gNB->frame_parms.ofdm_symbol_size*gNB->frame_parms.symbols_per_slot,1,1);
LOG_M("rxsigF1.m","rxsF1",&gNB->common_vars.rxdataF[1][(slot_rx%RU_RX_SLOT_DEPTH)*gNB->frame_parms.ofdm_symbol_size*gNB->frame_parms.symbols_per_slot],gNB->frame_parms.ofdm_symbol_size*gNB->frame_parms.symbols_per_slot,1,1);
LOG_M("chestF1.m",
"chF1",
&gNB->pusch_vars[0].ul_ch_estimates[1][pusch_pdu->start_symbol_index * gNB->frame_parms.ofdm_symbol_size],
@@ -557,9 +555,6 @@ void nr_fill_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int ULSCH_id,
}
gNB->UL_INFO.rx_ind.number_of_pdus++;
if (!get_softmodem_params()->reorder_thread_disable)
pthread_mutex_unlock(&gNB->UL_INFO_mutex);
}
// Function to fill UL RB mask to be used for N0 measurements
@@ -834,9 +829,9 @@ int phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
NR_gNB_ULSCH_t *ulsch = &gNB->ulsch[ULSCH_id];
NR_UL_gNB_HARQ_t *ulsch_harq = ulsch->harq_process;
AssertFatal(ulsch_harq != NULL, "harq_pid %d is not allocated\n", ulsch->harq_pid);
if ((ulsch->active == true) && (ulsch->frame == frame_rx) && (ulsch->slot == slot_rx) && (ulsch->handled == 0)) {
LOG_D(PHY, "PUSCH ID %d with RNTI %x detection started in frame %d slot %d\n", ULSCH_id, ulsch->rnti, frame_rx, slot_rx);
int num_dmrs = 0;
for (int s = 0; s < NR_NUMBER_OF_SYMBOLS_PER_SLOT; s++)
num_dmrs += (ulsch_harq->ulsch_pdu.ul_dmrs_symb_pos >> s) & 1;

View File

@@ -895,6 +895,7 @@ int main(int argc, char **argv)
msgDataTx->slot = slot;
msgDataTx->frame = frame;
memset(msgDataTx->ssb, 0, 64*sizeof(NR_gNB_SSB_t));
gNB->msgDataTx = msgDataTx;
// Buffers to store internal memory of slot process
int rx_size = (((14 * frame_parms->N_RB_DL * 12 * sizeof(int32_t)) + 15) >> 4) << 4;

View File

@@ -563,6 +563,7 @@ int main(int argc, char *argv[])
notifiedFIFO_elt_t *msgL1Tx = newNotifiedFIFO_elt(sizeof(processingData_L1tx_t), 0, &gNB->L1_tx_free, NULL);
processingData_L1tx_t *msgDataTx = (processingData_L1tx_t *)NotifiedFifoData(msgL1Tx);
msgDataTx->slot = -1;
gNB->msgDataTx = msgDataTx;
//gNB_config = &gNB->gNB_config;
//memset((void *)&gNB->UL_INFO,0,sizeof(gNB->UL_INFO));

View File

@@ -1241,11 +1241,14 @@ void RCconfig_nr_macrlc(configmodule_interface_t *cfg)
config.do_CSIRS = *GNBParamList.paramarray[0][GNB_DO_CSIRS_IDX].iptr;
config.do_SRS = *GNBParamList.paramarray[0][GNB_DO_SRS_IDX].iptr;
config.force_256qam_off = *GNBParamList.paramarray[0][GNB_FORCE256QAMOFF_IDX].iptr;
config.force_UL256qam_off = *GNBParamList.paramarray[0][GNB_FORCEUL256QAMOFF_IDX].iptr;
config.use_deltaMCS = *GNBParamList.paramarray[0][GNB_USE_DELTA_MCS_IDX].iptr;
LOG_I(GNB_APP,
"CSI-RS %d, SRS %d, 256 QAM %s\n",
"CSI-RS %d, SRS %d, 256 QAM %s, delta_MCS %s\n",
config.do_CSIRS,
config.do_SRS,
config.force_256qam_off ? "force off" : "may be on");
config.force_256qam_off ? "force off" : "may be on",
config.use_deltaMCS ? "on" : "off");
NR_ServingCellConfigCommon_t *scc = get_scc_config(cfg, config.minRXTXTIME);
//xer_fprint(stdout, &asn_DEF_NR_ServingCellConfigCommon, scc);

View File

@@ -128,6 +128,10 @@ typedef enum {
#define GNB_CONFIG_STRING_FORCE256QAMOFF "force_256qam_off"
#define GNB_CONFIG_STRING_ENABLE_SDAP "enable_sdap"
#define GNB_CONFIG_STRING_DRBS "drbs"
#define GNB_CONFIG_STRING_USE_DELTA_MCS "use_deltaMCS"
#define GNB_CONFIG_HLP_USE_DELTA_MCS "Use deltaMCS-based power headroom reporting in PUSCH-Config"
#define GNB_CONFIG_HLP_FORCEUL256QAMOFF "suppress activation of UL 256 QAM despite UE support"
#define GNB_CONFIG_STRING_FORCEUL256QAMOFF "force_UL256qam_off"
#define GNB_CONFIG_STRING_GNB_DU_ID "gNB_DU_ID"
#define GNB_CONFIG_STRING_GNB_CU_UP_ID "gNB_CU_UP_ID"
@@ -173,6 +177,8 @@ typedef enum {
{GNB_CONFIG_STRING_DRBS, GNB_CONFIG_HLP_STRING_DRBS, 0, .iptr=NULL, .defintval=1, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_GNB_DU_ID, GNB_CONFIG_HLP_GNB_DU_ID, 0, .u64ptr=NULL, .defint64val=1, TYPE_UINT64, 0}, \
{GNB_CONFIG_STRING_GNB_CU_UP_ID, GNB_CONFIG_HLP_GNB_CU_UP_ID, 0, .u64ptr=NULL, .defint64val=1, TYPE_UINT64, 0}, \
{GNB_CONFIG_STRING_USE_DELTA_MCS, GNB_CONFIG_HLP_USE_DELTA_MCS, 0, .iptr=NULL, .defintval=1, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_FORCEUL256QAMOFF, GNB_CONFIG_HLP_FORCEUL256QAMOFF, 0, .iptr=NULL, .defintval=0, TYPE_INT, 0}, \
}
// clang-format on
@@ -207,6 +213,8 @@ typedef enum {
#define GNB_DRBS 27
#define GNB_GNB_DU_ID_IDX 28
#define GNB_GNB_CU_UP_ID_IDX 29
#define GNB_USE_DELTA_MCS_IDX 30
#define GNB_FORCEUL256QAMOFF_IDX 31
#define TRACKING_AREA_CODE_OKRANGE {0x0001,0xFFFD}
#define GNBPARAMS_CHECK { \
@@ -224,6 +232,8 @@ typedef enum {
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
}
/*-------------------------------------------------------------------------------------------------------------------------------------------------*/

View File

@@ -2581,9 +2581,10 @@ void mac_remove_nr_ue(gNB_MAC_INST *nr_mac, rnti_t rnti)
delete_nr_ue_data(UE, nr_mac->common_channels, &UE_info->uid_allocator);
}
uint8_t nr_get_tpc(int target, uint8_t cqi, int incr) {
uint8_t nr_get_tpc(int target, uint8_t cqi, int incr, int tx_power) {
// al values passed to this function are x10
int snrx10 = (cqi*5) - 640;
int snrx10 = (cqi*5) - 640 - (tx_power*10);
LOG_D(NR_MAC, "tpc : target %d, cqi %d, snrx10 %d, tx_power %d\n", target, ((int)cqi * 5) - 640, snrx10, tx_power);
if (snrx10 > target + incr) return 0; // decrease 1dB
if (snrx10 < target - (3*incr)) return 3; // increase 3dB
if (snrx10 < target - incr) return 2; // increase 1dB

View File

@@ -1019,7 +1019,7 @@ void handle_nr_uci_pucch_0_1(module_id_t mod_id,
// tpc (power control) only if we received AckNack
if (uci_01->harq.harq_confidence_level==0)
sched_ctrl->tpc1 = nr_get_tpc(nrmac->pucch_target_snrx10, uci_01->ul_cqi, 30);
sched_ctrl->tpc1 = nr_get_tpc(nrmac->pucch_target_snrx10, uci_01->ul_cqi, 30, 0);
else
sched_ctrl->tpc1 = 3;
sched_ctrl->pucch_snrx10 = uci_01->ul_cqi * 5 - 640;
@@ -1268,7 +1268,7 @@ int nr_acknack_scheduling(gNB_MAC_INST *mac,
curr_pucch->csi_bits + curr_pucch->dai_c + 2,
curr_pucch->resource_indicator))
continue;
// TODO temporarily limit ack/nak to 3 bits because of performances of polar for PUCCH (required for > 11 bits)
// limit ack/nak to 3 bits
if (curr_pucch->csi_bits > 0 && curr_pucch->dai_c >= 3)
continue;

View File

@@ -65,22 +65,21 @@ int get_ul_tda(gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int
return 0; // if FDD or not mixed slot in TDD, for now use default TDA (TODO handle CSI-RS slots)
}
static int compute_ph_factor(int mu, int tbs_bits, int rb, int n_layers, int n_symbols, int n_dmrs, long *deltaMCS)
static int compute_ph_factor(int mu, int tbs_bits, int rb, int n_layers, int n_symbols, int n_dmrs, long *deltaMCS, int include_bw,int dump)
{
// 38.213 7.1.1
// if the PUSCH transmission is over more than one layer delta_tf = 0
int delta_tf = 0;
float delta_tf = 0;
if(deltaMCS != NULL && n_layers == 1) {
const int n_re = (NR_NB_SC_PER_RB * n_symbols - n_dmrs) * rb;
const float BPRE = (float) tbs_bits/n_re; //TODO change for PUSCH with CSI
const float f = pow(2, BPRE * 1.25);
const float beta = 1.0f; //TODO change for PUSCH with CSI
delta_tf = (10 * log10((f - 1) * beta));
if (dump==1) LOG_I(NR_MAC,"compute_ph_factor delta_tf %f (n_re %d, n_rb %d, n_dmrs %d, n_symbols %d, tbs %d BPRE %f f %f)\n",delta_tf,n_re,rb, n_dmrs, n_symbols, tbs_bits, BPRE,f);
}
const int bw_factor = 10 * log10(rb << mu);
return (delta_tf + bw_factor);
const float bw_factor = (include_bw>0) ? 10 * log10(rb << mu) : 0;
return ((int)roundf(delta_tf + bw_factor));
}
// For both UL-SCH except:
@@ -265,14 +264,16 @@ static int nr_process_mac_pdu(instance_t module_idP,
PH = phr->PH - 32 + (phr->PH - 54);
// in sched_ctrl we set normalized PH wrt MCS and PRBs
long *deltaMCS = ul_bwp->pusch_Config ? ul_bwp->pusch_Config->pusch_PowerControl->deltaMCS : NULL;
sched_ctrl->ph = PH +
compute_ph_factor(ul_bwp->scs,
sched_pusch->tb_size<<3,
sched_pusch->rbSize,
sched_pusch->nrOfLayers,
sched_pusch->tda_info.nrOfSymbols, //n_symbols
sched_pusch->dmrs_info.num_dmrs_symb*sched_pusch->dmrs_info.N_PRB_DMRS, //n_dmrs
deltaMCS);
sched_ctrl->ph = PH
+ compute_ph_factor(ul_bwp->scs,
sched_pusch->tb_size << 3,
sched_pusch->rbSize,
sched_pusch->nrOfLayers,
sched_pusch->tda_info.nrOfSymbols, // n_symbols
sched_pusch->dmrs_info.num_dmrs_symb * sched_pusch->dmrs_info.N_PRB_DMRS, // n_dmrs
deltaMCS,
1,0);
sched_ctrl->ph0 = PH;
/* 38.133 Table10.1.18.1-1 */
sched_ctrl->pcmax = PCMAX - 29;
LOG_D(NR_MAC, "SINGLE ENTRY PHR R1 %d PH %d (%d dB) R2 %d PCMAX %d (%d dBm)\n",
@@ -607,7 +608,7 @@ static void _nr_rx_sdu(const module_id_t gnb_mod_idP,
if (sduP)
T(T_GNB_MAC_UL_PDU_WITH_DATA, T_INT(gnb_mod_idP), T_INT(CC_idP),
T_INT(rntiP), T_INT(frameP), T_INT(slotP), T_INT(harq_pid),
T_INT(rntiP), T_INT(frameP), T_INT(slotP), T_INT(harq_pid),
T_BUFFER(sduP, sdu_lenP));
UE->mac_stats.ul.total_bytes += sdu_lenP;
@@ -625,12 +626,23 @@ static void _nr_rx_sdu(const module_id_t gnb_mod_idP,
// if not missed detection (10dB threshold for now)
if (rssi>0) {
UE_scheduling_control->tpc0 = nr_get_tpc(target_snrx10,ul_cqi,30);
int txpower_calc = UE_scheduling_control->ul_harq_processes[harq_pid].sched_pusch.phr_txpower_calc;
UE->mac_stats.deltaMCS = txpower_calc;
UE->mac_stats.NPRB = UE_scheduling_control->ul_harq_processes[harq_pid].sched_pusch.rbSize;
UE_scheduling_control->tpc0 = nr_get_tpc(target_snrx10,ul_cqi,30,txpower_calc);
if (UE_scheduling_control->ph <0 && UE_scheduling_control->tpc0 > 1)
UE_scheduling_control->tpc0 = 1;
if (timing_advance != 0xffff)
UE_scheduling_control->ta_update = timing_advance;
UE_scheduling_control->raw_rssi = rssi;
UE_scheduling_control->pusch_snrx10 = ul_cqi * 5 - 640;
UE_scheduling_control->pusch_snrx10 = ul_cqi * 5 - 640 - (txpower_calc*10);
if (UE_scheduling_control->tpc0 > 1) LOG_D(NR_MAC, "[UE %04x] %d.%d. PUSCH TPC %d and TA %d pusch_snrx10 %d rssi %d phrx_tx_power %d PHR (1PRB) %d mcs %d, nb_rb %d\n",UE->rnti,frameP,slotP,UE_scheduling_control->tpc0,UE_scheduling_control->ta_update,UE_scheduling_control->pusch_snrx10,UE_scheduling_control->raw_rssi,txpower_calc,UE_scheduling_control->ph,UE_scheduling_control->ul_harq_processes[harq_pid].sched_pusch.mcs,UE_scheduling_control->ul_harq_processes[harq_pid].sched_pusch.rbSize);
NR_UE_ul_harq_t *cur_harq = &UE_scheduling_control->ul_harq_processes[harq_pid];
if (cur_harq->round == 0)
UE->mac_stats.pusch_snrx10 = UE_scheduling_control->pusch_snrx10;
LOG_D(NR_MAC, "[UE %04x] PUSCH TPC %d and TA %d\n",UE->rnti,UE_scheduling_control->tpc0,UE_scheduling_control->ta_update);
}
else{
@@ -753,12 +765,11 @@ static void _nr_rx_sdu(const module_id_t gnb_mod_idP,
ra->rnti);
NR_UE_sched_ctrl_t *UE_scheduling_control = &UE_msg3_stage->UE_sched_ctrl;
UE_scheduling_control->tpc0 = nr_get_tpc(target_snrx10, ul_cqi, 30);
UE_scheduling_control->tpc0 = nr_get_tpc(target_snrx10, ul_cqi, 30,UE_scheduling_control->sched_pusch.phr_txpower_calc);
if (timing_advance != 0xffff)
UE_scheduling_control->ta_update = timing_advance;
UE_scheduling_control->raw_rssi = rssi;
UE_scheduling_control->pusch_snrx10 = ul_cqi * 5 - 640;
UE_scheduling_control->pusch_snrx10 = ul_cqi * 5 - 640 - UE_scheduling_control->sched_pusch.phr_txpower_calc*10;
LOG_D(NR_MAC, "[UE %04x] PUSCH TPC %d and TA %d\n", UE_msg3_stage->rnti, UE_scheduling_control->tpc0, UE_scheduling_control->ta_update);
if (ra->cfra) {
LOG_A(NR_MAC, "(rnti 0x%04x) CFRA procedure succeeded!\n", ra->rnti);
@@ -1434,13 +1445,21 @@ static void nr_ue_max_mcs_min_rb(int mu,
update_ul_ue_R_Qm(*mcs, ul_bwp->mcs_table, ul_bwp->pusch_Config, &R, &Qm);
long *deltaMCS = ul_bwp->pusch_Config ? ul_bwp->pusch_Config->pusch_PowerControl->deltaMCS : NULL;
tbs_bits = nr_compute_tbs(Qm, R, *Rb,
sched_pusch->tda_info.nrOfSymbols,
sched_pusch->dmrs_info.N_PRB_DMRS * sched_pusch->dmrs_info.num_dmrs_symb,
0, // nb_rb_oh
0,
sched_pusch->nrOfLayers);
int tx_power = compute_ph_factor(mu,
tbs_bits,
*Rb,
sched_pusch->nrOfLayers,
sched_pusch->tda_info.nrOfSymbols,
sched_pusch->dmrs_info.N_PRB_DMRS*sched_pusch->dmrs_info.num_dmrs_symb,
deltaMCS);
sched_pusch->dmrs_info.N_PRB_DMRS * sched_pusch->dmrs_info.num_dmrs_symb,
deltaMCS,
1,0);
while (ph_limit < tx_power && *Rb > minRb) {
(*Rb)--;
@@ -1456,7 +1475,8 @@ static void nr_ue_max_mcs_min_rb(int mu,
sched_pusch->nrOfLayers,
sched_pusch->tda_info.nrOfSymbols,
sched_pusch->dmrs_info.N_PRB_DMRS*sched_pusch->dmrs_info.num_dmrs_symb,
deltaMCS);
deltaMCS,1,0);
LOG_D(NR_MAC, "Checking %d RBs, MCS %d, ph_limit %d, tx_power %d\n",*Rb,*mcs,ph_limit,tx_power);
}
while (ph_limit < tx_power && *mcs > 0) {
@@ -1474,7 +1494,8 @@ static void nr_ue_max_mcs_min_rb(int mu,
sched_pusch->nrOfLayers,
sched_pusch->tda_info.nrOfSymbols,
sched_pusch->dmrs_info.N_PRB_DMRS*sched_pusch->dmrs_info.num_dmrs_symb,
deltaMCS);
deltaMCS,1,0);
LOG_D(NR_MAC, "Checking %d RBs, MCS %d, ph_limit %d, tx_power %d\n",*Rb,*mcs,ph_limit,tx_power);
}
if (ph_limit < tx_power)
@@ -1643,7 +1664,7 @@ static void pf_ul(module_id_t module_id,
gNB_MAC_INST *nrmac = RC.nrmac[module_id];
NR_ServingCellConfigCommon_t *scc = nrmac->common_channels[CC_id].ServingCellConfigCommon;
const int min_rb = 5;
const int min_rb = 1;
// UEs that could be scheduled
UEsched_t UE_sched[MAX_MOBILES_PER_GNB] = {0};
int remainUEs = max_num_ue;
@@ -1717,11 +1738,13 @@ static void pf_ul(module_id_t module_id,
const NR_bler_options_t *bo = &nrmac->ul_bler;
const int max_mcs_table = (current_BWP->mcs_table == 0 || current_BWP->mcs_table == 2) ? 28 : 27;
const int max_mcs = min(bo->max_mcs, max_mcs_table); /* no per-user maximum MCS yet */
long *deltaMCS = current_BWP->pusch_Config ? current_BWP->pusch_Config->pusch_PowerControl->deltaMCS : NULL;
if (bo->harq_round_max == 1)
sched_pusch->mcs = max_mcs;
else
else {
sched_pusch->mcs = get_mcs_from_bler(bo, stats, &sched_ctrl->ul_bler_stats, max_mcs, frame);
LOG_D(NR_MAC,"%d.%d starting mcs %d bleri %f\n",frame,slot,sched_pusch->mcs,sched_ctrl->ul_bler_stats.bler);
}
/* Schedule UE on SR or UL inactivity and no data (otherwise, will be scheduled
* based on data to transmit) */
if (B == 0 && do_sched) {
@@ -1790,6 +1813,25 @@ static void pf_ul(module_id_t module_id,
0, // nb_rb_oh
0,
sched_pusch->nrOfLayers) >> 3;
long *deltaMCS = current_BWP->pusch_Config ? current_BWP->pusch_Config->pusch_PowerControl->deltaMCS : NULL;
sched_pusch->phr_txpower_calc = compute_ph_factor(current_BWP->scs,
sched_pusch->tb_size << 3,
sched_pusch->rbSize,
sched_pusch->nrOfLayers,
sched_pusch->tda_info.nrOfSymbols,
sched_pusch->dmrs_info.N_PRB_DMRS * sched_pusch->dmrs_info.num_dmrs_symb,
deltaMCS,
0,0);
LOG_D(NR_MAC,
"pf_ul %d.%d UE %x Scheduling PUSCH (no data) nrb %d mcs %d tbs %d bits phr_txpower %d\n",
frame,
slot,
UE->rnti,
sched_pusch->rbSize,
sched_pusch->mcs,
sched_pusch->tb_size << 3,
sched_pusch->phr_txpower_calc);
/* Mark the corresponding RBs as used */
n_rb_sched -= sched_pusch->rbSize;
@@ -1906,6 +1948,19 @@ static void pf_ul(module_id_t module_id,
&TBS,
&rbSize);
// Calacualte the normalized tx_power for PHR
long *deltaMCS = current_BWP->pusch_Config ? current_BWP->pusch_Config->pusch_PowerControl->deltaMCS : NULL;
int tbs_bits = TBS << 3;
sched_pusch->phr_txpower_calc = compute_ph_factor(current_BWP->scs,
tbs_bits,
rbSize,
sched_pusch->nrOfLayers,
sched_pusch->tda_info.nrOfSymbols,
sched_pusch->dmrs_info.N_PRB_DMRS * sched_pusch->dmrs_info.num_dmrs_symb,
deltaMCS,
0,0);
sched_pusch->rbSize = rbSize;
sched_pusch->tb_size = TBS;
LOG_D(NR_MAC,"rbSize %d (max_rbSize %d), TBS %d, est buf %d, sched_ul %d, B %d, CCE %d, num_dmrs_symb %d, N_PRB_DMRS %d\n",
@@ -2293,6 +2348,19 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, n
pusch_pdu->maintenance_parms_v3.ldpcBaseGraph = get_BG(sched_pusch->tb_size<<3,sched_pusch->R);
// Calacualte the normalized tx_power for PHR
long *deltaMCS = current_BWP->pusch_Config ? current_BWP->pusch_Config->pusch_PowerControl->deltaMCS : NULL;
int tbs_bits = pusch_pdu->pusch_data.tb_size << 3;
sched_pusch->phr_txpower_calc = compute_ph_factor(current_BWP->scs,
tbs_bits,
sched_pusch->rbSize,
sched_pusch->nrOfLayers,
sched_pusch->tda_info.nrOfSymbols,
sched_pusch->dmrs_info.N_PRB_DMRS * sched_pusch->dmrs_info.num_dmrs_symb,
deltaMCS,
0,0);
NR_UE_ServingCell_Info_t *sc_info = &UE->sc_info;
if (sc_info->rateMatching_PUSCH) {
// TBS_LBRM according to section 5.4.2.1 of 38.212

View File

@@ -272,7 +272,7 @@ NR_pusch_dmrs_t get_ul_dmrs_params(const NR_ServingCellConfigCommon_t *scc,
const NR_tda_info_t *tda_info,
const int Layers);
uint8_t nr_get_tpc(int target, uint8_t cqi, int incr);
uint8_t nr_get_tpc(int target, uint8_t cqi, int incr, int tx_power);
int get_spf(nfapi_nr_config_request_scf_t *cfg);

View File

@@ -152,13 +152,22 @@ size_t dump_mac_stats(gNB_MAC_INST *gNB, char *output, size_t strlen, bool reset
for (int i = 1; i < gNB->ul_bler.harq_round_max; i++)
output += snprintf(output, end - output, "/%"PRIu64, stats->ul.rounds[i]);
char deltaMCS_str[100]="\0";
if (UE->current_UL_BWP.pusch_Config && UE->current_UL_BWP.pusch_Config->pusch_PowerControl->deltaMCS) {
sprintf(deltaMCS_str,"deltaMCS %d\n",UE->mac_stats.deltaMCS);
}
output += snprintf(output,
end - output,
", ulsch_DTX %d, ulsch_errors %"PRIu64", BLER %.5f MCS %d\n",
", ulsch_DTX %d, ulsch_errors %"PRIu64", BLER %.5f MCS %d (Qm %d %s dB) NPRB %d SNR %d.%d dB\n",
stats->ulsch_DTX,
stats->ul.errors,
sched_ctrl->ul_bler_stats.bler,
sched_ctrl->ul_bler_stats.mcs);
sched_ctrl->ul_bler_stats.mcs,
nr_get_Qm_ul(sched_ctrl->ul_bler_stats.mcs,UE->current_UL_BWP.mcs_table),
deltaMCS_str,UE->mac_stats.NPRB,
sched_ctrl->pusch_snrx10 / 10,
sched_ctrl->pusch_snrx10 % 10);
output += snprintf(output,
end - output,
"UE %04x: ulsch_total_bytes_scheduled %"PRIu64", ulsch_total_bytes_received %"PRIu64"\n",

View File

@@ -135,6 +135,8 @@ typedef struct nr_mac_config_t {
int do_CSIRS;
int do_SRS;
bool force_256qam_off;
bool force_UL256qam_off;
bool use_deltaMCS;
//int pusch_TargetSNRx10;
//int pucch_TargetSNRx10;
} nr_mac_config_t;
@@ -407,6 +409,7 @@ typedef struct NR_sched_pusch {
int time_domain_allocation;
NR_tda_info_t tda_info;
NR_pusch_dmrs_t dmrs_info;
int phr_txpower_calc;
} NR_sched_pusch_t;
typedef struct NR_sched_srs {
@@ -575,6 +578,9 @@ typedef struct {
/// PHR info: power headroom level (dB)
int ph;
/// PHR info: power headroom level (dB) for 1 PRB
int ph0;
/// PHR info: nominal UE transmit power levels (dBm)
int pcmax;
@@ -673,6 +679,9 @@ typedef struct NR_mac_stats {
int cumul_rsrp;
uint8_t num_rsrp_meas;
char srs_stats[50]; // Statistics may differ depending on SRS usage
int pusch_snrx10;
int deltaMCS;
int NPRB;
} NR_mac_stats_t;
typedef struct NR_bler_options {

View File

@@ -385,12 +385,49 @@ static void match_crc_rx_pdu(nfapi_nr_rx_data_indication_t *rx_ind, nfapi_nr_crc
}
}
static void scheduler(module_id_t module_id, int CC_id, int frame, int slot)
{
NR_IF_Module_t *ifi = nr_if_inst[module_id];
// gNB_MAC_INST *mac = RC.nrmac[module_id];
NR_Sched_Rsp_t *sched_info;
LOG_D(NR_MAC, "Calling scheduler for %d.%d\n", frame, slot);
sched_info = allocate_sched_response();
// clear UL DCI prior to handling ULSCH
sched_info->UL_dci_req.numPdus = 0;
gNB_dlsch_ulsch_scheduler(module_id, frame, slot, sched_info);
ifi->CC_mask = 0;
sched_info->module_id = module_id;
sched_info->CC_id = CC_id;
sched_info->frame = frame;
sched_info->slot = slot;
/*
sched_info->DL_req = &mac->DL_req[CC_id];
sched_info->UL_dci_req = &mac->UL_dci_req[CC_id];
sched_info->UL_tti_req = mac->UL_tti_req[CC_id];
sched_info->TX_req = &mac->TX_req[CC_id];
*/
#ifdef DUMP_FAPI
dump_dl(sched_info);
#endif
AssertFatal(ifi->NR_Schedule_response != NULL, "nr_schedule_response is null (mod %d, cc %d)\n", module_id, CC_id);
ifi->NR_Schedule_response(sched_info);
LOG_D(NR_PHY,
"NR_Schedule_response: SFN SLOT:%d %d dl_pdus:%d\n",
sched_info->frame,
sched_info->slot,
sched_info->DL_req.dl_tti_request_body.nPDUs);
}
void NR_UL_indication(NR_UL_IND_t *UL_info) {
AssertFatal(UL_info!=NULL,"UL_info is null\n");
module_id_t module_id = UL_info->module_id;
int CC_id = UL_info->CC_id;
NR_Sched_Rsp_t *sched_info;
NR_IF_Module_t *ifi = nr_if_inst[module_id];
module_id_t module_id = UL_info->module_id;
int CC_id = UL_info->CC_id;
LOG_D(NR_PHY,"SFN/SLOT:%d.%d module_id:%d CC_id:%d UL_info[rach_pdus:%zu rx_ind:%zu crcs:%zu]\n",
UL_info->frame, UL_info->slot,
@@ -449,57 +486,6 @@ void NR_UL_indication(NR_UL_IND_t *UL_info) {
if (get_softmodem_params()->emulate_l1) {
free_unqueued_nfapi_indications(rach_ind, uci_ind, rx_ind, crc_ind);
}
if (NFAPI_MODE != NFAPI_MODE_PNF) {
gNB_MAC_INST *mac = RC.nrmac[module_id];
if (ifi->CC_mask==0) {
ifi->current_frame = UL_info->frame;
ifi->current_slot = UL_info->slot;
} else {
AssertFatal(UL_info->frame != ifi->current_frame,"CC_mask %x is not full and frame has changed\n",ifi->CC_mask);
AssertFatal(UL_info->slot != ifi->current_slot,"CC_mask %x is not full and slot has changed\n",ifi->CC_mask);
}
ifi->CC_mask |= (1<<CC_id);
if (ifi->CC_mask == ((1<<MAX_NUM_CCs)-1)) {
/*
eNB_dlsch_ulsch_scheduler(module_id,
(UL_info->frame+((UL_info->slot>(9-sl_ahead))?1:0)) % 1024,
(UL_info->slot+sl_ahead)%10);
*/
nfapi_nr_config_request_scf_t *cfg = &mac->config[CC_id];
int spf = get_spf(cfg);
sched_info = allocate_sched_response();
// clear UL DCI prior to handling ULSCH
sched_info->UL_dci_req.numPdus = 0;
gNB_dlsch_ulsch_scheduler(module_id,
(UL_info->frame + ((UL_info->slot > (spf - 1 - ifi->sl_ahead)) ? 1 : 0)) % 1024,
(UL_info->slot + ifi->sl_ahead) % spf,
sched_info);
ifi->CC_mask = 0;
sched_info->module_id = module_id;
sched_info->CC_id = CC_id;
sched_info->frame = (UL_info->frame + ((UL_info->slot>(spf-1-ifi->sl_ahead)) ? 1 : 0)) % 1024;
sched_info->slot = (UL_info->slot+ifi->sl_ahead)%spf;
#ifdef DUMP_FAPI
dump_dl(sched_info);
#endif
AssertFatal(ifi->NR_Schedule_response!=NULL,
"nr_schedule_response is null (mod %d, cc %d)\n",
module_id,
CC_id);
ifi->NR_Schedule_response(sched_info);
LOG_D(NR_PHY,
"NR_Schedule_response: SFN SLOT:%d %d dl_pdus:%d\n",
sched_info->frame,
sched_info->slot,
sched_info->DL_req.dl_tti_request_body.nPDUs);
}
}
}
NR_IF_Module_t *NR_IF_Module_init(int Mod_id) {
@@ -514,6 +500,7 @@ NR_IF_Module_t *NR_IF_Module_init(int Mod_id) {
nr_if_inst[Mod_id]->CC_mask=0;
nr_if_inst[Mod_id]->NR_UL_indication = NR_UL_indication;
nr_if_inst[Mod_id]->NR_mac_scheduler = scheduler;
AssertFatal(pthread_mutex_init(&nr_if_inst[Mod_id]->if_mutex,NULL)==0,
"allocation of nr_if_inst[%d]->if_mutex fails\n",Mod_id);
}

View File

@@ -113,6 +113,7 @@ typedef struct NR_IF_Module_s {
//define the function pointer
void (*NR_UL_indication)(NR_UL_IND_t *UL_INFO);
void (*NR_Schedule_response)(NR_Sched_Rsp_t *Sched_INFO);
void (*NR_mac_scheduler)(module_id_t module_idP, int CC_id, int frame, int slot);
void (*NR_PHY_config_req)(NR_PHY_Config_t *config_INFO);
uint32_t CC_mask;
uint16_t current_frame;

View File

@@ -105,6 +105,7 @@ NR_Sched_Rsp_t *allocate_sched_response(void)
static void release_sched_response(int sched_response_id)
{
LOG_D(NR_MAC,"Releasing sched_response %d\n",sched_response_id);
resp_freelist_next[sched_response_id] = resp_freelist_head;
resp_freelist_head = sched_response_id;
}
@@ -124,6 +125,7 @@ void deref_sched_response(int sched_response_id)
AssertFatal(resp_freelist_inited, "sched_response used before init\n");
AssertFatal(resp_refcount[sched_response_id] > 0, "sched_reponse decreased too much\n");
LOG_D(NR_MAC,"resp_refcount[%d] %d\n",sched_response_id,resp_refcount[sched_response_id]);
resp_refcount[sched_response_id]--;
if (resp_refcount[sched_response_id] == 0)
release_sched_response(sched_response_id);
@@ -141,6 +143,8 @@ void inc_ref_sched_response(int sched_response_id)
if (sched_response_id == -1)
return;
LOG_D(NR_MAC,"Incrementing sched_resp resp_refounct[%d] = %d\n",
sched_response_id,resp_refcount[sched_response_id]);
if (pthread_mutex_lock(&resp_mutex))
AssertFatal(0, "pthread_mutex_lock failed\n");

View File

@@ -1162,6 +1162,7 @@ static void set_dl_mcs_table(int scs,
}
static struct NR_SetupRelease_PUSCH_Config *config_pusch(NR_PUSCH_Config_t *pusch_Config,
const bool use_deltaMCS,
const NR_ServingCellConfigCommon_t *scc,
const NR_UE_NR_Capability_t *uecap)
{
@@ -1218,9 +1219,12 @@ static struct NR_SetupRelease_PUSCH_Config *config_pusch(NR_PUSCH_Config_t *pusc
asn1cSeqAdd(&pusch_Config->pusch_PowerControl->pathlossReferenceRSToAddModList->list, plrefRS);
pusch_Config->pusch_PowerControl->pathlossReferenceRSToReleaseList = NULL;
pusch_Config->pusch_PowerControl->twoPUSCH_PC_AdjustmentStates = NULL;
if (!pusch_Config->pusch_PowerControl->deltaMCS)
pusch_Config->pusch_PowerControl->deltaMCS = calloc(1, sizeof(*pusch_Config->pusch_PowerControl->deltaMCS));
*pusch_Config->pusch_PowerControl->deltaMCS = NR_PUSCH_PowerControl__deltaMCS_enabled;
if (use_deltaMCS) {
if (!pusch_Config->pusch_PowerControl->deltaMCS)
pusch_Config->pusch_PowerControl->deltaMCS = calloc(1, sizeof(*pusch_Config->pusch_PowerControl->deltaMCS));
*pusch_Config->pusch_PowerControl->deltaMCS = NR_PUSCH_PowerControl__deltaMCS_enabled;
}
else free(pusch_Config->pusch_PowerControl->deltaMCS);
pusch_Config->pusch_PowerControl->sri_PUSCH_MappingToAddModList = NULL;
pusch_Config->pusch_PowerControl->sri_PUSCH_MappingToReleaseList = NULL;
pusch_Config->frequencyHopping = NULL;
@@ -1434,7 +1438,7 @@ static void config_uplinkBWP(NR_BWP_Uplink_t *ubwp,
pusch_Config = clone_pusch_config(servingcellconfigdedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[bwp_loop]
->bwp_Dedicated->pusch_Config->choice.setup);
}
ubwp->bwp_Dedicated->pusch_Config = config_pusch(pusch_Config, scc, configuration->force_256qam_off ? NULL : uecap);
ubwp->bwp_Dedicated->pusch_Config = config_pusch(pusch_Config, configuration->use_deltaMCS, scc, configuration->force_UL256qam_off ? NULL : uecap);
long maxMIMO_Layers = servingcellconfigdedicated &&
servingcellconfigdedicated->uplinkConfig
@@ -2217,7 +2221,7 @@ static NR_SpCellConfig_t *get_initial_SpCellConfig(int uid,
config_pucch_resset1(pucch_Config, NULL);
set_pucch_power_config(pucch_Config, configuration->do_CSIRS);
initialUplinkBWP->pusch_Config = config_pusch(NULL, scc, NULL);
initialUplinkBWP->pusch_Config = config_pusch(NULL, configuration->use_deltaMCS, scc, NULL);
long maxMIMO_Layers = uplinkConfig && uplinkConfig->pusch_ServingCellConfig
&& uplinkConfig->pusch_ServingCellConfig->choice.setup->ext1
@@ -2545,7 +2549,7 @@ void update_cellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig,
scc);
NR_BWP_UplinkDedicated_t *ul_bwp_Dedicated = SpCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP;
set_ul_mcs_table(configuration->force_256qam_off ? NULL : uecap, scc, ul_bwp_Dedicated->pusch_Config->choice.setup);
set_ul_mcs_table(configuration->force_UL256qam_off ? NULL : uecap, scc, ul_bwp_Dedicated->pusch_Config->choice.setup);
struct NR_ServingCellConfig__downlinkBWP_ToAddModList *DL_BWP_list =
SpCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList;
@@ -2563,7 +2567,7 @@ void update_cellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig,
int bwp_size = NRRIV2BW(ul_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
if (ul_bwp->bwp_Dedicated->pusch_Config) {
NR_PUSCH_Config_t *pusch_Config = ul_bwp->bwp_Dedicated->pusch_Config->choice.setup;
set_ul_mcs_table(configuration->force_256qam_off ? NULL : uecap, scc, pusch_Config);
set_ul_mcs_table(configuration->force_UL256qam_off ? NULL : uecap, scc, pusch_Config);
if (pusch_Config->maxRank == NULL) {
pusch_Config->maxRank = calloc(1, sizeof(*pusch_Config->maxRank));
}
@@ -2760,7 +2764,7 @@ NR_CellGroupConfig_t *get_default_secondaryCellGroup(const NR_ServingCellConfigC
pusch_Config = clone_pusch_config(
servingcellconfigdedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup);
}
initialUplinkBWP->pusch_Config = config_pusch(pusch_Config, servingcellconfigcommon, uecap);
initialUplinkBWP->pusch_Config = config_pusch(pusch_Config, configuration->use_deltaMCS,servingcellconfigcommon, uecap);
long maxMIMO_Layers =
servingcellconfigdedicated->uplinkConfig && servingcellconfigdedicated->uplinkConfig->pusch_ServingCellConfig

View File

@@ -337,7 +337,7 @@ void *trx_eth_write_udp_cmd(udpTXelem_t *udpTXelem) {
TS -= device->txrx_offset;
int TSinc = (6*256*device->sampling_rate_ratio_d)/device->sampling_rate_ratio_n;
int len=256;
LOG_D(PHY,"TS %llu (%llu),txrx_offset %d,d %d, n %d, buff[0] %p buff[1] %p\n",
LOG_D(NR_PHY,"in eth send: TS %llu (%llu),txrx_offset %d,d %d, n %d, buff[0] %p buff[1] %p\n",
(unsigned long long)TS,(unsigned long long)timestamp,device->txrx_offset,device->sampling_rate_ratio_d,device->sampling_rate_ratio_n,
buff[0],buff[1]);
for (int offset=0;offset<nsamps;offset+=256,TS+=TSinc) {
@@ -349,7 +349,7 @@ void *trx_eth_write_udp_cmd(udpTXelem_t *udpTXelem) {
*(uint8_t *)(buff2 + 2) = len>>8;
*(uint8_t *)(buff2 + 3) = len&0xff;
for (int aid = 0; aid<nant; aid++) {
LOG_D(PHY,"TS %llu (TS0 %llu) aa %d : offset %d, len %d\n",(unsigned long long)TS,(unsigned long long)fhstate->TS0,aid,offset,len);
LOG_D(NR_PHY,"TS %llu (TS0 %llu) aa %d : offset %d, len %d\n",(unsigned long long)TS,(unsigned long long)fhstate->TS0,aid,offset,len);
// ECPRI PC_ID (2 bytes)
*(uint16_t *)(buff2 + 4) = aid;
// bring TX data into 12 MSBs
@@ -383,6 +383,7 @@ void *trx_eth_write_udp_cmd(udpTXelem_t *udpTXelem) {
} // aid
} // offset
free(buff);
LOG_D(NR_PHY,"Returning from eth send\n");
return(NULL);
}

View File

@@ -924,7 +924,7 @@ static int rfsimulator_read(openair0_device *device, openair0_timestamp *ptimest
if ( t->nextRxTstamp == 0)
LOG_W(HW, "No connected device, generating void samples...\n");
if (!flushInput(t, t->wait_timeout, nsamps)) {
if (!flushInput(t, 1/*t->wait_timeout*/, nsamps)) {
for (int x=0; x < nbAnt; x++)
memset(samplesVoid[x],0,sampleToByte(nsamps,1));

View File

@@ -11,7 +11,7 @@ gNBs =
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = 1;
plmn_list = ({ mcc = 208; mnc = 99; mnc_length = 2; snssaiList = ({ sst = 1 }) });
plmn_list = ({ mcc = 208; mnc = 98; mnc_length = 2; snssaiList = ({ sst = 1 }) });
nr_cellid = 12345678L;
@@ -136,10 +136,10 @@ gNBs =
# pattern1
# dl_UL_TransmissionPeriodicity
# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
dl_UL_TransmissionPeriodicity = 6;
nrofDownlinkSlots = 7;
dl_UL_TransmissionPeriodicity = 5;
nrofDownlinkSlots = 3;
nrofDownlinkSymbols = 6;
nrofUplinkSlots = 2;
nrofUplinkSlots = 1;
nrofUplinkSymbols = 4;
ssPBCH_BlockPower = -25;
@@ -168,9 +168,9 @@ gNBs =
NETWORK_INTERFACES :
{
GNB_INTERFACE_NAME_FOR_NG_AMF = "demo-oai";
GNB_INTERFACE_NAME_FOR_NG_AMF = "internet";
GNB_IPV4_ADDRESS_FOR_NG_AMF = "192.168.70.129/24";
GNB_INTERFACE_NAME_FOR_NGU = "demo-oai";
GNB_INTERFACE_NAME_FOR_NGU = "internet";
GNB_IPV4_ADDRESS_FOR_NGU = "192.168.70.129/24";
GNB_PORT_FOR_S1U = 2152; # Spec 2152
};
@@ -186,6 +186,10 @@ MACRLCs = (
pusch_TargetSNRx10 = 150;
pucch_TargetSNRx10 = 200;
ulsch_max_frame_inactivity = 0;
ul_max_mcs = 10;
min_grant_prb = 20;
min_grant_mcs = 16;
dl_max_mcs = 10;
}
);
@@ -204,8 +208,8 @@ RUs = (
local_rf = "yes"
nb_tx = 1
nb_rx = 1
att_tx = 6;
att_rx = 6;
att_tx = 0;
att_rx = 0;
bands = [41];
max_pdschReferenceSignalPower = -27;
max_rxgain = 114;
@@ -213,6 +217,7 @@ RUs = (
#beamforming 1x4 matrix:
bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000];
clock_src = "internal";
sl_ahead = 2;
}
);