Get beam values from analog beamforming VE instead of unused digital beam table

cmake_targets/tools/oran_fhi_integration_patches/E/phy_fr2.patch

@@ -0,0 +1,16 @@
+diff --git a/fhi_lib/lib/build/libxran.so b/fhi_lib/lib/build/libxran.so
+index 54f4160..6408072 100755
+Binary files a/fhi_lib/lib/build/libxran.so and b/fhi_lib/lib/build/libxran.so differ
+diff --git a/fhi_lib/lib/src/xran_cp_proc.c b/fhi_lib/lib/src/xran_cp_proc.c
+index 4bd9b50..65fc8ce 100644
+--- a/fhi_lib/lib/src/xran_cp_proc.c
++++ b/fhi_lib/lib/src/xran_cp_proc.c
+@@ -364,7 +364,7 @@ xran_cp_create_and_send_section(void *pHandle, uint8_t ru_port_id, int dir, int
+         //if (p_x_ctx->beamID)
+         //printf("########### subframe_id %d slot_id %d i %d startSym %d beam %d\n",subframe_id, slot_id, i , startSym,  p_x_ctx->beamID[0][(subframe_id*8+slot_id)*14 + startSym + i]);
+         sect_geninfo[i].info.reMask      = 0xfff;
+-        if (p_x_ctx->beamID)
++        if (p_x_ctx->beamID[0])
+         sect_geninfo[i].info.beamId      = p_x_ctx->beamID[0][(subframe_id*8+slot_id)*14 + startSym + i];
+         else
+         sect_geninfo[i].info.beamId      = 1;

docker/Dockerfile.build.fhi72.ubuntu22

@@ -54,10 +54,8 @@ RUN wget http://fast.dpdk.org/rel/dpdk-20.11.9.tar.xz && \
     ninja install -C build
 
 ## Build Fronthaul library
-RUN git clone https://gerrit.o-ran-sc.org/r/o-du/phy.git /opt/phy && \
+RUN cp -r /oai-ran/phy/ /opt/phy && \
     cd /opt/phy && \
-    git checkout oran_f_release_v1.0 &&\
-    git apply /oai-ran/cmake_targets/tools/oran_fhi_integration_patches/F/oaioran_F.patch && \
     cd /opt/phy/fhi_lib/lib && \
     WIRELESS_SDK_TOOLCHAIN=gcc RTE_SDK=/oai-ran/dpdk-stable-20.11.9/ XRAN_DIR=/opt/phy/fhi_lib make XRAN_LIB_SO=1 
 

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c

@@ -418,6 +418,7 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, slot_t slotP)
             beam_index = get_fapi_beamforming_index(gNB, cc->ssb_index[n_ssb]);
             // multi-beam allocation structure
             beam = beam_allocation_procedure(&gNB->beam_info, frameP, slotP, beam_index, slots_frame);
+            LOG_D(NR_MAC,"beam_allocation_procedure [PRACH] slot %d.%d SSB %d beam %d\n", frameP, slotP, cc->ssb_index[n_ssb], beam_index);
             AssertFatal(beam.idx >= 0, "Cannot allocate PRACH corresponding to %d SSB transmitted in any available beam\n", n_ssb + 1);
           } else {
             int first_ssb_index = (prach_occasion_id * (int)num_ssb_per_RO) % cc->num_active_ssb;
@@ -426,6 +427,7 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, slot_t slotP)
               beam_index = get_fapi_beamforming_index(gNB, cc->ssb_index[j]);
               // multi-beam allocation structure
               beam = beam_allocation_procedure(&gNB->beam_info, frameP, slotP, beam_index, slots_frame);
+              LOG_D(NR_MAC,"beam_allocation_procedure [PRACH multi ssb per RO] slot %d.%d SSB %d beam %d\n", frameP, slotP, cc->ssb_index[j], beam_index);
               AssertFatal(beam.idx >= 0, "Cannot allocate PRACH corresponding to SSB %d in any available beam\n", j);
             }
           }

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c

@@ -2976,7 +2976,7 @@ void nr_csirs_scheduling(int Mod_idP, frame_t frame, slot_t slot, nfapi_nr_dl_tt
 
           LOG_D(NR_MAC,"Scheduling CSI-RS in frame %d slot %d Resource ID %ld\n", frame, slot, nzpcsi->nzp_CSI_RS_ResourceId);
           NR_beam_alloc_t beam_csi = beam_allocation_procedure(&gNB_mac->beam_info, frame, slot, UE->UE_beam_index, n_slots_frame);
-          AssertFatal(beam_csi.idx >= 0, "Cannot allocate CSI-RS in any available beam\n");
+          AssertFatal(beam_csi.idx >= 0, "Cannot allocate CSI-RS in any available beam (beam %d)\n", UE->UE_beam_index);
           uint16_t *vrb_map = gNB_mac->common_channels[CC_id].vrb_map[beam_csi.idx];
           UE_info->sched_csirs |= (1 << dl_bwp->bwp_id);
 
@@ -3398,7 +3398,7 @@ void beam_selection_procedures(gNB_MAC_INST *mac, NR_UE_info_t *UE)
   if (UE->UE_beam_index == new_bf_index)
     return; // no beam change needed
 
-  LOG_I(NR_MAC, "[UE %x] Switching to beam with ID %d (SSB number %d)\n", UE->rnti, new_bf_index, rsrp_report->resource_id[0]);
+  LOG_E(NR_MAC, "[UE %x] Switching to beam with ID %d (SSB number %d)\n", UE->rnti, new_bf_index, rsrp_report->resource_id[0]);
   UE->UE_beam_index = new_bf_index;
 }
 

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c

@@ -469,6 +469,8 @@ static void nr_configure_srs(gNB_MAC_INST *nrmac,
   }
   srs_pdu->beamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = UE->UE_beam_index;
   NR_beam_alloc_t beam = beam_allocation_procedure(&nrmac->beam_info, frame, slot, UE->UE_beam_index, slots_per_frame);
+
+  LOG_D(NR_MAC,"beam_allocation_procedure [SRS] slot %d.%d beam %d\n", frame, slot, UE->UE_beam_index);
   AssertFatal(beam.idx >= 0, "Cannot allocate SRS in any available beam\n");
   uint16_t *vrb_map_UL = &nrmac->common_channels[CC_id].vrb_map_UL[beam.idx][buffer_index * MAX_BWP_SIZE];
   uint64_t mask = SL_to_bitmap(srs_pdu->time_start_position, srs_pdu->num_symbols);

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c

@@ -291,6 +291,8 @@ void nr_csi_meas_reporting(int Mod_idP,frame_t frame, slot_t slot)
 
       // going through the list of PUCCH resources to find the one indexed by resource_id
       NR_beam_alloc_t beam = beam_allocation_procedure(&nrmac->beam_info, sched_frame, sched_slot, UE->UE_beam_index, n_slots_frame);
+      LOG_D(NR_MAC,"beam_allocation_procedure [CSI] slot %d.%d UE %d beam %d\n", sched_frame, sched_slot, UE->rnti, UE->UE_beam_index);
+
       AssertFatal(beam.idx >= 0, "Cannot allocate CSI measurements on PUCCH in any available beam\n");
       const int index = ul_buffer_index(sched_frame, sched_slot, n_slots_frame, nrmac->vrb_map_UL_size);
       uint16_t *vrb_map_UL = &nrmac->common_channels[0].vrb_map_UL[beam.idx][index * MAX_BWP_SIZE];
@@ -563,7 +565,7 @@ static void evaluate_rsrp_report(gNB_MAC_INST *nrmac,
     int bitlen = csi_report->CSI_report_bitlen.cri_ssbri_bitlen;
     curr_payload = pickandreverse_bits(payload, bitlen, *cumul_bits);
     rsrp_report->resource_id[i] = *(index_list[bitlen > 0 ? ((curr_payload) & ~(~1U << (bitlen - 1))) : bitlen]);
-    LOG_D(MAC,"SSB/CSI-RS index = %d\n", rsrp_report->resource_id[i]);
+    LOG_D(MAC,"SSB/CSI-RS i = %d index = %d\n", i, rsrp_report->resource_id[i]);
     *cumul_bits += bitlen;
   }
 
@@ -1193,6 +1195,8 @@ int nr_acknack_scheduling(gNB_MAC_INST *mac,
       // checking if in ul_slot the resources potentially to be assigned to this PUCCH are available
       set_pucch_allocation(ul_bwp, r_pucch, bwp_size, curr_pucch);
       NR_beam_alloc_t beam = beam_allocation_procedure(&mac->beam_info, pucch_frame, pucch_slot, ue_beam, n_slots_frame);
+      LOG_D(NR_MAC,"beam_allocation_procedure [ACKNACK] slot %d.%d UE %d beam %d\n", pucch_frame, pucch_slot, UE->rnti, ue_beam);
+
       if (beam.idx < 0) {
         LOG_D(NR_MAC,
               "DL %4d.%2d, UL_ACK %4d.%2d beam resources for this occasion are already occupied, move to the following occasion\n",
@@ -1299,6 +1303,8 @@ void nr_sr_reporting(gNB_MAC_INST *nrmac, frame_t SFN, slot_t slot)
       }
       else {
         NR_beam_alloc_t beam = beam_allocation_procedure(&nrmac->beam_info, SFN, slot, UE->UE_beam_index, n_slots_frame);
+        LOG_D(NR_MAC,"beam_allocation_procedure [SR] slot %d.%d UE %d beam %d\n", SFN, slot, UE->rnti, UE->UE_beam_index);
+
         AssertFatal(beam.idx >= 0, "Cannot allocate SR in any available beam\n");
         const int index = ul_buffer_index(SFN, slot, n_slots_frame, nrmac->vrb_map_UL_size);
         uint16_t *vrb_map_UL = &nrmac->common_channels[CC_id].vrb_map_UL[beam.idx][index * MAX_BWP_SIZE];

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c

@@ -1875,6 +1875,8 @@ static void pf_ul(module_id_t module_id,
     NR_UE_UL_BWP_t *current_BWP = &UE->current_UL_BWP;
 
     NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch;
+    sched_pusch->frame = sched_frame;
+    sched_pusch->slot = sched_slot;
     const NR_mac_dir_stats_t *stats = &UE->mac_stats.ul;
 
     /* Calculate throughput */
@@ -1889,12 +1891,18 @@ static void pf_ul(module_id_t module_id,
       continue;
 
     NR_beam_alloc_t dci_beam = beam_allocation_procedure(&nrmac->beam_info, frame, slot, UE->UE_beam_index, slots_per_frame);
+
+    LOG_D(NR_MAC,"beam_allocation_procedure [DCI UL] slot %d.%d UE %d beam %d\n", frame, slot, UE->rnti, UE->UE_beam_index);
+
     if (dci_beam.idx < 0) {
       LOG_D(NR_MAC, "[UE %04x][%4d.%2d] Beam could not be allocated\n", UE->rnti, frame, slot);
       continue;
     }
 
     NR_beam_alloc_t beam = beam_allocation_procedure(&nrmac->beam_info, sched_frame, sched_slot, UE->UE_beam_index, slots_per_frame);
+
+    LOG_D(NR_MAC,"beam_allocation_procedure [PUSCH] slot %d.%d UE %d beam %d\n", sched_pusch->frame, sched_pusch->slot, UE->rnti, UE->UE_beam_index);
+
     if (beam.idx < 0) {
       LOG_D(NR_MAC, "[UE %04x][%4d.%2d] Beam could not be allocated\n", UE->rnti, frame, slot);
       reset_beam_status(&nrmac->beam_info, frame, slot, UE->UE_beam_index, slots_per_frame, dci_beam.new_beam);
@@ -2099,6 +2107,9 @@ static void pf_ul(module_id_t module_id,
     NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch;
 
     NR_beam_alloc_t beam = beam_allocation_procedure(&nrmac->beam_info, sched_frame, sched_slot, iterator->UE->UE_beam_index, slots_per_frame);
+
+    LOG_D(NR_MAC,"beam_allocation_procedure [PUSCH2] slot %d.%d UE %d beam %d\n", sched_pusch->frame, sched_pusch->slot, iterator->UE->rnti, iterator->UE->UE_beam_index);
+
     if (beam.idx < 0) {
       LOG_D(NR_MAC, "[UE %04x][%4d.%2d] Beam could not be allocated\n", iterator->UE->rnti, frame, slot);
       iterator++;
@@ -2112,6 +2123,9 @@ static void pf_ul(module_id_t module_id,
     }
 
     NR_beam_alloc_t dci_beam = beam_allocation_procedure(&nrmac->beam_info, frame, slot, iterator->UE->UE_beam_index, slots_per_frame);
+
+    LOG_D(NR_MAC,"beam_allocation_procedure [DCI UL2] slot %d.%d UE %d beam %d\n", frame, slot, iterator->UE->rnti, iterator->UE->UE_beam_index);
+
     if (dci_beam.idx < 0) {
       LOG_D(NR_MAC, "[UE %04x][%4d.%2d] Beam could not be allocated\n", iterator->UE->rnti, frame, slot);
       reset_beam_status(&nrmac->beam_info, sched_frame, sched_slot, iterator->UE->UE_beam_index, slots_per_frame, beam.new_beam);

openair2/LAYER2/NR_MAC_gNB/main.c

@@ -168,12 +168,13 @@ size_t dump_mac_stats(gNB_MAC_INST *gNB, char *output, size_t strlen, bool reset
 
     output += snprintf(output,
                        end - output,
-                       ", dlsch_errors %"PRIu64", pucch0_DTX %d, BLER %.5f MCS (%d) %d\n",
+                       ", dlsch_errors %"PRIu64", pucch0_DTX %d, BLER %.5f MCS (%d) %d BEAM ID %d\n",
                        stats->dl.errors,
                        stats->pucch0_DTX,
                        sched_ctrl->dl_bler_stats.bler,
                        UE->current_DL_BWP.mcsTableIdx,
-                       sched_ctrl->dl_bler_stats.mcs);
+                       sched_ctrl->dl_bler_stats.mcs,
+                       UE->UE_beam_index);
     if (reset_rsrp) {
       stats->num_rsrp_meas = 0;
       stats->cumul_rsrp = 0;

radio/fhi_72/CMakeLists.txt

@@ -16,11 +16,12 @@ add_library(oran_fhlib_5g MODULE
             oran-init.c
 )
 
-set(E_VERSION 5.1.6)
-set(F_VERSION 6.1.4)
+set(E_VERSION 5.1.0)
+set(F_VERSION 6.1.3)
 
 find_package(xran REQUIRED)
-if(xran_VERSION VERSION_EQUAL E_VERSION)
+if(xran_VERSION VERSION_GREATER_EQUAL E_VERSION
+   AND xran_VERSION VERSION_LESS F_VERSION)
   target_compile_definitions(oran_fhlib_5g PRIVATE E_RELEASE)
 elseif(xran_VERSION VERSION_EQUAL F_VERSION)
   target_compile_definitions(oran_fhlib_5g PRIVATE F_RELEASE)

radio/fhi_72/oaioran.c

@@ -41,6 +41,7 @@
 #include "oran-config.h" // for g_kbar
 
 #include "common/utils/threadPool/notified_fifo.h"
+#include "phy/fhi_lib/lib/src/xran_dev.h"
 
 #define N_SC_PER_PRB 12
 
@@ -86,7 +87,13 @@ void oai_xran_fh_rx_callback(void *pCallbackTag, xran_status_t status)
   uint32_t subframe = XranGetSubFrameNum(tti, slots_in_sf, sf_in_frame);
   uint32_t slot = XranGetSlotNum(tti, slots_in_sf);
 
-  uint32_t rx_sym = callback_tag->symbol & 0xFF;
+#ifdef F_RELEASE
+ uint32_t rx_sym = callback_tag->symbol & 0xFF;
+#endif
+#ifdef E_RELEASE
+ uint32_t rx_sym = callback_tag->symbol;
+#endif
+
   uint32_t ru_id = callback_tag->oXuId;
 
   LOG_D(HW, "rx_callback at %4d.%3d (subframe %d), rx_sym %d ru_id %d\n", frame, slot, subframe, rx_sym, ru_id);
@@ -262,6 +269,23 @@ static bool is_tdd_dl_guard_slot(const struct xran_frame_config *frame_conf, int
   return !is_tdd_ul_symbol(frame_conf, slot, XRAN_NUM_OF_SYMBOL_PER_SLOT - 1);
 }
 
+
+int update_beams_ctx(int beamID[2][1120])
+{
+  struct xran_device_ctx *xran_ctx = xran_dev_get_ctx();
+
+  if (beamID){
+    //printf("beamID is %d\n");
+    for (int i=0; i<80*14; i++) {
+      xran_ctx->beamID[0][i] = beamID[0][i];
+      //printf("[update_beams_ctx] slot %d symbol %d beamID is %d\n", i / 14, i%14, beamID[0][i]);
+
+    }
+  return 1;
+  }
+return 0;
+
+}
 /** @details Read PRACH and PUSCH data from xran buffers.  If
  * I/Q compression (bitwidth < 16 bits) is configured, deccompresses the data
  * before writing. Prints ON TIME counters every 128 frames.
@@ -319,8 +343,12 @@ int xran_fh_rx_read_slot(ru_info_t *ru, int *frame, int *slot)
   int slots_per_frame = 10 << fh_cfg->frame_conf.nNumerology;
 
   int tti = slots_per_frame * (*frame) + (*slot);
-
+#ifdef E_RELEASE
+  if (fh_cfg->prachEnable)
+    read_prach_data(ru, *frame, *slot);
+#else
   read_prach_data(ru, *frame, *slot);
+#endif
 
   const struct xran_fh_init *fh_init = get_xran_fh_init();
   int nPRBs = fh_cfg->nULRBs;
@@ -340,7 +368,8 @@ int xran_fh_rx_read_slot(ru_info_t *ru, int *frame, int *slot)
       if (is_tdd_dl_guard_slot(frame_conf, *slot))
         continue;
       // This loop would better be more inner to avoid confusion and maybe also errors.
-      for (int32_t sym_idx = 0; sym_idx < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_idx++) {
+      for (int32_t sym_idx_l = 0; sym_idx_l < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_idx_l++) {
+        int32_t sym_idx = sym_idx_l;
         /* the callback is for mixed and UL slots. In mixed, we have to
          * skip DL and guard symbols. */
         if (!is_tdd_ul_symbol(frame_conf, *slot, sym_idx))
@@ -351,9 +380,11 @@ int xran_fh_rx_read_slot(ru_info_t *ru, int *frame, int *slot)
         uint8_t *pPrbMapData = bufs->dstcp[ant_id % nb_rx_per_ru][tti % XRAN_N_FE_BUF_LEN].pBuffers->pData;
         struct xran_prb_map *pPrbMap = (struct xran_prb_map *)pPrbMapData;
 
-        struct xran_prb_elm *pRbElm = &pPrbMap->prbMap[0];
+        u_int8_t section_id_tmp = pPrbMap->nPrbElm < 10 ? sym_idx - 10: sym_idx; // Temporary hack for LiteON FR2 : receive UP section ID = 13
+        struct xran_prb_elm *pRbElm = &pPrbMap->prbMap[section_id_tmp];
 #ifdef E_RELEASE
-        struct xran_section_desc *p_sec_desc = pRbElm->p_sec_desc[sym_idx][0];
+        //struct xran_section_desc *p_sec_desc = pRbElm->p_sec_desc[sym_idx][0];
+        struct xran_section_desc *p_sec_desc = pRbElm->p_sec_desc[0][0];
 #elif defined F_RELEASE
         struct xran_section_desc *p_sec_desc = &pRbElm->sec_desc[sym_idx][0];
 #endif
@@ -366,17 +397,18 @@ int xran_fh_rx_read_slot(ru_info_t *ru, int *frame, int *slot)
         else
           pData = p_sec_desc->pData;
         ptr = pData;
-        pos = (int32_t *)(start_ptr + (4 * sym_idx * fftsize));
+        pos = (int32_t *)(start_ptr + (4 * sym_idx_l * fftsize));
         if (ptr == NULL || pos == NULL)
           continue;
 
         struct xran_prb_map *pRbMap = pPrbMap;
 
-        uint32_t idxElm = 0;
+        uint32_t idxElm = section_id_tmp;
         uint8_t *src = (uint8_t *)ptr;
 
         LOG_D(HW, "pRbMap->nPrbElm %d\n", pRbMap->nPrbElm);
-        for (idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++) {
+        /// TODO: Test for Liteon FR2 if it works with the loop
+        //for (idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++) {
           LOG_D(HW,
                 "prbMap[%d] : PRBstart %d nPRBs %d\n",
                 idxElm,
@@ -432,7 +464,7 @@ int xran_fh_rx_read_slot(ru_info_t *ru, int *frame, int *slot)
             printf("pRbElm->compMethod == %d is not supported\n", pRbElm->compMethod);
             exit(-1);
           }
-        }
+        //}
       } // sym_ind
     } // ant_ind
   } // vv_inf
@@ -472,9 +504,13 @@ int xran_fh_rx_read_slot(ru_info_t *ru, int *frame, int *slot)
  * before writing. */
 int xran_fh_tx_send_slot(ru_info_t *ru, int frame, int slot, uint64_t timestamp)
 {
-  int tti = /*frame*SUBFRAMES_PER_SYSTEMFRAME*SLOTNUM_PER_SUBFRAME+*/ 20 * frame
+  int tti = /*frame*SUBFRAMES_PER_SYSTEMFRAME*SLOTNUM_PER_SUBFRAME+*/ 80 * frame
             + slot; // commented out temporarily to check that compilation of oran 5g is working.
 
+ // int tti = /*frame*SUBFRAMES_PER_SYSTEMFRAME*SLOTNUM_PER_SUBFRAME+*/ 20 * frame
+ //           + slot; // commented out temporarily to check that compilation of oran 5g is working.
+
+
   void *ptr = NULL;
   int32_t *pos = NULL;
   int idx = 0;
@@ -484,12 +520,19 @@ int xran_fh_tx_send_slot(ru_info_t *ru, int frame, int slot, uint64_t timestamp)
   int nPRBs = fh_cfg->nDLRBs;
   int fftsize = 1 << fh_cfg->ru_conf.fftSize;
   int nb_tx_per_ru = ru->nb_tx / fh_init->xran_ports;
+    const struct xran_fh_config *fh_config = fh_cfg;
 
   for (uint16_t cc_id = 0; cc_id < 1 /*nSectorNum*/; cc_id++) { // OAI does not support multiple CC yet.
     for (uint8_t ant_id = 0; ant_id < ru->nb_tx; ant_id++) {
       oran_buf_list_t *bufs = get_xran_buffers(ant_id / nb_tx_per_ru);
       // This loop would better be more inner to avoid confusion and maybe also errors.
       for (int32_t sym_idx = 0; sym_idx < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_idx++) {
+
+      int tdd_period = fh_config->frame_conf.nTddPeriod;
+      int slot_in_period = slot % tdd_period;
+      if (fh_config->frame_conf.sSlotConfig[slot_in_period].nSymbolType[sym_idx] != 0)
+          continue;
+
         uint8_t *pData =
             bufs->src[ant_id % nb_tx_per_ru][tti % XRAN_N_FE_BUF_LEN].pBuffers[sym_idx % XRAN_NUM_OF_SYMBOL_PER_SLOT].pData;
         uint8_t *pPrbMapData = bufs->srccp[ant_id % nb_tx_per_ru][tti % XRAN_N_FE_BUF_LEN].pBuffers->pData;
@@ -508,23 +551,22 @@ int xran_fh_tx_send_slot(ru_info_t *ru, int frame, int slot, uint64_t timestamp)
           uint8_t *dst = (uint8_t *)u8dptr;
 
           struct xran_prb_elm *p_prbMapElm = &pRbMap->prbMap[idxElm];
-
-          for (idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++) {
+          u_int8_t section_id_tmp = sym_id; // Temporary hack for LiteON FR2 : receive UP section ID = 13
+/// TODO: Test if the loop works for liteon fr2
+          //for (idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++) {
             struct xran_section_desc *p_sec_desc = NULL;
-            p_prbMapElm = &pRbMap->prbMap[idxElm];
+            //p_prbMapElm = &pRbMap->prbMap[idxElm];
+            p_prbMapElm = &pRbMap->prbMap[section_id_tmp];
             // assumes one fragment per symbol
 #ifdef E_RELEASE
-            p_sec_desc = p_prbMapElm->p_sec_desc[sym_id][0];
+            //p_sec_desc = p_prbMapElm->p_sec_desc[sym_id][0];
+            p_sec_desc = p_prbMapElm->p_sec_desc[0][0];
 #elif F_RELEASE
             p_sec_desc = &p_prbMapElm->sec_desc[sym_id][0];
 #endif
 
             dst = xran_add_hdr_offset(dst, p_prbMapElm->compMethod);
 
-            if (p_sec_desc == NULL) {
-              printf("p_sec_desc == NULL\n");
-              exit(-1);
-            }
             uint16_t *dst16 = (uint16_t *)dst;
 
             int pos_len = 0;
@@ -575,13 +617,14 @@ int xran_fh_tx_send_slot(ru_info_t *ru, int frame, int slot, uint64_t timestamp)
               printf("p_prbMapElm->compMethod == %d is not supported\n", p_prbMapElm->compMethod);
               exit(-1);
             }
-
+            if (p_sec_desc != NULL) {
             p_sec_desc->iq_buffer_offset = RTE_PTR_DIFF(dst, u8dptr);
             p_sec_desc->iq_buffer_len = payload_len;
+            }
 
             dst += payload_len;
             dst = xran_add_hdr_offset(dst, p_prbMapElm->compMethod);
-          }
+          //}
 
           // The tti should be updated as it increased.
           pRbMap->tti_id = tti;

radio/fhi_72/oran-config.c

@@ -24,7 +24,6 @@
 #include "common/utils/assertions.h"
 #include "common_lib.h"
 
-#include "xran_fh_o_du.h"
 #include "xran_cp_api.h"
 #include "rte_ether.h"
 #include <rte_ethdev.h>
@@ -63,6 +62,55 @@ static void print_fh_eowd_cmn(unsigned index, const struct xran_ecpri_del_meas_c
       eowd_cmn->owdm_PlLength);
 }
 
+static void print_fh_eowd_port(unsigned index, unsigned vf, const struct xran_ecpri_del_meas_port *eowd_port)
+{
+  printf("\
+    eowd_port[%d][%d]:\n\
+      t1 %ld\n\
+      t2 %ld\n\
+      tr %ld\n\
+      delta %ld\n\
+      portid %d\n\
+      runMeas %d\n\
+      currentMeasID %d\n\
+      msState %d\n\
+      numMeas %d\n\
+      txDone %d\n\
+      rspTimerIdx %ld\n\
+      delaySamples [%ld, %ld, %ld, %ld, %ld, %ld, %ld, %ld, %ld, %ld, %ld, %ld, %ld, %ld, %ld, %ld]\n\
+      delayAvg %ld\n",
+      index,
+      vf,
+      eowd_port->t1,
+      eowd_port->t2,
+      eowd_port->tr,
+      eowd_port->delta,
+      eowd_port->portid,
+      eowd_port->runMeas,
+      eowd_port->currentMeasID,
+      eowd_port->msState,
+      eowd_port->numMeas,
+      eowd_port->txDone,
+      eowd_port->rspTimerIdx,
+      eowd_port->delaySamples[0],
+      eowd_port->delaySamples[1],
+      eowd_port->delaySamples[2],
+      eowd_port->delaySamples[3],
+      eowd_port->delaySamples[4],
+      eowd_port->delaySamples[5],
+      eowd_port->delaySamples[6],
+      eowd_port->delaySamples[7],
+      eowd_port->delaySamples[8],
+      eowd_port->delaySamples[9],
+      eowd_port->delaySamples[10],
+      eowd_port->delaySamples[11],
+      eowd_port->delaySamples[12],
+      eowd_port->delaySamples[13],
+      eowd_port->delaySamples[14],
+      eowd_port->delaySamples[15],
+      eowd_port->delayAvg);
+}
+
 static void print_fh_init_io_cfg(const struct xran_io_cfg *io_cfg)
 {
   printf("\
@@ -107,7 +155,7 @@ static void print_fh_init_io_cfg(const struct xran_io_cfg *io_cfg)
     pkt_proc_core_64_127 %016lx\n\
     pkt_aux_core %d\n\
     timing_core %d\n\
-    port (filled within xran library)\n\
+    port [%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, ]\n\
     io_sleep %d\n\
     nEthLinePerPort %d\n\
     nEthLineSpeed %d\n\
@@ -118,11 +166,32 @@ static void print_fh_init_io_cfg(const struct xran_io_cfg *io_cfg)
       io_cfg->pkt_proc_core_64_127,
       io_cfg->pkt_aux_core,
       io_cfg->timing_core,
+      io_cfg->port[XRAN_UP_VF],
+      io_cfg->port[XRAN_CP_VF],
+      io_cfg->port[XRAN_UP_VF1],
+      io_cfg->port[XRAN_CP_VF1],
+      io_cfg->port[XRAN_UP_VF2],
+      io_cfg->port[XRAN_CP_VF2],
+      io_cfg->port[XRAN_UP_VF3],
+      io_cfg->port[XRAN_CP_VF3],
+      io_cfg->port[XRAN_UP_VF4],
+      io_cfg->port[XRAN_CP_VF4],
+      io_cfg->port[XRAN_UP_VF5],
+      io_cfg->port[XRAN_CP_VF5],
+      io_cfg->port[XRAN_UP_VF6],
+      io_cfg->port[XRAN_CP_VF6],
+      io_cfg->port[XRAN_UP_VF7],
+      io_cfg->port[XRAN_CP_VF7],
       io_cfg->io_sleep,
       io_cfg->nEthLinePerPort,
       io_cfg->nEthLineSpeed,
       io_cfg->one_vf_cu_plane);
   print_fh_eowd_cmn(io_cfg->id, &io_cfg->eowd_cmn[io_cfg->id]);
+  print_fh_eowd_cmn(0, &io_cfg->eowd_cmn[0]);
+  print_fh_eowd_cmn(1, &io_cfg->eowd_cmn[1]);
+  for (int i = 0; i < 2; ++i)
+    for (int v = 0; v < io_cfg->num_vfs; ++v)
+      print_fh_eowd_port(i, v, &io_cfg->eowd_port[i][v]);
   printf("eowd_port (filled within xran library)\n");
 #ifdef F_RELEASE
   printf("\
@@ -176,14 +245,13 @@ void print_fh_init(const struct xran_fh_init *fh_init)
   dpdkBasebandFecMode %d\n\
   dpdkBasebandDevice %s\n\
   filePrefix %s\n\
-  mtu %d\n\
-  p_o_du_addr %s\n",
+  mtu %d\n",
       fh_init->xran_ports,
       fh_init->dpdkBasebandFecMode,
       fh_init->dpdkBasebandDevice,
       fh_init->filePrefix,
-      fh_init->mtu,
-      fh_init->p_o_du_addr);
+      fh_init->mtu);
+  print_ether_addr("  p_o_du_addr", fh_init->xran_ports * fh_init->io_cfg.num_vfs, (struct rte_ether_addr *)fh_init->p_o_du_addr);
   print_ether_addr("  p_o_ru_addr", fh_init->xran_ports * fh_init->io_cfg.num_vfs, (struct rte_ether_addr *)fh_init->p_o_ru_addr);
   printf("\
   totalBfWeights %d\n",
@@ -407,7 +475,7 @@ void print_fh_config(const struct xran_fh_config *fh_config)
   print_srs_config(&fh_config->srs_conf);
   print_frame_config(&fh_config->frame_conf);
   print_ru_config(&fh_config->ru_conf);
-
+#ifdef F_RELEASE
   printf("\
   bbdev_enc %p\n\
   bbdev_dec %p\n\
@@ -427,7 +495,23 @@ void print_fh_config(const struct xran_fh_config *fh_config)
       fh_config->log_level,
       fh_config->max_sections_per_slot,
       fh_config->max_sections_per_symbol);
-
+#else
+  printf("\
+  bbdev_enc %p\n\
+  bbdev_dec %p\n\
+  tx_cp_eAxC2Vf [not implemented by fhi_lib]\n\
+  tx_up_eAxC2Vf [not implemented by fhi_lib]\n\
+  rx_cp_eAxC2Vf [not implemented by fhi_lib]\n\
+  rx_up_eAxC2Vf [not implemented by fhi_lib]\n\
+  log_level %d\n\
+  max_sections_per_slot %d\n\
+  max_sections_per_symbol %d\n",
+    fh_config->bbdev_enc,
+    fh_config->bbdev_dec,
+    fh_config->log_level,
+    fh_config->max_sections_per_slot,
+    fh_config->max_sections_per_symbol);
+#endif
 #ifdef F_RELEASE
   printf("\
   RunSlotPrbMapBySymbolEnable %d\n\
@@ -476,6 +560,8 @@ static bool set_fh_io_cfg(struct xran_io_cfg *io_cfg, const paramdef_t *fhip, in
   io_cfg->id = 0; // 0 -> xran as O-DU; 1 -> xran as O-RU
   io_cfg->num_vfs = num_dev; // number of VFs for C-plane and U-plane (should be even); max = XRAN_VF_MAX
   io_cfg->num_rxq = 1; // number of RX queues per VF
+  /// TODO: This is only for Liteon, maybe add a #define for it
+  io_cfg->num_rxq = 2; // Assume two HW RX queues per RU
   for (int i = 0; i < num_dev; ++i) {
     io_cfg->dpdk_dev[i] = strdup(gpd(fhip, nump, ORAN_CONFIG_DPDK_DEVICES)->strlistptr[i]); // VFs devices
   }
@@ -519,6 +605,7 @@ static bool set_fh_io_cfg(struct xran_io_cfg *io_cfg, const paramdef_t *fhip, in
 #endif
   int dpdk_iova_mode_idx = config_paramidx_fromname((paramdef_t *)fhip, nump, ORAN_CONFIG_DPDK_IOVA_MODE);
   AssertFatal(dpdk_iova_mode_idx >= 0,"Index for dpdk_iova_mode config option not found!");
+/// MUST be set to 0 in the config file for Liteon FR2
   io_cfg->dpdkIoVaMode = config_get_processedint(config_get_if(), (paramdef_t *)&fhip[dpdk_iova_mode_idx]); // IOVA mode
   io_cfg->dpdkMemorySize = *gpd(fhip, nump, ORAN_CONFIG_DPDK_MEM_SIZE)->uptr; // DPDK max memory allocation
 
@@ -536,6 +623,8 @@ static bool set_fh_io_cfg(struct xran_io_cfg *io_cfg, const paramdef_t *fhip, in
   io_cfg->nEthLinePerPort = *gpd(fhip, nump, ORAN_CONFIG_NETHPERPORT)->uptr; // 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link)
   io_cfg->nEthLineSpeed = *gpd(fhip, nump, ORAN_CONFIG_NETHSPEED)->uptr; // 10G,25G,40G,100G speed of Physical connection on O-RU
   io_cfg->one_vf_cu_plane = (io_cfg->num_vfs == num_rus); // C-plane and U-plane use one VF
+  /// TODO: Check if the above comparison results in 0 in the Liteon case
+  io_cfg->one_vf_cu_plane = 0; // C-plane and U-plane use one VF
 
   /* eCPRI One-Way Delay Measurements common settings for O-DU and O-RU;
     use owdm to calculate T12 and T34 -> CUS specification, section 2.3.3.3;
@@ -544,7 +633,9 @@ static bool set_fh_io_cfg(struct xran_io_cfg *io_cfg, const paramdef_t *fhip, in
     via M-plane the o-ran-ecpri-delay@<version>.yang capability;
     this functionality is improved in F release */
   /* if RU does support, io_cfg->eowd_cmn[0] should only be filled as id = O_DU; io_cfg->eowd_cmn[1] only used if id = O_RU */
-  const uint16_t owdm_enable = *gpd(fhip, nump, ORAN_CONFIG_ECPRI_OWDM)->uptr;
+  uint16_t owdm_enable = *gpd(fhip, nump, ORAN_CONFIG_ECPRI_OWDM)->uptr;
+  /// TODO: This is for Liteon FR2, check if can be removed
+  owdm_enable = 0;
   if (owdm_enable) {
     io_cfg->eowd_cmn[0].initiator_en = 1; // 1 -> initiator (always O-DU), 0 -> recipient (always O-RU)
     io_cfg->eowd_cmn[0].numberOfSamples = 8; // total number of samples to be collected and averaged per port
@@ -620,6 +711,11 @@ static bool set_fh_eaxcid_conf(struct xran_eaxcid_config *eaxcid_conf, enum xran
       eaxcid_conf->bit_bandSectorId = 0; // total number of band sectors supported by O-RU should be retrieved by M-plane - <max-num-bands> && <max-num-sectors>
       eaxcid_conf->bit_ccId = 0; // total number of CC supported by O-RU should be retrieved by M-plane - <max-num-component-carriers>
       eaxcid_conf->bit_ruPortId = 0;
+      /// TODO: Perhaps add #define for Liteon FR2 to set these 3 following values
+      eaxcid_conf->bit_cuPortId = 12;
+      eaxcid_conf->bit_bandSectorId = 8;
+      eaxcid_conf->bit_ccId = 4;
+
       break;
     case XRAN_CATEGORY_B:
       eaxcid_conf->mask_cuPortId = 0xf000;
@@ -651,7 +747,8 @@ uint8_t *get_ether_addr(const char *addr, struct rte_ether_addr *ether_addr)
   return NULL;
 }
 
-static bool set_fh_init(void *mplane_api, struct xran_fh_init *fh_init, enum xran_category xran_cat)
+struct xran_fh_init;
+bool set_fh_init(void *mplane_api, struct xran_fh_init *fh_init, enum xran_category xran_cat)
 {
   memset(fh_init, 0, sizeof(*fh_init));
 
@@ -683,10 +780,22 @@ static bool set_fh_init(void *mplane_api, struct xran_fh_init *fh_init, enum xra
   sprintf(aprefix, "%s", CONFIG_STRING_ORAN);
   const int nfh = sizeofArray(FHconfigs);
   config_getlist(config_get_if(), &FH_ConfigList, FHconfigs, nfh, aprefix);
+  int num_rus = FH_ConfigList.numelt;
+  int num_ru_addr = gpd(fhip, nump, ORAN_CONFIG_RU_ADDR)->numelt;
+  int num_du_addr = gpd(fhip, nump, ORAN_CONFIG_DU_ADDR)->numelt;
+  int num_vfs = gpd(fhip, nump, ORAN_CONFIG_DPDK_DEVICES)->numelt;
+  if (num_ru_addr != num_du_addr) {
+    printf("need to have same number of DUs and RUs!\n");
+    return false;
+  }
+  if (num_ru_addr != num_vfs) {
+    printf("need to have as many RU/DU entries as DPDK devices (one VF for CP and UP each)\n");
+    return false;
+  }
 
 #ifdef OAI_MPLANE
   ru_session_list_t *ru_session_list = (ru_session_list_t *)mplane_api;
-  int num_rus = ru_session_list->num_rus;
+  num_rus = ru_session_list->num_rus;
   fh_init->xran_ports = num_rus; // since we use xran as O-DU, xran_ports is set to the number of RUs
   if (!set_fh_io_cfg(&fh_init->io_cfg, fhip, nump, num_rus))
     return false;
@@ -710,17 +819,45 @@ static bool set_fh_init(void *mplane_api, struct xran_fh_init *fh_init, enum xra
     }
   }
 #else
-  int num_rus = FH_ConfigList.numelt; // based on the number of fh_config sections -> number of RUs
+  num_rus = FH_ConfigList.numelt; // based on the number of fh_config sections -> number of RUs
   fh_init->xran_ports = num_rus; // since we use xran as O-DU, xran_ports is set to the number of RUs
   if (!set_fh_io_cfg(&fh_init->io_cfg, fhip, nump, num_rus))
     return false;
   if (!set_fh_eaxcid_conf(&fh_init->eAxCId_conf, xran_cat))
     return false;
+  fh_init->xran_ports = num_rus;
+  fh_init->dpdkBasebandFecMode = 0;
+  fh_init->dpdkBasebandDevice = NULL;
+  fh_init->filePrefix = strdup(*gpd(fhip, nump, ORAN_CONFIG_FILE_PREFIX)->strptr); // see DPDK --file-prefix
   /* maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be
     communicated in a single xRAN network layer transaction. Supported 1500 bytes and 9600 bytes (Jumbo Frame);
     xran only checks if (MTU <= 1500), therefore setting any value > 1500, xran assumes 9600 value is used */
   fh_init->mtu = *gpd(fhip, nump, ORAN_CONFIG_MTU)->uptr;
-  int num_ru_addr = gpd(fhip, nump, ORAN_CONFIG_RU_ADDR)->numelt;
+
+  // if multiple RUs: xran_ethdi_init_dpdk_io() iterates over
+  // &p_o_ru_addr[i]
+/*  char **du_addrs = gpd(fhip, nump, ORAN_CONFIG_DU_ADDR)->strlistptr;
+  fh_init->p_o_du_addr = calloc(num_du_addr, sizeof(struct rte_ether_addr));
+  AssertFatal(fh_init->p_o_du_addr != NULL, "out of memory\n");
+  for (int i = 0; i < num_du_addr; ++i) {
+    struct rte_ether_addr *ea = (struct rte_ether_addr *)fh_init->p_o_du_addr;
+    if (get_ether_addr(du_addrs[i], &ea[i]) == NULL) {
+      printf("could not read ethernet address '%s' for DU!\n", du_addrs[i]);
+      return false;
+    }
+  }*/
+
+  fh_init->p_o_du_addr = calloc(num_du_addr, sizeof(struct rte_ether_addr));
+  AssertFatal(fh_init->p_o_du_addr != NULL, "out of memory\n");
+  char **du_addrs = gpd(fhip, nump, ORAN_CONFIG_DU_ADDR)->strlistptr;
+  for (int i = 0; i < num_du_addr; ++i) {
+    struct rte_ether_addr *ea = (struct rte_ether_addr *)fh_init->p_o_du_addr;
+    if (get_ether_addr(du_addrs[i], &ea[i]) == NULL) {
+      printf("could not read ethernet address '%s' for RU!\n", du_addrs[i]);
+      return false;
+    }
+  }
+
   fh_init->p_o_ru_addr = calloc(num_ru_addr, sizeof(struct rte_ether_addr));
   AssertFatal(fh_init->p_o_ru_addr != NULL, "out of memory\n");
   char **ru_addrs = gpd(fhip, nump, ORAN_CONFIG_RU_ADDR)->strlistptr;
@@ -738,7 +875,7 @@ static bool set_fh_init(void *mplane_api, struct xran_fh_init *fh_init, enum xra
   /* used to specify a unique prefix for shared memory, and files created by multiple DPDK processes;
     it is necessary */
   fh_init->filePrefix = strdup(*gpd(fhip, nump, ORAN_CONFIG_FILE_PREFIX)->strptr);
-  fh_init->p_o_du_addr = NULL; // DPDK retreives DU MAC address within the xran library with rte_eth_macaddr_get() function
+  //fh_init->p_o_du_addr = NULL; // DPDK retreives DU MAC address within the xran library with rte_eth_macaddr_get() function
   fh_init->totalBfWeights = 0; // only used if id = O_RU (for emulation); C-plane extension types; section 5.4.6 of CUS spec
 
 #ifdef F_RELEASE
@@ -746,10 +883,45 @@ static bool set_fh_init(void *mplane_api, struct xran_fh_init *fh_init, enum xra
   fh_init->dlCpProcBurst = 0; /* 1 -> DL CP processing will be done on single symbol,
                                  0 -> DL CP processing will be spread across all allowed symbols and multiple cores to reduce burstiness */
 #endif
+  /// TODO: Create #define for Liteon FR2 RU
+  fh_init->totalBfWeights = 32;
 
   return true;
 }
 
+static enum xran_cp_filterindex get_prach_filterindex_fr1(duplex_mode_t mode, int prach_index)
+{
+  if (mode == duplex_mode_TDD) {
+    // 38.211 table 6.3.3.2-3 "unpaired spectrum" -> TDD
+    switch (prach_index) {
+      case 0 ... 39:
+      case 256 ... 262:
+        return XRAN_FILTERINDEX_PRACH_012;
+      case 40 ... 66:
+        return XRAN_FILTERINDEX_PRACH_3;
+      case 67 ... 255:
+        return XRAN_FILTERINDEX_PRACH_ABC;
+    }
+  } else if (mode == duplex_mode_FDD) {
+    // 38.211 table 6.3.3.2-2 "paired spectrum" -> FDD
+    switch (prach_index) {
+      case 0 ... 59:
+        return XRAN_FILTERINDEX_PRACH_012;
+      case 60 ... 86:
+        return XRAN_FILTERINDEX_PRACH_3;
+      case 87 ... 255:
+        return XRAN_FILTERINDEX_PRACH_ABC;
+      default:
+        AssertFatal(false, "unknown PRACH index %d\n", prach_index);
+    }
+  } else {
+    AssertFatal(false, "unsupported duplex mode %d\n", mode);
+  }
+  return XRAN_FILTERINDEX_STANDARD;
+}
+
+
+
 // PRACH guard interval. Raymond: "[it] is not in the configuration, (i.e. it
 // is deterministic depending on others). LiteON must hard-code this in the
 // O-RU itself, benetel doesn't (as O-RAN specifies). So we will need to tell
@@ -778,6 +950,14 @@ static bool set_fh_prach_config(void *mplane_api,
                                         in E release hardcoded to XRAN_FILTERINDEX_PRACH_ABC (preamble format A1~3, B1~4, C0, C2)
                                         in F release properly calculated */
 
+/// TODO: Created #define for Liteon FR2 RU
+  prach_config->nPrachFreqOffset = -792; //(s7cfg->prach_freq_start * 12 - oai0->num_rb_dl * 6) * 2 + 4;
+  if (oai0->nr_band < 100)
+    prach_config->nPrachFilterIdx = get_prach_filterindex_fr1(oai0->duplex_mode, s7cfg->prach_index);
+  else
+    prach_config->nPrachFilterIdx = XRAN_FILTERINDEX_PRACH_ABC;
+
+
   /* Return values after initialization */
   prach_config->startSymId = 0;
   prach_config->lastSymId = 0;
@@ -800,6 +980,10 @@ static bool set_fh_prach_config(void *mplane_api,
 #else
   uint8_t offset = *gpd(prachp, nprach, ORAN_PRACH_CONFIG_EAXC_OFFSET)->u8ptr;
   prach_config->eAxC_offset = (offset != 0) ? offset : max_num_ant;
+
+  /// TODO: Created #define for Liteon FR2 RU
+  /// The patch doesn't seem to "care" if the offset is 0
+  prach_config->eAxC_offset = offset;
 #endif
 
   g_kbar = *gpd(prachp, nprach, ORAN_PRACH_CONFIG_KBAR)->uptr;
@@ -807,6 +991,13 @@ static bool set_fh_prach_config(void *mplane_api,
   return true;
 }
 
+static bool set_fh_srs_config(struct xran_srs_config *srs_config)
+{
+  srs_config->symbMask = 0;
+  srs_config->eAxC_offset = 8;
+  return true;
+}
+
 static bool set_fh_frame_config(const openair0_config_t *oai0, struct xran_frame_config *frame_config)
 {
   const split7_config_t *s7cfg = &oai0->split7;
@@ -814,9 +1005,10 @@ static bool set_fh_frame_config(const openair0_config_t *oai0, struct xran_frame
   frame_config->nNumerology = oai0->nr_scs_for_raster; /* 0 -> 15kHz,  1 -> 30kHz,  2 -> 60kHz
                                                           3 -> 120kHz, 4 -> 240kHz */
 
-  if (frame_config->nFrameDuplexType == XRAN_FDD)
+  /// TODO: Add perhaps an ifndef Liteon FR2 RU
+ /* if (frame_config->nFrameDuplexType == XRAN_FDD)
     return true;
-
+*/
   // TDD periodicity
   frame_config->nTddPeriod = s7cfg->n_tdd_period;
 
@@ -831,6 +1023,10 @@ static bool set_fh_frame_config(const openair0_config_t *oai0, struct xran_frame
 
 static bool set_fh_ru_config(void *mplane_api, const paramdef_t *rup, uint16_t fftSize, int nru, enum xran_category xran_cat, struct xran_ru_config *ru_config)
 {
+/// TODO: check to ensure that the following is true wherever called
+/// ru_config->fftSize = *gpd(rup, nru, ORAN_RU_CONFIG_FFT_SIZE)->uptr;
+/// ru_config->xranCat = XRAN_CATEGORY_A;
+
   ru_config->xranTech = XRAN_RAN_5GNR; // 5GNR or LTE
   ru_config->xranCat = xran_cat; // mode: Catergory A or Category B
   ru_config->xranCompHdrType = XRAN_COMP_HDR_TYPE_STATIC; // dynamic or static udCompHdr handling
@@ -871,7 +1067,9 @@ static bool set_maxmin_pd(const paramdef_t *pd, int num, const char *name, uint1
   return true;
 }
 
-static bool set_fh_config(void *mplane_api, int ru_idx, int num_rus, enum xran_category xran_cat, const openair0_config_t *oai0, struct xran_fh_config *fh_config)
+extern uint32_t to_nrarfcn(int nr_bandP, uint64_t dl_CarrierFreq, uint8_t scs_index, uint32_t bw);
+
+bool set_fh_config(void *mplane_api, int ru_idx, int num_rus, enum xran_category xran_cat, const openair0_config_t *oai0, struct xran_fh_config *fh_config)
 {
   AssertFatal(num_rus == 1 || num_rus == 2, "only support 1 or 2 RUs as of now\n");
   AssertFatal(ru_idx < num_rus, "illegal ru_idx %d: must be < %d\n", ru_idx, num_rus);
@@ -885,6 +1083,13 @@ static bool set_fh_config(void *mplane_api, int ru_idx, int num_rus, enum xran_c
     DevAssert(oai0->rx_freq[0] == oai0->rx_freq[i]);
   DevAssert(oai0->nr_band > 0);
   AssertFatal(oai0->threequarter_fs == 0, "cannot use three-quarter sampling with O-RAN 7.2 split\n");
+  DevAssert(oai0->nr_scs_for_raster > 0);
+
+  // we simply assume that the loading process provides function to_nrarfcn()
+  // to calculate the ARFCN numbers from frequency. That is not clean, but the
+  // best we can do without copy-pasting the function.
+  uint32_t nDLCenterFreqARFCN = to_nrarfcn(oai0->nr_band, oai0->tx_freq[0], oai0->nr_scs_for_raster, oai0->tx_bw);
+  uint32_t nULCenterFreqARFCN = to_nrarfcn(oai0->nr_band, oai0->rx_freq[0], oai0->nr_scs_for_raster, oai0->rx_bw);
 
   paramdef_t FHconfigs[] = ORAN_FH_DESC;
   paramlist_def_t FH_ConfigList = {CONFIG_STRING_ORAN_FH};
@@ -934,6 +1139,26 @@ static bool set_fh_config(void *mplane_api, int ru_idx, int num_rus, enum xran_c
   fh_config->ttiCb = NULL; // check tti_to_phy_cb(), tx_cp_dl_cb() and tx_cp_ul_cb => first_call
   fh_config->ttiCbParam = NULL; // check tti_to_phy_cb(), tx_cp_dl_cb() and tx_cp_ul_cb => first_call
 
+/// TODO: ADD #ifdef Liteon_fr2_ru
+  fh_config->neAxcUl = oai0->rx_num_channels / num_rus;
+  fh_config->nAntElmTRx = oai0->tx_num_channels / num_rus;
+  fh_config->nDLFftSize = 1024;
+  fh_config->nULFftSize = 1024;
+  fh_config->nDLAbsFrePointA = 27968160;
+  fh_config->nULAbsFrePointA = 27968160;
+  fh_config->nDLCenterFreqARFCN = nDLCenterFreqARFCN;
+  fh_config->nULCenterFreqARFCN = nULCenterFreqARFCN;
+  fh_config->Tadv_cp_dl = *gpd(fhp, nfh, ORAN_FH_CONFIG_TADV_CP_DL)->uptr;
+/// TODO: Check if the following only apply to Liteon FR2 RU
+  if (!set_maxmin_pd(fhp, nfh, ORAN_FH_CONFIG_T2A_CP_DL, &fh_config->T2a_min_cp_dl, &fh_config->T2a_max_cp_dl))
+    return false;
+  if (!set_maxmin_pd(fhp, nfh, ORAN_FH_CONFIG_T2A_CP_UL, &fh_config->T2a_min_cp_ul, &fh_config->T2a_max_cp_ul))
+    return false;
+  if (!set_maxmin_pd(fhp, nfh, ORAN_FH_CONFIG_T2A_UP, &fh_config->T2a_min_up, &fh_config->T2a_max_up))
+    return false;
+  if (!set_maxmin_pd(fhp, nfh, ORAN_FH_CONFIG_TA3, &fh_config->Ta3_min, &fh_config->Ta3_max))
+    return false;
+
   /* DU delay profile */
   if (!set_maxmin_pd(fhp, nfh, ORAN_FH_CONFIG_T1A_CP_DL, &fh_config->T1a_min_cp_dl, &fh_config->T1a_max_cp_dl)) // E - min not used in xran, max yes; F - both min and max are used in xran
     return false;
@@ -955,6 +1180,10 @@ static bool set_fh_config(void *mplane_api, int ru_idx, int num_rus, enum xran_c
   fh_config->puschMaskSlot = 0; // specific which slot PUSCH channel masked; only used if id = O_RU
   fh_config->cp_vlan_tag = 0; // C-plane VLAN tag; not used in xran; needed for M-plane
   fh_config->up_vlan_tag = 0; // U-plane VLAN tag; not used in xran; needed for M-plane
+/// TODO: Check if the 2 following apply to other RUs than the Liteon FR2 to set the VLANs
+  fh_config->cp_vlan_tag = *gpd(fhp, nfh, ORAN_FH_CONFIG_CP_VLAN_TAG)->uptr;
+  fh_config->up_vlan_tag = *gpd(fhp, nfh, ORAN_FH_CONFIG_UP_VLAN_TAG)->uptr;
+
   fh_config->debugStop = 0; // enable auto stop; only used if id = O_RU
   fh_config->debugStopCount = 0; // enable auto stop after number of Tx packets; not used in xran
   fh_config->DynamicSectionEna = 0; // enable dynamic C-Plane section allocation
@@ -966,6 +1195,10 @@ static bool set_fh_config(void *mplane_api, int ru_idx, int num_rus, enum xran_c
   /* SRS only used if XRAN_CATEGORY_B
     Note: srs_config->eAxC_offset >= prach_config->eAxC_offset + PRACH */
   // fh_config->srs_conf = {0};
+  ///TODO: Check if set_fh_srs_config is needed for the Liteon FR2 RU
+  if (!set_fh_srs_config(&fh_config->srs_conf))
+    return false;
+
   if (!set_fh_frame_config(oai0, &fh_config->frame_conf))
     return false;
   if (!set_fh_ru_config(mplane_api, rup, oai0->split7.fftSize, nru, xran_cat, &fh_config->ru_conf))
@@ -991,6 +1224,9 @@ static bool set_fh_config(void *mplane_api, int ru_idx, int num_rus, enum xran_c
           In this case, O-RU is not expected to perform any PRACH specific processing. */
   fh_config->max_sections_per_slot = 0; // not used in xran
   fh_config->max_sections_per_symbol = 0; // not used in xran
+  /// TODO: Add #ifdef Liteon_FR2_RU
+  fh_config->max_sections_per_slot = 14;
+  fh_config->max_sections_per_symbol = 14;
 
 #ifdef F_RELEASE
   fh_config->RunSlotPrbMapBySymbolEnable = 0; // enable PRB mapping by symbol with multisection

radio/fhi_72/oran-config.h

@@ -24,6 +24,7 @@
 
 #include "stdbool.h"
 #include "stdint.h"
+#include "xran_fh_o_du.h"
 
 struct xran_fh_init;
 struct xran_fh_config;
@@ -32,8 +33,12 @@ struct openair0_config;
 bool get_xran_config(void *mplane_api, const struct openair0_config *openair0_cfg, struct xran_fh_init *fh_init, struct xran_fh_config *fh_config);
 
 void print_fh_init(const struct xran_fh_init *fh_init);
+struct xran_fh_config;
 void print_fh_config(const struct xran_fh_config *fh_config);
 
+bool set_fh_init(void *mplane_api, struct xran_fh_init *fh_init, enum xran_category xran_cat);
+bool set_fh_config(void *mplane_api, int ru_idx, int num_rus, enum xran_category xran_cat, const struct openair0_config *oai0_cfg, struct xran_fh_config *fh_config);
+
 // hack to workaround LiteOn limitation
 extern int g_kbar;
 

radio/fhi_72/oran-init.c

@@ -94,16 +94,19 @@ static struct xran_prb_map get_xran_prb_map(const struct xran_fh_config *f, cons
       .cc_id = 0,
       .ru_port_id = 0,
       .tti_id = 0,
-      .nPrbElm = 1,
+      .start_sym_id = 0,
+      .nPrbElm = 14,//1,
   };
-  struct xran_prb_elm *e = &prbmap.prbMap[0];
-  e->nStartSymb = start_sym;
-  e->numSymb = num_sym;
-  e->nRBStart = 0;
-  e->nRBSize = (dir == XRAN_DIR_DL) ? f->nDLRBs : f->nULRBs;
-  e->nBeamIndex = 0;
-  e->compMethod = f->ru_conf.compMeth;
-  e->iqWidth = f->ru_conf.iqWidth;
+  for (int i=0; i < prbmap.nPrbElm; i++) {
+    struct xran_prb_elm *e = &prbmap.prbMap[i];
+    e->nStartSymb = 0;// start_sym;
+    e->numSymb = 1; // num_sym;
+    e->nRBStart = 0;
+    e->nRBSize = (dir == XRAN_DIR_DL) ? f->nDLRBs : f->nULRBs;
+    e->nBeamIndex = 1;//0;
+    e->compMethod = f->ru_conf.compMeth;
+    e->iqWidth = f->ru_conf.iqWidth;
+  }
   return prbmap;
 }
 
@@ -127,7 +130,9 @@ static uint32_t oran_allocate_uplane_buffers(
   /* xran_bm_init() uses rte_pktmbuf_pool_create() which recommends to use a power of two for the buffers;
     the E release sample app didn't take this into account, but we introduced it ourselves;
     the F release sample app took this into account, so we can proudly say we assumed correctly */
-  uint32_t numBufs = next_power_2(XRAN_N_FE_BUF_LEN * ant * XRAN_NUM_OF_SYMBOL_PER_SLOT) - 1;
+//  uint32_t numBufs = next_power_2(XRAN_N_FE_BUF_LEN * ant * XRAN_NUM_OF_SYMBOL_PER_SLOT) - 1;
+/// TODO: Check if the 'next_power_2' approach works for Liteon FR2
+  uint32_t numBufs = XRAN_N_FE_BUF_LEN * ant * XRAN_NUM_OF_SYMBOL_PER_SLOT;
   status = xran_bm_init(instHandle, &pool, numBufs, bufSize);
   AssertFatal(XRAN_STATUS_SUCCESS == status, "Failed at xran_bm_init(), status %d\n", status);
   printf("xran_bm_init() hInstance %p poolIdx %u elements %u size %u\n", instHandle, pool, numBufs, bufSize);
@@ -206,7 +211,7 @@ static void oran_allocate_cplane_buffers(void *instHandle,
                                          const struct xran_fh_config *fh_config,
                                        #endif
                                          uint32_t size_of_prb_map,
-                                         oran_cplane_prb_config *prb_conf)
+                                         const oran_cplane_prb_config *prb_conf)
 {
   xran_status_t status;
   uint32_t count1 = 0;
@@ -214,7 +219,9 @@ static void oran_allocate_cplane_buffers(void *instHandle,
 #ifdef E_RELEASE
   uint32_t count2 = 0;
   uint32_t poolSec;
-  uint32_t numBufsSec = next_power_2(XRAN_N_FE_BUF_LEN * ant * XRAN_NUM_OF_SYMBOL_PER_SLOT * sect * XRAN_MAX_FRAGMENT);
+ // uint32_t numBufsSec = next_power_2(XRAN_N_FE_BUF_LEN * ant * XRAN_NUM_OF_SYMBOL_PER_SLOT * sect * XRAN_MAX_FRAGMENT);
+/// TODO: Check if the next_power_2 approach works for Liteon FR2
+  uint32_t numBufsSec = XRAN_N_FE_BUF_LEN * ant * XRAN_NUM_OF_SYMBOL_PER_SLOT * sect * XRAN_MAX_FRAGMENT;
   uint32_t bufSizeSec = sizeof(struct xran_section_desc);
   status = xran_bm_init(instHandle, &poolSec, numBufsSec, bufSizeSec);
   AssertFatal(XRAN_STATUS_SUCCESS == status, "Failed at xran_bm_init(), status %d\n", status);
@@ -222,7 +229,9 @@ static void oran_allocate_cplane_buffers(void *instHandle,
 #endif
 
   uint32_t poolPrb;
-  uint32_t numBufsPrb = next_power_2(XRAN_N_FE_BUF_LEN * ant * XRAN_NUM_OF_SYMBOL_PER_SLOT) - 1;
+  //uint32_t numBufsPrb = next_power_2(XRAN_N_FE_BUF_LEN * ant * XRAN_NUM_OF_SYMBOL_PER_SLOT) - 1;
+  /// TODO: Check if the next_power_2 approach works for Liteon FR2
+  uint32_t numBufsPrb = XRAN_N_FE_BUF_LEN * ant * XRAN_NUM_OF_SYMBOL_PER_SLOT;
   uint32_t bufSizePrb = size_of_prb_map;
   status = xran_bm_init(instHandle, &poolPrb, numBufsPrb, bufSizePrb);
   AssertFatal(XRAN_STATUS_SUCCESS == status, "Failed at xran_bm_init(), status %d\n", status);
@@ -245,8 +254,9 @@ static void oran_allocate_cplane_buffers(void *instHandle,
       fb->pData = ptr;
       fb->pCtrl = mb;
 
-      struct xran_prb_map *src = &prb_conf->slotMap;
+      const struct xran_prb_map *src = &prb_conf->slotMap;
       // get mixed slot map if in TDD and in mixed slot
+      /// TODO: Check if I can or must ignore nTDDPeriod Being 0
       if (prb_conf->nTddPeriod != 0 && (j % prb_conf->nTddPeriod) == prb_conf->mixed_slot_index)
         src = &prb_conf->mixedSlotMap;
 #ifdef E_RELEASE
@@ -340,6 +350,23 @@ static void oran_allocate_buffers(void *handle,
     dlPmMixed = get_xran_prb_map(fh_config, XRAN_DIR_DL, 0, info.num_dlsym);
     ulPmMixed = get_xran_prb_map(fh_config, XRAN_DIR_UL, info.start_ulsym, info.num_ulsym);
     idx = info.idx;
+
+  /// TODO: Check if this is actually needed
+  /// CHECK IF **Mixed need to be set to *lPm as done by the commit creator
+  dlPmMixed = dlPm;
+  dlPmMixed.nPrbElm = info.num_dlsym;
+  for (int i = 0; i < dlPmMixed.nPrbElm; i++) {
+    struct xran_prb_elm *e = &dlPmMixed.prbMap[i];
+    e->nStartSymb = 0; // start symbol always 0 for DL
+  }
+
+  ulPmMixed = ulPm;
+  ulPmMixed.nPrbElm = info.num_ulsym; //1
+  for (int i=0; i < ulPmMixed.nPrbElm; i++){
+    struct xran_prb_elm *e = &ulPmMixed.prbMap[i];
+    e->nStartSymb = info.start_ulsym; // numSymb is always 1 for UL
+  }
+
   }
 
   oran_cplane_prb_config dlConf = {
@@ -425,24 +452,40 @@ static void oran_allocate_buffers(void *handle,
     }
   }
 
-  xran_5g_fronthault_config(pi->instanceHandle, src, srccp, dst, dstcp, oai_xran_fh_rx_callback, &portInstances->pusch_tag);
-  xran_5g_prach_req(pi->instanceHandle, prach, prachdecomp, oai_xran_fh_rx_prach_callback, &portInstances->prach_tag);
+  xran_5g_fronthault_config(pi->instanceHandle, src, srccp, dst, dstcp, oai_xran_fh_rx_callback, &portInstances->RxCbTag[0][0]);
+  xran_5g_prach_req(pi->instanceHandle, prach, prachdecomp, oai_xran_fh_rx_prach_callback, &portInstances->PrachCbTag[0][0]);
+
 }
 
-int *oai_oran_initialize(struct xran_fh_init *xran_fh_init, struct xran_fh_config *xran_fh_config)
+int *oai_oran_initialize(const openair0_config_t *openair0_cfg)
 {
   int32_t xret = 0;
 
-  print_fh_init(xran_fh_init);
-  xret = xran_init(0, NULL, xran_fh_init, NULL, &gxran_handle);
+  struct xran_fh_init init = {0};
+  if (!set_fh_init(NULL,&init, XRAN_CATEGORY_A)) {
+    printf("could not read FHI 7.2/ORAN config\n");
+    return NULL;
+  }
+  print_fh_init(&init);
+
+  /* read all configuration before starting anything */
+  struct xran_fh_config xran_fh_config[XRAN_PORTS_NUM] = {0};
+  for (int32_t o_xu_id = 0; o_xu_id < init.xran_ports; o_xu_id++) {
+    if (!set_fh_config(NULL, o_xu_id, init.xran_ports, XRAN_CATEGORY_A, openair0_cfg,  &xran_fh_config[o_xu_id])) {
+      printf("could not read FHI 7.2/RU-specific config\n");
+      return NULL;
+    }
+    print_fh_config(&xran_fh_config[o_xu_id]);
+  }
+
+  xret = xran_init(0, NULL, &init, NULL, &gxran_handle);
   if (xret != XRAN_STATUS_SUCCESS) {
     printf("xran_init failed %d\n", xret);
     exit(-1);
   }
 
   /** process all the O-RU|O-DU for use case */
-  for (int32_t o_xu_id = 0; o_xu_id < xran_fh_init->xran_ports; o_xu_id++) {
-    print_fh_config(&xran_fh_config[o_xu_id]);
+  for (int32_t o_xu_id = 0; o_xu_id < init.xran_ports; o_xu_id++) {
     xret = xran_open(gxran_handle, &xran_fh_config[o_xu_id]);
     if (xret != XRAN_STATUS_SUCCESS) {
       printf("xran_open failed %d\n", xret);
@@ -450,11 +493,8 @@ int *oai_oran_initialize(struct xran_fh_init *xran_fh_init, struct xran_fh_confi
     }
 
     int sector = 0;
-    printf("Initialize ORAN port instance %d (%d) sector %d\n", o_xu_id, xran_fh_init->xran_ports, sector);
+    printf("Initialize ORAN port instance %d (%d) sector %d\n", o_xu_id, init.xran_ports, sector);
     oran_port_instance_t *pi = &gPortInst[o_xu_id][sector];
-    struct xran_cb_tag tag = {.cellId = sector, .oXuId = o_xu_id};
-    pi->prach_tag = tag;
-    pi->pusch_tag = tag;
 #ifdef E_RELEASE
     LOG_W(HW, "Please be aware that E release support will be removed in the future. Consider switching to F release.\n");
     oran_allocate_buffers(gxran_handle, o_xu_id, 1, pi, &xran_fh_config[o_xu_id]);
@@ -479,8 +519,8 @@ int *oai_oran_initialize(struct xran_fh_init *xran_fh_init, struct xran_fh_confi
 
   // store config after xran initialization -- xran makes modifications to
   // these structs during initialization
-  memcpy(&g_fh_init, xran_fh_init, sizeof(*xran_fh_init));
-  memcpy(&g_fh_config, xran_fh_config, sizeof(*xran_fh_config) * xran_fh_init->xran_ports);
+  memcpy(&g_fh_init, &init, sizeof(init));
+  memcpy(&g_fh_config, xran_fh_config, sizeof(*xran_fh_config) * init.xran_ports);
 
   return (void *)gxran_handle;
 }

radio/fhi_72/oran-init.h

@@ -50,14 +50,15 @@ typedef struct oran_port_instance_t {
   void *instanceHandle;
   //uint32_t dpdkPoolIndex[MAX_SW_XRAN_INTERFACE_NUM];
 
-  struct xran_cb_tag prach_tag;
-  struct xran_cb_tag pusch_tag;
+  struct xran_cb_tag RxCbTag[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR];
+  struct xran_cb_tag PrachCbTag[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR];
 } oran_port_instance_t;
 
 extern struct xran_fh_config gxran_fh_config[XRAN_PORTS_NUM];
 extern void *gxran_handle;
 
-int *oai_oran_initialize(struct xran_fh_init *fh_init, struct xran_fh_config *fh_config);
+struct openair0_config;
+int *oai_oran_initialize(const struct openair0_config *openair0_cfg);
 
 oran_buf_list_t *get_xran_buffers(uint32_t port_id);
 struct xran_fh_init *get_xran_fh_init(void);

radio/fhi_72/oran-params.h

@@ -92,19 +92,33 @@
 
 #define CONFIG_STRING_ORAN_FH "fh_config"
 
+#define ORAN_FH_CONFIG_TADV_CP_DL "Tadv_cp_dl"
+#define ORAN_FH_CONFIG_T2A_CP_DL "T2a_cp_dl"
+#define ORAN_FH_CONFIG_T2A_CP_UL "T2a_cp_ul"
+#define ORAN_FH_CONFIG_T2A_UP "T2a_up"
+#define ORAN_FH_CONFIG_TA3 "Ta3"
 #define ORAN_FH_CONFIG_T1A_CP_DL "T1a_cp_dl"
 #define ORAN_FH_CONFIG_T1A_CP_UL "T1a_cp_ul"
 #define ORAN_FH_CONFIG_T1A_UP "T1a_up"
 #define ORAN_FH_CONFIG_TA4 "Ta4"
+#define ORAN_FH_CONFIG_CP_VLAN_TAG "cp_vlan_tag"
+#define ORAN_FH_CONFIG_UP_VLAN_TAG "up_vlan_tag"
 
 #define ORAN_FH_HLP_CPLT " parameter of RU in list form (Min&Max, length 2!)\n"
 
 // clang-format off
 #define ORAN_FH_DESC { \
+  {ORAN_FH_CONFIG_TADV_CP_DL,   "Tadv parameter of RU\n",      PARAMFLAG_MANDATORY, .uptr=NULL, .defuintval=0,     TYPE_UINT,      0}, \
+  {ORAN_FH_CONFIG_T2A_CP_DL,    "T2a_cp_dl" ORAN_FH_HLP_CPLT,  PARAMFLAG_MANDATORY, .uptr=NULL, .defintarrayval=0, TYPE_UINTARRAY, 0}, \
+  {ORAN_FH_CONFIG_T2A_CP_UL,    "T2a_cp_ul" ORAN_FH_HLP_CPLT,  PARAMFLAG_MANDATORY, .uptr=NULL, .defintarrayval=0, TYPE_UINTARRAY, 0}, \
+  {ORAN_FH_CONFIG_T2A_UP,       "T2a_up" ORAN_FH_HLP_CPLT,     PARAMFLAG_MANDATORY, .uptr=NULL, .defintarrayval=0, TYPE_UINTARRAY, 0}, \
+  {ORAN_FH_CONFIG_TA3,          "Ta3" ORAN_FH_HLP_CPLT,        PARAMFLAG_MANDATORY, .uptr=NULL, .defintarrayval=0, TYPE_UINTARRAY, 0}, \
   {ORAN_FH_CONFIG_T1A_CP_DL,    "T1a_cp_dl" ORAN_FH_HLP_CPLT,  PARAMFLAG_MANDATORY, .uptr=NULL, .defintarrayval=0, TYPE_UINTARRAY, 0}, \
   {ORAN_FH_CONFIG_T1A_CP_UL,    "T1a_cp_ul" ORAN_FH_HLP_CPLT,  PARAMFLAG_MANDATORY, .uptr=NULL, .defintarrayval=0, TYPE_UINTARRAY, 0}, \
   {ORAN_FH_CONFIG_T1A_UP,       "T1a_up" ORAN_FH_HLP_CPLT,     PARAMFLAG_MANDATORY, .uptr=NULL, .defintarrayval=0, TYPE_UINTARRAY, 0}, \
   {ORAN_FH_CONFIG_TA4,          "Ta4" ORAN_FH_HLP_CPLT,        PARAMFLAG_MANDATORY, .uptr=NULL, .defintarrayval=0, TYPE_UINTARRAY, 0}, \
+  {ORAN_FH_CONFIG_CP_VLAN_TAG,  "not used by xran",            0,                   .uptr=NULL, .defuintval=566,     TYPE_UINT,      0}, \
+  {ORAN_FH_CONFIG_UP_VLAN_TAG,  "not used by xran",            0,                   .uptr=NULL, .defuintval=566,     TYPE_UINT,      0}, \
 }
 // clang-format on
 
@@ -112,11 +126,13 @@
 
 #define ORAN_RU_CONFIG_IQWIDTH "iq_width" // not needed if M-plane used
 #define ORAN_RU_CONFIG_IQWIDTH_PRACH "iq_width_prach" // not needed if M-plane used
+#define ORAN_RU_CONFIG_FFT_SIZE "fft_size"
 
 // clang-format off
 #define ORAN_RU_DESC {\
   {ORAN_RU_CONFIG_IQWIDTH,       "sample IQ width (16=uncompressed)\n",       PARAMFLAG_MANDATORY, .u8ptr=NULL, .defuintval=16, TYPE_UINT8, 0}, \
   {ORAN_RU_CONFIG_IQWIDTH_PRACH, "PRACH sample IQ width (16=uncompressed)\n", PARAMFLAG_MANDATORY, .u8ptr=NULL, .defuintval=16, TYPE_UINT8, 0}, \
+  {ORAN_RU_CONFIG_FFT_SIZE,      "Size of FFT at RU\n",                       PARAMFLAG_MANDATORY, .u8ptr=NULL, .defuintval=12, TYPE_UINT8, 0}, \
 }
 // clang-format on
 

radio/fhi_72/oran_isolate.c

@@ -31,7 +31,9 @@
 #include "common/utils/LOG/log.h"
 #include "common/utils/LOG/vcd_signal_dumper.h"
 #include "openair1/PHY/defs_gNB.h"
+#include "common/utils/threadPool/thread-pool.h"
 #include "oaioran.h"
+/// TODO: Check if the following 2 includes are needed
 #include "oran-config.h"
 
 // include the following file for VERSIONX, version of xran lib, to print it during
@@ -190,14 +192,14 @@ int trx_oran_ctlrecv(openair0_device *device, void *msg, ssize_t msg_len)
     cap = (RRU_capabilities_t *)&rru_config_msg->msg[0];
     cap->FH_fmt = OAI_IF4p5_only;
     cap->num_bands = 1;
-    cap->band_list[0] = 78;
+    cap->band_list[0] = 257; //78;
     // cap->num_concurrent_bands             = 1; component carriers
-    cap->nb_rx[0] = 1; // device->openair0_cfg->rx_num_channels;
-    cap->nb_tx[0] = 1; // device->openair0_cfg->tx_num_channels;
+    cap->nb_rx[0] = 2; //1; // device->openair0_cfg->rx_num_channels;
+    cap->nb_tx[0] = 2; //1; // device->openair0_cfg->tx_num_channels;
     cap->max_pdschReferenceSignalPower[0] = -27;
     cap->max_rxgain[0] = 90;
-    cap->N_RB_DL[0] = 106;
-    cap->N_RB_UL[0] = 106;
+    cap->N_RB_DL[0] = 66; //106;
+    cap->N_RB_UL[0] = 66; //106;
 
     s->capabilities_sent = 1;
 
@@ -228,12 +230,34 @@ void oran_fh_if4p5_south_in(RU_t *ru, int *frame, int *slot)
     printf("ORAN: %d.%d ORAN_fh_if4p5_south_in ERROR in RX function \n", f, sl);
   }
 
-  int slots_per_frame = 10 << (ru->openair0_cfg.nr_scs_for_raster);
+  int slots_per_frame = 80; // 10 << (ru->openair0_cfg.nr_scs_for_raster);
   proc->tti_rx = sl;
   proc->frame_rx = f;
   proc->tti_tx = (sl + ru->sl_ahead) % slots_per_frame;
   proc->frame_tx = (sl > (slots_per_frame - 1 - ru->sl_ahead)) ? (f + 1) & 1023 : f;
 
+  PHY_VARS_gNB **gNB_list = ru->gNB_list, *gNB;
+  if (ru->common.beam_id){
+   //ru_info.beamID = ru->common.beam_id;  // ru->common.beam_id[i][slot_tx * fp->symbols_per_slot] //14 hardcoed for now
+    gNB = gNB_list[0];
+  for (int i = 0; i < 80*14; i++) //80 hardcoded for now
+  {
+    if (ru->common.beam_id[0][i] != -1) {
+      uint8_t beam = gNB->gNB_config.analog_beamforming_ve.analog_beam_list[ru->common.beam_id[0][i]].value;
+
+      // printf("before: ru->common.beam_id[0][%d] %d slot %d symbol %d \n", i, ru->common.beam_id[0][i], proc->tti_tx, i%14);
+      ru_info.beamID[0][i] = beam;
+    //if (i%14 ==0 && ru->common.beam_id[0][i] == 0)
+    //printf("slot %d symbol %d beam index %d beam RU %d\n", proc->tti_tx , i%14, ru->common.beam_id[0][i], ru_info.beamID[0][i]);
+    }else{
+    ru_info.beamID[0][i] = 1;
+    //printf("slot %d symbol %d beam index %d beam RU %d\n", proc->tti_tx , i%14, ru->common.beam_id[0][i], ru_info.beamID[0][i]);
+
+    }
+  }
+    update_beams_ctx(ru_info.beamID);
+  }
+  //printf("received %d.%d, expected %d.%d\n", proc->frame_rx,proc->tti_rx,*frame,*slot);
   if (proc->first_rx == 0) {
     if (proc->tti_rx != *slot) {
       LOG_E(HW,
@@ -358,11 +382,14 @@ __attribute__((__visibility__("default"))) int transport_init(openair0_device *d
 #endif
 
   LOG_I(HW, "Initializing O-RAN 7.2 FH interface through xran library (compiled against headers of %s)\n", VERSIONX);
-  eth->oran_priv = oai_oran_initialize(&fh_init, fh_config);
-  AssertFatal(eth->oran_priv != NULL, "can not initialize fronthaul");
-  // create message queues for ORAN sync
+  /// TODO: Check if these are required
+  eth->last_msg = (rru_config_msg_type_t)-1;
+
+  printf("ORAN: %s\n", __FUNCTION__);
 
   initNotifiedFIFO(&oran_sync_fifo);
+  eth->oran_priv = oai_oran_initialize(openair0_cfg);
+  AssertFatal(eth->oran_priv != NULL, "can not initialize fronthaul");
 
   eth->e.flags = ETH_RAW_IF4p5_MODE;
   eth->e.compression = NO_COMPRESS;

radio/fhi_72/oran_isolate.h

@@ -43,6 +43,7 @@ typedef struct ru_info_s {
 
   // Needed for Prach
   int16_t **prach_buf;
+  int beamID[2][1120]; // 80 hardcoded for now
 } ru_info_t;
 
 /** @brief Reads RX data (PRACH/PUSCH) of next slot.
@@ -53,5 +54,6 @@ typedef struct ru_info_s {
 int xran_fh_rx_read_slot(ru_info_t *ru, int *frame, int *slot);
 /** @brief Writes TX data (PDSCH) of given slot. */
 int xran_fh_tx_send_slot(ru_info_t *ru, int frame, int slot, uint64_t timestamp);
+int update_beams_ctx(int beamID[2][1120]);
 
 #endif /* _ORAN_ISOLATE_H_ */

targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.217PRB.2x2.usrpn300.conf

@@ -11,7 +11,7 @@ gNBs =
 
     // Tracking area code, 0x0000 and 0xfffe are reserved values
     tracking_area_code  =  1;
-    plmn_list = ({ mcc = 208; mnc = 99; mnc_length = 2; snssaiList = ({ sst = 1 }) });
+    plmn_list = ({ mcc = 001; mnc = 01; mnc_length = 2; snssaiList = ({ sst = 1 }) });
 
     nr_cellid = 12345678L;