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8 Commits

Author SHA1 Message Date
Florian Kaltenberger
54b380be5b WIP2 2018-12-06 10:08:36 +01:00
Florian Kaltenberger
27f376b1fc small improvements to UE scope 2018-12-06 09:54:15 +01:00
Florian Kaltenberger
a7a753bde3 fixing phy_adjust_sync 2018-12-06 09:53:49 +01:00
Florian Kaltenberger
72636c2632 fixing pbch in phy_scope 2018-12-05 15:02:08 +01:00
Florian Kaltenberger
67c73c3276 fixing bug in adjust_sync, log cleanup 2018-12-04 08:56:23 +01:00
Florian Kaltenberger
79acfddf55 Merge branch 'nr_pdsch' of https://gitlab.eurecom.fr/oai/openairinterface5g into nr_pdsch 2018-12-03 10:33:20 +01:00
Florian Kaltenberger
5270d6c4ee Merge branch 'nr_pdsch' of https://gitlab.eurecom.fr/oai/openairinterface5g into nr_pdsch 2018-11-30 17:09:07 +01:00
Florian Kaltenberger
2afb6ce132 WIP 2018-11-29 16:40:43 +01:00
23 changed files with 152 additions and 119 deletions

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@@ -310,19 +310,21 @@ int test_ldpc(short No_iteration,
}
stop_meas(&time);
/* start_meas(time_optim);
start_meas(time_optim);
ldpc_encoder_optim_8seg(test_input,channel_input_optim,block_length,BG,n_segments,&tinput,&tprep,&tparity,&toutput);
for(j=0;j<n_segments;j++) {
/*
for(j=0;j<n_segments;j++) {
ldpc_encoder_optim(test_input[j],channel_input_optim[j],block_length,BG,&tinput,&tprep,&tparity,&toutput);
}
stop_meas(time_optim);*/
*/
stop_meas(time_optim);
/*
for(j=0;j<(n_segments%8+1);j++) {
start_meas(time_optim);
ldpc_encoder_optim_8seg_multi(test_input,channel_input_optim,block_length, BG, n_segments,j,&tinput,&tprep,&tparity,&toutput);
stop_meas(time_optim);
}
*/
if (ntrials==1)
for (j=0;j<n_segments;j++)
for (i = 0; i < block_length+(nrows-no_punctured_columns) * Zc - removed_bit; i++)

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@@ -215,14 +215,14 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
uint16_t Nid = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? pdcch_params.scrambling_id : config.sch_config.physical_cell_id.value;
#ifdef PDCCH_TEST_POLAR_TEMP_FIX
t_nrPolar_paramsPtr currentPtr = NULL;//, polarParams = NULL;
nr_polar_init(&currentPtr, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
//nr_polar_init(&currentPtr, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
// t_nrPolar_paramsPtr currentPtr = nr_polar_params(*nrPolar_params, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
#else
nr_polar_init(nrPolar_params, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
//nr_polar_init(nrPolar_params, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
t_nrPolar_paramsPtr currentPtr = nr_polar_params(*nrPolar_params, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
#endif
polar_encoder_dci(dci_alloc.dci_pdu, encoder_output, currentPtr, pdcch_params.rnti);
//polar_encoder_dci(dci_alloc.dci_pdu, encoder_output, currentPtr, pdcch_params.rnti);
#ifdef DEBUG_CHANNEL_CODING
printf("polar rnti %d\n",pdcch_params.rnti);

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@@ -211,16 +211,21 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t dlsch,
uint16_t nb_symbols = rel15->nb_mod_symbols;
uint8_t Qm = rel15->modulation_order;
uint16_t encoded_length = nb_symbols*Qm;
static uint8_t print=1;
/// CRC, coding, interleaving and rate matching
nr_dlsch_encoding(harq->pdu, subframe, &dlsch, &frame_parms);
//#ifdef DEBUG_DLSCH
if (print) {
print = 0;
printf("PDSCH encoding:\nPayload:\n");
for (int i=0; i<TBS>>7; i++) {
for (int j=0; j<16; j++)
printf("0x%02x\t", harq->pdu[(i<<4)+j]);
printf("\n");
}
}
#ifdef DEBUG_DLSCH
printf("PDSCH encoding:\nPayload:\n");
for (int i=0; i<TBS>>7; i++) {
for (int j=0; j<16; j++)
printf("0x%02x\t", harq->pdu[(i<<4)+j]);
printf("\n");
}
printf("\nEncoded payload:\n");
for (int i=0; i<encoded_length>>3; i++) {
for (int j=0; j<8; j++)

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@@ -291,7 +291,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
#endif
/// CRC, coding and rate matching
polar_encoder (&pbch->pbch_a_prime, pbch->pbch_e, polar_params);
//polar_encoder (&pbch->pbch_a_prime, pbch->pbch_e, polar_params);
#ifdef DEBUG_PBCH_ENCODING
printf("Channel coding:\n");
for (int i=0; i<NR_POLAR_PBCH_E_DWORD; i++)

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@@ -114,10 +114,10 @@ void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms,
}
if ( ue->rx_offset < 0 )
ue->rx_offset += FRAME_LENGTH_COMPLEX_SAMPLES;
ue->rx_offset += frame_parms->samples_per_frame;
if ( ue->rx_offset >= FRAME_LENGTH_COMPLEX_SAMPLES )
ue->rx_offset -= FRAME_LENGTH_COMPLEX_SAMPLES;
if ( ue->rx_offset >= frame_parms->samples_per_frame )
ue->rx_offset -= frame_parms->samples_per_frame;

View File

@@ -49,10 +49,10 @@
//#define NR_LTE_PDCCH_DCI_SWITCH
#define NR_PDCCH_DCI_RUN // activates new nr functions
#define NR_PDCCH_DCI_DEBUG // activates NR_PDCCH_DCI_DEBUG logs
//#define NR_PDCCH_DCI_DEBUG // activates NR_PDCCH_DCI_DEBUG logs
#define NR_NBR_CORESET_ACT_BWP 3 // The number of CoreSets per BWP is limited to 3 (including initial CORESET: ControlResourceId 0)
#define NR_NBR_SEARCHSPACE_ACT_BWP 10 // The number of SearSpaces per BWP is limited to 10 (including initial SEARCHSPACE: SearchSpaceId 0)
#define PDCCH_TEST_POLAR_TEMP_FIX
//#define PDCCH_TEST_POLAR_TEMP_FIX
@@ -124,7 +124,7 @@ symbol 0 | ... bundle 3 bundle 6
bundle_j = (c*coreset_interleaver_size_R)+r;
f_bundle_j = ((r*coreset_C)+c+n_shift)%((coreset_nbr_rb*coreset_time_dur)/reg_bundle_size_L);
if (coreset_interleaved==0) f_bundle_j=bundle_j;
#ifndef NR_PDCCH_DCI_DEBUG
#ifdef NR_PDCCH_DCI_DEBUG
printf("\n\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_demapping_deinterleaving)-> [r=%d,c=%d] bundle_j(%d) interleaved at f_bundle_j(%d)\n",r,c,bundle_j,f_bundle_j);
#endif
}
@@ -135,7 +135,7 @@ symbol 0 | ... bundle 3 bundle 6
index_llr = 9*((uint16_t)floor(f_reg/coreset_time_dur)+((f_reg%coreset_time_dur)*(coreset_nbr_rb)));
for (int i=0; i<9; i++){
z[index_z + i] = llr[index_llr + i];
#ifndef NR_PDCCH_DCI_DEBUG
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_demapping_deinterleaving)-> [reg=%d,bundle_j=%d] z[%d]=(%d,%d) <-> \t[f_reg=%d,fbundle_j=%d] llr[%d]=(%d,%d) \n",
reg,bundle_j,(index_z + i),*(char*) &z[index_z + i],*(1 + (char*) &z[index_z + i]),
f_reg,f_bundle_j,(index_llr + i),*(char*) &llr[index_llr + i], *(1 + (char*) &llr[index_llr + i]));
@@ -161,7 +161,7 @@ int32_t nr_pdcch_llr(NR_DL_FRAME_PARMS *frame_parms, int32_t **rxdataF_comp,
printf("pdcch_qpsk_llr: llr is null, symbol %d\n", symbol);
return (-1);
}
#ifndef NR_PDCCH_DCI_DEBUG
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_llr)-> llr logs: pdcch qpsk llr for symbol %d (pos %d), llr offset %d\n",symbol,(symbol*frame_parms->N_RB_DL*12),pdcch_llr8-pdcch_llr);
#endif
//for (i = 0; i < (frame_parms->N_RB_DL * ((symbol == 0) ? 16 : 24)); i++) {
@@ -173,7 +173,7 @@ int32_t nr_pdcch_llr(NR_DL_FRAME_PARMS *frame_parms, int32_t **rxdataF_comp,
*pdcch_llr8 = -32;
else
*pdcch_llr8 = (char) (*rxF);
#ifndef NR_PDCCH_DCI_DEBUG
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_llr)-> llr logs: rb=%d i=%d *rxF:%d => *pdcch_llr8:%d\n",i/18,i,*rxF,*pdcch_llr8);
#endif
rxF++;
@@ -498,7 +498,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
if ((c_rb < (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) == 0)) {
//if RB to be treated is lower than middle system bandwidth then rxdataF pointed at (offset + c_br + symbol * ofdm_symbol_size): even case
rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))];
#ifndef NR_PDCCH_DCI_DEBUG
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> in even case c_rb (%d) is lower than half N_RB_DL -> rxF = &rxdataF[aarx = (%d)][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n",
c_rb,aarx,(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))));
#endif
@@ -507,7 +507,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
// number of RBs is even and c_rb is higher than half system bandwidth (we don't skip DC)
// if these conditions are true the pointer has to be situated at the 1st part of the rxdataF
rxF = &rxdataF[aarx][(12*(c_rb - (frame_parms->N_RB_DL>>1)) + (symbol * (frame_parms->ofdm_symbol_size)))]; // we point at the 1st part of the rxdataF in symbol
#ifndef NR_PDCCH_DCI_DEBUG
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> in even case c_rb (%d) is higher than half N_RB_DL (not DC) -> rxF = &rxdataF[aarx = (%d)][(12*(c_rb - (frame_parms->N_RB_DL>>1)) + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n",
c_rb,aarx,(12*(c_rb - (frame_parms->N_RB_DL>>1)) + (symbol * (frame_parms->ofdm_symbol_size))));
#endif
@@ -520,7 +520,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
if ((c_rb < (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)){
//if RB to be treated is lower than middle system bandwidth then rxdataF pointed at (offset + c_br + symbol * ofdm_symbol_size): odd case
rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))];
#ifndef NR_PDCCH_DCI_DEBUG
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> in odd case c_rb (%d) is lower or equal than half N_RB_DL -> rxF = &rxdataF[aarx = (%d)][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n",
c_rb,aarx,(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))));
#endif
@@ -529,7 +529,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
// number of RBs is odd and c_rb is higher than half system bandwidth + 1
// if these conditions are true the pointer has to be situated at the 1st part of the rxdataF just after the first IQ symbols of the RB containing DC
rxF = &rxdataF[aarx][(12*(c_rb - (frame_parms->N_RB_DL>>1)) - 6 + (symbol * (frame_parms->ofdm_symbol_size)))]; // we point at the 1st part of the rxdataF in symbol
#ifndef NR_PDCCH_DCI_DEBUG
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> in odd case c_rb (%d) is higher than half N_RB_DL (not DC) -> rxF = &rxdataF[aarx = (%d)][(12*(c_rb - frame_parms->N_RB_DL) - 5 + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n",
c_rb,aarx,(12*(c_rb - (frame_parms->N_RB_DL>>1)) - 6 + (symbol * (frame_parms->ofdm_symbol_size))));
#endif
@@ -538,7 +538,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
// if odd number RBs in system bandwidth and first RB to be treated is higher than middle system bandwidth (around DC)
// we have to treat the RB in two parts: first part from i=0 to 5, the data is at the end of rxdataF (pointing at the end of the table)
rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))];
#ifndef NR_PDCCH_DCI_DEBUG
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> in odd case c_rb (%d) is half N_RB_DL + 1 we treat DC case -> rxF = &rxdataF[aarx = (%d)][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n",
c_rb,aarx,(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))));
#endif
@@ -573,7 +573,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
}
// then we point at the begining of the symbol part of rxdataF do process second part of RB
rxF = &rxdataF[aarx][((symbol * (frame_parms->ofdm_symbol_size)))]; // we point at the 1st part of the rxdataF in symbol
#ifndef NR_PDCCH_DCI_DEBUG
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> in odd case c_rb (%d) is half N_RB_DL +1 we treat DC case -> rxF = &rxdataF[aarx = (%d)][(symbol * (frame_parms->ofdm_symbol_size)) = (%d)]\n",
c_rb,aarx,(symbol * (frame_parms->ofdm_symbol_size)));
#endif
@@ -608,7 +608,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
for (i = 0; i < 12; i++) {
if ((i != 1) && (i != 5) && (i != 9)) {
rxF_ext[j] = rxF[i];
#ifndef NR_PDCCH_DCI_DEBUG
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> RB[c_rb %d] \t RE[re %d] => rxF_ext[%d]=(%d,%d)\t rxF[%d]=(%d,%d)",
c_rb, i, j, *(short *) &rxF_ext[j],*(1 + (short*) &rxF_ext[j]), i,
*(short *) &rxF[i], *(1 + (short*) &rxF[i]));
@@ -618,7 +618,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
//printf("\t-> dl_ch0[%d] => dl_ch0_ext[%d](%d,%d)\n", i,j, *(short *) &dl_ch0[i], *(1 + (short*) &dl_ch0[i]));
j++;
} else {
#ifndef NR_PDCCH_DCI_DEBUG
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> RB[c_rb %d] \t RE[re %d] => rxF_ext[%d]=(%d,%d)\t rxF[%d]=(%d,%d) \t\t <==> DM-RS PDCCH, this is a pilot symbol\n",
c_rb, i, j, *(short *) &rxF_ext[j], *(1 + (short*) &rxF_ext[j]), i,
*(short *) &rxF[i], *(1 + (short*) &rxF[i]));
@@ -741,7 +741,7 @@ int16x8_t mmtmpP0,mmtmpP1,mmtmpP2,mmtmpP3;
//print_shorts("ch:",dl_ch128+2);
//print_shorts("pack:",rxdataF_comp128+2);
#ifndef NR_PDCCH_DCI_DEBUG
#ifdef NR_PDCCH_DCI_DEBUG
for (int i=0; i<20 ; i++)
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_channel_compensation)-> rb=%d rxdataF128[%d]=(%d,%d) rxdataF_comp128[%d]=(%d,%d)\n",
rb, i, *(short *) &rxdataF128[i],*(1 + (short*) &rxdataF128[i]),
@@ -939,14 +939,13 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
#endif
for (int s = start_symbol; s < (start_symbol + coreset_time_dur); s++) {
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we enter process pdcch ofdm symbol s=%d where coreset_time_dur=%d\n",s,coreset_time_dur);
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we enter nr_pdcch_extract_rbs_single(is_secondary_ue=%d) to remove DM-RS PDCCH\n",
is_secondary_ue);
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> in nr_pdcch_extract_rbs_single(rxdataF -> rxdataF_ext || dl_ch_estimates -> dl_ch_estimates_ext)\n");
#endif
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we enter nr_pdcch_extract_rbs_single(is_secondary_ue=%d) to remove DM-RS PDCCH\n",
is_secondary_ue);
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> in nr_pdcch_extract_rbs_single(rxdataF -> rxdataF_ext || dl_ch_estimates -> dl_ch_estimates_ext)\n");
#endif
nr_pdcch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].rxdataF,
common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].dl_ch_estimates[eNB_id],
pdcch_vars[eNB_id]->rxdataF_ext,
@@ -1186,7 +1185,7 @@ if (do_common){
//uint32_t calc_x2=puissance_2_16%puissance_2_31;
x2 = (((1<<16)*n_rnti)+n_id); //mod 2^31 is implicit //this is c_init in 38.211 v15.1.0 Section 7.3.2.3
// x2 = (nr_tti_rx << 9) + frame_parms->Nid_cell; //this is c_init in 36.211 Sec 6.8.2
#ifndef NR_PDCCH_DCI_DEBUG
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_unscrambling)-> (c_init=%d, n_id=%d, n_rnti=%d, length=%d)\n",x2,n_id,n_rnti,length);
#endif
for (i = 0; i < length; i++) {
@@ -1196,7 +1195,7 @@ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_unscrambling)-> (c_init=%d, n_id=%d,
reset = 0;
}
#ifndef NR_PDCCH_DCI_DEBUG
#ifdef NR_PDCCH_DCI_DEBUG
if (i%2 == 0) printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_unscrambling)-> unscrambling %d : scrambled_z=%d, => ",
i,*(char*) &z[(int)floor(i/2)]);
if (i%2 == 1) printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_unscrambling)-> unscrambling %d : scrambled_z=%d, => ",
@@ -1208,7 +1207,7 @@ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_unscrambling)-> (c_init=%d, n_id=%d,
}
//llr[i] = -llr[i];
//llr[i] = (-1)*llr[i];
#ifndef NR_PDCCH_DCI_DEBUG
#ifdef NR_PDCCH_DCI_DEBUG
if (i%2 == 0) printf("unscrambled_z=%d\n",*(char*) &z[(int)floor(i/2)]);
if (i%2 == 1) printf("unscrambled_z=%d\n",*(1 + (char*) &z[(int)floor(i/2)]));
#endif
@@ -1451,7 +1450,7 @@ void nr_dci_decoding_procedure0(int s,
LOG_I(PHY,"[DCI search nPdcch %d - ue spec] Attempting candidate %d Aggregation Level %d DCI length %d at CCE %d/%d (CCEmap %x,CCEmap_cand %x) format %d\n",
pdcch_vars[eNB_id]->num_pdcch_symbols,m,L2,sizeof_bits,CCEind,nCCE,*CCEmap,CCEmap_mask,format_c);
#endif
#ifndef NR_PDCCH_DCI_DEBUG
#ifdef NR_PDCCH_DCI_DEBUG
printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> ... we enter function dci_decoding(sizeof_bits=%d L=%d) -----\n",sizeof_bits,L);
printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> ... we have to replace this part of the code by polar decoding\n");
#endif
@@ -1476,7 +1475,7 @@ void nr_dci_decoding_procedure0(int s,
}
}
#ifndef NR_PDCCH_DCI_DEBUG
#ifdef NR_PDCCH_DCI_DEBUG
printf("\n");
int j=0;
uint32_t polar_hex[27] = {0};
@@ -1500,15 +1499,16 @@ uint16_t rnti=3;
8,//NR_POLAR_DECODER_LISTSIZE,
0,//NR_POLAR_DECODER_PATH_METRIC_APPROXIMATION,
rnti); //rnti
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0: \t\tpolar decoding)-> decoderState %d\n", decoderState);
#endif
//dci_estimation[0] = 0x01189400;
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0: \t\tdci_estimation: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
dci_estimation[0], dci_estimation[1], dci_estimation[2], dci_estimation[3]);
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0: \t\tpolar decoding)-> decoderState %d\n", decoderState);
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0: \t\tdci_estimation: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
dci_estimation[0], dci_estimation[1], dci_estimation[2], dci_estimation[3]);
#endif
crc = rnti;
//crc = (crc16(&dci_decoded_output[current_thread_id][0], sizeof_bits) >> 16) ^ extract_crc(&dci_decoded_output[current_thread_id][0], sizeof_bits);
#ifndef NR_PDCCH_DCI_DEBUG
#ifdef NR_PDCCH_DCI_DEBUG
printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> ... we end function dci_decoding() with crc=%x\n",crc);
printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> ... we have to replace this part of the code by polar decoding\n");
#endif
@@ -2600,7 +2600,7 @@ uint8_t dci_size [8] = {0,0,0,0,0,0,0,0}; // will contain size for each format
i,dci_size[i],n_RB_ULBWP);
#endif
}
#ifndef NR_PDCCH_DCI_DEBUG
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size) dci_fields_sizes[][] = { \n");
for (int j=0; j<NBR_NR_DCI_FIELDS; j++){
printf("\t\t");
@@ -2662,7 +2662,7 @@ uint8_t dci_size [8] = {0,0,0,0,0,0,0,0}; // will contain size for each format
*/
// }
#ifndef NR_PDCCH_DCI_DEBUG
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size) dci_fields_sizes[][] = { \n");
for (int j=0; j<NBR_NR_DCI_FIELDS; j++){
printf("\t\t");

View File

@@ -537,13 +537,13 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
harq_process->c[r][m]= (uint8_t) llrProcBuf[m];
}
#ifdef DEBUG_DLSCH_DECODING
//#ifdef DEBUG_DLSCH_DECODING
//printf("output decoder %d %d %d %d %d \n", harq_process->c[r][0], harq_process->c[r][1], harq_process->c[r][2],harq_process->c[r][3], harq_process->c[r][4]);
for (int k=0;k<32;k++)
printf("output decoder [%d] = 0x%02x \n", k, harq_process->c[r][k]);
printf("no_iterations_ldpc %d (ret %d)\n",no_iteration_ldpc,ret);
LOG_I(PHY,"output decoder [%d] = 0x%02x \n", k, harq_process->c[r][k]);
LOG_I(PHY,"no_iterations_ldpc %d (ret %d)\n",no_iteration_ldpc,ret);
//write_output("dec_output.m","dec0",harq_process->c[0],Kr_bytes,1,4);
#endif
//#endif
#if UE_TIMING_TRACE

View File

@@ -160,7 +160,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
//set active for testing -> to be removed
dlsch[0]->harq_processes[harq_pid]->status = ACTIVE;
dlsch[0]->harq_processes[harq_pid]->Qm = 2;
dlsch[0]->harq_processes[harq_pid]->mcs = 9;
dlsch[0]->harq_processes[harq_pid]->mcs = 8;
dlsch[0]->harq_processes[harq_pid]->Nl=1;
dlsch[0]->harq_processes[harq_pid]->nb_rb = nb_rb_pdsch;
frame_parms->nushift = 0;

View File

@@ -496,7 +496,7 @@ void nr_pbch_quantize(int16_t *pbch_llr8,
if (pbch_llr[i]>31)
pbch_llr8[i]=32;
else if (pbch_llr[i]<-31)
pbch_llr8[i]=-32;
pbch_llr8[i]=-31;
else
pbch_llr8[i] = (char)(pbch_llr[i]);

View File

@@ -507,7 +507,7 @@ void phy_scope_UE(FD_lte_phy_scope_ue *form,
//int16_t *pdsch_mag;
int8_t *pdcch_llr;
int16_t *pdcch_comp;
int8_t *pbch_llr;
int16_t *pbch_llr;
int16_t *pbch_comp;
float llr_pbch[1920], bit_pbch[1920];
float *llr, *bit;
@@ -517,6 +517,7 @@ void phy_scope_UE(FD_lte_phy_scope_ue *form,
int num_re = 4500;
int Qm = 2;
int coded_bits_per_codeword = num_re*Qm;
int symbol, first_symbol,nb_re;
/*
float Re,Im,ymax=1;
float **chest_t_abs, *chest_f_abs;
@@ -591,7 +592,7 @@ void phy_scope_UE(FD_lte_phy_scope_ue *form,
chest_t = (int16_t**) phy_vars_ue->common_vars.common_vars_rx_data_per_thread[phy_vars_ue->current_thread_id[subframe]].dl_ch_estimates_time[eNB_id];
chest_f = (int16_t**) phy_vars_ue->common_vars.common_vars_rx_data_per_thread[phy_vars_ue->current_thread_id[subframe]].dl_ch_estimates[eNB_id];
*/
pbch_llr = (int8_t*) phy_vars_ue->pbch_vars[eNB_id]->llr;
pbch_llr = (int16_t*) phy_vars_ue->pbch_vars[eNB_id]->llr;
pbch_comp = (int16_t*) phy_vars_ue->pbch_vars[eNB_id]->rxdataF_comp[0];
pdcch_llr = (int8_t*) phy_vars_ue->pdcch_vars[phy_vars_ue->current_thread_id[subframe]][eNB_id]->llr;
@@ -625,6 +626,7 @@ void phy_scope_UE(FD_lte_phy_scope_ue *form,
*/
}
if (phy_vars_ue->is_synchronized==0) {
for (ind=0;ind<3;ind++) {
if (pss_corr_ue[ind]) {
for (i=0; i<samples_per_frame; i++) {
@@ -638,7 +640,7 @@ void phy_scope_UE(FD_lte_phy_scope_ue *form,
fl_add_xyplot_overlay(form->chest_t,ind,time,corr,samples_per_frame,rx_antenna_colors[ind]);
}
}
}
/*
// Channel Impulse Response (still repeated format)
@@ -730,16 +732,27 @@ void phy_scope_UE(FD_lte_phy_scope_ue *form,
}
fl_set_xyplot_data(form->pbch_llr,bit_pbch,llr_pbch,864,"","","");
fl_set_xyplot_ybounds(form->pbch_llr,-32,32);
}
if (phy_vars_ue->is_synchronized==1)
first_symbol=5;
else
first_symbol=1;
// PBCH I/Q of MF Output
if (pbch_comp!=NULL) {
for (i=0; i<576; i++) {
I[i] = pbch_comp[2*i];
Q[i] = pbch_comp[2*i+1];
for (symbol=first_symbol; symbol<(first_symbol+3); symbol++) {
if (symbol == 2 || symbol == 6)
nb_re = 72;
else
nb_re = 180;
for (i=0; i<nb_re; i++) {
I[i] = pbch_comp[2*symbol*20*12+2*i];
Q[i] = pbch_comp[2*symbol*20*12+2*i+1];
}
}
fl_set_xyplot_data(form->pbch_comp,I,Q,576,"","","");
fl_set_xyplot_data(form->pbch_comp,I,Q,432,"","","");
}
// PDCCH LLRs

View File

@@ -184,7 +184,7 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
num_dci = gNB->pdcch_vars.num_dci;
num_pdsch_rnti = gNB->pdcch_vars.num_pdsch_rnti;
if (num_dci && (subframe==1)) {
if (num_dci) {
LOG_I(PHY, "[gNB %d] Frame %d subframe %d \
Calling nr_generate_dci_top (number of DCI %d)\n", gNB->Mod_id, frame, subframe, num_dci);

View File

@@ -56,7 +56,7 @@
//#define DEBUG_PHY_PROC
#define NR_PDCCH_SCHED
//#define NR_PDCCH_SCHED_DEBUG
#define NR_PDCCH_SCHED_DEBUG
//#define NR_PUCCH_SCHED
//#define NR_PUCCH_SCHED_DEBUG
@@ -2717,7 +2717,7 @@ void nr_ue_measurement_procedures(
}
#endif
// accumulate and filter timing offset estimation every nr_tti_rx (instead of every frame)
if (( (slot%2) == 0) && (l==(1-frame_parms->Ncp))) {
if (( slot == 2) && (l==(1-frame_parms->Ncp))) {
// AGC
/*
@@ -2936,6 +2936,7 @@ void nr_ue_pbch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
ue->high_speed_flag);
if (ret==0) {
ue->pbch_vars[eNB_id]->pdu_errors_conseq = 0;
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[UE %d] frame %d, nr_tti_rx %d, Received PBCH (MIB): frame_tx %d. N_RB_DL %d\n",
@@ -2965,14 +2966,9 @@ void nr_ue_pbch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
ue->pbch_vars[eNB_id]->pdu_errors_conseq++;
ue->pbch_vars[eNB_id]->pdu_errors++;
if (ue->mac_enabled == 1) {
//mac_xface->out_of_sync_ind(ue->Mod_id,frame_rx,eNB_id);
}
else{
if (ue->pbch_vars[eNB_id]->pdu_errors_conseq>=100) {
LOG_E(PHY,"More that 100 consecutive PBCH errors! Exiting!\n");
exit_fun("More that 100 consecutive PBCH errors! Exiting!\n");
}
if (ue->pbch_vars[eNB_id]->pdu_errors_conseq>=100) {
LOG_E(PHY,"More that 100 consecutive PBCH errors! Exiting!\n");
exit_fun("More that 100 consecutive PBCH errors! Exiting!\n");
}
}
@@ -5062,7 +5058,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_IN);
nr_slot_fep(ue,
l,
nr_tti_rx,
nr_tti_rx<<1,
0,
0,
1,
@@ -5448,7 +5444,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
//#endif //pdsch
LOG_D(PHY," ****** end RX-Chain for AbsSubframe %d.%d ****** \n", frame_rx%1024, nr_tti_rx);
LOG_I(PHY," ****** end RX-Chain for AbsSubframe %d.%d ****** \n", frame_rx%1024, nr_tti_rx);
return (0);
}

View File

@@ -593,14 +593,15 @@ int main(int argc, char **argv) {
if (estimated_output_bit[i] != test_input_bit[i]) {
errors_bit++;
//printf("estimated bits error occurs @%d ",i);
if (n_trials==1)
printf("bit error @%d\n",i);
}
}
if (errors_bit>0) {
n_false_positive++;
if (n_trials == 1)
printf("\n errors_bit %d (trial %d)\n", errors_bit,trial);
printf("total bit errors %d\n", errors_bit);
}
}

View File

@@ -81,7 +81,7 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
dlsch_pdu_rel15->rnti = rnti;
dlsch_pdu_rel15->nb_layers =1;
dlsch_pdu_rel15->nb_codewords = 1;
dlsch_pdu_rel15->mcs_idx = 9;
dlsch_pdu_rel15->mcs_idx = 8;
dlsch_pdu_rel15->ndi = 1;
dlsch_pdu_rel15->redundancy_version = 0;

View File

@@ -2,6 +2,7 @@
#define _THREADS_T_H_
typedef struct threads_s {
int main;
int iq;
int one;
int two;

View File

@@ -147,13 +147,13 @@ eNBs =
NETWORK_INTERFACES :
{
ENB_INTERFACE_NAME_FOR_S1_MME = "eth6";
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.111/24";
ENB_INTERFACE_NAME_FOR_S1U = "eth6";
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.12.111/24";
ENB_INTERFACE_NAME_FOR_S1_MME = "enp0s20f0u11";
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.110/24";
ENB_INTERFACE_NAME_FOR_S1U = "enp0s20f0u11";
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.12.110/24";
ENB_PORT_FOR_S1U = 2152; # Spec 2152
ENB_IPV4_ADDRESS_FOR_X2C = "192.168.12.111/24";
ENB_IPV4_ADDRESS_FOR_X2C = "192.168.12.110/24";
ENB_PORT_FOR_X2C = 36422; # Spec 36422
};
}
@@ -187,7 +187,7 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 116;
eNB_instances = [0];
sdr_addrs = "addr=192.168.10.2,mgmt_addr=192.168.100.8,clock_src=external";
}
);

View File

@@ -254,21 +254,21 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 114;
eNB_instances = [0];
sdr_addrs = "addr=192.168.10.2,second_addr=192.168.20.2,mgmt_addr=192.168.100.8";
sdr_addrs = "addr=192.168.10.2,mgmt_addr=192.168.100.8,clock_src=external,time_src=external";
#clock_src = "external";
}
);
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_SINGLE_THREAD";
parallel_config = "PARALLEL_RU_L1_TRX_SPLIT";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_DISABLE";
worker_config = "WORKER_ENABLE";
}
);
NETWORK_CONTROLLER :
nETWORK_CONTROLLER :
{
FLEXRAN_ENABLED = "no";
FLEXRAN_INTERFACE_NAME = "lo";

View File

@@ -1514,9 +1514,9 @@ void *UE_thread(void *arg) {
UE->frame_parms.nb_antennas_rx);
}
#endif
}
}
} // UE->is_synchronized==0
} // UE->is_synchronized==0
else {
if (start_rx_stream==0) {
start_rx_stream=1;

View File

@@ -500,7 +500,7 @@ static void get_options(unsigned int *start_msc) {
int CC_id;
int tddflag, nonbiotflag;
char *loopfile=NULL;
int dumpframe;
int dumpframe = 0;
uint32_t online_log_messages;
uint32_t glog_level;
uint32_t start_telnetsrv;

View File

@@ -1499,7 +1499,7 @@ static void* ru_thread( void* param ) {
int ret;
int subframe =9;
int frame =1023;
char filename[40];
char filename[40],threadname[40];
int print_frame = 2;
int i = 0;
@@ -1508,7 +1508,8 @@ static void* ru_thread( void* param ) {
// set default return value
thread_top_init("ru_thread",0,870000,1000000,1000000);
sprintf(threadname,"ru_thread %d",ru->idx);
thread_top_init(threadname,0,870000,1000000,1000000);
LOG_I(PHY,"Starting RU %d (%s,%s),\n",ru->idx,NB_functions[ru->function],NB_timing[ru->if_timing]);

View File

@@ -900,7 +900,7 @@ void *UE_thread(void *arg) {
for (int i=0; i<UE->frame_parms.nb_antennas_rx; i++)
rxp[i] = (void*)&dummy_rx[i][0];
for (int sf=0; sf<NR_NUMBER_OF_SUBFRAMES_PER_FRAME; sf++)
// printf("Reading dummy sf %d\n",sf);
//LOG_I(PHY,"Reading dummy sf %d\n",sf);
AssertFatal(UE->frame_parms.samples_per_subframe==
UE->rfdevice.trx_read_func(&UE->rfdevice,
&timestamp,
@@ -997,7 +997,7 @@ void *UE_thread(void *arg) {
UE->rx_offset < 10*UE->frame_parms.samples_per_subframe )
UE->rx_offset_diff = 1;
LOG_D(PHY,"AbsSubframe %d.%d TTI SET rx_off_diff to %d rx_offset %d \n",proc->frame_rx,subframe_nr,UE->rx_offset_diff,UE->rx_offset);
LOG_I(PHY,"AbsSubframe %d.%d TTI SET rx_off_diff to %d rx_offset %d \n",proc->frame_rx,subframe_nr,UE->rx_offset_diff,UE->rx_offset);
readBlockSize=UE->frame_parms.samples_per_subframe -
UE->frame_parms.ofdm_symbol_size -
UE->frame_parms.nb_prefix_samples0 -

View File

@@ -85,10 +85,10 @@ unsigned short config_frames[4] = {2,9,11,13};
// current status is that every UE has a DL scope for a SINGLE eNB (eNB_id=0)
// at eNB 0, an UL scope for every UE
FD_lte_phy_scope_ue *form_ue[NUMBER_OF_UE_MAX];
FD_lte_phy_scope_enb *form_enb[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
FD_stats_form *form_stats=NULL,*form_stats_l2=NULL;
//FD_lte_phy_scope_enb *form_enb[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
//FD_stats_form *form_stats=NULL,*form_stats_l2=NULL;
char title[255];
unsigned char scope_enb_num_ue = 2;
//unsigned char scope_enb_num_ue = 2;
static pthread_t forms_thread; //xforms
#endif //XFORMS
#include "nr-uesoftmodem.h"
@@ -268,7 +268,7 @@ char uecap_xer[1024],uecap_xer_in=0;
int oaisim_flag=0;
int emulate_rf = 0;
threads_t threads= {-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1};
threads_t threads= {-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1};
char* usrp_args=NULL;
char* usrp_clksrc=NULL;
@@ -440,8 +440,8 @@ static void *scope_thread(void *arg) {
while (!oai_exit) {
//len = dump_ue_stats (PHY_vars_UE_g[0][0], &PHY_vars_UE_g[0][0]->proc.proc_rxtx[0],stats_buffer, 0, mode,rx_input_level_dBm);
//fl_set_object_label(form_stats->stats_text, stats_buffer);
fl_clear_browser(form_stats->stats_text);
fl_add_browser_line(form_stats->stats_text, stats_buffer);
//fl_clear_browser(form_stats->stats_text);
//fl_add_browser_line(form_stats->stats_text, stats_buffer);
//if (PHY_vars_UE_g[0][0]->is_synchronized == 1)
phy_scope_UE(form_ue[0],
@@ -451,7 +451,7 @@ static void *scope_thread(void *arg) {
//printf("doing forms\n");
//usleep(100000); // 100 ms
sleep(1);
sleep(0.1);
}
// printf("%s",stats_buffer);
@@ -1030,7 +1030,20 @@ int main( int argc, char **argv ) {
init_openair0();
threads.main = 16;
threads.iq = 17;
threads.one = 18;
threads.two = 19;
threads.three = 20;
threads.slot1_proc_one = 21;
threads.slot1_proc_two = 22;
threads.slot1_proc_three = 23;
threads.dlsch_td_one = 24;
threads.dlsch_td_two = 25;
threads.dlsch_td_three = 26;
threads.dlsch_td1_one = 27;
threads.dlsch_td1_two = 28;
threads.dlsch_td1_three = 29;
#ifndef DEADLINE_SCHEDULER
@@ -1042,7 +1055,7 @@ int main( int argc, char **argv ) {
CPU_ZERO(&cpuset);
#ifdef CPU_AFFINITY
if (get_nprocs() > 2) {
CPU_SET(0, &cpuset);
CPU_SET(threads.main, &cpuset);
s = pthread_setaffinity_np(pthread_self(), sizeof(cpu_set_t), &cpuset);
if (s != 0) {
perror( "pthread_setaffinity_np");
@@ -1127,8 +1140,8 @@ int main( int argc, char **argv ) {
fl_initialize (&fl_argc, argv, NULL, 0, 0);
// restore the original command line args
// argv = fl_get_cmdline_args( &argc );
form_stats = create_form_stats_form();
fl_show_form (form_stats->stats_form, FL_PLACE_HOTSPOT, FL_FULLBORDER, "stats");
//form_stats = create_form_stats_form();
//fl_show_form (form_stats->stats_form, FL_PLACE_HOTSPOT, FL_FULLBORDER, "stats");
UE_id = 0;
form_ue[UE_id] = create_lte_phy_scope_ue();
sprintf (title, "NR DL SCOPE UE");
@@ -1218,8 +1231,8 @@ int main( int argc, char **argv ) {
if (do_forms==1) {
pthread_join(forms_thread,&status);
fl_hide_form(form_stats->stats_form);
fl_free_form(form_stats->stats_form);
//fl_hide_form(form_stats->stats_form);
//fl_free_form(form_stats->stats_form);
fl_hide_form(form_ue[0]->lte_phy_scope_ue);
fl_free_form(form_ue[0]->lte_phy_scope_ue);
}

View File

@@ -157,12 +157,13 @@
{"external-clock", CONFIG_HLP_EXCCLK, PARAMFLAG_BOOL, uptr:&clock_source, defintval:0, TYPE_INT, 0}, \
{"wait-for-sync", NULL, PARAMFLAG_BOOL, iptr:&wait_for_sync, defintval:0, TYPE_INT, 0}, \
{"single-thread-disable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&single_thread_flag, defintval:1, TYPE_INT, 0}, \
{"threadIQ", NULL, 0, iptr:&(threads.iq), defintval:1, TYPE_INT, 0}, \
{"threadOneSubframe", NULL, 0, iptr:&(threads.one), defintval:1, TYPE_INT, 0}, \
{"threadTwoSubframe", NULL, 0, iptr:&(threads.two), defintval:1, TYPE_INT, 0}, \
{"threadThreeSubframe", NULL, 0, iptr:&(threads.three), defintval:1, TYPE_INT, 0}, \
{"threadSlot1ProcOne", NULL, 0, iptr:&(threads.slot1_proc_one), defintval:1, TYPE_INT, 0}, \
{"threadSlot1ProcTwo", NULL, 0, iptr:&(threads.slot1_proc_two), defintval:1, TYPE_INT, 0}, \
{"threadmain", NULL, 0, iptr:&(threads.main), defintval:-1, TYPE_INT, 0}, \
{"threadIQ", NULL, 0, iptr:&(threads.iq), defintval:-1, TYPE_INT, 0}, \
{"threadOneSubframe", NULL, 0, iptr:&(threads.one), defintval:-1, TYPE_INT, 0}, \
{"threadTwoSubframe", NULL, 0, iptr:&(threads.two), defintval:-1, TYPE_INT, 0}, \
{"threadThreeSubframe", NULL, 0, iptr:&(threads.three), defintval:-1, TYPE_INT, 0}, \
{"threadSlot1ProcOne", NULL, 0, iptr:&(threads.slot1_proc_one), defintval:-1, TYPE_INT, 0}, \
{"threadSlot1ProcTwo", NULL, 0, iptr:&(threads.slot1_proc_two), defintval:-1, TYPE_INT, 0}, \
{"nr_dlsch-demod-shift", CONFIG_HLP_DLSHIFT, 0, iptr:(int32_t *)&nr_dlsch_demod_shift, defintval:0, TYPE_INT, 0}, \
{"A" , CONFIG_HLP_TADV, 0, uptr:&timing_advance, defintval:0, TYPE_UINT, 0}, \
{"C" , CONFIG_HLP_DLF, 0, uptr:&(downlink_frequency[0][0]), defuintval:2680000000, TYPE_UINT, 0}, \