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@@ -52,6 +52,21 @@ include_directories(${CONFIG_INCLUDE_DIRS})
|
||||
pkg_search_module(CRYPTO libcrypto REQUIRED)
|
||||
include_directories(${CRYPTO_INCLUDE_DIRS})
|
||||
|
||||
add_list2_option(TP_PROTO "None" "Ethernet" "benetel4g" "benetel5g" "oran_fhlib_5g")
|
||||
if (${TP_PROTO} STREQUAL "oran_fhlib_5g")
|
||||
if(DEFINED ENV{RTE_SDK})
|
||||
message("RTE_SDK $ENV{RTE_SDK}")
|
||||
else()
|
||||
message(FATAL_ERROR "RTE_SDK Not defined")
|
||||
endif()
|
||||
|
||||
if(DEFINED ENV{RTE_TARGET})
|
||||
message("RTE_TARGET $ENV{RTE_TARGET}")
|
||||
else()
|
||||
message(FATAL_ERROR "RTE_TARGET is NOT defined")
|
||||
endif()
|
||||
endif()
|
||||
|
||||
#uhd 4.0 and iris installs by default in /usr/local
|
||||
include_directories("/usr/local/include/")
|
||||
#use native cmake method as this package is not in pkg-config
|
||||
@@ -137,7 +152,20 @@ set (OPENAIR3_DIR ${OPENAIR_DIR}/openair3)
|
||||
set (OPENAIR3_DIR ${OPENAIR_DIR}/openair3)
|
||||
set (OPENAIR_CMAKE ${OPENAIR_DIR}/cmake_targets)
|
||||
set (OPENAIR_BIN_DIR ${CMAKE_CURRENT_BINARY_DIR}${CMAKE_FILES_DIRECTORY})
|
||||
set (INTEL_LIB /usr/local/intel64)
|
||||
set (DPDK_DIR $ENV{RTE_SDK}/$ENV{RTE_TARGET}/include)
|
||||
|
||||
if(DEFINED ENV{XRAN_LIB_DIR})
|
||||
set (XRAN_LIB_DIR $ENV{XRAN_LIB_DIR})
|
||||
else()
|
||||
set (XRAN_LIB_DIR /usr/local/xran)
|
||||
endif()
|
||||
|
||||
set (XRAN_DIR $ENV{XRAN_LIB_DIR}/../src)
|
||||
set (XRAN_COMMON_DIR $ENV{XRAN_LIB_DIR}/../../test/common)
|
||||
set (XRAN_LIB_API_DIR $ENV{XRAN_LIB_DIR}/../api)
|
||||
|
||||
Message("XRAN_LIB_DIR: ${XRAN_LIB_DIR}, DPDK_DIR: ${DPDK_DIR}")
|
||||
project (OpenAirInterface)
|
||||
|
||||
####################################################
|
||||
@@ -590,6 +618,30 @@ target_link_libraries(benetel_5g PRIVATE ${DPDK_LIBS})
|
||||
target_link_libraries(benetel_5g PRIVATE pthread dl rt m numa)
|
||||
target_link_libraries(benetel_5g PRIVATE asn1_nr_rrc asn1_lte_rrc)
|
||||
|
||||
# ORAN 5G library
|
||||
######################################################################
|
||||
|
||||
set(ORAN_FHLIB_5G_SOURCE
|
||||
${OPENAIR_DIR}/radio/ETHERNET/oran/5g/oran.cpp
|
||||
${OPENAIR_DIR}/radio/ETHERNET/oran/5g/xran_lib_wrap.cpp
|
||||
${OPENAIR_DIR}/radio/ETHERNET/oran/5g/oran_isolate.c
|
||||
)
|
||||
add_library(oran_fhlib_5g MODULE ${ORAN_FHLIB_5G_SOURCE})
|
||||
|
||||
target_include_directories(oran_fhlib_5g PRIVATE ${XRAN_DIR})
|
||||
target_include_directories(oran_fhlib_5g PRIVATE ${DPDK_DIR})
|
||||
target_include_directories(oran_fhlib_5g PRIVATE ${INTEL_LIB})
|
||||
target_include_directories(oran_fhlib_5g PRIVATE ${XRAN_COMMON_DIR})
|
||||
target_include_directories(oran_fhlib_5g PRIVATE ${XRAN_LIB_API_DIR})
|
||||
|
||||
set_target_properties(oran_fhlib_5g PROPERTIES COMPILE_FLAGS "-fvisibility=hidden -march=native -I$ENV{RTE_SDK}/$ENV{RTE_TARGET}/include")
|
||||
|
||||
SET(DPDK_LIBS "-Wl,-rpath,$ENV{RTE_SDK}/$ENV{RTE_TARGET}/lib -Wl,--whole-archive -L$ENV{RTE_SDK}/$ENV{RTE_TARGET}/lib -ldpdk -Wl,--no-whole-archive")
|
||||
TARGET_LINK_LIBRARIES(oran_fhlib_5g PRIVATE ${DPDK_LIBS})
|
||||
TARGET_LINK_LIBRARIES(oran_fhlib_5g PRIVATE -L${XRAN_LIB_DIR} -lxran)
|
||||
TARGET_LINK_LIBRARIES(oran_fhlib_5g PRIVATE pthread dl rt m numa)
|
||||
target_link_libraries(oran_fhlib_5g PRIVATE asn1_nr_rrc asn1_lte_rrc)
|
||||
|
||||
##########################################################
|
||||
|
||||
# LDPC offload library
|
||||
|
||||
@@ -117,7 +117,7 @@ Options:
|
||||
USRP, BLADERF, LMSSDR, IRIS, SIMU, AW2SORI, None (Default)
|
||||
Adds this RF board support (in external packages installation and in compilation)
|
||||
-t | --transport
|
||||
Selects the transport protocol type, options: None, Ethernet, benetel4g, benetel5g
|
||||
Selects the transport protocol type, options: None, Ethernet, benetel4g, benetel5g, oran_fhlib_5g
|
||||
-P | --phy_simulators
|
||||
Makes the unitary tests Layer 1 simulators
|
||||
-S | --core_simulators
|
||||
@@ -307,6 +307,8 @@ function main() {
|
||||
shift 2;;
|
||||
-t | --transport)
|
||||
TP=$2
|
||||
echo_info "TP set to ${TP}"
|
||||
CMAKE_CMD="$CMAKE_CMD -DTP_PROTO=$2"
|
||||
shift 2;;
|
||||
-P | --phy_simulators)
|
||||
SIMUS_PHY=1
|
||||
@@ -502,13 +504,14 @@ function main() {
|
||||
if [ "$INSTALL_EXTERNAL" = "1" ] ; then
|
||||
echo_info "Installing packages"
|
||||
check_install_oai_software
|
||||
|
||||
if [ "$HW" == "OAI_USRP" ] ; then
|
||||
echo_info "installing packages for USRP support"
|
||||
check_install_usrp_uhd_driver
|
||||
if [ ! -v BUILD_UHD_FROM_SOURCE ] && [ ! "$DISABLE_HARDWARE_DEPENDENCY" == "True" ]; then
|
||||
install_usrp_uhd_driver $UHD_IMAGES_DIR
|
||||
fi
|
||||
fi
|
||||
fi
|
||||
if [ "$HW" == "OAI_BLADERF" ] ; then
|
||||
echo_info "installing packages for BLADERF support"
|
||||
check_install_bladerf_driver
|
||||
@@ -523,6 +526,14 @@ function main() {
|
||||
# flash_firmware_iris
|
||||
#fi
|
||||
fi
|
||||
echo_info "Installing DPDK"
|
||||
install_dpdk_from_archive
|
||||
echo_success "DPDK installation successful"
|
||||
|
||||
echo_info "Installing XRAN"
|
||||
install_xran_from_sources
|
||||
echo_success "XRAN installation successful"
|
||||
|
||||
fi
|
||||
|
||||
if [ "$INSTALL_OPTIONAL" = "1" ] ; then
|
||||
@@ -746,7 +757,12 @@ function main() {
|
||||
compilations $BUILD_DIR benetel_5g
|
||||
ln -sf libbenetel_5g.so liboai_transpro.so
|
||||
echo_info "liboai_transpro.so is linked to BENETEL4G transport"
|
||||
fi
|
||||
fi
|
||||
if [ "$TP" == "oran_fhlib_5g" ]; then
|
||||
compilations $BUILD_DIR oran_fhlib_5g
|
||||
ln -sf liboran_fhlib_5g.so liboai_transpro.so
|
||||
echo_info "liboai_transpro.so is linked to oran_fhlib_5G transport"
|
||||
fi
|
||||
fi
|
||||
fi
|
||||
|
||||
|
||||
@@ -247,6 +247,56 @@ compilations() {
|
||||
# External packages installers
|
||||
############################################
|
||||
|
||||
install_dpdk_from_archive(){
|
||||
dpdk_install_log=$OPENAIR_DIR/cmake_targets/log/dpdk_install_log.txt
|
||||
echo_info "\nInstalling DPDK $DPDK_ARCHIVE_VERSION from archive. The log file for DPDK installation is here: $dpdk_install_log "
|
||||
(
|
||||
cd ~/
|
||||
rm -rf dpdk-*
|
||||
echo "Downloading DPDK $DPDK_ARCHIVE_VERSION"
|
||||
wget static.dpdk.org/rel/$DPDK_ARCHIVE_VERSION.tar.gz
|
||||
tar -xf $DPDK_ARCHIVE_VERSION.tar.gz
|
||||
cd $RTE_SDK/config
|
||||
sed -i 's/CONFIG_RTE_EAL_IGB_UIO=y/CONFIG_RTE_EAL_IGB_UIO=n/' common_linux
|
||||
sed -i 's/CONFIG_RTE_KNI_KMOD=y/CONFIG_RTE_KNI_KMOD=n/' common_linux
|
||||
cd $RTE_SDK/
|
||||
make -j8 install T=$RTE_TARGET EXTRA_CFLAGS="-fPIC"
|
||||
) >& $dpdk_install_log
|
||||
}
|
||||
|
||||
install_xran_from_sources(){
|
||||
xran_install_log=$OPENAIR_DIR/cmake_targets/log/xran_install_log.txt
|
||||
echo_info "\nInstalling XRAN from sources. The log file for XRAN installation is here: $xran_install_log "
|
||||
(
|
||||
cd ~/
|
||||
if [[ -d phy ]];
|
||||
then
|
||||
rm -rf phy/
|
||||
fi
|
||||
echo_info "\Clone XRAN repository and checkout oran_release_bronze_v1.1"
|
||||
git clone https://gerrit.o-ran-sc.org/r/o-du/phy.git
|
||||
cd phy
|
||||
git checkout oran_release_bronze_v1.1
|
||||
|
||||
cd fhi_lib/lib/src
|
||||
sed -i 's/pmc -u -b 0/pmc -u -b 0 -d 24/' xran_sync_api.c
|
||||
cd ../../../
|
||||
|
||||
echo_info "\Copy XRAN patched to phy/ directory"
|
||||
scp -r $OPENAIR_DIR/cmake_targets/tools/oran_fhi_integration_patches/ .
|
||||
|
||||
echo_info "\nApply XRAN patches"
|
||||
git apply oran_fhi_integration_patches/oran-fhi-1-compile-libxran-using-gcc-and-disable-avx512.patch
|
||||
git apply oran_fhi_integration_patches/oran-fhi-2-return-correct-slot_id.patch
|
||||
git apply oran_fhi_integration_patches/oran-fhi-3-disable-pkt-validate-at-process_mbuf.patch
|
||||
git apply oran_fhi_integration_patches/oran-fhi-4-process_all_rx_ring.patch
|
||||
git apply oran_fhi_integration_patches/oran-fhi-5-remove-not-used-dependencies.patch
|
||||
|
||||
echo_info "\nBuild XRAN"
|
||||
cd fhi_lib && ./build.sh
|
||||
) >& $xran_install_log
|
||||
}
|
||||
|
||||
install_usrp_uhd_driver_from_source(){
|
||||
uhd_install_log=$OPENAIR_DIR/cmake_targets/log/uhd_install_log.txt
|
||||
echo_info "\nInstalling UHD driver from sources. The log file for UHD driver installation is here: $uhd_install_log "
|
||||
|
||||
@@ -0,0 +1,29 @@
|
||||
From d1ad2907b3c3572de193ae770912436fb0a96443 Mon Sep 17 00:00:00 2001
|
||||
From: "thamizhselvan.k" <thamizhselvan.k@vvdntech.in>
|
||||
Date: Fri, 27 Jan 2023 16:18:08 +0530
|
||||
Subject: [PATCH 2/2] disable dedicated bandwidth config for Amarisoft UE
|
||||
simbox
|
||||
|
||||
---
|
||||
openair2/RRC/NR/MESSAGES/asn1_msg.c | 4 +---
|
||||
1 file changed, 1 insertion(+), 3 deletions(-)
|
||||
|
||||
diff --git a/openair2/RRC/NR/MESSAGES/asn1_msg.c b/openair2/RRC/NR/MESSAGES/asn1_msg.c
|
||||
index e52e637dd8..f15735b36f 100644
|
||||
--- a/openair2/RRC/NR/MESSAGES/asn1_msg.c
|
||||
+++ b/openair2/RRC/NR/MESSAGES/asn1_msg.c
|
||||
@@ -1213,10 +1213,8 @@ void fill_initial_cellGroupConfig(int uid,
|
||||
physicalCellGroupConfig->pdsch_HARQ_ACK_Codebook = NR_PhysicalCellGroupConfig__pdsch_HARQ_ACK_Codebook_dynamic;
|
||||
cellGroupConfig->physicalCellGroupConfig = physicalCellGroupConfig;
|
||||
|
||||
- cellGroupConfig->spCellConfig = calloc(1,sizeof(*cellGroupConfig->spCellConfig));
|
||||
+ cellGroupConfig->spCellConfig = NULL;
|
||||
|
||||
- fill_initial_SpCellConfig(uid,cellGroupConfig->spCellConfig,scc,servingcellconfigdedicated,configuration);
|
||||
-
|
||||
cellGroupConfig->sCellToAddModList = NULL;
|
||||
cellGroupConfig->sCellToReleaseList = NULL;
|
||||
}
|
||||
--
|
||||
2.25.1
|
||||
|
||||
@@ -0,0 +1,105 @@
|
||||
From a7f20ad7c4ada7d50f21c5a8f15b1baab37481fa Mon Sep 17 00:00:00 2001
|
||||
From: "thamizhselvan.k" <thamizhselvan.k@vvdntech.in>
|
||||
Date: Fri, 27 Jan 2023 15:42:36 +0530
|
||||
Subject: [PATCH 1/4] compile libxran using-gcc and disable avx512
|
||||
|
||||
---
|
||||
fhi_lib/build.sh | 7 ++++---
|
||||
fhi_lib/lib/Makefile | 23 ++++++++++++-----------
|
||||
2 files changed, 16 insertions(+), 14 deletions(-)
|
||||
|
||||
diff --git a/fhi_lib/build.sh b/fhi_lib/build.sh
|
||||
index 22859b5..575bcc5 100755
|
||||
--- a/fhi_lib/build.sh
|
||||
+++ b/fhi_lib/build.sh
|
||||
@@ -70,11 +70,12 @@ echo "LIBXRANSO = ${LIBXRANSO}"
|
||||
echo "MLOG = ${MLOG}"
|
||||
|
||||
cd $XRAN_FH_LIB_DIR
|
||||
+make clean
|
||||
make $COMMAND_LINE MLOG=${MLOG} LIBXRANSO=${LIBXRANSO} #DEBUG=1 VERBOSE=1
|
||||
|
||||
-echo 'Building xRAN Test Application'
|
||||
-cd $XRAN_FH_APP_DIR
|
||||
-make $COMMAND_LINE MLOG=${MLOG} #DEBUG=1 VERBOSE=1
|
||||
+#echo 'Building xRAN Test Application'
|
||||
+#cd $XRAN_FH_APP_DIR
|
||||
+#make $COMMAND_LINE MLOG=${MLOG} #DEBUG=1 VERBOSE=1
|
||||
|
||||
if [ -z ${GTEST_ROOT+x} ];
|
||||
then
|
||||
diff --git a/fhi_lib/lib/Makefile b/fhi_lib/lib/Makefile
|
||||
index 579a0c6..de5309d 100644
|
||||
--- a/fhi_lib/lib/Makefile
|
||||
+++ b/fhi_lib/lib/Makefile
|
||||
@@ -23,11 +23,11 @@ MYCUSTOMSPACE1='------------------------------------------------------------'
|
||||
##############################################################
|
||||
# Tools configuration
|
||||
##############################################################
|
||||
-CC := icc
|
||||
-CPP := icpc
|
||||
+CC := gcc
|
||||
+#CPP := icpc
|
||||
AS := as
|
||||
AR := ar
|
||||
-LD := icc
|
||||
+LD := gcc
|
||||
OBJDUMP := objdump
|
||||
|
||||
ifeq ($(SHELL),cmd.exe)
|
||||
@@ -95,9 +95,10 @@ CC_FLAGS += -std=gnu11 -Wall -Wno-deprecated-declarations \
|
||||
-fPIC \
|
||||
-Wall \
|
||||
-Wimplicit-function-declaration \
|
||||
- -g -O3 -wd1786
|
||||
+ -g -O0 -mssse3 \
|
||||
+ -march=native
|
||||
|
||||
-CPP_FLAGS := -D__STDC_LIMIT_MACROS -D__STDC_CONSTANT_MACROS -D_GNU_SOURCE -D_REENTRANT -pipe -no-prec-div \
|
||||
+#CPP_FLAGS := -D__STDC_LIMIT_MACROS -D__STDC_CONSTANT_MACROS -D_GNU_SOURCE -D_REENTRANT -pipe -no-prec-div \
|
||||
-no-prec-div -fp-model fast=2 -fPIC \
|
||||
-no-prec-sqrt -falign-functions=16 -fast-transcendentals \
|
||||
-Werror -Wno-unused-variable -std=c++11 -mcmodel=large
|
||||
@@ -121,14 +122,14 @@ PROJECT_OBJ_DIR := build/obj
|
||||
CC_OBJS := $(patsubst %.c,%.o,$(CC_SRC))
|
||||
CPP_OBJS := $(patsubst %.cpp,%.o,$(CPP_SRC))
|
||||
AS_OBJS := $(patsubst %.s,%.o,$(AS_SRC))
|
||||
-OBJS := $(CC_OBJS) $(CPP_OBJS) $(AS_OBJS) $(LIBS)
|
||||
+OBJS := $(CC_OBJS) $(AS_OBJS) $(LIBS)
|
||||
DIRLIST := $(addprefix $(PROJECT_OBJ_DIR)/,$(sort $(dir $(OBJS))))
|
||||
|
||||
CC_OBJTARGETS := $(addprefix $(PROJECT_OBJ_DIR)/,$(CC_OBJS))
|
||||
CPP_OBJTARGETS := $(addprefix $(PROJECT_OBJ_DIR)/,$(CPP_OBJS))
|
||||
|
||||
AS_OBJTARGETS := $(addprefix $(PROJECT_OBJ_DIR)/,$(AS_OBJS))
|
||||
-CPP_COMP := -O3 -xcore-avx512 -restrict -g -fasm-blocks
|
||||
+CPP_COMP := -O3 -xcore-avx512 -restrict -g
|
||||
CC_FLAGS_FULL := $(CC_FLAGS) $(INC) $(DEF)
|
||||
CPP_FLAGS_FULL := $(CPP_FLAGS) $(CPP_COMP) $(INC) $(DEF)
|
||||
|
||||
@@ -160,7 +161,7 @@ $(CPP_DEPS) :
|
||||
@$(CPP) -MM $(subst __up__,../,$(subst __dep__,,$@)) -MT $(PROJECT_OBJ_DIR)/$(patsubst %.cpp,%.o,$(subst __up__,../,$(subst __dep__,,$@))) $(CPP_FLAGS_FULL) >> $(PROJECT_DEP_FILE)
|
||||
|
||||
.PHONY : generate_deps
|
||||
-generate_deps : clear_dep $(CC_DEPS) $(CPP_DEPS)
|
||||
+generate_deps : clear_dep $(CC_DEPS)
|
||||
|
||||
|
||||
.PHONY : echo_start_build
|
||||
@@ -211,10 +212,10 @@ welcome_line :
|
||||
|
||||
debug : all
|
||||
release : all
|
||||
-$(PROJECT_BINARY) : $(DIRLIST) echo_start_build $(GENERATE_DEPS) $(PRE_BUILD) $(CC_OBJTARGETS) $(CPP_OBJTARGETS) $(AS_OBJTARGETS)
|
||||
+$(PROJECT_BINARY) : $(DIRLIST) echo_start_build $(GENERATE_DEPS) $(PRE_BUILD) $(CC_OBJTARGETS) $(AS_OBJTARGETS)
|
||||
@echo [AR] $(subst $(BUILDDIR)/,,$@)
|
||||
ifeq ($(XRAN_LIB_SO),)
|
||||
- @$(AR) $(AR_FLAGS) $@ $(CC_OBJTARGETS) $(CPP_OBJTARGETS) $(AS_OBJTARGETS)
|
||||
+ @$(AR) $(AR_FLAGS) $@ $(CC_OBJTARGETS) $(AS_OBJTARGETS)
|
||||
else
|
||||
- @$(CC) $(CC_OBJTARGETS) $(CPP_OBJTARGETS) $(AS_OBJTARGETS) -shared -fPIC -o $@
|
||||
+ @$(CC) $(CC_OBJTARGETS) $(AS_OBJTARGETS) -shared -fPIC -o $@
|
||||
endif
|
||||
--
|
||||
2.25.1
|
||||
|
||||
@@ -0,0 +1,24 @@
|
||||
From f26a9e9a3b902d56fffcb40644fa7d3e17d793f9 Mon Sep 17 00:00:00 2001
|
||||
From: "thamizhselvan.k" <thamizhselvan.k@vvdntech.in>
|
||||
Date: Fri, 27 Jan 2023 15:43:50 +0530
|
||||
Subject: [PATCH 2/4] return correct slot_id
|
||||
|
||||
---
|
||||
fhi_lib/lib/src/xran_main.c | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
diff --git a/fhi_lib/lib/src/xran_main.c b/fhi_lib/lib/src/xran_main.c
|
||||
index 17acc2a..8f5705e 100644
|
||||
--- a/fhi_lib/lib/src/xran_main.c
|
||||
+++ b/fhi_lib/lib/src/xran_main.c
|
||||
@@ -609,6 +609,7 @@ static inline int8_t xran_check_updl_seqid(void *pHandle, uint8_t cc_id, uint8_t
|
||||
|
||||
uint32_t xran_slotid_convert(uint16_t slot_id, uint16_t dir) //dir = 0, from PHY slotid to xran spec slotid as defined in 5.3.2, dir=1, from xran slotid to phy slotid
|
||||
{
|
||||
+ return slot_id;
|
||||
#ifdef FCN_ADAPT
|
||||
return slot_id;
|
||||
#endif
|
||||
--
|
||||
2.25.1
|
||||
|
||||
@@ -0,0 +1,32 @@
|
||||
From 3055c4a6cdb3ffa91deb4c6c11ecad0c95fef759 Mon Sep 17 00:00:00 2001
|
||||
From: "thamizhselvan.k" <thamizhselvan.k@vvdntech.in>
|
||||
Date: Fri, 27 Jan 2023 15:46:02 +0530
|
||||
Subject: [PATCH 3/4] disable pkt validate at process_mbuf
|
||||
|
||||
---
|
||||
fhi_lib/lib/src/xran_common.c | 2 ++
|
||||
1 file changed, 2 insertions(+)
|
||||
|
||||
diff --git a/fhi_lib/lib/src/xran_common.c b/fhi_lib/lib/src/xran_common.c
|
||||
index c4cb3fb..5bbacf7 100644
|
||||
--- a/fhi_lib/lib/src/xran_common.c
|
||||
+++ b/fhi_lib/lib/src/xran_common.c
|
||||
@@ -192,6 +192,7 @@ int process_mbuf(struct rte_mbuf *pkt)
|
||||
return MBUF_FREE;
|
||||
}
|
||||
|
||||
+#if 0
|
||||
valid_res = xran_pkt_validate(NULL,
|
||||
pkt,
|
||||
iq_samp_buf,
|
||||
@@ -213,6 +214,7 @@ int process_mbuf(struct rte_mbuf *pkt)
|
||||
print_dbg("valid_res is wrong [%d] ant %u (%u : %u : %u : %u) seq %u num_bytes %d\n", valid_res, Ant_ID, frame_id, subframe_id, slot_id, symb_id, seq.seq_id, num_bytes);
|
||||
return MBUF_FREE;
|
||||
}
|
||||
+#endif
|
||||
|
||||
if (Ant_ID >= p_x_ctx->srs_cfg.eAxC_offset && p_x_ctx->fh_init.srsEnable) {
|
||||
/* SRS packet has ruportid = 2*num_eAxc + ant_id */
|
||||
--
|
||||
2.25.1
|
||||
|
||||
@@ -0,0 +1,27 @@
|
||||
From 5c99462d138042f99b3a02cec013f75bbc3732a9 Mon Sep 17 00:00:00 2001
|
||||
From: "thamizhselvan.k" <thamizhselvan.k@vvdntech.in>
|
||||
Date: Fri, 27 Jan 2023 15:48:25 +0530
|
||||
Subject: [PATCH 4/4] process all rx ring
|
||||
|
||||
---
|
||||
fhi_lib/lib/src/xran_common.c | 4 ++--
|
||||
1 file changed, 2 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/fhi_lib/lib/src/xran_common.c b/fhi_lib/lib/src/xran_common.c
|
||||
index 5bbacf7..eaefe45 100644
|
||||
--- a/fhi_lib/lib/src/xran_common.c
|
||||
+++ b/fhi_lib/lib/src/xran_common.c
|
||||
@@ -737,8 +737,8 @@ int32_t ring_processing_func(void)
|
||||
/* UP first */
|
||||
|
||||
for (i = 0; i < ctx->io_cfg.num_vfs && i < (XRAN_VF_MAX - 1); i = i+2){
|
||||
- if (process_ring(ctx->rx_ring[i]))
|
||||
- return 0;
|
||||
+ process_ring(ctx->rx_ring[i]);
|
||||
+ process_ring(ctx->rx_ring[i+1]);
|
||||
|
||||
/* CP next */
|
||||
if(ctx->io_cfg.id == O_RU) /* process CP only on O-RU */
|
||||
--
|
||||
2.25.1
|
||||
|
||||
@@ -0,0 +1,62 @@
|
||||
diff --git a/fhi_lib/test/common/common_typedef_xran.h b/fhi_lib/test/common/common_typedef_xran.h
|
||||
index 9e84bd3..65621f5 100644
|
||||
--- a/fhi_lib/test/common/common_typedef_xran.h
|
||||
+++ b/fhi_lib/test/common/common_typedef_xran.h
|
||||
@@ -88,7 +88,7 @@ typedef enum{
|
||||
CPU_GENERIC, /*!< C */
|
||||
SSE4_2, /*!< SSE4_2 */
|
||||
AVX, /*!< AVX */
|
||||
- AVX2, /*!< AVX2 */
|
||||
+ AVX_2, /*!< AVX2 */
|
||||
AVX_512, /*!< AVX512 */
|
||||
}instruction_cpu_support;
|
||||
|
||||
diff --git a/fhi_lib/test/common/common.hpp b/fhi_lib/test/common/common.hpp
|
||||
index 9b01b06..64a1baf 100644
|
||||
--- a/fhi_lib/test/common/common.hpp
|
||||
+++ b/fhi_lib/test/common/common.hpp
|
||||
@@ -31,7 +31,7 @@
|
||||
#include <rte_malloc.h>
|
||||
#endif
|
||||
|
||||
-#include "gtest/gtest.h"
|
||||
+//#include "gtest/gtest.h"
|
||||
|
||||
#include "common_typedef_xran.h"
|
||||
|
||||
@@ -106,7 +106,7 @@ json read_json_from_file(const std::string &filename);
|
||||
\return Pointer to the allocated memory with data from the file.
|
||||
\throws std::runtime_error when memory cannot be allocated.
|
||||
*/
|
||||
-char* read_data_to_aligned_array(const std::string &filename);
|
||||
+//char* read_data_to_aligned_array(const std::string &filename);
|
||||
|
||||
/*!
|
||||
\brief Measure the TSC on the machine
|
||||
@@ -140,6 +140,7 @@ unsigned long tsc_tick();
|
||||
values, e.g. 1, 0.001, 5e-05, etc. or filename. Depends on the get type test framework can either
|
||||
read the value or load data from the file - and it happens automatically (*pff* MAGIC!).
|
||||
*/
|
||||
+#if 0
|
||||
class KernelTests : public testing::TestWithParam<unsigned>
|
||||
{
|
||||
public:
|
||||
@@ -827,5 +828,6 @@ T* generate_random_real_numbers(const long size, const unsigned alignment, const
|
||||
|
||||
return generate_random_numbers<T, std::uniform_real_distribution<T>>(size, alignment, distribution);
|
||||
}
|
||||
+#endif
|
||||
|
||||
#endif //XRANLIB_COMMON_HPP
|
||||
diff --git a/fhi_lib/lib/src/xran_common.h b/fhi_lib/lib/src/xran_common.h
|
||||
index 4f2928d..5028376 100644
|
||||
--- a/fhi_lib/lib/src/xran_common.h
|
||||
+++ b/fhi_lib/lib/src/xran_common.h
|
||||
@@ -351,6 +351,7 @@ uint8_t xran_get_num_ant_elm(void *pHandle);
|
||||
enum xran_category xran_get_ru_category(void *pHandle);
|
||||
|
||||
struct xran_device_ctx *xran_dev_get_ctx(void);
|
||||
+int xran_is_prach_slot(uint32_t subframe_id, uint32_t slot_id);
|
||||
|
||||
int xran_register_cb_mbuf2ring(xran_ethdi_mbuf_send_fn mbuf_send_cp, xran_ethdi_mbuf_send_fn mbuf_send_up);
|
||||
|
||||
@@ -258,7 +258,8 @@ void threadCreate(pthread_t* t, void * (*func)(void*), void * param, char* name,
|
||||
ret=pthread_attr_setschedparam(&attr, &sparam);
|
||||
AssertFatal(ret==0,"ret: %d, errno: %d\n",ret, errno);
|
||||
}
|
||||
|
||||
|
||||
LOG_I(UTIL, "threadCreate for %s, affinity %x, priority %d\n", name, affinity, priority);
|
||||
ret=pthread_create(t, &attr, func, param);
|
||||
AssertFatal(ret==0,"ret: %d, errno: %d\n",ret, errno);
|
||||
|
||||
|
||||
105
doc/ORAN_FHI7.2_Tutorial.md
Normal file
105
doc/ORAN_FHI7.2_Tutorial.md
Normal file
@@ -0,0 +1,105 @@
|
||||
**Table of Contents**
|
||||
|
||||
## Prerequisites to run Platforms
|
||||
|
||||
* DPDK (Data Plane Development Kit)
|
||||
|
||||
Download DPDK version 20.05 (https://core.dpdk.org/download/)
|
||||
|
||||
Compile DPDK
|
||||
|
||||
```
|
||||
tar xJf dpdk-<version>.tar.xz
|
||||
cd dpdk-<version>
|
||||
|
||||
meson build
|
||||
cd build
|
||||
sudo ninja
|
||||
sudo ninja install
|
||||
|
||||
make install T=x86_64-native-linuxapp-gcc
|
||||
```
|
||||
|
||||
* Setup Configuration
|
||||
|
||||
https://docs.o-ran-sc.org/projects/o-ran-sc-o-du-phy/en/latest/Setup-Configuration_fh.html
|
||||
|
||||
Update Linux Boot arguments
|
||||
```
|
||||
BOOT_IMAGE=(hd0,gpt2)/vmlinuz-4.18.0-425.10.1.rt7.220.el8_7.x86_64 root=/dev/mapper/rhel_skylark-root ro crashkernel=auto resume=/dev/mapper/rhel_skylark-swap rd.lvm.lv=rhel_skylark/root rd.lvm.lv=rhel_skylark/swap rhgb quiet igb.max_vfs=2 intel_iommu=on iommu=pt intel_pstate=disable nosoftlockup tsc=nowatchdog mitigations=off cgroup_memory=1 cgroup_enable=memory mce=off idle=poll hugepagesz=1G hugepages=40 hugepagesz=2M hugepages=0 default_hugepagesz=1G selinux=0 enforcing=0 nmi_watchdog=0 softlockup_panic=0 audit=0 skew_tick=1 skew_tick=1 isolcpus=managed_irq,domain,0-2,8-17 intel_pstate=disable nosoftlockup tsc=reliable
|
||||
```
|
||||
Use isolated CPU 0-2 for DPDK/ORAN, CPU 8 for ru_thread in our example config
|
||||
|
||||
* PTP configuration
|
||||
|
||||
https://docs.o-ran-sc.org/projects/o-ran-sc-o-du-phy/en/latest/PTP-configuration_fh.html
|
||||
|
||||
* Bind devices
|
||||
```
|
||||
sudo modprobe vfio_pci
|
||||
sudo /usr/local/bin/dpdk-devbind.py --bind vfio-pci 51:0e.0
|
||||
sudo /usr/local/bin/dpdk-devbind.py --bind vfio-pci 51:0e.1
|
||||
```
|
||||
|
||||
## ORAN Fronthaul Library
|
||||
|
||||
To get the ORAN FHI library and installation, follow the instructions
|
||||
|
||||
* Download O-RAN FHI PHY library
|
||||
|
||||
```
|
||||
git clone https://gerrit.o-ran-sc.org/r/o-du/phy.git
|
||||
cd phy
|
||||
git checkout oran_release_bronze_v1.1
|
||||
```
|
||||
|
||||
* Apply patches (available in oai_folder/cmake_targets/tools/oran_fhi_integration_patches):
|
||||
|
||||
```
|
||||
git apply oran-fhi-1-compile-libxran-using-gcc-and-disable-avx512.patch
|
||||
git apply oran-fhi-2-return-correct-slot_id.patch
|
||||
git apply oran-fhi-3-disable-pkt-validate-at-process_mbuf.patch
|
||||
git apply oran-fhi-4-process_all_rx_ring.patch
|
||||
git apply oran-fhi-5-remove-not-used-dependencies.patch
|
||||
```
|
||||
|
||||
* Set up the environment (change the path if you use different folders)
|
||||
|
||||
```
|
||||
export XRAN_LIB_DIR=~/phy/fhi_lib/lib/build
|
||||
export XRAN_DIR=~/phy/fhi_lib
|
||||
export RTE_SDK=~/dpdk-20.05
|
||||
export RTE_TARGET=x86_64-native-linuxapp-gcc
|
||||
export RTE_INCLUDE=${RTE_SDK}/${RTE_TARGET}/include
|
||||
```
|
||||
|
||||
* Compile phy/fhi_lib:
|
||||
|
||||
```
|
||||
./phy/fhi_lib/build.sh
|
||||
```
|
||||
|
||||
## OAI-FHI Build and Compilation
|
||||
|
||||
```
|
||||
git clone https://gitlab.eurecom.fr/oai/openairinterface5g.git
|
||||
cd openairinterface5g
|
||||
git checkout develop
|
||||
source oaienv
|
||||
cd cmake_targets
|
||||
./build_oai --gNB --ninja -t oran_fhlib_5g (Add, -I as well if it is first time to use for external dependencies)
|
||||
```
|
||||
|
||||
## Run OAI with ORAN FHI config
|
||||
|
||||
```
|
||||
cd ran_build/build
|
||||
cp ../../../targets/PROJECTS/GENERIC-NR-5GC/CONF/oran.conf.json .
|
||||
```
|
||||
* Update MAC address of DU/RU and PCIe address of your setup in oran.conf.json
|
||||
|
||||
```
|
||||
sudo ./nr-softmodem -O ../../../targets/PROJECTS/GENERIC-NR-5GC/CONF/oran.fh.band78.fr1.273PRB.conf --sa --reorder-thread-disable
|
||||
```
|
||||
|
||||
|
||||
@@ -126,6 +126,16 @@ void tx_func(void *param) {
|
||||
1);
|
||||
clock_gettime(CLOCK_MONOTONIC,&info->gNB->rt_L1_profiling.return_L1_TX[rt_prof_idx]);
|
||||
|
||||
if (get_softmodem_params()->reorder_thread_disable) {
|
||||
PHY_VARS_gNB *gNB = info->gNB;
|
||||
processingData_RU_t syncMsgRU;
|
||||
syncMsgRU.frame_tx = frame_tx;
|
||||
syncMsgRU.slot_tx = slot_tx;
|
||||
syncMsgRU.ru = gNB->RU_list[0];
|
||||
syncMsgRU.timestamp_tx = info->timestamp_tx;
|
||||
LOG_D(PHY, "gNB: %d.%d : calling RU TX function\n", syncMsgRU.frame_tx, syncMsgRU.slot_tx);
|
||||
ru_tx_func((void *)&syncMsgRU);
|
||||
}
|
||||
}
|
||||
|
||||
void rx_func(void *param) {
|
||||
@@ -220,13 +230,12 @@ void rx_func(void *param) {
|
||||
// Do PRACH RU processing
|
||||
L1_nr_prach_procedures(gNB,frame_rx,slot_rx);
|
||||
|
||||
//apply the rx signal rotation here
|
||||
for (int aa = 0; aa < gNB->frame_parms.nb_antennas_rx; aa++) {
|
||||
apply_nr_rotation_ul(&gNB->frame_parms,
|
||||
gNB->common_vars.rxdataF[aa],
|
||||
slot_rx,
|
||||
0,
|
||||
gNB->frame_parms.Ncp==EXTENDED?12:14);
|
||||
// WA: comment rotation in tx/rx
|
||||
if ((gNB->num_RU == 1) && (gNB->RU_list[0]->if_south != REMOTE_IF4p5)) {
|
||||
// apply the rx signal rotation here
|
||||
for (int aa = 0; aa < gNB->frame_parms.nb_antennas_rx; aa++) {
|
||||
apply_nr_rotation_ul(&gNB->frame_parms, gNB->common_vars.rxdataF[aa], slot_rx, 0, gNB->frame_parms.Ncp == EXTENDED ? 12 : 14);
|
||||
}
|
||||
}
|
||||
phy_procedures_gNB_uespec_RX(gNB, frame_rx, slot_rx);
|
||||
}
|
||||
@@ -252,7 +261,10 @@ void rx_func(void *param) {
|
||||
processingData_L1tx_t *syncMsg;
|
||||
// Its a FIFO so it maitains the order in which the MAC fills the messages
|
||||
// so no need for checking for right slot
|
||||
res = pullTpool(&gNB->L1_tx_filled, &gNB->threadPool);
|
||||
if (get_softmodem_params()->reorder_thread_disable)
|
||||
res = pullTpool(&gNB->L1_tx_out, &gNB->threadPool);
|
||||
else
|
||||
res = pullTpool(&gNB->L1_tx_filled, &gNB->threadPool);
|
||||
if (res == NULL)
|
||||
return; // Tpool has been stopped
|
||||
syncMsg = (processingData_L1tx_t *)NotifiedFifoData(res);
|
||||
@@ -452,23 +464,31 @@ void init_gNB_Tpool(int inst) {
|
||||
initNotifiedFIFO(&gNB->L1_tx_free);
|
||||
initNotifiedFIFO(&gNB->L1_tx_filled);
|
||||
initNotifiedFIFO(&gNB->L1_tx_out);
|
||||
|
||||
// we create 2 threads for L1 tx processing
|
||||
for (int i=0; i < 2; i++) {
|
||||
|
||||
if (get_softmodem_params()->reorder_thread_disable) {
|
||||
notifiedFIFO_elt_t *msgL1Tx = newNotifiedFIFO_elt(sizeof(processingData_L1tx_t), 0, &gNB->L1_tx_out, tx_func);
|
||||
processingData_L1tx_t *msgDataTx = (processingData_L1tx_t *)NotifiedFifoData(msgL1Tx);
|
||||
memset(msgDataTx, 0, sizeof(processingData_L1tx_t));
|
||||
init_DLSCH_struct(gNB, msgDataTx);
|
||||
memset(msgDataTx->ssb, 0, 64*sizeof(NR_gNB_SSB_t));
|
||||
pushNotifiedFIFO(&gNB->L1_tx_free, msgL1Tx); // to unblock the process in the beginning
|
||||
pushNotifiedFIFO(&gNB->L1_tx_out, msgL1Tx); // to unblock the process in the beginning
|
||||
} else {
|
||||
// we create 2 threads for L1 tx processing
|
||||
for (int i = 0; i < 2; i++) {
|
||||
notifiedFIFO_elt_t *msgL1Tx = newNotifiedFIFO_elt(sizeof(processingData_L1tx_t), 0, &gNB->L1_tx_out, tx_func);
|
||||
processingData_L1tx_t *msgDataTx = (processingData_L1tx_t *)NotifiedFifoData(msgL1Tx);
|
||||
memset(msgDataTx, 0, sizeof(processingData_L1tx_t));
|
||||
init_DLSCH_struct(gNB, msgDataTx);
|
||||
memset(msgDataTx->ssb, 0, 64 * sizeof(NR_gNB_SSB_t));
|
||||
pushNotifiedFIFO(&gNB->L1_tx_free, msgL1Tx); // to unblock the process in the beginning
|
||||
}
|
||||
|
||||
LOG_I(PHY, "Creating thread for TX reordering and dispatching to RU\n");
|
||||
threadCreate(&proc->pthread_tx_reorder, tx_reorder_thread, (void *)gNB, "thread_tx_reorder", gNB->RU_list[0] ? gNB->RU_list[0]->tpcores[1] : -1, OAI_PRIORITY_RT_MAX);
|
||||
}
|
||||
|
||||
if ((!get_softmodem_params()->emulate_l1) && (!IS_SOFTMODEM_NOSTATS_BIT) && (NFAPI_MODE!=NFAPI_MODE_VNF))
|
||||
threadCreate(&proc->L1_stats_thread,nrL1_stats_thread,(void*)gNB,"L1_stats",-1,OAI_PRIORITY_RT_LOW);
|
||||
|
||||
LOG_I(PHY,"Creating thread for TX reordering and dispatching to RU\n");
|
||||
threadCreate(&proc->pthread_tx_reorder, tx_reorder_thread, (void *)gNB, "thread_tx_reorder",
|
||||
gNB->RU_list[0] ? gNB->RU_list[0]->tpcores[1] : -1, OAI_PRIORITY_RT_MAX);
|
||||
if ((!get_softmodem_params()->emulate_l1) && (!IS_SOFTMODEM_NOSTATS_BIT) && (NFAPI_MODE != NFAPI_MODE_VNF))
|
||||
threadCreate(&proc->L1_stats_thread, nrL1_stats_thread, (void *)gNB, "L1_stats", -1, OAI_PRIORITY_RT_LOW);
|
||||
|
||||
}
|
||||
|
||||
@@ -538,6 +558,7 @@ void init_eNB_afterRU(void) {
|
||||
|
||||
gNB = RC.gNB[inst];
|
||||
gNB->ldpc_offload_flag = ldpc_offload_flag;
|
||||
gNB->reorder_thread_disable = get_softmodem_params()->reorder_thread_disable;
|
||||
|
||||
phy_init_nr_gNB(gNB);
|
||||
|
||||
|
||||
@@ -83,6 +83,8 @@ static int DEFRUTPCORES[] = {-1,-1,-1,-1};
|
||||
|
||||
extern int oai_exit;
|
||||
|
||||
uint16_t sl_ahead;
|
||||
|
||||
extern struct timespec timespec_sub(struct timespec lhs, struct timespec rhs);
|
||||
extern struct timespec timespec_add(struct timespec lhs, struct timespec rhs);
|
||||
extern void nr_phy_free_RU(RU_t *);
|
||||
@@ -622,7 +624,7 @@ void *emulatedRF_thread(void *param) {
|
||||
void rx_rf(RU_t *ru,int *frame,int *slot) {
|
||||
RU_proc_t *proc = &ru->proc;
|
||||
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
|
||||
openair0_config_t *cfg = &ru->openair0_cfg;
|
||||
openair0_config_t *cfg = &ru->openair0_cfg;
|
||||
void *rxp[ru->nb_rx];
|
||||
unsigned int rxs;
|
||||
int i;
|
||||
@@ -669,23 +671,27 @@ void rx_rf(RU_t *ru,int *frame,int *slot) {
|
||||
}
|
||||
}
|
||||
|
||||
//compute system frame number (SFN) according to O-RAN-WG4-CUS.0-v02.00 (using alpha=beta=0)
|
||||
// compute system frame number (SFN) according to O-RAN-WG4-CUS.0-v02.00 (using alpha=beta=0)
|
||||
// this assumes that the USRP has been synchronized to the GPS time
|
||||
// OAI uses timestamps in sample time stored in int64_t, but it will fit in double precision for many years to come.
|
||||
double gps_sec = ((double) ts)/cfg->sample_rate;
|
||||
//proc->frame_rx = ((int64_t) (gps_sec/0.01)) & 1023;
|
||||
// OAI uses timestamps in sample time stored in int64_t, but it will fit in double precision for many years to come.
|
||||
double gps_sec = ((double)ts) / cfg->sample_rate;
|
||||
// proc->frame_rx = ((int64_t) (gps_sec/0.01)) & 1023;
|
||||
|
||||
// in fact the following line is the same as long as the timestamp_rx is synchronized to GPS.
|
||||
// in fact the following line is the same as long as the timestamp_rx is synchronized to GPS.
|
||||
proc->frame_rx = (proc->timestamp_rx / (fp->samples_per_subframe*10))&1023;
|
||||
proc->tti_rx = fp->get_slot_from_timestamp(proc->timestamp_rx,fp);
|
||||
// synchronize first reception to frame 0 subframe 0
|
||||
LOG_D(PHY,"RU %d/%d TS %ld, GPS %f, SR %f, frame %d, slot %d.%d / %d\n",
|
||||
LOG_D(PHY,
|
||||
"RU %d/%d TS %ld, GPS %f, SR %f, frame %d, slot %d.%d / %d\n",
|
||||
ru->idx,
|
||||
0,
|
||||
ts, //(unsigned long long int)(proc->timestamp_rx+ru->ts_offset),
|
||||
gps_sec,
|
||||
cfg->sample_rate,
|
||||
proc->frame_rx,proc->tti_rx,proc->tti_tx,fp->slots_per_frame);
|
||||
gps_sec,
|
||||
cfg->sample_rate,
|
||||
proc->frame_rx,
|
||||
proc->tti_rx,
|
||||
proc->tti_tx,
|
||||
fp->slots_per_frame);
|
||||
|
||||
// dump VCD output for first RU in list
|
||||
if (ru == RC.ru[0]) {
|
||||
@@ -782,7 +788,7 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
|
||||
// currently we switch beams at the beginning of a slot and we take the beam index of the first symbol of this slot
|
||||
// we only send the beam to the gpio if the beam is different from the previous slot
|
||||
|
||||
if ( ru->common.beam_id) {
|
||||
if (ru->common.beam_id) {
|
||||
int prev_slot = (slot - 1 + fp->slots_per_frame) % fp->slots_per_frame;
|
||||
const uint8_t *beam_ids = ru->common.beam_id[0];
|
||||
int prev_beam = beam_ids[prev_slot * fp->symbols_per_slot];
|
||||
@@ -818,7 +824,6 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
|
||||
(long long unsigned int)(timestamp+ru->ts_offset-ru->openair0_cfg.tx_sample_advance-sf_extension),frame,slot,proc->frame_tx_unwrap,slot, flags, siglen+sf_extension, txs,10*log10((double)signal_energy(txp[0],siglen+sf_extension)));
|
||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE, 0 );
|
||||
//AssertFatal(txs == 0,"trx write function error %d\n", txs);
|
||||
|
||||
}
|
||||
|
||||
// this is for RU with local RF unit
|
||||
@@ -1083,7 +1088,7 @@ void *ru_thread( void *param ) {
|
||||
ru_thread_status = 0;
|
||||
// set default return value
|
||||
sprintf(threadname,"ru_thread %u",ru->idx);
|
||||
LOG_I(PHY,"Starting RU %d (%s,%s),\n",ru->idx,NB_functions[ru->function],NB_timing[ru->if_timing]);
|
||||
LOG_I(PHY, "Starting RU %d (%s,%s) on cpu %d\n", ru->idx, NB_functions[ru->function], NB_timing[ru->if_timing], sched_getcpu());
|
||||
memcpy((void *)&ru->config,(void *)&RC.gNB[0]->gNB_config,sizeof(ru->config));
|
||||
|
||||
if(emulate_rf) {
|
||||
@@ -1305,7 +1310,9 @@ int start_streaming(RU_t *ru) {
|
||||
}
|
||||
|
||||
int nr_start_if(struct RU_t_s *ru, struct PHY_VARS_gNB_s *gNB) {
|
||||
for (int i=0;i<ru->nb_rx;i++) ru->openair0_cfg.rxbase[i] = ru->common.rxdata[i];
|
||||
if (ru->if_south <= REMOTE_IF5)
|
||||
for (int i = 0; i < ru->nb_rx; i++)
|
||||
ru->openair0_cfg.rxbase[i] = ru->common.rxdata[i];
|
||||
ru->openair0_cfg.rxsize = ru->nr_frame_parms->samples_per_subframe*10;
|
||||
reset_meas(&ru->ifdevice.tx_fhaul);
|
||||
return(ru->ifdevice.trx_start_func(&ru->ifdevice));
|
||||
@@ -1342,7 +1349,7 @@ void init_RU_proc(RU_t *ru) {
|
||||
|
||||
pthread_mutex_init( &proc->mutex_emulateRF,NULL);
|
||||
pthread_cond_init( &proc->cond_emulateRF, NULL);
|
||||
threadCreate( &proc->pthread_FH, ru_thread, (void *)ru, "ru_thread", ru->tpcores[0], OAI_PRIORITY_RT_MAX );
|
||||
threadCreate(&proc->pthread_FH, ru_thread, (void *)ru, "ru_thread", ru->ru_thread_core, OAI_PRIORITY_RT_MAX);
|
||||
|
||||
if(emulate_rf)
|
||||
threadCreate( &proc->pthread_emulateRF, emulatedRF_thread, (void *)proc, "emulateRF", -1, OAI_PRIORITY_RT );
|
||||
@@ -1668,7 +1675,7 @@ void set_function_spec_param(RU_t *ru) {
|
||||
case REMOTE_IF4p5:
|
||||
ru->do_prach = 0;
|
||||
ru->feprx = NULL; // DFTs
|
||||
ru->feptx_prec = NULL; // Precoding operation
|
||||
ru->feptx_prec = nr_feptx_prec; // Precoding operation
|
||||
ru->feptx_ofdm = NULL; // no OFDM mod
|
||||
ru->fh_south_in = fh_if4p5_south_in; // synchronous IF4p5 reception
|
||||
ru->fh_south_out = fh_if4p5_south_out; // synchronous IF4p5 transmission
|
||||
@@ -1780,23 +1787,27 @@ void init_NR_RU(char *rf_config_file) {
|
||||
set_function_spec_param(ru);
|
||||
LOG_I(PHY,"Starting ru_thread %d\n",ru_id);
|
||||
init_RU_proc(ru);
|
||||
int threadCnt = ru->num_tpcores;
|
||||
if (threadCnt < 2) LOG_E(PHY,"Number of threads for gNB should be more than 1. Allocated only %d\n",threadCnt);
|
||||
else LOG_I(PHY,"RU Thread pool size %d\n",threadCnt);
|
||||
char pool[80];
|
||||
int s_offset = sprintf(pool,"%d",ru->tpcores[0]);
|
||||
for (int icpu=1; icpu<threadCnt; icpu++) {
|
||||
s_offset+=sprintf(pool+s_offset,",%d",ru->tpcores[icpu]);
|
||||
if (ru->if_south != REMOTE_IF4p5) {
|
||||
int threadCnt = ru->num_tpcores;
|
||||
if (threadCnt < 2)
|
||||
LOG_E(PHY, "Number of threads for gNB should be more than 1. Allocated only %d\n", threadCnt);
|
||||
else
|
||||
LOG_I(PHY, "RU Thread pool size %d\n", threadCnt);
|
||||
char pool[80];
|
||||
int s_offset = sprintf(pool, "%d", ru->tpcores[1]);
|
||||
for (int icpu = 2; icpu < threadCnt; icpu++) {
|
||||
s_offset += sprintf(pool + s_offset, ",%d", ru->tpcores[icpu]);
|
||||
}
|
||||
LOG_I(PHY, "RU thread-pool core string %s\n", pool);
|
||||
ru->threadPool = (tpool_t *)malloc(sizeof(tpool_t));
|
||||
initTpool(pool, ru->threadPool, cpumeas(CPUMEAS_GETSTATE));
|
||||
// FEP RX result FIFO
|
||||
ru->respfeprx = (notifiedFIFO_t *)malloc(sizeof(notifiedFIFO_t));
|
||||
initNotifiedFIFO(ru->respfeprx);
|
||||
// FEP TX result FIFO
|
||||
ru->respfeptx = (notifiedFIFO_t *)malloc(sizeof(notifiedFIFO_t));
|
||||
initNotifiedFIFO(ru->respfeptx);
|
||||
}
|
||||
LOG_I(PHY,"RU thread-pool core string %s\n",pool);
|
||||
ru->threadPool = (tpool_t*)malloc(sizeof(tpool_t));
|
||||
initTpool(pool, ru->threadPool, cpumeas(CPUMEAS_GETSTATE));
|
||||
// FEP RX result FIFO
|
||||
ru->respfeprx = (notifiedFIFO_t*) malloc(sizeof(notifiedFIFO_t));
|
||||
initNotifiedFIFO(ru->respfeprx);
|
||||
// FEP TX result FIFO
|
||||
ru->respfeptx = (notifiedFIFO_t*) malloc(sizeof(notifiedFIFO_t));
|
||||
initNotifiedFIFO(ru->respfeptx);
|
||||
} // for ru_id
|
||||
|
||||
// sleep(1);
|
||||
@@ -1975,6 +1986,7 @@ static void NRRCconfig_RU(void) {
|
||||
RC.ru[j]->openair0_cfg.txfh_cores[0] = *(RUParamList.paramarray[j][RU_TXFH_CORE_ID].iptr);
|
||||
RC.ru[j]->num_tpcores = *(RUParamList.paramarray[j][RU_NUM_TP_CORES].iptr);
|
||||
RC.ru[j]->half_slot_parallelization = *(RUParamList.paramarray[j][RU_HALF_SLOT_PARALLELIZATION].iptr);
|
||||
RC.ru[j]->ru_thread_core = *(RUParamList.paramarray[j][RU_RU_THREAD_CORE].iptr);
|
||||
printf("[RU %d] Setting half-slot parallelization to %d\n",j,RC.ru[j]->half_slot_parallelization);
|
||||
AssertFatal(RC.ru[j]->num_tpcores <= RUParamList.paramarray[j][RU_TP_CORES].numelt, "Number of TP cores should be <=16\n");
|
||||
for (i=0; i<RC.ru[j]->num_tpcores; i++) RC.ru[j]->tpcores[i] = RUParamList.paramarray[j][RU_TP_CORES].iptr[i];
|
||||
|
||||
@@ -46,6 +46,7 @@ static softmodem_params_t softmodem_params;
|
||||
char *parallel_config=NULL;
|
||||
char *worker_config=NULL;
|
||||
int usrp_tx_thread = 0;
|
||||
char *nfapi_str = NULL;
|
||||
int ldpc_offload_flag=0;
|
||||
uint8_t nfapi_mode=0;
|
||||
|
||||
@@ -107,8 +108,8 @@ void get_common_options(uint32_t execmask) {
|
||||
int numparams = sizeof(cmdline_params) / sizeof(paramdef_t);
|
||||
config_set_checkfunctions(cmdline_params, cmdline_CheckParams, numparams);
|
||||
config_get(cmdline_params, sizeof(cmdline_params) / sizeof(paramdef_t), NULL);
|
||||
nfapi_index = config_paramidx_fromname(cmdline_params, sizeof(cmdline_params) / sizeof(paramdef_t),"nfapi");
|
||||
AssertFatal(nfapi_index != -1,"Index for nfapi config option not found!");
|
||||
nfapi_index = config_paramidx_fromname(cmdline_params, sizeof(cmdline_params) / sizeof(paramdef_t), "nfapi");
|
||||
AssertFatal(nfapi_index != -1, "Index for nfapi config option not found!");
|
||||
nfapi_mode = config_get_processedint(&cmdline_params[nfapi_index]);
|
||||
|
||||
paramdef_t cmdline_logparams[] =CMDLINE_LOGPARAMS_DESC ;
|
||||
|
||||
@@ -43,6 +43,7 @@ extern "C"
|
||||
default no pool (runs in calling thread),\n\
|
||||
list of cores, comma separated (negative value is no core affinity)\n\
|
||||
example: -1,3 launches two working threads one floating, the second set on core 3"
|
||||
#define CONFIG_HLP_REORDER "Disable reorder thread\n"
|
||||
#define CONFIG_HLP_ULMAXE "set the eNodeB max ULSCH erros\n"
|
||||
#define CONFIG_HLP_CALUER "set UE RX calibration\n"
|
||||
#define CONFIG_HLP_CALUERM ""
|
||||
@@ -97,7 +98,7 @@ extern "C"
|
||||
#define CONFIG_HLP_NOKRNMOD "(noS1 only): Use tun instead of namesh module \n"
|
||||
#define CONFIG_HLP_DISABLNBIOT "disable nb-iot, even if defined in config\n"
|
||||
#define CONFIG_HLP_USRP_THREAD "having extra thead for usrp tx\n"
|
||||
#define CONFIG_HLP_NFAPI "Change the nFAPI mode for NR 'MONOLITHIC', 'PNF', 'VNF','UE_STUB_PNF','UE_STUB_OFFNET','STANDALONE_PNF'\n"
|
||||
#define CONFIG_HLP_NFAPI "Change the nFAPI mode for NR 'MONOLITHIC', 'PNF', 'VNF','UE_STUB_PNF','UE_STUB_OFFNET','STANDALONE_PNF'\n"
|
||||
#define CONFIG_L1_EMULATOR "Run in L1 emulated mode (disable PHY layer)\n"
|
||||
#define CONFIG_HLP_CONTINUOUS_TX "perform continuous transmission, even in TDD mode (to work around USRP issues)\n"
|
||||
#define CONFIG_HLP_STATS_DISABLE "disable globally the stats generation and persistence"
|
||||
@@ -109,6 +110,7 @@ extern "C"
|
||||
#define RF_CONFIG_FILE softmodem_params.rf_config_file
|
||||
#define SPLIT73 softmodem_params.split73
|
||||
#define TP_CONFIG softmodem_params.threadPoolConfig
|
||||
#define CONTINUOUS_TX softmodem_params.continuous_tx
|
||||
#define PHY_TEST softmodem_params.phy_test
|
||||
#define DO_RA softmodem_params.do_ra
|
||||
#define SA softmodem_params.sa
|
||||
@@ -131,93 +133,51 @@ extern "C"
|
||||
#define NON_STOP softmodem_params.non_stop
|
||||
#define EMULATE_L1 softmodem_params.emulate_l1
|
||||
#define CONTINUOUS_TX softmodem_params.continuous_tx
|
||||
|
||||
#define REORDER_THREAD_DISABLE softmodem_params.reorder_thread_disable
|
||||
#define DEFAULT_RFCONFIG_FILE "/usr/local/etc/syriq/ue.band7.tm1.PRB100.NR40.dat";
|
||||
|
||||
extern int usrp_tx_thread;
|
||||
#define CMDLINE_PARAMS_DESC { \
|
||||
{"rf-config-file", CONFIG_HLP_RFCFGF, 0, strptr:&RF_CONFIG_FILE, defstrval:NULL, TYPE_STRING, 0},\
|
||||
{"split73", CONFIG_HLP_SPLIT73, 0, strptr:&SPLIT73, defstrval:NULL, TYPE_STRING, 0}, \
|
||||
{"thread-pool", CONFIG_HLP_TPOOL, 0, strptr:&TP_CONFIG, defstrval:"-1,-1,-1,-1,-1,-1,-1,-1", TYPE_STRING, 0}, \
|
||||
{"phy-test", CONFIG_HLP_PHYTST, PARAMFLAG_BOOL, iptr:&PHY_TEST, defintval:0, TYPE_INT, 0}, \
|
||||
{"do-ra", CONFIG_HLP_DORA, PARAMFLAG_BOOL, iptr:&DO_RA, defintval:0, TYPE_INT, 0}, \
|
||||
{"sa", CONFIG_HLP_SA, PARAMFLAG_BOOL, iptr:&SA, defintval:0, TYPE_INT, 0}, \
|
||||
{"usim-test", CONFIG_HLP_USIM, PARAMFLAG_BOOL, u8ptr:&USIM_TEST, defintval:0, TYPE_UINT8, 0}, \
|
||||
{"clock-source", CONFIG_HLP_CLK, 0, uptr:&CLOCK_SOURCE, defintval:0, TYPE_UINT, 0}, \
|
||||
{"time-source", CONFIG_HLP_TME, 0, uptr:&TIMING_SOURCE, defintval:0, TYPE_UINT, 0}, \
|
||||
{"tune-offset", CONFIG_HLP_TUNE_OFFSET, 0, dblptr:&TUNE_OFFSET, defintval:0, TYPE_DOUBLE, 0}, \
|
||||
{"wait-for-sync", NULL, PARAMFLAG_BOOL, iptr:&WAIT_FOR_SYNC, defintval:0, TYPE_INT, 0}, \
|
||||
{"single-thread-enable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&SINGLE_THREAD_FLAG, defintval:0, TYPE_INT, 0}, \
|
||||
{"C" , CONFIG_HLP_DLF, 0, u64ptr:&(downlink_frequency[0][0]), defuintval:0, TYPE_UINT64, 0}, \
|
||||
{"CO" , CONFIG_HLP_ULF, 0, iptr:&(uplink_frequency_offset[0][0]), defintval:0, TYPE_INT, 0}, \
|
||||
{"a" , CONFIG_HLP_CHOFF, 0, iptr:&CHAIN_OFFSET, defintval:0, TYPE_INT, 0}, \
|
||||
{"d" , CONFIG_HLP_SOFTS, PARAMFLAG_BOOL, uptr:(uint32_t *)&do_forms, defintval:0, TYPE_INT8, 0}, \
|
||||
{"q" , CONFIG_HLP_STMON, PARAMFLAG_BOOL, iptr:&opp_enabled, defintval:0, TYPE_INT, 0}, \
|
||||
{"numerology" , CONFIG_HLP_NUMEROLOGY, PARAMFLAG_BOOL, iptr:&NUMEROLOGY, defintval:1, TYPE_INT, 0}, \
|
||||
{"band" , CONFIG_HLP_BAND, PARAMFLAG_BOOL, iptr:&BAND, defintval:78, TYPE_INT, 0}, \
|
||||
{"emulate-rf" , CONFIG_HLP_EMULATE_RF, PARAMFLAG_BOOL, iptr:&EMULATE_RF, defintval:0, TYPE_INT, 0}, \
|
||||
{"parallel-config", CONFIG_HLP_PARALLEL_CMD, 0, strptr:¶llel_config, defstrval:NULL, TYPE_STRING, 0}, \
|
||||
{"worker-config", CONFIG_HLP_WORKER_CMD, 0, strptr:&worker_config, defstrval:NULL, TYPE_STRING, 0}, \
|
||||
{"noS1", CONFIG_HLP_NOS1, PARAMFLAG_BOOL, uptr:&noS1, defintval:0, TYPE_INT, 0}, \
|
||||
{"rfsim", CONFIG_HLP_RFSIM, PARAMFLAG_BOOL, uptr:&rfsim, defintval:0, TYPE_INT, 0}, \
|
||||
{"nokrnmod", CONFIG_HLP_NOKRNMOD, PARAMFLAG_BOOL, uptr:&nokrnmod, defintval:0, TYPE_INT, 0}, \
|
||||
{"nbiot-disable", CONFIG_HLP_DISABLNBIOT, PARAMFLAG_BOOL, uptr:&nonbiot, defuintval:0, TYPE_INT, 0}, \
|
||||
{"chest-freq", CONFIG_HLP_CHESTFREQ, 0, iptr:&CHEST_FREQ, defintval:0, TYPE_INT, 0}, \
|
||||
{"chest-time", CONFIG_HLP_CHESTTIME, 0, iptr:&CHEST_TIME, defintval:0, TYPE_INT, 0}, \
|
||||
{"nsa", CONFIG_HLP_NSA, PARAMFLAG_BOOL, iptr:&NSA, defintval:0, TYPE_INT, 0}, \
|
||||
{"node-number", NULL, 0, u16ptr:&NODE_NUMBER, defuintval:0, TYPE_UINT16, 0}, \
|
||||
{"usrp-tx-thread-config", CONFIG_HLP_USRP_THREAD, 0, iptr:&usrp_tx_thread, defstrval:0, TYPE_INT, 0}, \
|
||||
{"nfapi", CONFIG_HLP_NFAPI, 0, strptr:NULL, defstrval:"MONOLITHIC", TYPE_STRING, 0}, \
|
||||
{"non-stop", CONFIG_HLP_NONSTOP, PARAMFLAG_BOOL, iptr:&NON_STOP, defintval:0, TYPE_INT, 0}, \
|
||||
{"emulate-l1", CONFIG_L1_EMULATOR, PARAMFLAG_BOOL, iptr:&EMULATE_L1, defintval:0, TYPE_INT, 0}, \
|
||||
{"continuous-tx", CONFIG_HLP_CONTINUOUS_TX,PARAMFLAG_BOOL, iptr:&CONTINUOUS_TX, defintval:0, TYPE_INT, 0}, \
|
||||
{"disable-stats", CONFIG_HLP_STATS_DISABLE, PARAMFLAG_BOOL, iptr:&stats_disabled, defintval:0, TYPE_INT, 0}, \
|
||||
extern char *nfapi_str;
|
||||
|
||||
#define CMDLINE_PARAMS_DESC \
|
||||
{ \
|
||||
{"rf-config-file", CONFIG_HLP_RFCFGF, 0, strptr : &RF_CONFIG_FILE, defstrval : NULL, TYPE_STRING, 0}, {"split73", CONFIG_HLP_SPLIT73, 0, strptr : &SPLIT73, defstrval : NULL, TYPE_STRING, 0}, \
|
||||
{"thread-pool", CONFIG_HLP_TPOOL, 0, strptr : &TP_CONFIG, defstrval : "-1,-1,-1,-1,-1,-1,-1,-1", TYPE_STRING, 0}, \
|
||||
{"reorder-thread-disable", CONFIG_HLP_REORDER, PARAMFLAG_BOOL, iptr : &REORDER_THREAD_DISABLE, defintval : 0, TYPE_INT, 0}, \
|
||||
{"phy-test", CONFIG_HLP_PHYTST, PARAMFLAG_BOOL, iptr : &PHY_TEST, defintval : 0, TYPE_INT, 0}, {"do-ra", CONFIG_HLP_DORA, PARAMFLAG_BOOL, iptr : &DO_RA, defintval : 0, TYPE_INT, 0}, \
|
||||
{"sa", CONFIG_HLP_SA, PARAMFLAG_BOOL, iptr : &SA, defintval : 0, TYPE_INT, 0}, {"usim-test", CONFIG_HLP_USIM, PARAMFLAG_BOOL, u8ptr : &USIM_TEST, defintval : 0, TYPE_UINT8, 0}, \
|
||||
{"clock-source", CONFIG_HLP_CLK, 0, uptr : &CLOCK_SOURCE, defintval : 0, TYPE_UINT, 0}, {"time-source", CONFIG_HLP_TME, 0, uptr : &TIMING_SOURCE, defintval : 0, TYPE_UINT, 0}, \
|
||||
{"tune-offset", CONFIG_HLP_TUNE_OFFSET, 0, dblptr : &TUNE_OFFSET, defintval : 0, TYPE_DOUBLE, 0}, {"wait-for-sync", NULL, PARAMFLAG_BOOL, iptr : &WAIT_FOR_SYNC, defintval : 0, TYPE_INT, 0}, \
|
||||
{"single-thread-enable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr : &SINGLE_THREAD_FLAG, defintval : 0, TYPE_INT, 0}, \
|
||||
{"C", CONFIG_HLP_DLF, 0, u64ptr : &(downlink_frequency[0][0]), defuintval : 0, TYPE_UINT64, 0}, \
|
||||
{"CO", CONFIG_HLP_ULF, 0, iptr : &(uplink_frequency_offset[0][0]), defintval : 0, TYPE_INT, 0}, {"a", CONFIG_HLP_CHOFF, 0, iptr : &CHAIN_OFFSET, defintval : 0, TYPE_INT, 0}, \
|
||||
{"d", CONFIG_HLP_SOFTS, PARAMFLAG_BOOL, uptr : (uint32_t *)&do_forms, defintval : 0, TYPE_INT8, 0}, {"q", CONFIG_HLP_STMON, PARAMFLAG_BOOL, iptr : &opp_enabled, defintval : 0, TYPE_INT, 0}, \
|
||||
{"numerology", CONFIG_HLP_NUMEROLOGY, PARAMFLAG_BOOL, iptr : &NUMEROLOGY, defintval : 1, TYPE_INT, 0}, {"band", CONFIG_HLP_BAND, PARAMFLAG_BOOL, iptr : &BAND, defintval : 78, TYPE_INT, 0}, \
|
||||
{"emulate-rf", CONFIG_HLP_EMULATE_RF, PARAMFLAG_BOOL, iptr : &EMULATE_RF, defintval : 0, TYPE_INT, 0}, \
|
||||
{"parallel-config", CONFIG_HLP_PARALLEL_CMD, 0, strptr : ¶llel_config, defstrval : NULL, TYPE_STRING, 0}, \
|
||||
{"worker-config", CONFIG_HLP_WORKER_CMD, 0, strptr : &worker_config, defstrval : NULL, TYPE_STRING, 0}, {"noS1", CONFIG_HLP_NOS1, PARAMFLAG_BOOL, uptr : &noS1, defintval : 0, TYPE_INT, 0}, \
|
||||
{"rfsim", CONFIG_HLP_RFSIM, PARAMFLAG_BOOL, uptr : &rfsim, defintval : 0, TYPE_INT, 0}, {"nokrnmod", CONFIG_HLP_NOKRNMOD, PARAMFLAG_BOOL, uptr : &nokrnmod, defintval : 0, TYPE_INT, 0}, \
|
||||
{"nbiot-disable", CONFIG_HLP_DISABLNBIOT, PARAMFLAG_BOOL, uptr : &nonbiot, defuintval : 0, TYPE_INT, 0}, \
|
||||
{"chest-freq", CONFIG_HLP_CHESTFREQ, 0, iptr : &CHEST_FREQ, defintval : 0, TYPE_INT, 0}, {"chest-time", CONFIG_HLP_CHESTTIME, 0, iptr : &CHEST_TIME, defintval : 0, TYPE_INT, 0}, \
|
||||
{"nsa", CONFIG_HLP_NSA, PARAMFLAG_BOOL, iptr : &NSA, defintval : 0, TYPE_INT, 0}, {"node-number", NULL, 0, u16ptr : &NODE_NUMBER, defuintval : 0, TYPE_UINT16, 0}, \
|
||||
{"usrp-tx-thread-config", CONFIG_HLP_USRP_THREAD, 0, iptr : &usrp_tx_thread, defstrval : 0, TYPE_INT, 0}, \
|
||||
{"nfapi", CONFIG_HLP_NFAPI, 0, strptr : NULL, defstrval : "MONOLITHIC", TYPE_STRING, 0}, {"non-stop", CONFIG_HLP_NONSTOP, PARAMFLAG_BOOL, iptr : &NON_STOP, defintval : 0, TYPE_INT, 0}, \
|
||||
{"emulate-l1", CONFIG_L1_EMULATOR, PARAMFLAG_BOOL, iptr : &EMULATE_L1, defintval : 0, TYPE_INT, 0}, \
|
||||
{"continuous-tx", CONFIG_HLP_CONTINUOUS_TX, PARAMFLAG_BOOL, iptr : &CONTINUOUS_TX, defintval : 0, TYPE_INT, 0}, \
|
||||
{"disable-stats", CONFIG_HLP_STATS_DISABLE, PARAMFLAG_BOOL, iptr : &stats_disabled, defintval : 0, TYPE_INT, 0}, \
|
||||
}
|
||||
|
||||
|
||||
|
||||
#define CMDLINE_PARAMS_CHECK_DESC { \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s3a = { config_checkstr_assign_integer, \
|
||||
{"MONOLITHIC", "PNF", "VNF","UE_STUB_PNF","UE_STUB_OFFNET","STANDALONE_PNF"}, \
|
||||
{NFAPI_MONOLITHIC, NFAPI_MODE_PNF, NFAPI_MODE_VNF,NFAPI_UE_STUB_PNF,NFAPI_UE_STUB_OFFNET,NFAPI_MODE_STANDALONE_PNF}, \
|
||||
6 } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
{ .s5 = { NULL } }, \
|
||||
}
|
||||
#define CMDLINE_PARAMS_CHECK_DESC \
|
||||
{ \
|
||||
{.s5 = {NULL}}, {.s5 = {NULL}}, {.s5 = {NULL}}, {.s5 = {NULL}}, {.s5 = {NULL}}, {.s5 = {NULL}}, {.s5 = {NULL}}, {.s5 = {NULL}}, {.s5 = {NULL}}, {.s5 = {NULL}}, {.s5 = {NULL}}, {.s5 = {NULL}}, \
|
||||
{.s5 = {NULL}}, {.s5 = {NULL}}, {.s5 = {NULL}}, {.s5 = {NULL}}, {.s5 = {NULL}}, {.s5 = {NULL}}, {.s5 = {NULL}}, {.s5 = {NULL}}, {.s5 = {NULL}}, {.s5 = {NULL}}, {.s5 = {NULL}}, \
|
||||
{.s5 = {NULL}}, {.s5 = {NULL}}, {.s5 = {NULL}}, {.s5 = {NULL}}, {.s5 = {NULL}}, {.s5 = {NULL}}, {.s5 = {NULL}}, {.s5 = {NULL}}, {.s5 = {NULL}}, \
|
||||
{.s3a = {config_checkstr_assign_integer, \
|
||||
{"MONOLITHIC", "PNF", "VNF", "UE_STUB_PNF", "UE_STUB_OFFNET", "STANDALONE_PNF"}, \
|
||||
{NFAPI_MONOLITHIC, NFAPI_MODE_PNF, NFAPI_MODE_VNF, NFAPI_UE_STUB_PNF, NFAPI_UE_STUB_OFFNET, NFAPI_MODE_STANDALONE_PNF}, \
|
||||
6}}, \
|
||||
{.s5 = {NULL}}, {.s5 = {NULL}}, {.s5 = {NULL}}, {.s5 = {NULL}}, {.s5 = {NULL}}, \
|
||||
}
|
||||
|
||||
#define CONFIG_HLP_NSA "Enable NSA mode \n"
|
||||
#define CONFIG_HLP_FLOG "Enable online log \n"
|
||||
@@ -289,6 +249,7 @@ typedef struct {
|
||||
char *rf_config_file;
|
||||
char *split73;
|
||||
char *threadPoolConfig;
|
||||
int reorder_thread_disable;
|
||||
int phy_test;
|
||||
int do_ra;
|
||||
int sa;
|
||||
|
||||
@@ -291,10 +291,7 @@ typedef enum {
|
||||
NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE3
|
||||
} nfapi_nr_ssb_and_cset_mux_pattern_type_e;
|
||||
|
||||
typedef enum {
|
||||
NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED=0,
|
||||
NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED=1
|
||||
} nfapi_nr_cce_reg_mapping_type_e;
|
||||
typedef enum { NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED = 0, NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED = 1 } nfapi_nr_cce_reg_mapping_type_e;
|
||||
|
||||
typedef enum {
|
||||
NFAPI_NR_CSET_CONFIG_MIB_SIB1=0,
|
||||
|
||||
8
oaienv
8
oaienv
@@ -9,6 +9,14 @@ export OPENAIR2_DIR=$OPENAIR_HOME/openair2
|
||||
export OPENAIR3_DIR=$OPENAIR_HOME/openair3
|
||||
export OPENAIR_TARGETS=$OPENAIR_HOME/targets
|
||||
|
||||
# ORAN 7.2 FrontHaul
|
||||
export DPDK_ARCHIVE_VERSION=dpdk-19.11.13
|
||||
export RTE_SDK=~/dpdk-stable-19.11.13
|
||||
export RTE_TARGET=x86_64-native-linuxapp-gcc
|
||||
export RTE_INCLUDE=${RTE_SDK}/${RTE_TARGET}/include
|
||||
export XRAN_LIB_DIR=~/phy/fhi_lib/lib/build
|
||||
export XRAN_DIR=~/phy/fhi_lib
|
||||
|
||||
export PATH=$PATH:$OPENAIR_TARGETS/bin
|
||||
|
||||
alias oai='cd $OPENAIR_HOME'
|
||||
|
||||
@@ -510,7 +510,8 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB)
|
||||
AssertFatal(pdcch_dmrs!=NULL, "NR init: pdcch_dmrs malloc failed\n");
|
||||
|
||||
gNB->bad_pucch = 0;
|
||||
|
||||
if (gNB->TX_AMP == 0)
|
||||
gNB->TX_AMP = AMP;
|
||||
// ceil(((NB_RB<<1)*3)/32) // 3 RE *2(QPSK)
|
||||
int pdcch_dmrs_init_length = (((fp->N_RB_DL<<1)*3)>>5)+1;
|
||||
|
||||
|
||||
@@ -146,8 +146,9 @@ void nr_modulation(uint32_t *in,
|
||||
case 2:
|
||||
nr_mod_table128 = (__m128i*) nr_qpsk_byte_mod_table;
|
||||
out128 = (__m128i*) out;
|
||||
for (i=0; i<length/8; i++)
|
||||
for (i = 0; i < length / 8; i++)
|
||||
out128[i] = nr_mod_table128[in_bytes[i]];
|
||||
|
||||
// the bits that are left out
|
||||
i = i*8/2;
|
||||
nr_mod_table32 = (int32_t*) nr_qpsk_mod_table;
|
||||
|
||||
@@ -47,7 +47,7 @@ void nr_generate_modulation_table() {
|
||||
for (i=0; i<4; i++) {
|
||||
nr_qpsk_mod_table[i*2] = (short)(1-2*(i&1))*val*sqrt2*sqrt2;
|
||||
nr_qpsk_mod_table[i*2+1] = (short)(1-2*((i>>1)&1))*val*sqrt2*sqrt2;
|
||||
//printf("%d j%d\n",nr_qpsk_mod_table[i*2],nr_qpsk_mod_table[i*2+1]);
|
||||
// printf("QPSK : %d j%d\n",nr_qpsk_mod_table[i*2],nr_qpsk_mod_table[i*2+1]);
|
||||
}
|
||||
|
||||
#if defined(__SSE2__)
|
||||
@@ -57,7 +57,6 @@ void nr_generate_modulation_table() {
|
||||
for (j=0; j<4; j++) {
|
||||
table[i*8+(j*2)] = (short)(1-2*((i>>(j*2))&1))*val*sqrt2*sqrt2;
|
||||
table[i*8+(j*2)+1] = (short)(1-2*((i>>(j*2+1))&1))*val*sqrt2*sqrt2;
|
||||
//printf("%d j%d\n",nr_qpsk_byte_mod_table[i*8+(j*2)],nr_qpsk_byte_mod_table[i*8+(j*2)+1]);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
@@ -68,7 +67,7 @@ void nr_generate_modulation_table() {
|
||||
for (j=0; j<2; j++) {
|
||||
table[i*4+(j*2)] = (short)((1-2*((i>>(j*4))&1))*(2-(1-2*((i>>(j*4+2))&1))))*val*sqrt10*sqrt2;
|
||||
table[i*4+(j*2)+1] = (short)((1-2*((i>>(j*4+1))&1))*(2-(1-2*((i>>(j*4+3))&1))))*val*sqrt10*sqrt2;
|
||||
//printf("%d j%d\n",nr_16qam_byte_mod_table[i*4+(j*2)],nr_16qam_byte_mod_table[i*4+(j*2)+1]);
|
||||
// printf("%d j%d\n",nr_16qam_byte_mod_table[i*4+(j*2)],nr_16qam_byte_mod_table[i*4+(j*2)+1]);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -76,7 +75,7 @@ void nr_generate_modulation_table() {
|
||||
for (i=0; i<16; i++) {
|
||||
table[i*2] = (short)((1-2*(i&1))*(2-(1-2*((i>>2)&1))))*val*sqrt10*sqrt2;
|
||||
table[i*2+1] = (short)((1-2*((i>>1)&1))*(2-(1-2*((i>>3)&1))))*val*sqrt10*sqrt2;
|
||||
//printf("%d j%d\n",table[i*2],table[i*2+1]);
|
||||
// printf("%d j%d\n",table[i*2],table[i*2+1]);
|
||||
}
|
||||
|
||||
//64QAM
|
||||
|
||||
@@ -60,7 +60,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
|
||||
PHY_VARS_gNB *gNB = msgTx->gNB;
|
||||
NR_gNB_DLSCH_t *dlsch;
|
||||
int32_t** txdataF = gNB->common_vars.txdataF;
|
||||
int16_t amp = AMP;
|
||||
int16_t amp = gNB->TX_AMP;
|
||||
int xOverhead = 0;
|
||||
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
|
||||
time_stats_t *dlsch_encoding_stats=&gNB->dlsch_encoding_stats;
|
||||
|
||||
@@ -655,6 +655,8 @@ typedef struct RU_t_s {
|
||||
int txfh_core_id;
|
||||
/// number of RU interfaces
|
||||
int num_fd;
|
||||
/// Core id of ru_thread
|
||||
int ru_thread_core;
|
||||
/// list of cores for RU ThreadPool
|
||||
int tpcores[16];
|
||||
/// number of cores for RU ThreadPool
|
||||
@@ -686,15 +688,7 @@ typedef struct RRU_CONFIG_msg_s {
|
||||
uint8_t msg[MAX_RRU_CONFIG_SIZE];
|
||||
} RRU_CONFIG_msg_t;
|
||||
|
||||
|
||||
typedef enum {
|
||||
OAI_IF5_only =0,
|
||||
OAI_IF4p5_only =1,
|
||||
OAI_IF5_and_IF4p5 =2,
|
||||
MBP_IF5 =3,
|
||||
MAX_FH_FMTs =4
|
||||
} FH_fmt_options_t;
|
||||
|
||||
typedef enum { OAI_IF5_only = 0, OAI_IF4p5_only = 1, OAI_IF5_and_IF4p5 = 2, MBP_IF5 = 3, ORAN_only = 4, MAX_FH_FMTs = 5 } FH_fmt_options_t;
|
||||
|
||||
typedef struct RRU_capabilities_s {
|
||||
/// Fronthaul format
|
||||
|
||||
@@ -640,6 +640,8 @@ typedef struct PHY_VARS_gNB_s {
|
||||
/// CSI variables
|
||||
nr_csi_info_t *nr_csi_info;
|
||||
|
||||
// reference amplitude for TX
|
||||
int16_t TX_AMP;
|
||||
// PUCCH0 Look-up table for cyclic-shifts
|
||||
NR_gNB_PUCCH0_LUT_t pucch0_lut;
|
||||
|
||||
@@ -679,6 +681,8 @@ typedef struct PHY_VARS_gNB_s {
|
||||
|
||||
int ldpc_offload_flag;
|
||||
|
||||
int reorder_thread_disable;
|
||||
|
||||
int max_ldpc_iterations;
|
||||
/// indicate the channel estimation technique in time domain
|
||||
int chest_time;
|
||||
|
||||
@@ -163,7 +163,10 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
|
||||
|
||||
if (slot_type == NR_DOWNLINK_SLOT || slot_type == NR_MIXED_SLOT) {
|
||||
notifiedFIFO_elt_t *res;
|
||||
res = pullTpool(&gNB->L1_tx_free, &gNB->threadPool);
|
||||
if (gNB->reorder_thread_disable)
|
||||
res = pullTpool(&gNB->L1_tx_out, &gNB->threadPool);
|
||||
else
|
||||
res = pullTpool(&gNB->L1_tx_free, &gNB->threadPool);
|
||||
if (res == NULL)
|
||||
return; // Tpool has been stopped, nothing to process
|
||||
processingData_L1tx_t *msgTx = (processingData_L1tx_t *)NotifiedFifoData(res);
|
||||
@@ -212,7 +215,10 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
|
||||
for (int i=0; i<number_ul_dci_pdu; i++)
|
||||
msgTx->ul_pdcch_pdu[i] = UL_dci_req->ul_dci_pdu_list[i];
|
||||
|
||||
pushNotifiedFIFO(&gNB->L1_tx_filled,res);
|
||||
if (gNB->reorder_thread_disable)
|
||||
pushNotifiedFIFO(&gNB->L1_tx_out, res);
|
||||
else
|
||||
pushNotifiedFIFO(&gNB->L1_tx_filled, res);
|
||||
}
|
||||
|
||||
for (int i = 0; i < number_ul_tti_pdu; i++) {
|
||||
|
||||
@@ -183,8 +183,8 @@ void L1_nr_prach_procedures(PHY_VARS_gNB *gNB,int frame,int slot) {
|
||||
gNB->prach_pdu_indication_list[pdu_index].num_preamble = 1;
|
||||
gNB->prach_pdu_indication_list[pdu_index].preamble_list = gNB->preamble_list;
|
||||
gNB->prach_pdu_indication_list[pdu_index].preamble_list[0].preamble_index = max_preamble[0];
|
||||
gNB->prach_pdu_indication_list[pdu_index].preamble_list[0].timing_advance = max_preamble_delay[0];
|
||||
gNB->prach_pdu_indication_list[pdu_index].preamble_list[0].preamble_pwr = 0xffffffff;
|
||||
gNB->prach_pdu_indication_list[pdu_index].preamble_list[0].timing_advance = max_preamble_delay[0];
|
||||
gNB->prach_pdu_indication_list[pdu_index].preamble_list[0].preamble_pwr = 0xffffffff;
|
||||
pdu_index++;
|
||||
}
|
||||
gNB->measurements.prach_I0 = ((gNB->measurements.prach_I0*900)>>10) + ((max_preamble_energy[0]*124)>>10);
|
||||
|
||||
@@ -189,27 +189,14 @@ void nr_feptx_prec(RU_t *ru,int frame_tx,int tti_tx) {
|
||||
|
||||
if (nr_slot_select(cfg,frame_tx,slot_tx) == NR_UPLINK_SLOT) return;
|
||||
|
||||
for(i=0; i<ru->nb_log_antennas; ++i) {
|
||||
memcpy((void*)ru->common.txdataF[i],
|
||||
(void*)&gNB->common_vars.txdataF[i][txdataF_offset],
|
||||
fp->samples_per_slot_wCP*sizeof(int32_t));
|
||||
if (ru->do_precoding == 1)
|
||||
memcpy((void*)&ru->common.beam_id[i][slot_tx*fp->symbols_per_slot],
|
||||
(void*)&gNB->common_vars.beam_id[i][slot_tx*fp->symbols_per_slot],
|
||||
fp->symbols_per_slot*sizeof(uint8_t));
|
||||
}
|
||||
|
||||
if (ru->nb_tx == 1 && ru->nb_log_antennas == 1) {
|
||||
|
||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_PREC , 1);
|
||||
|
||||
memcpy((void*)ru->common.txdataF_BF[0],
|
||||
(void*)ru->common.txdataF[0],
|
||||
fp->samples_per_slot_wCP*sizeof(int32_t));
|
||||
|
||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_PREC , 0);
|
||||
}// if (ru->nb_tx == 1)
|
||||
else {
|
||||
if (ru->do_precoding == 0 || (ru->nb_tx == 1 && ru->nb_log_antennas == 1)) {
|
||||
for (i = 0; i < ru->nb_log_antennas; ++i)
|
||||
ru->common.txdataF_BF[i] = &gNB->common_vars.txdataF[i][txdataF_offset];
|
||||
} else {
|
||||
for (i = 0; i < ru->nb_log_antennas; ++i) {
|
||||
memcpy((void *)ru->common.txdataF[i], (void *)&gNB->common_vars.txdataF[i][txdataF_offset], fp->samples_per_slot_wCP * sizeof(int32_t));
|
||||
memcpy((void *)&ru->common.beam_id[i][slot_tx * fp->symbols_per_slot], (void *)&gNB->common_vars.beam_id[i][slot_tx * fp->symbols_per_slot], fp->symbols_per_slot * sizeof(uint8_t));
|
||||
}
|
||||
bw = ru->beam_weights[0];
|
||||
for (l=0;l<fp->symbols_per_slot;l++) {
|
||||
for (aa=0;aa<ru->nb_tx;aa++) {
|
||||
@@ -224,7 +211,7 @@ void nr_feptx_prec(RU_t *ru,int frame_tx,int tti_tx) {
|
||||
0);
|
||||
}// for (aa=0;aa<ru->nb_tx;aa++)
|
||||
}// for (l=0;l<fp->symbols_per_slot;l++)
|
||||
}// if (ru->nb_tx == 1)
|
||||
} // ru->do_precoding
|
||||
}// if (ru->num_gNB == 1)
|
||||
stop_meas(&ru->precoding_stats);
|
||||
}
|
||||
|
||||
@@ -81,13 +81,13 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame,int slot,nfapi_nr_
|
||||
LOG_D(PHY, "SSB first subcarrier %d (%d,%d)\n", fp->ssb_start_subcarrier, prb_offset, sc_offset);
|
||||
|
||||
LOG_D(PHY,"SS TX: frame %d, slot %d, start_symbol %d\n",frame,slot, ssb_start_symbol);
|
||||
nr_generate_pss(&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
|
||||
nr_generate_sss(&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
|
||||
nr_generate_pss(&txdataF[0][txdataF_offset], gNB->TX_AMP, ssb_start_symbol, cfg, fp);
|
||||
nr_generate_sss(&txdataF[0][txdataF_offset], gNB->TX_AMP, ssb_start_symbol, cfg, fp);
|
||||
|
||||
if (fp->Lmax == 4)
|
||||
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index&7],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
|
||||
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index & 7], &txdataF[0][txdataF_offset], gNB->TX_AMP, ssb_start_symbol, cfg, fp);
|
||||
else
|
||||
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[0][ssb_index&7],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
|
||||
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[0][ssb_index & 7], &txdataF[0][txdataF_offset], gNB->TX_AMP, ssb_start_symbol, cfg, fp);
|
||||
|
||||
if (T_ACTIVE(T_GNB_PHY_MIB)) {
|
||||
unsigned char bch[3];
|
||||
@@ -104,12 +104,7 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame,int slot,nfapi_nr_
|
||||
gNB->common_vars.beam_id[0][slot*fp->symbols_per_slot+j] = cfg->ssb_table.ssb_beam_id_list[ssb_index].beam_id.value;
|
||||
}
|
||||
|
||||
nr_generate_pbch(&ssb_pdu,
|
||||
gNB->nr_pbch_interleaver,
|
||||
&txdataF[0][txdataF_offset],
|
||||
AMP,
|
||||
ssb_start_symbol,
|
||||
n_hf, frame, cfg, fp);
|
||||
nr_generate_pbch(&ssb_pdu, gNB->nr_pbch_interleaver, &txdataF[0][txdataF_offset], gNB->TX_AMP, ssb_start_symbol, n_hf, frame, cfg, fp);
|
||||
}
|
||||
|
||||
|
||||
@@ -170,9 +165,7 @@ void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx,
|
||||
|
||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_gNB_PDCCH_TX,1);
|
||||
|
||||
nr_generate_dci_top(msgTx, slot,
|
||||
&gNB->common_vars.txdataF[0][txdataF_offset],
|
||||
AMP, fp);
|
||||
nr_generate_dci_top(msgTx, slot, &gNB->common_vars.txdataF[0][txdataF_offset], gNB->TX_AMP, fp);
|
||||
|
||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_gNB_PDCCH_TX,0);
|
||||
}
|
||||
@@ -189,22 +182,22 @@ void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx,
|
||||
if (csirs->active == 1) {
|
||||
LOG_D(PHY, "CSI-RS generation started in frame %d.%d\n",frame,slot);
|
||||
nfapi_nr_dl_tti_csi_rs_pdu_rel15_t *csi_params = &csirs->csirs_pdu.csi_rs_pdu_rel15;
|
||||
nr_generate_csi_rs(&gNB->frame_parms, gNB->common_vars.txdataF, AMP, gNB->nr_csi_info, csi_params, slot, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL);
|
||||
nr_generate_csi_rs(&gNB->frame_parms, gNB->common_vars.txdataF, gNB->TX_AMP, gNB->nr_csi_info, csi_params, slot, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL);
|
||||
csirs->active = 0;
|
||||
}
|
||||
}
|
||||
|
||||
// if ((frame&127) == 0) dump_pdsch_stats(gNB);
|
||||
|
||||
//apply the OFDM symbol rotation here
|
||||
for (aa=0; aa<cfg->carrier_config.num_tx_ant.value; aa++) {
|
||||
apply_nr_rotation(fp,(int16_t*) &gNB->common_vars.txdataF[aa][txdataF_offset],slot,0,fp->Ncp==EXTENDED?12:14);
|
||||
// apply the OFDM symbol rotation here
|
||||
// WA: Comment rotation in tx/rx
|
||||
if ((gNB->num_RU == 1) && (gNB->RU_list[0]->if_south != REMOTE_IF4p5)) {
|
||||
for (aa = 0; aa < cfg->carrier_config.num_tx_ant.value; aa++) {
|
||||
apply_nr_rotation(fp, (int16_t *)&gNB->common_vars.txdataF[aa][txdataF_offset], slot, 0, fp->Ncp == EXTENDED ? 12 : 14);
|
||||
|
||||
T(T_GNB_PHY_DL_OUTPUT_SIGNAL, T_INT(0),
|
||||
T_INT(frame), T_INT(slot),
|
||||
T_INT(aa), T_BUFFER(&gNB->common_vars.txdataF[aa][txdataF_offset], fp->samples_per_slot_wCP*sizeof(int32_t)));
|
||||
T(T_GNB_PHY_DL_OUTPUT_SIGNAL, T_INT(0), T_INT(frame), T_INT(slot), T_INT(aa), T_BUFFER(&gNB->common_vars.txdataF[aa][txdataF_offset], fp->samples_per_slot_wCP * sizeof(int32_t)));
|
||||
}
|
||||
}
|
||||
|
||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_gNB_TX+offset,0);
|
||||
}
|
||||
|
||||
@@ -436,38 +429,39 @@ void nr_fill_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int ULSCH_id,
|
||||
else if (SNRtimes10 > 635) cqi=255;
|
||||
else cqi=(640+SNRtimes10)/5;
|
||||
|
||||
/*
|
||||
if (pusch_pdu->mcs_index == 9) {
|
||||
__attribute__((unused))
|
||||
int off = ((pusch_pdu->rb_size&1) == 1)? 4:0;
|
||||
|
||||
if (0/*pusch_pdu->mcs_index == 9*/) {
|
||||
__attribute__((unused))
|
||||
int off = ((pusch_pdu->rb_size&1) == 1)? 4:0;
|
||||
|
||||
LOG_M("rxsigF0.m","rxsF0",&gNB->common_vars.rxdataF[0][(slot_rx&3)*gNB->frame_parms.ofdm_symbol_size*gNB->frame_parms.symbols_per_slot],gNB->frame_parms.ofdm_symbol_size*gNB->frame_parms.symbols_per_slot,1,1);
|
||||
LOG_M("rxsigF0_ext.m","rxsF0_ext",
|
||||
&gNB->pusch_vars[0]->rxdataF_ext[0][pusch_pdu->start_symbol_index*NR_NB_SC_PER_RB * pusch_pdu->rb_size],pusch_pdu->nr_of_symbols*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
|
||||
LOG_M("chestF0.m","chF0",
|
||||
&gNB->pusch_vars[0]->ul_ch_estimates[0][pusch_pdu->start_symbol_index*gNB->frame_parms.ofdm_symbol_size],gNB->frame_parms.ofdm_symbol_size,1,1);
|
||||
LOG_M("chestF0_ext.m","chF0_ext",
|
||||
&gNB->pusch_vars[0]->ul_ch_estimates_ext[0][(pusch_pdu->start_symbol_index+1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],
|
||||
(pusch_pdu->nr_of_symbols-1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
|
||||
LOG_M("rxsigF0_comp.m","rxsF0_comp",
|
||||
&gNB->pusch_vars[0]->rxdataF_comp[0][pusch_pdu->start_symbol_index*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],pusch_pdu->nr_of_symbols*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
|
||||
LOG_M("rxsigF0_llr.m","rxsF0_llr",
|
||||
&gNB->pusch_vars[0]->llr[0],(pusch_pdu->nr_of_symbols-1)*NR_NB_SC_PER_RB *pusch_pdu->rb_size * pusch_pdu->qam_mod_order,1,0);
|
||||
if (gNB->frame_parms.nb_antennas_rx > 1) {
|
||||
LOG_M("rxsigF1.m","rxsF1",&gNB->common_vars.rxdataF[1][(slot_rx&3)*gNB->frame_parms.ofdm_symbol_size*gNB->frame_parms.symbols_per_slot],gNB->frame_parms.ofdm_symbol_size*gNB->frame_parms.symbols_per_slot,1,1);
|
||||
LOG_M("rxsigF1_ext.m","rxsF1_ext",
|
||||
&gNB->pusch_vars[0]->rxdataF_ext[1][pusch_pdu->start_symbol_index*NR_NB_SC_PER_RB * pusch_pdu->rb_size],pusch_pdu->nr_of_symbols*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
|
||||
LOG_M("chestF1.m","chF1",
|
||||
&gNB->pusch_vars[0]->ul_ch_estimates[1][pusch_pdu->start_symbol_index*gNB->frame_parms.ofdm_symbol_size],gNB->frame_parms.ofdm_symbol_size,1,1);
|
||||
LOG_M("chestF1_ext.m","chF1_ext",
|
||||
&gNB->pusch_vars[0]->ul_ch_estimates_ext[1][(pusch_pdu->start_symbol_index+1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],
|
||||
LOG_M("rxsigF0.m","rxsF0",&gNB->common_vars.rxdataF[0][(slot_rx&3)*gNB->frame_parms.ofdm_symbol_size*gNB->frame_parms.symbols_per_slot],gNB->frame_parms.ofdm_symbol_size*gNB->frame_parms.symbols_per_slot,1,1);
|
||||
LOG_M("rxsigF0_ext.m","rxsF0_ext",
|
||||
&gNB->pusch_vars[0]->rxdataF_ext[0][pusch_pdu->start_symbol_index*NR_NB_SC_PER_RB * pusch_pdu->rb_size],pusch_pdu->nr_of_symbols*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
|
||||
LOG_M("chestF0.m","chF0",
|
||||
&gNB->pusch_vars[0]->ul_ch_estimates[0][pusch_pdu->start_symbol_index*gNB->frame_parms.ofdm_symbol_size],gNB->frame_parms.ofdm_symbol_size,1,1);
|
||||
LOG_M("chestF0_ext.m","chF0_ext",
|
||||
&gNB->pusch_vars[0]->ul_ch_estimates_ext[0][(pusch_pdu->start_symbol_index+1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],
|
||||
(pusch_pdu->nr_of_symbols-1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
|
||||
LOG_M("rxsigF1_comp.m","rxsF1_comp",
|
||||
&gNB->pusch_vars[0]->rxdataF_comp[1][pusch_pdu->start_symbol_index*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],pusch_pdu->nr_of_symbols*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
|
||||
}
|
||||
exit(-1);
|
||||
LOG_M("rxsigF0_comp.m","rxsF0_comp",
|
||||
&gNB->pusch_vars[0]->rxdataF_comp[0][pusch_pdu->start_symbol_index*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],pusch_pdu->nr_of_symbols*(off+(NR_NB_SC_PER_RB *
|
||||
pusch_pdu->rb_size)),1,1); LOG_M("rxsigF0_llr.m","rxsF0_llr", &gNB->pusch_vars[0]->llr[0],(pusch_pdu->nr_of_symbols-1)*NR_NB_SC_PER_RB *pusch_pdu->rb_size * pusch_pdu->qam_mod_order,1,0); if
|
||||
(gNB->frame_parms.nb_antennas_rx > 1) {
|
||||
LOG_M("rxsigF1.m","rxsF1",&gNB->common_vars.rxdataF[1][(slot_rx&3)*gNB->frame_parms.ofdm_symbol_size*gNB->frame_parms.symbols_per_slot],gNB->frame_parms.ofdm_symbol_size*gNB->frame_parms.symbols_per_slot,1,1);
|
||||
LOG_M("rxsigF1_ext.m","rxsF1_ext",
|
||||
&gNB->pusch_vars[0]->rxdataF_ext[1][pusch_pdu->start_symbol_index*NR_NB_SC_PER_RB * pusch_pdu->rb_size],pusch_pdu->nr_of_symbols*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
|
||||
LOG_M("chestF1.m","chF1",
|
||||
&gNB->pusch_vars[0]->ul_ch_estimates[1][pusch_pdu->start_symbol_index*gNB->frame_parms.ofdm_symbol_size],gNB->frame_parms.ofdm_symbol_size,1,1);
|
||||
LOG_M("chestF1_ext.m","chF1_ext",
|
||||
&gNB->pusch_vars[0]->ul_ch_estimates_ext[1][(pusch_pdu->start_symbol_index+1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],
|
||||
(pusch_pdu->nr_of_symbols-1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
|
||||
LOG_M("rxsigF1_comp.m","rxsF1_comp",
|
||||
&gNB->pusch_vars[0]->rxdataF_comp[1][pusch_pdu->start_symbol_index*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],pusch_pdu->nr_of_symbols*(off+(NR_NB_SC_PER_RB *
|
||||
pusch_pdu->rb_size)),1,1);
|
||||
}
|
||||
exit(-1);
|
||||
|
||||
}
|
||||
}
|
||||
*/
|
||||
|
||||
// crc indication
|
||||
uint16_t num_crc = gNB->UL_INFO.crc_ind.number_crcs;
|
||||
@@ -672,12 +666,8 @@ int fill_srs_channel_matrix(uint8_t *channel_matrix,
|
||||
|
||||
int check_srs_pdu(const nfapi_nr_srs_pdu_t *srs_pdu, nfapi_nr_srs_pdu_t *saved_srs_pdu)
|
||||
{
|
||||
if (saved_srs_pdu->bwp_start == srs_pdu->bwp_start &&
|
||||
saved_srs_pdu->bwp_size == srs_pdu->bwp_size &&
|
||||
saved_srs_pdu->num_ant_ports == srs_pdu->num_ant_ports &&
|
||||
saved_srs_pdu->time_start_position == srs_pdu->time_start_position &&
|
||||
saved_srs_pdu->num_symbols == srs_pdu->num_symbols &&
|
||||
saved_srs_pdu->config_index == srs_pdu->config_index) {
|
||||
if (saved_srs_pdu->bwp_start == srs_pdu->bwp_start && saved_srs_pdu->bwp_size == srs_pdu->bwp_size && saved_srs_pdu->num_ant_ports == srs_pdu->num_ant_ports
|
||||
&& saved_srs_pdu->time_start_position == srs_pdu->time_start_position && saved_srs_pdu->num_symbols == srs_pdu->num_symbols && saved_srs_pdu->config_index == srs_pdu->config_index) {
|
||||
return 1;
|
||||
}
|
||||
*saved_srs_pdu = *srs_pdu;
|
||||
@@ -1002,7 +992,7 @@ int phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) {
|
||||
LOG_I(NR_PHY,
|
||||
"nr_srs_beamforming_report.prgs[0].prg_list[%3i].rb_snr = %i (%i dB)\n",
|
||||
prg_idx,
|
||||
nr_srs_bf_report.prgs[0].prg_list[prg_idx].rb_snr,
|
||||
nr_srs_bf_report.prgs[0].prg_list[prg_idx].rb_snr,
|
||||
(nr_srs_bf_report.prgs[0].prg_list[prg_idx].rb_snr >> 1) - 64);
|
||||
}
|
||||
#endif
|
||||
@@ -1042,8 +1032,7 @@ int phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) {
|
||||
for (int uI = 0; uI < nr_srs_channel_iq_matrix.num_ue_srs_ports; uI++) {
|
||||
for (int gI = 0; gI < nr_srs_channel_iq_matrix.num_gnb_antenna_elements; gI++) {
|
||||
for (int pI = 0; pI < nr_srs_channel_iq_matrix.num_prgs; pI++) {
|
||||
uint16_t index =
|
||||
uI * nr_srs_channel_iq_matrix.num_gnb_antenna_elements * nr_srs_channel_iq_matrix.num_prgs + gI * nr_srs_channel_iq_matrix.num_prgs + pI;
|
||||
uint16_t index = uI * nr_srs_channel_iq_matrix.num_gnb_antenna_elements * nr_srs_channel_iq_matrix.num_prgs + gI * nr_srs_channel_iq_matrix.num_prgs + pI;
|
||||
LOG_I(NR_PHY,
|
||||
"(uI %i, gI %i, pI %i) channel_matrix --> real %i, imag %i\n",
|
||||
uI,
|
||||
|
||||
@@ -111,6 +111,7 @@ typedef enum {
|
||||
#define CONFIG_STRING_RU_NUM_TP_CORES "num_tp_cores"
|
||||
#define CONFIG_STRING_RU_NUM_INTERFACES "num_interfaces"
|
||||
#define CONFIG_STRING_RU_HALF_SLOT_PARALLELIZATION "half_slot_parallelization"
|
||||
#define CONFIG_STRING_RU_RU_THREAD_CORE "ru_thread_core"
|
||||
|
||||
#define HLP_RU_SF_AHEAD "LTE TX processing advance"
|
||||
#define HLP_RU_SL_AHEAD "NR TX processing advance"
|
||||
@@ -122,6 +123,7 @@ typedef enum {
|
||||
#define HLP_RU_NUM_TP_CORES "Number of cores for RU ThreadPool"
|
||||
#define HLP_RU_NUM_INTERFACES "Number of network interfaces for RU"
|
||||
#define HLP_RU_HALF_SLOT_PARALLELIZATION "run half slots in parallel in RU FEP"
|
||||
#define HLP_RU_RU_THREAD_CORE "id of core to pin ru_thread, -1 is default"
|
||||
|
||||
#define RU_LOCAL_IF_NAME_IDX 0
|
||||
#define RU_LOCAL_ADDRESS_IDX 1
|
||||
@@ -164,52 +166,40 @@ typedef enum {
|
||||
#define RU_NUM_TP_CORES 38
|
||||
#define RU_NUM_INTERFACES 39
|
||||
#define RU_HALF_SLOT_PARALLELIZATION 40
|
||||
#define RU_RU_THREAD_CORE 41
|
||||
/*-----------------------------------------------------------------------------------------------------------------------------------------*/
|
||||
/* RU configuration parameters */
|
||||
/* optname helpstr paramflags XXXptr defXXXval type numelt */
|
||||
/*-----------------------------------------------------------------------------------------------------------------------------------------*/
|
||||
#define RUPARAMS_DESC { \
|
||||
{CONFIG_STRING_RU_LOCAL_IF_NAME, NULL, 0, strptr:NULL, defstrval:"lo", TYPE_STRING, 0}, \
|
||||
{CONFIG_STRING_RU_LOCAL_ADDRESS, NULL, 0, strptr:NULL, defstrval:"127.0.0.2", TYPE_STRING, 0}, \
|
||||
{CONFIG_STRING_RU_REMOTE_ADDRESS, NULL, 0, strptr:NULL, defstrval:"127.0.0.1", TYPE_STRING, 0}, \
|
||||
{CONFIG_STRING_RU_LOCAL_PORTC, NULL, 0, uptr:NULL, defuintval:50000, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_RU_REMOTE_PORTC, NULL, 0, uptr:NULL, defuintval:50000, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_RU_LOCAL_PORTD, NULL, 0, uptr:NULL, defuintval:50001, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_RU_REMOTE_PORTD, NULL, 0, uptr:NULL, defuintval:50001, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_RU_TRANSPORT_PREFERENCE, NULL, 0, strptr:NULL, defstrval:"udp_if5", TYPE_STRING, 0}, \
|
||||
{CONFIG_STRING_RU_LOCAL_RF, NULL, 0, strptr:NULL, defstrval:"yes", TYPE_STRING, 0}, \
|
||||
{CONFIG_STRING_RU_NB_TX, NULL, 0, uptr:NULL, defuintval:1, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_RU_NB_RX, NULL, 0, uptr:NULL, defuintval:1, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_RU_MAX_RS_EPRE, NULL, 0, iptr:NULL, defintval:-29, TYPE_INT, 0}, \
|
||||
{CONFIG_STRING_RU_MAX_RXGAIN, NULL, 0, iptr:NULL, defintval:120, TYPE_INT, 0}, \
|
||||
{CONFIG_STRING_RU_BAND_LIST, NULL, 0, uptr:NULL, defintarrayval:DEFBANDS, TYPE_INTARRAY, 1}, \
|
||||
{CONFIG_STRING_RU_ENB_LIST, NULL, 0, uptr:NULL, defintarrayval:DEFENBS, TYPE_INTARRAY, 1}, \
|
||||
{CONFIG_STRING_RU_ATT_TX, NULL, 0, uptr:NULL, defintval:0, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_RU_ATT_RX, NULL, 0, uptr:NULL, defintval:0, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_RU_IS_SLAVE, NULL, 0, strptr:NULL, defstrval:"no", TYPE_STRING, 0}, \
|
||||
{CONFIG_STRING_RU_NBIOTRRC_LIST, NULL, 0, uptr:NULL, defintarrayval:DEFENBS, TYPE_INTARRAY, 1}, \
|
||||
{CONFIG_STRING_RU_SDR_ADDRS, NULL, 0, strptr:NULL, defstrval:"type=b200", TYPE_STRING, 0}, \
|
||||
{CONFIG_STRING_RU_SDR_CLK_SRC, NULL, 0, strptr:NULL, defstrval:"internal", TYPE_STRING, 0}, \
|
||||
{CONFIG_STRING_RU_SDR_TME_SRC, NULL, 0, strptr:NULL, defstrval:"internal", TYPE_STRING, 0}, \
|
||||
{CONFIG_STRING_RU_SF_EXTENSION, NULL, 0, uptr:NULL, defuintval:320, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_RU_END_OF_BURST_DELAY, NULL, 0, uptr:NULL, defuintval:400, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_RU_OTA_SYNC_ENABLE, NULL, 0, strptr:NULL, defstrval:"no", TYPE_STRING, 0}, \
|
||||
{CONFIG_STRING_RU_BF_WEIGHTS_LIST, NULL, 0, iptr:NULL, defintarrayval:DEFBFW, TYPE_INTARRAY, 0}, \
|
||||
{CONFIG_STRING_RU_IF_FREQUENCY, NULL, 0, u64ptr:NULL, defuintval:0, TYPE_UINT64, 0}, \
|
||||
{CONFIG_STRING_RU_IF_FREQ_OFFSET, NULL, 0, iptr:NULL, defintval:0, TYPE_INT, 0}, \
|
||||
{CONFIG_STRING_RU_DO_PRECODING, NULL, 0, iptr:NULL, defintval:0, TYPE_INT, 0}, \
|
||||
{CONFIG_STRING_RU_SF_AHEAD, HLP_RU_SF_AHEAD, 0, iptr:NULL, defintval:4, TYPE_INT, 0}, \
|
||||
{CONFIG_STRING_RU_SL_AHEAD, HLP_RU_SL_AHEAD, 0, iptr:NULL, defintval:6, TYPE_INT, 0}, \
|
||||
{CONFIG_STRING_RU_NR_FLAG, HLP_RU_NR_FLAG, 0, iptr:NULL, defintval:0, TYPE_INT, 0}, \
|
||||
{CONFIG_STRING_RU_NR_SCS_FOR_RASTER, HLP_RU_NR_SCS_FOR_RASTER, 0, iptr:NULL, defintval:1, TYPE_INT, 0}, \
|
||||
{CONFIG_STRING_RU_TX_SUBDEV, NULL, 0, strptr:NULL, defstrval:"", TYPE_STRING, 0}, \
|
||||
{CONFIG_STRING_RU_RX_SUBDEV, NULL, 0, strptr:NULL, defstrval:"", TYPE_STRING, 0}, \
|
||||
{CONFIG_STRING_RU_RXFH_CORE_ID, HLP_RU_RXFH_CORE_ID, 0, uptr:NULL, defintval:0, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_RU_TXFH_CORE_ID, HLP_RU_TXFH_CORE_ID, 0, uptr:NULL, defintval:0, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_RU_TP_CORES, HLP_RU_TP_CORES, 0, uptr:NULL, defintarrayval:DEFRUTPCORES, TYPE_INTARRAY, 8}, \
|
||||
{CONFIG_STRING_RU_NUM_TP_CORES, HLP_RU_NUM_TP_CORES, 0, uptr:NULL, defintval:2, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_RU_NUM_INTERFACES, HLP_RU_NUM_INTERFACES, 0, uptr:NULL, defintval:1, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_RU_HALF_SLOT_PARALLELIZATION, HLP_RU_HALF_SLOT_PARALLELIZATION, 0, uptr:NULL, defintval:1, TYPE_UINT, 0}, \
|
||||
#define RUPARAMS_DESC \
|
||||
{ \
|
||||
{CONFIG_STRING_RU_LOCAL_IF_NAME, NULL, 0, strptr : NULL, defstrval : "lo", TYPE_STRING, 0}, {CONFIG_STRING_RU_LOCAL_ADDRESS, NULL, 0, strptr : NULL, defstrval : "127.0.0.2", TYPE_STRING, 0}, \
|
||||
{CONFIG_STRING_RU_REMOTE_ADDRESS, NULL, 0, strptr : NULL, defstrval : "127.0.0.1", TYPE_STRING, 0}, {CONFIG_STRING_RU_LOCAL_PORTC, NULL, 0, uptr : NULL, defuintval : 50000, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_RU_REMOTE_PORTC, NULL, 0, uptr : NULL, defuintval : 50000, TYPE_UINT, 0}, {CONFIG_STRING_RU_LOCAL_PORTD, NULL, 0, uptr : NULL, defuintval : 50001, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_RU_REMOTE_PORTD, NULL, 0, uptr : NULL, defuintval : 50001, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_RU_TRANSPORT_PREFERENCE, NULL, 0, strptr : NULL, defstrval : "udp_if5", TYPE_STRING, 0}, \
|
||||
{CONFIG_STRING_RU_LOCAL_RF, NULL, 0, strptr : NULL, defstrval : "yes", TYPE_STRING, 0}, {CONFIG_STRING_RU_NB_TX, NULL, 0, uptr : NULL, defuintval : 1, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_RU_NB_RX, NULL, 0, uptr : NULL, defuintval : 1, TYPE_UINT, 0}, {CONFIG_STRING_RU_MAX_RS_EPRE, NULL, 0, iptr : NULL, defintval : -29, TYPE_INT, 0}, \
|
||||
{CONFIG_STRING_RU_MAX_RXGAIN, NULL, 0, iptr : NULL, defintval : 120, TYPE_INT, 0}, {CONFIG_STRING_RU_BAND_LIST, NULL, 0, uptr : NULL, defintarrayval : DEFBANDS, TYPE_INTARRAY, 1}, \
|
||||
{CONFIG_STRING_RU_ENB_LIST, NULL, 0, uptr : NULL, defintarrayval : DEFENBS, TYPE_INTARRAY, 1}, {CONFIG_STRING_RU_ATT_TX, NULL, 0, uptr : NULL, defintval : 0, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_RU_ATT_RX, NULL, 0, uptr : NULL, defintval : 0, TYPE_UINT, 0}, {CONFIG_STRING_RU_IS_SLAVE, NULL, 0, strptr : NULL, defstrval : "no", TYPE_STRING, 0}, \
|
||||
{CONFIG_STRING_RU_NBIOTRRC_LIST, NULL, 0, uptr : NULL, defintarrayval : DEFENBS, TYPE_INTARRAY, 1}, \
|
||||
{CONFIG_STRING_RU_SDR_ADDRS, NULL, 0, strptr : NULL, defstrval : "type=b200", TYPE_STRING, 0}, {CONFIG_STRING_RU_SDR_CLK_SRC, NULL, 0, strptr : NULL, defstrval : "internal", TYPE_STRING, 0}, \
|
||||
{CONFIG_STRING_RU_SDR_TME_SRC, NULL, 0, strptr : NULL, defstrval : "internal", TYPE_STRING, 0}, {CONFIG_STRING_RU_SF_EXTENSION, NULL, 0, uptr : NULL, defuintval : 320, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_RU_END_OF_BURST_DELAY, NULL, 0, uptr : NULL, defuintval : 400, TYPE_UINT, 0}, {CONFIG_STRING_RU_OTA_SYNC_ENABLE, NULL, 0, strptr : NULL, defstrval : "no", TYPE_STRING, 0}, \
|
||||
{CONFIG_STRING_RU_BF_WEIGHTS_LIST, NULL, 0, iptr : NULL, defintarrayval : DEFBFW, TYPE_INTARRAY, 0}, {CONFIG_STRING_RU_IF_FREQUENCY, NULL, 0, u64ptr : NULL, defuintval : 0, TYPE_UINT64, 0}, \
|
||||
{CONFIG_STRING_RU_IF_FREQ_OFFSET, NULL, 0, iptr : NULL, defintval : 0, TYPE_INT, 0}, {CONFIG_STRING_RU_DO_PRECODING, NULL, 0, iptr : NULL, defintval : 0, TYPE_INT, 0}, \
|
||||
{CONFIG_STRING_RU_SF_AHEAD, HLP_RU_SF_AHEAD, 0, iptr : NULL, defintval : 4, TYPE_INT, 0}, {CONFIG_STRING_RU_SL_AHEAD, HLP_RU_SL_AHEAD, 0, iptr : NULL, defintval : 6, TYPE_INT, 0}, \
|
||||
{CONFIG_STRING_RU_NR_FLAG, HLP_RU_NR_FLAG, 0, iptr : NULL, defintval : 0, TYPE_INT, 0}, \
|
||||
{CONFIG_STRING_RU_NR_SCS_FOR_RASTER, HLP_RU_NR_SCS_FOR_RASTER, 0, iptr : NULL, defintval : 1, TYPE_INT, 0}, \
|
||||
{CONFIG_STRING_RU_TX_SUBDEV, NULL, 0, strptr : NULL, defstrval : "", TYPE_STRING, 0}, {CONFIG_STRING_RU_RX_SUBDEV, NULL, 0, strptr : NULL, defstrval : "", TYPE_STRING, 0}, \
|
||||
{CONFIG_STRING_RU_RXFH_CORE_ID, HLP_RU_RXFH_CORE_ID, 0, uptr : NULL, defintval : 0, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_RU_TXFH_CORE_ID, HLP_RU_TXFH_CORE_ID, 0, uptr : NULL, defintval : 0, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_RU_TP_CORES, HLP_RU_TP_CORES, 0, uptr : NULL, defintarrayval : DEFRUTPCORES, TYPE_INTARRAY, 8}, \
|
||||
{CONFIG_STRING_RU_NUM_TP_CORES, HLP_RU_NUM_TP_CORES, 0, uptr : NULL, defintval : 2, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_RU_NUM_INTERFACES, HLP_RU_NUM_INTERFACES, 0, uptr : NULL, defintval : 1, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_RU_HALF_SLOT_PARALLELIZATION, HLP_RU_HALF_SLOT_PARALLELIZATION, 0, uptr : NULL, defintval : 1, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_RU_RU_THREAD_CORE, HLP_RU_RU_THREAD_CORE, 0, uptr : NULL, defintval : -1, TYPE_INT, 0}, \
|
||||
}
|
||||
|
||||
/*---------------------------------------------------------------------------------------------------------------------------------------*/
|
||||
|
||||
@@ -53,28 +53,25 @@
|
||||
#define CONFIG_STRING_L1_PUSCH_DTX_THRESHOLD "pusch_dtx_threshold"
|
||||
#define CONFIG_STRING_L1_SRS_DTX_THRESHOLD "srs_dtx_threshold"
|
||||
#define CONFIG_STRING_L1_MAX_LDPC_ITERATIONS "max_ldpc_iterations"
|
||||
#define CONFIG_STRING_L1_TX_AMP_BACKOFF_dB "tx_amp_backoff_dB"
|
||||
/*----------------------------------------------------------------------------------------------------------------------------------------------------*/
|
||||
/* L1 configuration parameters */
|
||||
/* optname helpstr paramflags XXXptr defXXXval type numelt */
|
||||
/*----------------------------------------------------------------------------------------------------------------------------------------------------*/
|
||||
#define L1PARAMS_DESC { \
|
||||
{CONFIG_STRING_L1_CC, NULL, 0, uptr:NULL, defintval:1, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_L1_TRANSPORT_N_PREFERENCE, NULL, 0, strptr:NULL, defstrval:"local_mac", TYPE_STRING, 0}, \
|
||||
{CONFIG_STRING_L1_LOCAL_N_IF_NAME, NULL, 0, strptr:NULL, defstrval:"lo", TYPE_STRING, 0}, \
|
||||
{CONFIG_STRING_L1_LOCAL_N_ADDRESS, NULL, 0, strptr:NULL, defstrval:"127.0.0.1", TYPE_STRING, 0}, \
|
||||
{CONFIG_STRING_L1_REMOTE_N_ADDRESS, NULL, 0, strptr:NULL, defstrval:"127.0.0.2", TYPE_STRING, 0}, \
|
||||
{CONFIG_STRING_L1_LOCAL_N_PORTC, NULL, 0, uptr:NULL, defintval:50030, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_L1_REMOTE_N_PORTC, NULL, 0, uptr:NULL, defintval:50030, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_L1_LOCAL_N_PORTD, NULL, 0, uptr:NULL, defintval:50031, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_L1_REMOTE_N_PORTD, NULL, 0, uptr:NULL, defintval:50031, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_L1_THREAD_POOL_SIZE, "thread_pool_size paramter removed, please use --thread-pool", 0, uptr:NULL, defintval:2022, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_L1_OFDM_OFFSET_DIVISOR, NULL, 0, uptr:NULL, defuintval:8, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_L1_PUCCH0_DTX_THRESHOLD, NULL, 0, uptr:NULL, defintval:100, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_L1_PRACH_DTX_THRESHOLD, NULL, 0, uptr:NULL, defintval:150, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_L1_PUSCH_DTX_THRESHOLD, NULL, 0, uptr:NULL, defintval:50, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_L1_SRS_DTX_THRESHOLD, NULL, 0, uptr:NULL, defintval:50, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_L1_MAX_LDPC_ITERATIONS, NULL, 0, uptr:NULL, defintval:5, TYPE_UINT, 0}, \
|
||||
}
|
||||
#define L1PARAMS_DESC \
|
||||
{ \
|
||||
{CONFIG_STRING_L1_CC, NULL, 0, uptr : NULL, defintval : 1, TYPE_UINT, 0}, {CONFIG_STRING_L1_TRANSPORT_N_PREFERENCE, NULL, 0, strptr : NULL, defstrval : "local_mac", TYPE_STRING, 0}, \
|
||||
{CONFIG_STRING_L1_LOCAL_N_IF_NAME, NULL, 0, strptr : NULL, defstrval : "lo", TYPE_STRING, 0}, \
|
||||
{CONFIG_STRING_L1_LOCAL_N_ADDRESS, NULL, 0, strptr : NULL, defstrval : "127.0.0.1", TYPE_STRING, 0}, \
|
||||
{CONFIG_STRING_L1_REMOTE_N_ADDRESS, NULL, 0, strptr : NULL, defstrval : "127.0.0.2", TYPE_STRING, 0}, {CONFIG_STRING_L1_LOCAL_N_PORTC, NULL, 0, uptr : NULL, defintval : 50030, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_L1_REMOTE_N_PORTC, NULL, 0, uptr : NULL, defintval : 50030, TYPE_UINT, 0}, {CONFIG_STRING_L1_LOCAL_N_PORTD, NULL, 0, uptr : NULL, defintval : 50031, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_L1_REMOTE_N_PORTD, NULL, 0, uptr : NULL, defintval : 50031, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_L1_THREAD_POOL_SIZE, "thread_pool_size paramter removed, please use --thread-pool", 0, uptr : NULL, defintval : 2022, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_L1_OFDM_OFFSET_DIVISOR, NULL, 0, uptr : NULL, defuintval : 8, TYPE_UINT, 0}, {CONFIG_STRING_L1_PUCCH0_DTX_THRESHOLD, NULL, 0, uptr : NULL, defintval : 100, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_L1_PRACH_DTX_THRESHOLD, NULL, 0, uptr : NULL, defintval : 150, TYPE_UINT, 0}, {CONFIG_STRING_L1_PUSCH_DTX_THRESHOLD, NULL, 0, uptr : NULL, defintval : 50, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_L1_SRS_DTX_THRESHOLD, NULL, 0, uptr : NULL, defintval : 50, TYPE_UINT, 0}, {CONFIG_STRING_L1_MAX_LDPC_ITERATIONS, NULL, 0, uptr : NULL, defintval : 5, TYPE_UINT, 0}, \
|
||||
{CONFIG_STRING_L1_TX_AMP_BACKOFF_dB, NULL, 0, uptr : NULL, defintval : 36, TYPE_UINT, 0}, \
|
||||
}
|
||||
#define L1_CC_IDX 0
|
||||
#define L1_TRANSPORT_N_PREFERENCE_IDX 1
|
||||
#define L1_LOCAL_N_IF_NAME_IDX 2
|
||||
@@ -91,6 +88,7 @@
|
||||
#define L1_PUSCH_DTX_THRESHOLD 13
|
||||
#define L1_SRS_DTX_THRESHOLD 14
|
||||
#define L1_MAX_LDPC_ITERATIONS 15
|
||||
#define L1_TX_AMP_BACKOFF_dB 15
|
||||
|
||||
/*----------------------------------------------------------------------------------------------------------------------------------------------------*/
|
||||
#endif
|
||||
|
||||
@@ -39,6 +39,7 @@
|
||||
/* cell configuration section name */
|
||||
#define GNB_CONFIG_STRING_GNB_LIST "gNBs"
|
||||
|
||||
#define GNB_CONFIG_STRING_PDCCH_CONFIGSIB1 "pdcch_ConfigSIB1"
|
||||
#define GNB_CONFIG_STRING_SERVINGCELLCONFIGCOMMON "servingCellConfigCommon"
|
||||
#define GNB_CONFIG_STRING_PHYSCELLID "physCellId"
|
||||
#define GNB_CONFIG_STRING_NTIMINGADVANCEOFFSET "n_TimingAdvanceOffset"
|
||||
@@ -159,6 +160,19 @@
|
||||
#define GNB_CONFIG_STRING_SCS_ULBWP4 "ul_bwp4_subcarrierSpacing"
|
||||
#define GNB_CONFIG_STRING_FIRSTACTIVEULBWP_ID "firstActiveUplinkBWP-Id"
|
||||
|
||||
/*--------------------------------------------------------------------------------------------------------------------*/
|
||||
/* pdcch_ConfigSIB1 parameters */
|
||||
/*--------------------------------------------------------------------------------------------------------------------*/
|
||||
#define CONTROL_RESOURCE_SET_ZERO "controlResourceSetZero"
|
||||
#define SEARCH_SPACE_ZERO "searchSpaceZero"
|
||||
|
||||
#define PDCCH_CONFIGSIB1PARAMS_DESC(pdcch_ConfigSIB1) { \
|
||||
{CONTROL_RESOURCE_SET_ZERO, NULL, 0, i64ptr:&pdcch_ConfigSIB1->controlResourceSetZero, defintval:0, TYPE_INT64, 0}, \
|
||||
{SEARCH_SPACE_ZERO, NULL, 0, i64ptr:&pdcch_ConfigSIB1->searchSpaceZero, defintval:0, TYPE_INT64, 0} \
|
||||
}
|
||||
|
||||
#define CONTROL_RESOURCE_SET_ZERO_IDX 0
|
||||
#define SEARCH_SPACE_ZERO_IDX 1
|
||||
/*--------------------------------------------------------------------------------------------------------------------*/
|
||||
|
||||
/*-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
|
||||
@@ -172,6 +186,304 @@
|
||||
#define GNB_CONFIG_ABSOLUTEFREQUENCYPOINTA_IDX 7
|
||||
#define GNB_CONFIG_DLCARRIERBANDWIDTH_IDX 10
|
||||
|
||||
#define SCCPARAMS_DESC(scc) \
|
||||
{ \
|
||||
{GNB_CONFIG_STRING_PHYSCELLID, NULL, 0, i64ptr : scc->physCellId, defint64val : 0, TYPE_INT64, 0 /*0*/}, \
|
||||
{GNB_CONFIG_STRING_NTIMINGADVANCEOFFSET, NULL, 0, i64ptr : scc->n_TimingAdvanceOffset, defint64val : NR_ServingCellConfigCommon__n_TimingAdvanceOffset_n25600, TYPE_INT64, 0 /*1*/}, { \
|
||||
GNB_CONFIG_STRING_SSBPERIODICITYSERVINGCELL, \
|
||||
NULL, \
|
||||
0, \
|
||||
i64ptr : scc->ssb_periodicityServingCell, \
|
||||
defint64val : NR_ServingCellConfigCommon__ssb_periodicityServingCell_ms20, \
|
||||
TYPE_INT64, \
|
||||
0 /*2*/ \
|
||||
}, \
|
||||
{GNB_CONFIG_STRING_DMRSTYPEAPOSITION, NULL, 0, i64ptr : &scc->dmrs_TypeA_Position, defint64val : NR_ServingCellConfigCommon__dmrs_TypeA_Position_pos2, TYPE_INT64, 0 /*3*/}, \
|
||||
{GNB_CONFIG_STRING_SUBCARRIERSPACING, NULL, 0, i64ptr : scc->ssbSubcarrierSpacing, defint64val : NR_SubcarrierSpacing_kHz30, TYPE_INT64, 0 /*4*/}, \
|
||||
{GNB_CONFIG_STRING_ABSOLUTEFREQUENCYSSB, NULL, 0, i64ptr : scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB, defint64val : 660960, TYPE_INT64, 0 /*5*/}, \
|
||||
{GNB_CONFIG_STRING_DLFREQUENCYBAND, NULL, 0, i64ptr : scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], defint64val : 78, TYPE_INT64, 0 /*6*/}, \
|
||||
{GNB_CONFIG_STRING_DLABSOLUEFREQUENCYPOINTA, NULL, 0, i64ptr : &scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA, defint64val : 660000, TYPE_INT64, 0 /*7*/}, { \
|
||||
GNB_CONFIG_STRING_DLOFFSETTOCARRIER, \
|
||||
NULL, \
|
||||
0, \
|
||||
i64ptr : &scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier, \
|
||||
defint64val : 0, \
|
||||
TYPE_INT64, \
|
||||
0 /*8*/ \
|
||||
}, \
|
||||
{ \
|
||||
GNB_CONFIG_STRING_DLSUBCARRIERSPACING, \
|
||||
NULL, \
|
||||
0, \
|
||||
i64ptr : &scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing, \
|
||||
defint64val : NR_SubcarrierSpacing_kHz30, \
|
||||
TYPE_INT64, \
|
||||
0 /*9*/ \
|
||||
}, \
|
||||
{ \
|
||||
GNB_CONFIG_STRING_DLCARRIERBANDWIDTH, \
|
||||
NULL, \
|
||||
0, \
|
||||
i64ptr : &scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth, \
|
||||
defint64val : 217, \
|
||||
TYPE_INT64, \
|
||||
0 /*10*/ \
|
||||
}, \
|
||||
{ \
|
||||
GNB_CONFIG_STRING_INITIALDLBWPLOCATIONANDBANDWIDTH, \
|
||||
NULL, \
|
||||
0, \
|
||||
i64ptr : &scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, \
|
||||
defint64val : 13036, \
|
||||
TYPE_INT64, \
|
||||
0 /*11*/ \
|
||||
}, \
|
||||
{ \
|
||||
GNB_CONFIG_STRING_INITIALDLBWPSUBCARRIERSPACING, \
|
||||
NULL, \
|
||||
0, \
|
||||
i64ptr : &scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing, \
|
||||
defint64val : NR_SubcarrierSpacing_kHz30, \
|
||||
TYPE_INT64, \
|
||||
0 /*12*/ \
|
||||
}, \
|
||||
{ \
|
||||
GNB_CONFIG_STRING_INITIALDLBWPCONTROLRESOURCESETZERO, \
|
||||
NULL, \
|
||||
0, \
|
||||
i64ptr : scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->controlResourceSetZero, \
|
||||
defint64val : 12, \
|
||||
TYPE_INT64, \
|
||||
0 /*13*/ \
|
||||
}, \
|
||||
{ \
|
||||
GNB_CONFIG_STRING_INITIALDLBWPSEARCHSPACEZERO, \
|
||||
NULL, \
|
||||
0, \
|
||||
i64ptr : scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->searchSpaceZero, \
|
||||
defint64val : 0, \
|
||||
TYPE_INT64, \
|
||||
0 /*14*/ \
|
||||
}, \
|
||||
{GNB_CONFIG_STRING_ULFREQUENCYBAND, NULL, 0, i64ptr : scc->uplinkConfigCommon->frequencyInfoUL->frequencyBandList->list.array[0], defint64val : -1, TYPE_INT64, 0 /*63*/}, \
|
||||
{GNB_CONFIG_STRING_ULABSOLUEFREQUENCYPOINTA, NULL, 0, i64ptr : scc->uplinkConfigCommon->frequencyInfoUL->absoluteFrequencyPointA, defint64val : -1, TYPE_INT64, 0 /*64*/}, { \
|
||||
GNB_CONFIG_STRING_ULOFFSETTOCARRIER, \
|
||||
NULL, \
|
||||
0, \
|
||||
i64ptr : &scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier, \
|
||||
defint64val : 0, \
|
||||
TYPE_INT64, \
|
||||
0 /*65*/ \
|
||||
}, \
|
||||
{ \
|
||||
GNB_CONFIG_STRING_ULSUBCARRIERSPACING, \
|
||||
NULL, \
|
||||
0, \
|
||||
i64ptr : &scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing, \
|
||||
defint64val : NR_SubcarrierSpacing_kHz30, \
|
||||
TYPE_INT64, \
|
||||
0 /*66*/ \
|
||||
}, \
|
||||
{ \
|
||||
GNB_CONFIG_STRING_ULCARRIERBANDWIDTH, \
|
||||
NULL, \
|
||||
0, \
|
||||
i64ptr : &scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth, \
|
||||
defint64val : 217, \
|
||||
TYPE_INT64, \
|
||||
0 /*67*/ \
|
||||
}, \
|
||||
{GNB_CONFIG_STRING_PMAX, NULL, 0, i64ptr : scc->uplinkConfigCommon->frequencyInfoUL->p_Max, defint64val : 20, TYPE_INT64, 0 /*68*/}, { \
|
||||
GNB_CONFIG_STRING_INITIALULBWPLOCATIONANDBANDWIDTH, \
|
||||
NULL, \
|
||||
0, \
|
||||
i64ptr : &scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, \
|
||||
defint64val : 13036, \
|
||||
TYPE_INT64, \
|
||||
0 /*69*/ \
|
||||
}, \
|
||||
{ \
|
||||
GNB_CONFIG_STRING_INITIALULBWPSUBCARRIERSPACING, \
|
||||
NULL, \
|
||||
0, \
|
||||
i64ptr : &scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing, \
|
||||
defint64val : NR_SubcarrierSpacing_kHz30, \
|
||||
TYPE_INT64, \
|
||||
0 /*70*/ \
|
||||
}, \
|
||||
{ \
|
||||
GNB_CONFIG_STRING_PRACHCONFIGURATIONINDEX, \
|
||||
NULL, \
|
||||
0, \
|
||||
i64ptr : &scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.prach_ConfigurationIndex, \
|
||||
defint64val : 98, \
|
||||
TYPE_INT64, \
|
||||
0 /*71*/ \
|
||||
}, \
|
||||
{ \
|
||||
GNB_CONFIG_STRING_PRACHMSG1FDM, \
|
||||
NULL, \
|
||||
0, \
|
||||
i64ptr : &scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FDM, \
|
||||
defint64val : NR_RACH_ConfigGeneric__msg1_FDM_one, \
|
||||
TYPE_INT64, \
|
||||
0 /*72*/ \
|
||||
}, \
|
||||
{ \
|
||||
GNB_CONFIG_STRING_PRACHMSG1FREQUENCYSTART, \
|
||||
NULL, \
|
||||
0, \
|
||||
i64ptr : &scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FrequencyStart, \
|
||||
defint64val : 0, \
|
||||
TYPE_INT64, \
|
||||
0 /*73*/ \
|
||||
}, \
|
||||
{ \
|
||||
GNB_CONFIG_STRING_ZEROCORRELATIONZONECONFIG, \
|
||||
NULL, \
|
||||
0, \
|
||||
i64ptr : &scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.zeroCorrelationZoneConfig, \
|
||||
defint64val : 13, \
|
||||
TYPE_INT64, \
|
||||
0 /*74*/ \
|
||||
}, \
|
||||
{ \
|
||||
GNB_CONFIG_STRING_PREAMBLERECEIVEDTARGETPOWER, \
|
||||
NULL, \
|
||||
0, \
|
||||
i64ptr : &scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.preambleReceivedTargetPower, \
|
||||
defintval : -118, \
|
||||
TYPE_INT64, \
|
||||
0 /*75*/ \
|
||||
}, \
|
||||
{ \
|
||||
GNB_CONFIG_STRING_PREAMBLETRANSMAX, \
|
||||
NULL, \
|
||||
0, \
|
||||
i64ptr : &scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.preambleTransMax, \
|
||||
defint64val : NR_RACH_ConfigGeneric__preambleTransMax_n10, \
|
||||
TYPE_INT64, \
|
||||
0 /*76*/ \
|
||||
}, \
|
||||
{ \
|
||||
GNB_CONFIG_STRING_POWERRAMPINGSTEP, \
|
||||
NULL, \
|
||||
0, \
|
||||
i64ptr : &scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.powerRampingStep, \
|
||||
defint64val : NR_RACH_ConfigGeneric__powerRampingStep_dB2, \
|
||||
TYPE_INT64, \
|
||||
0 /*77*/ \
|
||||
}, \
|
||||
{ \
|
||||
GNB_CONFIG_STRING_RARESPONSEWINDOW, \
|
||||
NULL, \
|
||||
0, \
|
||||
i64ptr : &scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.ra_ResponseWindow, \
|
||||
defint64val : NR_RACH_ConfigGeneric__ra_ResponseWindow_sl20, \
|
||||
TYPE_INT64, \
|
||||
0 /*78*/ \
|
||||
}, \
|
||||
{ \
|
||||
GNB_CONFIG_STRING_SSBPERRACHOCCASIONANDCBPREAMBLESPERSSBPR, \
|
||||
NULL, \
|
||||
0, \
|
||||
uptr : &scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present, \
|
||||
defuintval : NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR_one, \
|
||||
TYPE_UINT, \
|
||||
0 /*79*/ \
|
||||
}, \
|
||||
{ \
|
||||
GNB_CONFIG_STRING_SSBPERRACHOCCASIONANDCBPREAMBLESPERSSB, \
|
||||
NULL, \
|
||||
0, \
|
||||
i64ptr : &scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->choice.one, \
|
||||
defint64val : NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB__one_n64, \
|
||||
TYPE_INT64, \
|
||||
0 /*80*/ \
|
||||
}, \
|
||||
{ \
|
||||
GNB_CONFIG_STRING_RACONTENTIONRESOLUTIONTIMER, \
|
||||
NULL, \
|
||||
0, \
|
||||
i64ptr : &scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ra_ContentionResolutionTimer, \
|
||||
defint64val : NR_RACH_ConfigCommon__ra_ContentionResolutionTimer_sf64, \
|
||||
TYPE_INT64, \
|
||||
0 /*81*/ \
|
||||
}, \
|
||||
{GNB_CONFIG_STRING_RSRPTHRESHOLDSSB, NULL, 0, i64ptr : scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rsrp_ThresholdSSB, defint64val : 19, TYPE_INT64, 0 /*82*/}, \
|
||||
{ \
|
||||
GNB_CONFIG_STRING_PRACHROOTSEQUENCEINDEXPR, \
|
||||
NULL, \
|
||||
0, \
|
||||
uptr : &scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.present, \
|
||||
defuintval : NR_RACH_ConfigCommon__prach_RootSequenceIndex_PR_l139, \
|
||||
TYPE_UINT, \
|
||||
0 /*83*/ \
|
||||
}, \
|
||||
{ \
|
||||
GNB_CONFIG_STRING_PRACHROOTSEQUENCEINDEX, \
|
||||
NULL, \
|
||||
0, \
|
||||
i64ptr : &scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l139, \
|
||||
defint64val : 0, \
|
||||
TYPE_INT64, \
|
||||
0 /*84*/ \
|
||||
}, \
|
||||
{ \
|
||||
GNB_CONFIG_STRING_RESTRICTEDSETCONFIG, \
|
||||
NULL, \
|
||||
0, \
|
||||
i64ptr : &scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->restrictedSetConfig, \
|
||||
defintval : NR_RACH_ConfigCommon__restrictedSetConfig_unrestrictedSet, \
|
||||
TYPE_INT64, \
|
||||
0 /*85*/ \
|
||||
}, \
|
||||
{GNB_CONFIG_STRING_MSG3TRANSFPREC, NULL, 0, i64ptr : scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder, defintval : 1, TYPE_INT64, 0 /*86*/}, \
|
||||
{GNB_CONFIG_STRING_MSG3DELTAPREABMLE, NULL, 0, i64ptr : scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->msg3_DeltaPreamble, defint64val : 1, TYPE_INT64, 0}, \
|
||||
{GNB_CONFIG_STRING_P0NOMINALWITHGRANT, NULL, 0, i64ptr : scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->p0_NominalWithGrant, defint64val : 1, TYPE_INT64, 0}, { \
|
||||
GNB_CONFIG_STRING_PUCCHGROUPHOPPING, \
|
||||
NULL, \
|
||||
0, \
|
||||
i64ptr : &scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->pucch_GroupHopping, \
|
||||
defint64val : NR_PUCCH_ConfigCommon__pucch_GroupHopping_neither, \
|
||||
TYPE_INT64, \
|
||||
0 \
|
||||
}, \
|
||||
{GNB_CONFIG_STRING_HOPPINGID, NULL, 0, i64ptr : scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->hoppingId, defint64val : 40, TYPE_INT64, 0}, \
|
||||
{GNB_CONFIG_STRING_P0NOMINAL, NULL, 0, i64ptr : scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->p0_nominal, defint64val : 1, TYPE_INT64, 0}, \
|
||||
{GNB_CONFIG_STRING_PUCCHRES, NULL, 0, i64ptr : scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->pucch_ResourceCommon, defint64val : 0, TYPE_INT64, 0}, { \
|
||||
GNB_CONFIG_STRING_SSBPOSITIONSINBURSTPR, \
|
||||
NULL, \
|
||||
0, \
|
||||
uptr : &scc->ssb_PositionsInBurst->present, \
|
||||
defuintval : NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap, \
|
||||
TYPE_UINT, \
|
||||
0 /*140*/ \
|
||||
}, \
|
||||
{GNB_CONFIG_STRING_SSBPOSITIONSINBURST, NULL, 0, u64ptr : &ssb_bitmap, defintval : 0xff, TYPE_UINT64, 0}, \
|
||||
{GNB_CONFIG_STRING_REFERENCESUBCARRIERSPACING, NULL, 0, i64ptr : &scc->tdd_UL_DL_ConfigurationCommon->referenceSubcarrierSpacing, defint64val : NR_SubcarrierSpacing_kHz30, TYPE_INT64, 0}, { \
|
||||
GNB_CONFIG_STRING_DLULTRANSMISSIONPERIODICITY, \
|
||||
NULL, \
|
||||
0, \
|
||||
i64ptr : &scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity, \
|
||||
defint64val : NR_TDD_UL_DL_Pattern__dl_UL_TransmissionPeriodicity_ms0p5, \
|
||||
TYPE_INT64, \
|
||||
0 \
|
||||
}, \
|
||||
{GNB_CONFIG_STRING_NROFDOWNLINKSLOTS, NULL, 0, i64ptr : &scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots, defint64val : 7, TYPE_INT64, 0}, \
|
||||
{GNB_CONFIG_STRING_NROFDOWNLINKSYMBOLS, NULL, 0, i64ptr : &scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols, defint64val : 6, TYPE_INT64, 0}, \
|
||||
{GNB_CONFIG_STRING_NROFUPLINKSLOTS, NULL, 0, i64ptr : &scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots, defint64val : 2, TYPE_INT64, 0}, \
|
||||
{GNB_CONFIG_STRING_NROFUPLINKSYMBOLS, NULL, 0, i64ptr : &scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols, defint64val : 4, TYPE_INT64, 0}, \
|
||||
{GNB_CONFIG_STRING_DLULTRANSMISSIONPERIODICITY2, NULL, 0, i64ptr : &scc->tdd_UL_DL_ConfigurationCommon->pattern2->dl_UL_TransmissionPeriodicity, defintval : -1, TYPE_INT64, 0}, \
|
||||
{GNB_CONFIG_STRING_NROFDOWNLINKSLOTS2, NULL, 0, i64ptr : &scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofDownlinkSlots, defint64val : -1, TYPE_INT64, 0}, \
|
||||
{GNB_CONFIG_STRING_NROFDOWNLINKSYMBOLS2, NULL, 0, i64ptr : &scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofDownlinkSymbols, defint64val : -1, TYPE_INT64, 0}, \
|
||||
{GNB_CONFIG_STRING_NROFUPLINKSLOTS2, NULL, 0, i64ptr : &scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofUplinkSlots, defint64val : -1, TYPE_INT64, 0}, \
|
||||
{GNB_CONFIG_STRING_NROFUPLINKSYMBOLS2, NULL, 0, i64ptr : &scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofUplinkSymbols, defint64val : -1, TYPE_INT64, 0}, \
|
||||
{GNB_CONFIG_STRING_SSPBCHBLOCKPOWER, NULL, 0, i64ptr : &scc->ss_PBCH_BlockPower, defint64val : 20, TYPE_INT64, 0}, \
|
||||
{ \
|
||||
GNB_CONFIG_STRING_MSG1SUBCARRIERSPACING, NULL, 0, i64ptr : scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing, defintval : -1, TYPE_INT64, 0 \
|
||||
} \
|
||||
}
|
||||
|
||||
#define SCCPARAMS_DESC(scc) { \
|
||||
{GNB_CONFIG_STRING_PHYSCELLID,NULL,0,i64ptr:scc->physCellId,defint64val:0,TYPE_INT64,0/*0*/}, \
|
||||
|
||||
@@ -119,7 +119,8 @@ void prepare_scc(NR_ServingCellConfigCommon_t *scc) {
|
||||
scc->ssbSubcarrierSpacing = CALLOC(1,sizeof(NR_SubcarrierSpacing_t));
|
||||
scc->tdd_UL_DL_ConfigurationCommon = CALLOC(1,sizeof(struct NR_TDD_UL_DL_ConfigCommon));
|
||||
scc->tdd_UL_DL_ConfigurationCommon->pattern2 = CALLOC(1,sizeof(struct NR_TDD_UL_DL_Pattern));
|
||||
|
||||
|
||||
scc->n_TimingAdvanceOffset=CALLOC(1,sizeof(*scc->n_TimingAdvanceOffset));
|
||||
scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB = CALLOC(1,sizeof(NR_ARFCN_ValueNR_t));
|
||||
|
||||
dl_frequencyBandList = CALLOC(1,sizeof(NR_FreqBandIndicatorNR_t));
|
||||
@@ -769,6 +770,8 @@ void RCconfig_NR_L1(void)
|
||||
RC.gNB[j]->pusch_thres = *(L1_ParamList.paramarray[j][L1_PUSCH_DTX_THRESHOLD].uptr);
|
||||
RC.gNB[j]->srs_thres = *(L1_ParamList.paramarray[j][L1_SRS_DTX_THRESHOLD].uptr);
|
||||
RC.gNB[j]->max_ldpc_iterations = *(L1_ParamList.paramarray[j][L1_MAX_LDPC_ITERATIONS].uptr);
|
||||
RC.gNB[j]->TX_AMP = (int16_t)(32767.0/pow(10.0,.05*(double)(*L1_ParamList.paramarray[j][L1_TX_AMP_BACKOFF_dB].uptr)));
|
||||
LOG_I(PHY,"TX_AMP = %d (-%d dBFS)\n",RC.gNB[j]->TX_AMP,*L1_ParamList.paramarray[j][L1_TX_AMP_BACKOFF_dB].uptr);
|
||||
if (strcmp(*(L1_ParamList.paramarray[j][L1_TRANSPORT_N_PREFERENCE_IDX].strptr), "local_mac") == 0) {
|
||||
// sf_ahead = 2; // Need 4 subframe gap between RX and TX
|
||||
} else if (strcmp(*(L1_ParamList.paramarray[j][L1_TRANSPORT_N_PREFERENCE_IDX].strptr), "nfapi") == 0) {
|
||||
|
||||
@@ -163,7 +163,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
|
||||
if ((ssb_start_symbol/14) == rel_slot){
|
||||
const int prb_offset = offset_pointa >> scs;
|
||||
schedule_ssb(frameP, slotP, scc, dl_req, i_ssb, ssbSubcarrierOffset, offset_pointa, (*(uint32_t*)cc->MIB_pdu.payload) & ((1<<24)-1));
|
||||
fill_ssb_vrb_map(cc, prb_offset, ssbSubcarrierOffset, ssb_start_symbol, CC_id);
|
||||
fill_ssb_vrb_map(cc, prb_offset, ssbSubcarrierOffset, ssb_start_symbol % NR_SYMBOLS_PER_SLOT, CC_id);
|
||||
if (get_softmodem_params()->sa == 1) {
|
||||
get_type0_PDCCH_CSS_config_parameters(&gNB->type0_PDCCH_CSS_config[i_ssb],
|
||||
frameP,
|
||||
@@ -192,7 +192,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
|
||||
if ((ssb_start_symbol/14) == rel_slot){
|
||||
const int prb_offset = offset_pointa >> scs;
|
||||
schedule_ssb(frameP, slotP, scc, dl_req, i_ssb, ssbSubcarrierOffset, offset_pointa, (*(uint32_t*)cc->MIB_pdu.payload) & ((1<<24)-1));
|
||||
fill_ssb_vrb_map(cc, prb_offset, ssbSubcarrierOffset, ssb_start_symbol, CC_id);
|
||||
fill_ssb_vrb_map(cc, prb_offset, ssbSubcarrierOffset, ssb_start_symbol % NR_SYMBOLS_PER_SLOT, CC_id);
|
||||
if (get_softmodem_params()->sa == 1) {
|
||||
get_type0_PDCCH_CSS_config_parameters(&gNB->type0_PDCCH_CSS_config[i_ssb],
|
||||
frameP,
|
||||
@@ -222,7 +222,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
|
||||
if ((ssb_start_symbol/14) == rel_slot){
|
||||
const int prb_offset = offset_pointa >> (scs-2); // reference 60kHz
|
||||
schedule_ssb(frameP, slotP, scc, dl_req, i_ssb, ssbSubcarrierOffset, offset_pointa, (*(uint32_t*)cc->MIB_pdu.payload) & ((1<<24)-1));
|
||||
fill_ssb_vrb_map(cc, prb_offset, ssbSubcarrierOffset, ssb_start_symbol, CC_id);
|
||||
fill_ssb_vrb_map(cc, prb_offset, ssbSubcarrierOffset, ssb_start_symbol % NR_SYMBOLS_PER_SLOT, CC_id);
|
||||
const NR_TDD_UL_DL_Pattern_t *tdd = &scc->tdd_UL_DL_ConfigurationCommon->pattern1;
|
||||
const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
|
||||
// FR2 is only TDD, to be fixed for flexible TDD
|
||||
|
||||
@@ -1163,7 +1163,6 @@ void prepare_dci(const NR_CellGroupConfig_t *CellGroup,
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
|
||||
const NR_CellGroupConfig_t *CellGroup,
|
||||
const NR_UE_DL_BWP_t *current_DL_BWP,
|
||||
@@ -1177,47 +1176,65 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
|
||||
NR_ControlResourceSet_t *coreset,
|
||||
uint16_t cset0_bwp_size)
|
||||
{
|
||||
|
||||
uint8_t fsize = 0, pos = 0;
|
||||
gNB_MAC_INST *gNB_mac = RC.nrmac[0];
|
||||
|
||||
uint64_t *dci_pdu = (uint64_t *)pdcch_dci_pdu->Payload;
|
||||
*dci_pdu = 0;
|
||||
uint16_t alt_size = 0;
|
||||
uint16_t N_RB;
|
||||
const int controlResourceSetId = *ss->controlResourceSetId;
|
||||
if(current_DL_BWP) {
|
||||
N_RB = get_rb_bwp_dci(dci_format,
|
||||
ss->searchSpaceType->present,
|
||||
cset0_bwp_size,
|
||||
current_UL_BWP->BWPSize,
|
||||
current_DL_BWP->BWPSize,
|
||||
current_UL_BWP->initial_BWPSize,
|
||||
current_DL_BWP->initial_BWPSize);
|
||||
if (current_DL_BWP) {
|
||||
N_RB = get_rb_bwp_dci(dci_format, ss->searchSpaceType->present, cset0_bwp_size, current_UL_BWP->BWPSize, current_DL_BWP->BWPSize, current_UL_BWP->initial_BWPSize, current_DL_BWP->initial_BWPSize);
|
||||
|
||||
// computing alternative size for padding
|
||||
dci_pdu_rel15_t temp_pdu;
|
||||
if(dci_format == NR_DL_DCI_FORMAT_1_0)
|
||||
if (dci_format == NR_DL_DCI_FORMAT_1_0)
|
||||
alt_size = nr_dci_size(scc->downlinkConfigCommon->initialDownlinkBWP,
|
||||
scc->uplinkConfigCommon->initialUplinkBWP,
|
||||
current_DL_BWP, current_UL_BWP,
|
||||
CellGroup, &temp_pdu, NR_UL_DCI_FORMAT_0_0, rnti_type,
|
||||
controlResourceSetId, bwp_id, ss->searchSpaceType->present, cset0_bwp_size, 0);
|
||||
current_DL_BWP,
|
||||
current_UL_BWP,
|
||||
CellGroup,
|
||||
&temp_pdu,
|
||||
NR_UL_DCI_FORMAT_0_0,
|
||||
rnti_type,
|
||||
controlResourceSetId,
|
||||
bwp_id,
|
||||
ss->searchSpaceType->present,
|
||||
cset0_bwp_size,
|
||||
0);
|
||||
|
||||
if(dci_format == NR_UL_DCI_FORMAT_0_0)
|
||||
if (dci_format == NR_UL_DCI_FORMAT_0_0)
|
||||
alt_size = nr_dci_size(scc->downlinkConfigCommon->initialDownlinkBWP,
|
||||
scc->uplinkConfigCommon->initialUplinkBWP,
|
||||
current_DL_BWP, current_UL_BWP,
|
||||
CellGroup, &temp_pdu, NR_DL_DCI_FORMAT_1_0, rnti_type,
|
||||
controlResourceSetId, bwp_id, ss->searchSpaceType->present, cset0_bwp_size, 0);
|
||||
current_DL_BWP,
|
||||
current_UL_BWP,
|
||||
CellGroup,
|
||||
&temp_pdu,
|
||||
NR_DL_DCI_FORMAT_1_0,
|
||||
rnti_type,
|
||||
controlResourceSetId,
|
||||
bwp_id,
|
||||
ss->searchSpaceType->present,
|
||||
cset0_bwp_size,
|
||||
0);
|
||||
|
||||
}
|
||||
else
|
||||
} else
|
||||
N_RB = cset0_bwp_size;
|
||||
|
||||
int dci_size = nr_dci_size(scc->downlinkConfigCommon->initialDownlinkBWP,
|
||||
scc->uplinkConfigCommon->initialUplinkBWP,
|
||||
current_DL_BWP, current_UL_BWP,
|
||||
CellGroup, dci_pdu_rel15, dci_format, rnti_type, controlResourceSetId,
|
||||
bwp_id, ss->searchSpaceType->present, cset0_bwp_size, alt_size);
|
||||
current_DL_BWP,
|
||||
current_UL_BWP,
|
||||
CellGroup,
|
||||
dci_pdu_rel15,
|
||||
dci_format,
|
||||
rnti_type,
|
||||
controlResourceSetId,
|
||||
bwp_id,
|
||||
ss->searchSpaceType->present,
|
||||
cset0_bwp_size,
|
||||
alt_size);
|
||||
pdcch_dci_pdu->PayloadSizeBits = dci_size;
|
||||
AssertFatal(dci_size <= 64, "DCI sizes above 64 bits not yet supported");
|
||||
if (dci_format == NR_DL_DCI_FORMAT_1_1 || dci_format == NR_UL_DCI_FORMAT_0_1)
|
||||
@@ -1406,8 +1423,13 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
|
||||
// Time domain assignment 4 bit
|
||||
for (int i = 0; i < 4; i++)
|
||||
*dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment.val >> (3 - i)) & 1) << (dci_size - pos++);
|
||||
|
||||
LOG_D(NR_MAC, "dci_pdu_rel15->time_domain_assignment.val = %i\n", dci_pdu_rel15->time_domain_assignment.val);
|
||||
// VRB to PRB mapping 1 bit
|
||||
if (gNB_mac->sched_ctrlCommon->sched_pdcch.CceRegMappingType) {
|
||||
dci_pdu_rel15->vrb_to_prb_mapping.val = 1;
|
||||
}
|
||||
|
||||
*dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping.val & 1) << (dci_size - pos++);
|
||||
LOG_D(NR_MAC, "dci_pdu_rel15->vrb_to_prb_mapping.val = %i\n", dci_pdu_rel15->vrb_to_prb_mapping.val);
|
||||
// MCS 5bit //bit over 32, so dci_pdu ++
|
||||
@@ -2205,9 +2227,7 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
|
||||
UL_BWP->tdaList = scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
|
||||
|
||||
// setting generic parameters
|
||||
NR_BWP_t dl_genericParameters = (DL_BWP->bwp_id > 0 && dl_bwp) ?
|
||||
dl_bwp->bwp_Common->genericParameters:
|
||||
scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters;
|
||||
NR_BWP_t dl_genericParameters = (DL_BWP->bwp_id > 0 && dl_bwp) ? dl_bwp->bwp_Common->genericParameters : scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters;
|
||||
|
||||
DL_BWP->scs = dl_genericParameters.subcarrierSpacing;
|
||||
DL_BWP->cyclicprefix = dl_genericParameters.cyclicPrefix;
|
||||
@@ -2216,9 +2236,7 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
|
||||
DL_BWP->initial_BWPSize = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
|
||||
DL_BWP->initial_BWPStart = NRRIV2PRBOFFSET(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
|
||||
|
||||
NR_BWP_t ul_genericParameters = (UL_BWP->bwp_id > 0 && ul_bwp) ?
|
||||
ul_bwp->bwp_Common->genericParameters:
|
||||
scc->uplinkConfigCommon->initialUplinkBWP->genericParameters;
|
||||
NR_BWP_t ul_genericParameters = (UL_BWP->bwp_id > 0 && ul_bwp) ? ul_bwp->bwp_Common->genericParameters : scc->uplinkConfigCommon->initialUplinkBWP->genericParameters;
|
||||
|
||||
UL_BWP->scs = ul_genericParameters.subcarrierSpacing;
|
||||
UL_BWP->cyclicprefix = ul_genericParameters.cyclicPrefix;
|
||||
@@ -2238,7 +2256,6 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
|
||||
UL_BWP->pucch_ConfigCommon = scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup;
|
||||
|
||||
if(UE) {
|
||||
|
||||
// Reset required fields in sched_ctrl (e.g. ul_ri and tpmi)
|
||||
reset_sched_ctrl(sched_ctrl);
|
||||
|
||||
@@ -2316,17 +2333,9 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
|
||||
|
||||
long *ul_mcs_Table = NULL;
|
||||
if (UL_BWP->pusch_Config)
|
||||
ul_mcs_Table = UL_BWP->transform_precoding ?
|
||||
UL_BWP->pusch_Config->mcs_Table :
|
||||
UL_BWP->pusch_Config->mcs_TableTransformPrecoder;
|
||||
|
||||
UL_BWP->mcs_table = get_pusch_mcs_table(ul_mcs_Table,
|
||||
UL_BWP->transform_precoding ? 0 : 1,
|
||||
UL_BWP->dci_format,
|
||||
NR_RNTI_C,
|
||||
target_ss,
|
||||
false);
|
||||
ul_mcs_Table = UL_BWP->transform_precoding ? UL_BWP->pusch_Config->mcs_Table : UL_BWP->pusch_Config->mcs_TableTransformPrecoder;
|
||||
|
||||
UL_BWP->mcs_table = get_pusch_mcs_table(ul_mcs_Table, UL_BWP->transform_precoding ? 0 : 1, UL_BWP->dci_format, NR_RNTI_C, target_ss, false);
|
||||
}
|
||||
|
||||
void reset_srs_stats(NR_UE_info_t *UE) {
|
||||
@@ -2567,18 +2576,15 @@ uint8_t nr_get_tpc(int target, uint8_t cqi, int incr) {
|
||||
return 1; // no change
|
||||
}
|
||||
|
||||
|
||||
int get_pdsch_to_harq_feedback(NR_PUCCH_Config_t *pucch_Config,
|
||||
nr_dci_format_t dci_format,
|
||||
uint8_t *pdsch_to_harq_feedback) {
|
||||
|
||||
int get_pdsch_to_harq_feedback(NR_PUCCH_Config_t *pucch_Config, nr_dci_format_t dci_format, uint8_t *pdsch_to_harq_feedback)
|
||||
{
|
||||
if (dci_format == NR_DL_DCI_FORMAT_1_0) {
|
||||
for (int i = 0; i < 8; i++)
|
||||
pdsch_to_harq_feedback[i] = i + 1;
|
||||
return 8;
|
||||
}
|
||||
else {
|
||||
AssertFatal(pucch_Config != NULL && pucch_Config->dl_DataToUL_ACK != NULL,"dl_DataToUL_ACK shouldn't be null here\n");
|
||||
AssertFatal(pucch_Config != NULL && pucch_Config->dl_DataToUL_ACK != NULL, "dl_DataToUL_ACK shouldn't be null here\n");
|
||||
for (int i = 0; i < pucch_Config->dl_DataToUL_ACK->list.count; i++) {
|
||||
pdsch_to_harq_feedback[i] = *pucch_Config->dl_DataToUL_ACK->list.array[i];
|
||||
}
|
||||
@@ -2899,8 +2905,8 @@ void schedule_nr_bwp_switch(module_id_t module_id,
|
||||
}
|
||||
}
|
||||
|
||||
void UL_tti_req_ahead_initialization(gNB_MAC_INST * gNB, NR_ServingCellConfigCommon_t *scc, int n, int CCid, frame_t frameP) {
|
||||
|
||||
void UL_tti_req_ahead_initialization(gNB_MAC_INST *gNB, NR_ServingCellConfigCommon_t *scc, int n, int CCid, frame_t frameP)
|
||||
{
|
||||
if(gNB->UL_tti_req_ahead[CCid]) return;
|
||||
|
||||
gNB->UL_tti_req_ahead[CCid] = calloc(n, sizeof(nfapi_nr_ul_tti_request_t));
|
||||
@@ -2911,7 +2917,7 @@ void UL_tti_req_ahead_initialization(gNB_MAC_INST * gNB, NR_ServingCellConfigCom
|
||||
* already "in the past" and thus we put frame 1 instead of 0! */
|
||||
for (int i = 0; i < n; ++i) {
|
||||
nfapi_nr_ul_tti_request_t *req = &gNB->UL_tti_req_ahead[CCid][i];
|
||||
req->SFN = frameP + (i < (gNB->if_inst->sl_ahead-1));
|
||||
req->SFN = frameP + (i < (gNB->if_inst->sl_ahead - 1));
|
||||
req->Slot = i;
|
||||
}
|
||||
}
|
||||
|
||||
810
radio/ETHERNET/oran/5g/oran.cpp
Normal file
810
radio/ETHERNET/oran/5g/oran.cpp
Normal file
@@ -0,0 +1,810 @@
|
||||
/*
|
||||
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership.
|
||||
* The OpenAirInterface Software Alliance licenses this file to You under
|
||||
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
|
||||
* except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.openairinterface.org/?page_id=698
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*-------------------------------------------------------------------------------
|
||||
* For more information about the OpenAirInterface (OAI) Software Alliance:
|
||||
* contact@openairinterface.org
|
||||
*/
|
||||
|
||||
#include <stdio.h>
|
||||
#include "oran_isolate.h"
|
||||
#include "xran_lib_wrap.hpp"
|
||||
#include "common.hpp"
|
||||
#include "xran_compression.h"
|
||||
#include "xran_sync_api.h"
|
||||
|
||||
// Declare variable useful for the send buffer function
|
||||
struct xran_device_ctx *p_xran_dev_ctx_2;
|
||||
volatile uint8_t first_call_set = 0;
|
||||
volatile uint8_t first_rx_set = 0;
|
||||
|
||||
// Variable declaration useful for fill IQ samples from file
|
||||
#define IQ_PLAYBACK_BUFFER_BYTES (XRAN_NUM_OF_SLOT_IN_TDD_LOOP * N_SYM_PER_SLOT * XRAN_MAX_PRBS * N_SC_PER_PRB * 4L)
|
||||
int16_t *p_tx_play_buffer[MAX_ANT_CARRIER_SUPPORTED];
|
||||
int iq_playback_buffer_size_dl = IQ_PLAYBACK_BUFFER_BYTES;
|
||||
int32_t tx_play_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
|
||||
int32_t tx_play_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
|
||||
int rx_tti;
|
||||
int rx_sym;
|
||||
volatile uint32_t rx_cb_tti = 0;
|
||||
volatile uint32_t rx_cb_frame = 0;
|
||||
volatile uint32_t rx_cb_subframe = 0;
|
||||
volatile uint32_t rx_cb_slot = 0;
|
||||
|
||||
#define GetFrameNum(tti, SFNatSecStart, numSubFramePerSystemFrame, numSlotPerSubFrame) \
|
||||
((((uint32_t)tti / ((uint32_t)numSubFramePerSystemFrame * (uint32_t)numSlotPerSubFrame)) + SFNatSecStart) & 0x3FF)
|
||||
#define GetSlotNum(tti, numSlotPerSfn) ((uint32_t)tti % ((uint32_t)numSlotPerSfn))
|
||||
|
||||
// Declare the function useful to load IQs from file
|
||||
int sys_load_file_to_buff(char *filename, char *bufname, unsigned char *pBuffer, unsigned int size, unsigned int buffers_num)
|
||||
{
|
||||
unsigned int file_size = 0;
|
||||
int num = 0;
|
||||
|
||||
if (size) {
|
||||
if (filename && bufname) {
|
||||
FILE *file;
|
||||
printf("Loading file %s to %s: ", filename, bufname);
|
||||
file = fopen(filename, "rb");
|
||||
|
||||
if (file == NULL) {
|
||||
printf("can't open file %s!!!", filename);
|
||||
exit(-1);
|
||||
} else {
|
||||
fseek(file, 0, SEEK_END);
|
||||
file_size = ftell(file);
|
||||
fseek(file, 0, SEEK_SET);
|
||||
|
||||
if ((file_size > size) || (file_size == 0))
|
||||
file_size = size;
|
||||
|
||||
printf("Reading IQ samples from file: File Size: %d [Buffer Size: %d]\n", file_size, size);
|
||||
|
||||
num = fread(pBuffer, buffers_num, size, file);
|
||||
fflush(file);
|
||||
fclose(file);
|
||||
printf("from addr (0x%lx) size (%d) bytes num (%d)", (uint64_t)pBuffer, file_size, num);
|
||||
}
|
||||
printf(" \n");
|
||||
|
||||
} else {
|
||||
printf(" the file name, buffer name are not set!!!");
|
||||
}
|
||||
} else {
|
||||
printf(" the %s is free: size = %d bytes!!!", bufname, size);
|
||||
}
|
||||
return num;
|
||||
}
|
||||
|
||||
void xran_fh_rx_callback(void *pCallbackTag, xran_status_t status)
|
||||
{
|
||||
xran_cb_tag *callback_tag = (xran_cb_tag *)pCallbackTag;
|
||||
uint64_t second;
|
||||
uint32_t tti;
|
||||
uint32_t frame;
|
||||
uint32_t subframe;
|
||||
uint32_t slot;
|
||||
tti = xran_get_slot_idx(&frame, &subframe, &slot, &second);
|
||||
|
||||
rx_tti = callback_tag->slotiId;
|
||||
rx_sym = callback_tag->symbol;
|
||||
if (rx_sym == 7) {
|
||||
if (first_call_set) {
|
||||
if (!first_rx_set) {
|
||||
printf("first_rx is set\n");
|
||||
}
|
||||
first_rx_set = 1;
|
||||
}
|
||||
rx_cb_tti = tti;
|
||||
rx_cb_frame = frame;
|
||||
rx_cb_subframe = subframe;
|
||||
rx_cb_slot = slot;
|
||||
}
|
||||
}
|
||||
void xran_fh_srs_callback(void *pCallbackTag, xran_status_t status)
|
||||
{
|
||||
rte_pause();
|
||||
}
|
||||
void xran_fh_rx_prach_callback(void *pCallbackTag, xran_status_t status)
|
||||
{
|
||||
rte_pause();
|
||||
}
|
||||
|
||||
int physide_dl_tti_call_back(void *param)
|
||||
{
|
||||
if (!first_call_set)
|
||||
printf("first_call set from phy cb first_call_set=%p\n", &first_call_set);
|
||||
first_call_set = 1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int physide_ul_half_slot_call_back(void *param)
|
||||
{
|
||||
rte_pause();
|
||||
return 0;
|
||||
}
|
||||
|
||||
int physide_ul_full_slot_call_back(void *param)
|
||||
{
|
||||
rte_pause();
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
void *define_oran_pointer()
|
||||
{
|
||||
xranLibWraper *xranlib;
|
||||
xranlib = new xranLibWraper;
|
||||
// xranLibWraper *xranlib = (xranLibWraper*) calloc(1,sizeof(xranLibWraper));
|
||||
|
||||
return xranlib;
|
||||
}
|
||||
|
||||
void dump_oran_config(void *xranlib_)
|
||||
{
|
||||
xranLibWraper *xranlib = ((xranLibWraper *)xranlib_);
|
||||
int numerology = xranlib->get_numerology();
|
||||
int duplex_type = xranlib->get_duplextype();
|
||||
int num_cc = xranlib->get_num_cc();
|
||||
int num_eaxc = xranlib->get_num_eaxc();
|
||||
int num_eaxc_ul = xranlib->get_num_eaxc_ul();
|
||||
int ndlrbs = xranlib->get_num_dlrbs();
|
||||
int nulrbs = xranlib->get_num_ulrbs();
|
||||
|
||||
printf("**--**--**--**--**--**--**--**--**--**--**--**\n");
|
||||
printf("ORAN Configuration\n");
|
||||
printf("* Numerology = %d\n", numerology);
|
||||
printf("* Duplex Type = %d\n", duplex_type);
|
||||
printf("* Number CC = %d\n", num_cc);
|
||||
printf("* Number eAxc = %d\n", num_eaxc);
|
||||
printf("* Number eAxc UL = %d\n", num_eaxc_ul);
|
||||
printf("* Number RBs DL = %d\n", ndlrbs);
|
||||
printf("* Number RBs UL = %d\n", nulrbs);
|
||||
printf("**--**--**--**--**--**--**--**--**--**--**--**\n");
|
||||
}
|
||||
|
||||
int setup_oran(void *xranlib_)
|
||||
{
|
||||
xranLibWraper *xranlib = ((xranLibWraper *)xranlib_);
|
||||
if (xranlib->SetUp() < 0) {
|
||||
return (-1);
|
||||
}
|
||||
return (0);
|
||||
}
|
||||
|
||||
int open_oran_callback(void *xranlib_)
|
||||
{
|
||||
xranLibWraper *xranlib = ((xranLibWraper *)xranlib_);
|
||||
xranlib->Open(nullptr, nullptr, (void *)xran_fh_rx_callback, (void *)xran_fh_rx_prach_callback, (void *)xran_fh_srs_callback);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
int open_oran(void *xranlib_)
|
||||
{
|
||||
xranLibWraper *xranlib = ((xranLibWraper *)xranlib_);
|
||||
struct xran_fh_config *pCfg = (struct xran_fh_config *)malloc(sizeof(struct xran_fh_config));
|
||||
assert(pCfg != NULL);
|
||||
xranlib->get_cfg_fh(pCfg);
|
||||
xran_open(xranlib->get_xranhandle(), pCfg);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
int initialize_oran(void *xranlib_)
|
||||
{
|
||||
xranLibWraper *xranlib = ((xranLibWraper *)xranlib_);
|
||||
|
||||
xranlib->Init();
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
int start_oran(void *xranlib_)
|
||||
{
|
||||
xranLibWraper *xranlib = ((xranLibWraper *)xranlib_);
|
||||
xranlib->Start();
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
int stop_oran(void *xranlib_)
|
||||
{
|
||||
xranLibWraper *xranlib = ((xranLibWraper *)xranlib_);
|
||||
xranlib->Stop();
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
int close_oran(void *xranlib_)
|
||||
{
|
||||
xranLibWraper *xranlib = ((xranLibWraper *)xranlib_);
|
||||
xranlib->Close();
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
int register_physide_callbacks(void *xranlib_)
|
||||
{
|
||||
xranLibWraper *xranlib = ((xranLibWraper *)xranlib_);
|
||||
|
||||
xran_reg_physide_cb(xranlib->get_xranhandle(), physide_dl_tti_call_back, xranlib, 1, XRAN_CB_TTI);
|
||||
xran_reg_physide_cb(xranlib->get_xranhandle(), physide_ul_half_slot_call_back, NULL, 10, XRAN_CB_HALF_SLOT_RX);
|
||||
xran_reg_physide_cb(xranlib->get_xranhandle(), physide_ul_full_slot_call_back, NULL, 10, XRAN_CB_FULL_SLOT_RX);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
int load_iq_from_file(void *xranlib_)
|
||||
{
|
||||
xranLibWraper *xranlib = ((xranLibWraper *)xranlib_);
|
||||
|
||||
int numCCPorts_ = xranlib->get_num_cc();
|
||||
int num_eAxc_ = xranlib->get_num_eaxc();
|
||||
|
||||
printf("numCCPorts_ =%d, num_eAxc_=%d, MAX_ANT_CARRIER_SUPPORTED =%d\n", numCCPorts_, num_eAxc_, MAX_ANT_CARRIER_SUPPORTED);
|
||||
|
||||
int i;
|
||||
const char *IQ_filename[MAX_ANT_CARRIER_SUPPORTED];
|
||||
for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED; i++) {
|
||||
if ((i == 0) || (i == 1) || (i == 2) || (i == 3)) {
|
||||
IQ_filename[0] = "/home/oba/PISONS/phy/fhi_lib/app/usecase/mu0_5mhz/ant_0.bin";
|
||||
IQ_filename[1] = "/home/oba/PISONS/phy/fhi_lib/app/usecase/mu0_5mhz/ant_1.bin";
|
||||
IQ_filename[2] = "/home/oba/PISONS/phy/fhi_lib/app/usecase/mu0_5mhz/ant_2.bin";
|
||||
IQ_filename[3] = "/home/oba/PISONS/phy/fhi_lib/app/usecase/mu0_5mhz/ant_3.bin";
|
||||
} else {
|
||||
IQ_filename[i] = "/0";
|
||||
}
|
||||
}
|
||||
|
||||
int32_t number_slots = 40; // According to wrapper.hpp uint32_t m_nSlots = 10; but for the file 5MHz is set to 40
|
||||
uint32_t numerology = xranlib->get_numerology(); // According to the conf file is mu number
|
||||
uint32_t bandwidth = 5; // According to the wrapper.hpp since we are reading the 5MHz files
|
||||
uint32_t sub6 = xranlib->get_sub6();
|
||||
iq_playback_buffer_size_dl = (number_slots * N_SYM_PER_SLOT * N_SC_PER_PRB * xranlib->get_num_rbs(numerology, bandwidth, sub6) * 4L);
|
||||
const char *string_msg = "DL IFFT IN IQ Samples in binary format";
|
||||
|
||||
for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (int32_t)(numCCPorts_ * num_eAxc_); i++) {
|
||||
char *name = const_cast<char *>(IQ_filename[i]);
|
||||
char *string = const_cast<char *>(string_msg);
|
||||
if (((uint8_t *)IQ_filename[i])[0] != 0) {
|
||||
p_tx_play_buffer[i] = (int16_t *)malloc(iq_playback_buffer_size_dl);
|
||||
assert(NULL != (p_tx_play_buffer[i]));
|
||||
tx_play_buffer_size[i] = (int32_t)iq_playback_buffer_size_dl;
|
||||
|
||||
printf("Loading file [%d] %s \n", i, IQ_filename[i]);
|
||||
tx_play_buffer_size[i] = sys_load_file_to_buff(name, string, (uint8_t *)p_tx_play_buffer[i], tx_play_buffer_size[i], 1);
|
||||
tx_play_buffer_position[i] = 0;
|
||||
} else {
|
||||
p_tx_play_buffer[i] = (int16_t *)malloc(iq_playback_buffer_size_dl);
|
||||
tx_play_buffer_size[i] = 0;
|
||||
tx_play_buffer_position[i] = 0;
|
||||
}
|
||||
}
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
int xran_fh_tx_send_buffer(void *xranlib_)
|
||||
{
|
||||
xranLibWraper *xranlib = ((xranLibWraper *)xranlib_);
|
||||
|
||||
int32_t flowId;
|
||||
void *ptr = NULL;
|
||||
char *pos = NULL;
|
||||
|
||||
p_xran_dev_ctx_2 = xran_dev_get_ctx();
|
||||
if (p_xran_dev_ctx_2 != NULL) {
|
||||
printf("p_xran_dev_ctx_2=%p\n", p_xran_dev_ctx_2);
|
||||
}
|
||||
|
||||
int num_eaxc = xranlib->get_num_eaxc();
|
||||
int num_eaxc_ul = xranlib->get_num_eaxc_ul();
|
||||
uint32_t xran_max_antenna_nr = RTE_MAX(num_eaxc, num_eaxc_ul);
|
||||
int32_t nSectorNum;
|
||||
|
||||
/*
|
||||
for (nSectorNum = 0; nSectorNum < XRAN_MAX_SECTOR_NR; nSectorNum++)
|
||||
{
|
||||
nSectorIndex[nSectorNum] = nSectorNum;
|
||||
}
|
||||
*/
|
||||
nSectorNum = xranlib->get_num_cc();
|
||||
|
||||
int maxflowid = num_eaxc * (nSectorNum - 1) + (xran_max_antenna_nr - 1);
|
||||
printf("the maximum flowID will be=%d\n", maxflowid);
|
||||
|
||||
for (uint16_t cc_id = 0; cc_id < nSectorNum; cc_id++) {
|
||||
for (int32_t tti = 0; tti < XRAN_N_FE_BUF_LEN; tti++) {
|
||||
for (uint8_t ant_id = 0; ant_id < xran_max_antenna_nr; ant_id++) {
|
||||
for (int32_t sym_idx = 0; sym_idx < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_idx++) {
|
||||
flowId = num_eaxc * cc_id + ant_id;
|
||||
uint8_t *pData = p_xran_dev_ctx_2->sFrontHaulTxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[sym_idx % XRAN_NUM_OF_SYMBOL_PER_SLOT].pData;
|
||||
uint8_t *pPrbMapData = p_xran_dev_ctx_2->sFrontHaulTxPrbMapBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers->pData;
|
||||
struct xran_prb_map *pPrbMap = (struct xran_prb_map *)pPrbMapData;
|
||||
ptr = pData;
|
||||
pos = ((char *)p_tx_play_buffer[flowId]) + tx_play_buffer_position[flowId];
|
||||
|
||||
uint8_t *u8dptr;
|
||||
struct xran_prb_map *pRbMap = pPrbMap;
|
||||
int32_t sym_id = sym_idx % XRAN_NUM_OF_SYMBOL_PER_SLOT;
|
||||
if (ptr && pos) {
|
||||
uint32_t idxElm = 0;
|
||||
u8dptr = (uint8_t *)ptr;
|
||||
int16_t payload_len = 0;
|
||||
|
||||
uint8_t *dst = (uint8_t *)u8dptr;
|
||||
uint8_t *src = (uint8_t *)pos;
|
||||
struct xran_prb_elm *p_prbMapElm = &pRbMap->prbMap[idxElm];
|
||||
|
||||
dst = xran_add_hdr_offset(dst, p_prbMapElm->compMethod);
|
||||
for (idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++) {
|
||||
struct xran_section_desc *p_sec_desc = NULL;
|
||||
p_prbMapElm = &pRbMap->prbMap[idxElm];
|
||||
p_sec_desc = p_prbMapElm->p_sec_desc[sym_id];
|
||||
|
||||
if (p_sec_desc == NULL) {
|
||||
printf("p_sec_desc == NULL\n");
|
||||
exit(-1);
|
||||
}
|
||||
src = (uint8_t *)(pos + p_prbMapElm->nRBStart * N_SC_PER_PRB * 4L);
|
||||
|
||||
if (p_prbMapElm->compMethod == XRAN_COMPMETHOD_NONE) {
|
||||
payload_len = p_prbMapElm->nRBSize * N_SC_PER_PRB * 4L;
|
||||
rte_memcpy(dst, src, payload_len);
|
||||
} else if (p_prbMapElm->compMethod == XRAN_COMPMETHOD_BLKFLOAT) {
|
||||
printf("idxElm=%d, compMeth==BLKFLOAT\n", idxElm);
|
||||
struct xranlib_compress_request bfp_com_req;
|
||||
struct xranlib_compress_response bfp_com_rsp;
|
||||
|
||||
memset(&bfp_com_req, 0, sizeof(struct xranlib_compress_request));
|
||||
memset(&bfp_com_rsp, 0, sizeof(struct xranlib_compress_response));
|
||||
|
||||
bfp_com_req.data_in = (int16_t *)src;
|
||||
bfp_com_req.numRBs = p_prbMapElm->nRBSize;
|
||||
bfp_com_req.len = p_prbMapElm->nRBSize * N_SC_PER_PRB * 4L;
|
||||
bfp_com_req.compMethod = p_prbMapElm->compMethod;
|
||||
bfp_com_req.iqWidth = p_prbMapElm->iqWidth;
|
||||
|
||||
bfp_com_rsp.data_out = (int8_t *)dst;
|
||||
bfp_com_rsp.len = 0;
|
||||
|
||||
xranlib_compress_avx512(&bfp_com_req, &bfp_com_rsp);
|
||||
payload_len = bfp_com_rsp.len;
|
||||
} else {
|
||||
printf("p_prbMapElm->compMethod == %d is not supported\n", p_prbMapElm->compMethod);
|
||||
exit(-1);
|
||||
}
|
||||
p_sec_desc->iq_buffer_offset = RTE_PTR_DIFF(dst, u8dptr);
|
||||
p_sec_desc->iq_buffer_len = payload_len;
|
||||
|
||||
dst += payload_len;
|
||||
dst = xran_add_hdr_offset(dst, p_prbMapElm->compMethod);
|
||||
}
|
||||
} else {
|
||||
exit(-1);
|
||||
printf("ptr ==NULL\n");
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
return (0);
|
||||
}
|
||||
|
||||
int read_prach_data(ru_info_t *ru, int frame, int slot)
|
||||
{
|
||||
p_xran_dev_ctx_2 = xran_dev_get_ctx();
|
||||
struct rte_mbuf *mb;
|
||||
|
||||
/* calculate tti and subframe_id from frame, slot num */
|
||||
int tti = 20 * (frame) + (slot);
|
||||
uint32_t subframe = XranGetSubFrameNum(tti, 2, 10);
|
||||
uint32_t is_prach_slot = xran_is_prach_slot(subframe, (slot % 2));
|
||||
int sym_idx = 0;
|
||||
|
||||
struct xran_prach_cp_config *pPrachCPConfig = &(p_xran_dev_ctx_2->PrachCPConfig);
|
||||
|
||||
/* If it is PRACH slot, copy prach IQ from XRAN PRACH buffer to OAI PRACH buffer */
|
||||
if (is_prach_slot) {
|
||||
for (sym_idx = 0; sym_idx < pPrachCPConfig->numSymbol; sym_idx++) {
|
||||
for (int aa = 0; aa < ru->nb_rx; aa++) {
|
||||
mb = (struct rte_mbuf *)p_xran_dev_ctx_2->sFHPrachRxBbuIoBufCtrl[tti % 40][0][aa].sBufferList.pBuffers[sym_idx].pCtrl;
|
||||
if (mb) {
|
||||
uint16_t *dst, *src;
|
||||
int idx = 0;
|
||||
dst = (uint16_t *)((uint8_t *)ru->prach_buf[aa] + (sym_idx * 576));
|
||||
src = (uint16_t *)((uint8_t *)p_xran_dev_ctx_2->sFHPrachRxBbuIoBufCtrl[tti % 40][0][aa].sBufferList.pBuffers[sym_idx].pData);
|
||||
|
||||
/* convert Network order to host order */
|
||||
for (idx = 0; idx < 576 / 2; idx++) {
|
||||
dst[idx] = ntohs(src[idx]);
|
||||
}
|
||||
|
||||
} else {
|
||||
/* TODO: Unlikely this code never gets executed */
|
||||
printf("%s():%d, There is no prach ctrl data for symb %d ant %d\n", __func__, __LINE__, sym_idx, aa);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
return (0);
|
||||
}
|
||||
|
||||
int xran_fh_rx_read_slot(void *xranlib_, ru_info_t *ru, int *frame, int *slot, int oframe, int oslot, uint8_t sync)
|
||||
{
|
||||
xranLibWraper *xranlib = ((xranLibWraper *)xranlib_);
|
||||
|
||||
void *ptr = NULL;
|
||||
int32_t *pos = NULL;
|
||||
int idx = 0;
|
||||
static int print_tmp = 1;
|
||||
static int print_tmp_1 = 1;
|
||||
|
||||
while (first_call_set != 1) {
|
||||
if (print_tmp) {
|
||||
print_tmp = 0;
|
||||
printf("wait in ru_thread() till first_call_set is set in xran\n");
|
||||
}
|
||||
}
|
||||
|
||||
while (first_rx_set != 1) {
|
||||
if (print_tmp_1) {
|
||||
print_tmp_1 = 0;
|
||||
printf("wait in ru_thread for first_rx_set to set in xran\n");
|
||||
}
|
||||
}
|
||||
|
||||
volatile uint32_t prev_rx_cb_tti;
|
||||
int tti;
|
||||
|
||||
prev_rx_cb_tti = rx_cb_tti;
|
||||
*frame = rx_cb_frame;
|
||||
*slot = (rx_cb_subframe * 2) + rx_cb_slot;
|
||||
tti = (*frame * 20) + *slot;
|
||||
|
||||
while (rx_cb_tti == prev_rx_cb_tti) {
|
||||
}
|
||||
|
||||
read_prach_data(ru, *frame, *slot);
|
||||
p_xran_dev_ctx_2 = xran_dev_get_ctx();
|
||||
|
||||
int num_eaxc = xranlib->get_num_eaxc();
|
||||
int num_eaxc_ul = xranlib->get_num_eaxc_ul();
|
||||
uint32_t xran_max_antenna_nr = RTE_MAX(num_eaxc, num_eaxc_ul);
|
||||
|
||||
int slot_offset_rxdata = 3 & (*slot);
|
||||
uint32_t slot_size = 4 * 14 * 4096;
|
||||
uint8_t *rx_data = (uint8_t *)ru->rxdataF[0];
|
||||
uint8_t *start_ptr = NULL;
|
||||
for (uint16_t cc_id = 0; cc_id < 1 /*nSectorNum*/; cc_id++) { // OAI does not support multiple CC yet.
|
||||
for (uint8_t ant_id = 0; ant_id < xran_max_antenna_nr && ant_id < ru->nb_rx; ant_id++) {
|
||||
rx_data = (uint8_t *)ru->rxdataF[ant_id];
|
||||
start_ptr = rx_data + (slot_size * slot_offset_rxdata);
|
||||
// This loop would better be more inner to avoid confusion and maybe also errors.
|
||||
for (int32_t sym_idx = 0; sym_idx < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_idx++) {
|
||||
uint8_t *pData = p_xran_dev_ctx_2->sFrontHaulRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[sym_idx % XRAN_NUM_OF_SYMBOL_PER_SLOT].pData;
|
||||
uint8_t *pPrbMapData = p_xran_dev_ctx_2->sFrontHaulRxPrbMapBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers->pData;
|
||||
struct xran_prb_map *pPrbMap = (struct xran_prb_map *)pPrbMapData;
|
||||
ptr = pData;
|
||||
pos = (int32_t *)(start_ptr + (4 * sym_idx * 4096));
|
||||
|
||||
uint8_t *u8dptr;
|
||||
struct xran_prb_map *pRbMap = pPrbMap;
|
||||
int32_t sym_id = sym_idx % XRAN_NUM_OF_SYMBOL_PER_SLOT;
|
||||
if (ptr && pos) {
|
||||
uint32_t idxElm = 0;
|
||||
u8dptr = (uint8_t *)ptr;
|
||||
int16_t payload_len = 0;
|
||||
|
||||
uint8_t *src = (uint8_t *)u8dptr;
|
||||
// first half
|
||||
uint8_t *src1 = (uint8_t *)u8dptr;
|
||||
uint8_t *dst1 = (uint8_t *)pos;
|
||||
// second half
|
||||
uint8_t *src2 = (uint8_t *)u8dptr;
|
||||
uint8_t *dst2 = (uint8_t *)pos;
|
||||
|
||||
struct xran_prb_elm *p_prbMapElm = &pRbMap->prbMap[idxElm];
|
||||
|
||||
for (idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++) {
|
||||
struct xran_section_desc *p_sec_desc = NULL;
|
||||
p_prbMapElm = &pRbMap->prbMap[idxElm];
|
||||
p_sec_desc = p_prbMapElm->p_sec_desc[sym_id];
|
||||
|
||||
if (pRbMap->nPrbElm == 1 && idxElm == 0) {
|
||||
src = pData;
|
||||
} else if (p_sec_desc->pData == NULL) {
|
||||
return -1;
|
||||
} else {
|
||||
src = p_sec_desc->pData;
|
||||
}
|
||||
|
||||
src2 = src;
|
||||
|
||||
if (p_sec_desc == NULL) {
|
||||
printf("p_sec_desc == NULL\n");
|
||||
exit(-1);
|
||||
}
|
||||
// Calculation of the pointer for the section in the buffer.
|
||||
// first half
|
||||
dst1 = (uint8_t *)(pos + p_prbMapElm->nRBStart * N_SC_PER_PRB);
|
||||
// second half
|
||||
dst2 = (uint8_t *)(pos + (p_prbMapElm->nRBStart * N_SC_PER_PRB + 3276 / 2) + 4096 - 3276);
|
||||
if (p_prbMapElm->compMethod == XRAN_COMPMETHOD_NONE) {
|
||||
payload_len = p_prbMapElm->nRBSize * N_SC_PER_PRB * 4L;
|
||||
src1 = src2 + payload_len / 2;
|
||||
for (idx = 0; idx < (int)(payload_len / (2 * sizeof(int16_t))); idx++) {
|
||||
((uint16_t *)dst1)[idx] = ntohs(((uint16_t *)src1)[idx]);
|
||||
((uint16_t *)dst2)[idx] = ntohs(((uint16_t *)src2)[idx]);
|
||||
}
|
||||
} else if (p_prbMapElm->compMethod == XRAN_COMPMETHOD_BLKFLOAT) {
|
||||
struct xranlib_decompress_request bfp_decom_req_2;
|
||||
struct xranlib_decompress_response bfp_decom_rsp_2;
|
||||
struct xranlib_decompress_request bfp_decom_req_1;
|
||||
struct xranlib_decompress_response bfp_decom_rsp_1;
|
||||
|
||||
payload_len = (3 * p_prbMapElm->iqWidth + 1) * p_prbMapElm->nRBSize;
|
||||
|
||||
memset(&bfp_decom_req_2, 0, sizeof(struct xranlib_decompress_request));
|
||||
memset(&bfp_decom_rsp_2, 0, sizeof(struct xranlib_decompress_response));
|
||||
memset(&bfp_decom_req_1, 0, sizeof(struct xranlib_decompress_request));
|
||||
memset(&bfp_decom_rsp_1, 0, sizeof(struct xranlib_decompress_response));
|
||||
|
||||
bfp_decom_req_2.data_in = (int8_t *)src2;
|
||||
bfp_decom_req_2.numRBs = p_prbMapElm->nRBSize / 2;
|
||||
bfp_decom_req_2.len = payload_len / 2;
|
||||
bfp_decom_req_2.compMethod = p_prbMapElm->compMethod;
|
||||
bfp_decom_req_2.iqWidth = p_prbMapElm->iqWidth;
|
||||
|
||||
bfp_decom_rsp_2.data_out = (int16_t *)dst2;
|
||||
bfp_decom_rsp_2.len = 0;
|
||||
|
||||
xranlib_decompress_avx512(&bfp_decom_req_2, &bfp_decom_rsp_2);
|
||||
|
||||
int16_t first_half_len = bfp_decom_rsp_2.len;
|
||||
src1 = src2 + (payload_len / 2);
|
||||
|
||||
bfp_decom_req_1.data_in = (int8_t *)src1;
|
||||
bfp_decom_req_1.numRBs = p_prbMapElm->nRBSize / 2;
|
||||
bfp_decom_req_1.len = payload_len / 2;
|
||||
bfp_decom_req_1.compMethod = p_prbMapElm->compMethod;
|
||||
bfp_decom_req_1.iqWidth = p_prbMapElm->iqWidth;
|
||||
|
||||
bfp_decom_rsp_1.data_out = (int16_t *)dst1;
|
||||
bfp_decom_rsp_1.len = 0;
|
||||
|
||||
xranlib_decompress_avx512(&bfp_decom_req_1, &bfp_decom_rsp_1);
|
||||
payload_len = bfp_decom_rsp_1.len + first_half_len;
|
||||
} else {
|
||||
printf("p_prbMapElm->compMethod == %d is not supported\n", p_prbMapElm->compMethod);
|
||||
exit(-1);
|
||||
}
|
||||
}
|
||||
|
||||
} else {
|
||||
exit(-1);
|
||||
printf("ptr ==NULL\n");
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
return (0);
|
||||
}
|
||||
|
||||
int xran_fh_tx_send_slot(void *xranlib_, ru_info_t *ru, int frame, int slot, uint64_t timestamp)
|
||||
{
|
||||
xranLibWraper *xranlib = ((xranLibWraper *)xranlib_);
|
||||
|
||||
int tti = /*frame*SUBFRAMES_PER_SYSTEMFRAME*SLOTNUM_PER_SUBFRAME+*/ 20 * frame + slot; // commented out temporarily to check that compilation of oran 5g is working.
|
||||
|
||||
void *ptr = NULL;
|
||||
int32_t *pos = NULL;
|
||||
int idx = 0;
|
||||
|
||||
p_xran_dev_ctx_2 = xran_dev_get_ctx();
|
||||
#if 0
|
||||
if (p_xran_dev_ctx_2 != NULL){
|
||||
printf("p_xran_dev_ctx_2=%d\n",p_xran_dev_ctx_2);
|
||||
}
|
||||
#endif
|
||||
|
||||
int num_eaxc = xranlib->get_num_eaxc();
|
||||
int num_eaxc_ul = xranlib->get_num_eaxc_ul();
|
||||
uint32_t xran_max_antenna_nr = RTE_MAX(num_eaxc, num_eaxc_ul);
|
||||
/*
|
||||
for (nSectorNum = 0; nSectorNum < XRAN_MAX_SECTOR_NR; nSectorNum++)
|
||||
{
|
||||
nSectorIndex[nSectorNum] = nSectorNum;
|
||||
}
|
||||
*/
|
||||
|
||||
for (uint16_t cc_id = 0; cc_id < 1 /*nSectorNum*/; cc_id++) { // OAI does not support multiple CC yet.
|
||||
for (uint8_t ant_id = 0; ant_id < xran_max_antenna_nr && ant_id < ru->nb_tx; ant_id++) {
|
||||
// This loop would better be more inner to avoid confusion and maybe also errors.
|
||||
for (int32_t sym_idx = 0; sym_idx < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_idx++) {
|
||||
uint8_t *pData = p_xran_dev_ctx_2->sFrontHaulTxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[sym_idx % XRAN_NUM_OF_SYMBOL_PER_SLOT].pData;
|
||||
uint8_t *pPrbMapData = p_xran_dev_ctx_2->sFrontHaulTxPrbMapBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers->pData;
|
||||
struct xran_prb_map *pPrbMap = (struct xran_prb_map *)pPrbMapData;
|
||||
ptr = pData;
|
||||
pos = &ru->txdataF_BF[ant_id][sym_idx * 4096 /*fp->ofdm_symbol_size*/]; // We had to use a different ru structure than benetel so the access to the buffer is not the same.
|
||||
|
||||
uint8_t *u8dptr;
|
||||
struct xran_prb_map *pRbMap = pPrbMap;
|
||||
int32_t sym_id = sym_idx % XRAN_NUM_OF_SYMBOL_PER_SLOT;
|
||||
if (ptr && pos) {
|
||||
uint32_t idxElm = 0;
|
||||
u8dptr = (uint8_t *)ptr;
|
||||
int16_t payload_len = 0;
|
||||
|
||||
uint8_t *dst = (uint8_t *)u8dptr;
|
||||
// first half
|
||||
uint8_t *dst1 = (uint8_t *)u8dptr;
|
||||
uint8_t *src1 = (uint8_t *)pos;
|
||||
// second half
|
||||
uint8_t *dst2 = (uint8_t *)u8dptr;
|
||||
uint8_t *src2 = (uint8_t *)pos;
|
||||
|
||||
struct xran_prb_elm *p_prbMapElm = &pRbMap->prbMap[idxElm];
|
||||
|
||||
for (idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++) {
|
||||
struct xran_section_desc *p_sec_desc = NULL;
|
||||
p_prbMapElm = &pRbMap->prbMap[idxElm];
|
||||
p_sec_desc = p_prbMapElm->p_sec_desc[sym_id];
|
||||
|
||||
payload_len = p_prbMapElm->nRBSize * N_SC_PER_PRB * 4L;
|
||||
dst = xran_add_hdr_offset(dst, p_prbMapElm->compMethod);
|
||||
dst2 = dst;
|
||||
dst1 = dst2 + payload_len / 2;
|
||||
|
||||
if (p_sec_desc == NULL) {
|
||||
printf("p_sec_desc == NULL\n");
|
||||
exit(-1);
|
||||
}
|
||||
// Calculation of the pointer for the section in the buffer.
|
||||
// first half
|
||||
src1 = (uint8_t *)(pos + p_prbMapElm->nRBStart * N_SC_PER_PRB);
|
||||
// second half
|
||||
src2 = (uint8_t *)(pos + (p_prbMapElm->nRBStart * N_SC_PER_PRB + 3276 / 2) + 4096 - 3276);
|
||||
if (p_prbMapElm->compMethod == XRAN_COMPMETHOD_NONE) {
|
||||
/* convert to Network order */
|
||||
for (idx = 0; idx < (int)(payload_len / (2 * sizeof(int16_t))); idx++) {
|
||||
((uint16_t *)dst1)[idx] = htons(((uint16_t *)src1)[idx]);
|
||||
((uint16_t *)dst2)[idx] = htons(((uint16_t *)src2)[idx]);
|
||||
}
|
||||
} else if (p_prbMapElm->compMethod == XRAN_COMPMETHOD_BLKFLOAT) {
|
||||
printf("idxElm=%d, compMeth==BLKFLOAT\n", idxElm);
|
||||
struct xranlib_compress_request bfp_com_req;
|
||||
struct xranlib_compress_response bfp_com_rsp;
|
||||
|
||||
memset(&bfp_com_req, 0, sizeof(struct xranlib_compress_request));
|
||||
memset(&bfp_com_rsp, 0, sizeof(struct xranlib_compress_response));
|
||||
|
||||
bfp_com_req.data_in = (int16_t *)src2;
|
||||
bfp_com_req.numRBs = p_prbMapElm->nRBSize / 2;
|
||||
bfp_com_req.len = payload_len / 2;
|
||||
bfp_com_req.compMethod = p_prbMapElm->compMethod;
|
||||
bfp_com_req.iqWidth = p_prbMapElm->iqWidth;
|
||||
|
||||
bfp_com_rsp.data_out = (int8_t *)dst2;
|
||||
bfp_com_rsp.len = 0;
|
||||
|
||||
xranlib_compress_avx512(&bfp_com_req, &bfp_com_rsp);
|
||||
|
||||
int16_t first_half_len = bfp_com_rsp.len;
|
||||
|
||||
dst1 = dst2 + first_half_len;
|
||||
|
||||
bfp_com_req.data_in = (int16_t *)src1;
|
||||
bfp_com_req.numRBs = p_prbMapElm->nRBSize / 2;
|
||||
bfp_com_req.len = payload_len / 2;
|
||||
bfp_com_req.compMethod = p_prbMapElm->compMethod;
|
||||
bfp_com_req.iqWidth = p_prbMapElm->iqWidth;
|
||||
|
||||
bfp_com_rsp.data_out = (int8_t *)dst1;
|
||||
bfp_com_rsp.len = 0;
|
||||
|
||||
xranlib_compress_avx512(&bfp_com_req, &bfp_com_rsp);
|
||||
payload_len = bfp_com_rsp.len + first_half_len;
|
||||
} else {
|
||||
printf("p_prbMapElm->compMethod == %d is not supported\n", p_prbMapElm->compMethod);
|
||||
exit(-1);
|
||||
}
|
||||
|
||||
p_sec_desc->iq_buffer_offset = RTE_PTR_DIFF(dst, u8dptr);
|
||||
p_sec_desc->iq_buffer_len = payload_len;
|
||||
|
||||
dst += payload_len;
|
||||
dst = xran_add_hdr_offset(dst, p_prbMapElm->compMethod);
|
||||
}
|
||||
|
||||
// The tti should be updated as it increased.
|
||||
pRbMap->tti_id = tti;
|
||||
|
||||
} else {
|
||||
exit(-1);
|
||||
printf("ptr ==NULL\n");
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
return (0);
|
||||
}
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
struct xran_common_counters x_counters;
|
||||
uint64_t nTotalTime;
|
||||
uint64_t nUsedTime;
|
||||
uint32_t nCoreUsed;
|
||||
float nUsedPercent;
|
||||
uint64_t old_rx_counter = 0;
|
||||
uint64_t old_tx_counter = 0;
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
int compute_xran_statistics(void *xranlib_)
|
||||
{
|
||||
xranLibWraper *xranlib = ((xranLibWraper *)xranlib_);
|
||||
|
||||
if (xran_get_common_counters(xranlib->get_xranhandle(), &x_counters) == XRAN_STATUS_SUCCESS) {
|
||||
xran_get_time_stats(&nTotalTime, &nUsedTime, &nCoreUsed, 1);
|
||||
nUsedPercent = ((float)nUsedTime * 100.0) / (float)nTotalTime;
|
||||
|
||||
printf("[rx %7ld pps %7ld kbps %7ld][tx %7ld pps %7ld kbps %7ld] [on_time %ld early %ld late %ld corrupt %ld pkt_dupl %ld Total %ld] IO Util: %5.2f %%\n",
|
||||
x_counters.rx_counter,
|
||||
x_counters.rx_counter - old_rx_counter,
|
||||
x_counters.rx_bytes_per_sec * 8 / 1000L,
|
||||
x_counters.tx_counter,
|
||||
x_counters.tx_counter - old_tx_counter,
|
||||
x_counters.tx_bytes_per_sec * 8 / 1000L,
|
||||
x_counters.Rx_on_time,
|
||||
x_counters.Rx_early,
|
||||
x_counters.Rx_late,
|
||||
x_counters.Rx_corrupt,
|
||||
x_counters.Rx_pkt_dupl,
|
||||
x_counters.Total_msgs_rcvd,
|
||||
nUsedPercent);
|
||||
|
||||
if (x_counters.rx_counter > old_rx_counter)
|
||||
old_rx_counter = x_counters.rx_counter;
|
||||
if (x_counters.tx_counter > old_tx_counter)
|
||||
old_tx_counter = x_counters.tx_counter;
|
||||
} else {
|
||||
printf("error xran_get_common_counters\n");
|
||||
return (1);
|
||||
}
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
void check_xran_ptp_sync()
|
||||
{
|
||||
int res;
|
||||
if ((res = xran_is_synchronized()) != 0)
|
||||
printf("Machine is not synchronized using PTP (%x)!\n", res);
|
||||
else
|
||||
printf("Machine is synchronized using PTP!\n");
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
40
radio/ETHERNET/oran/5g/oran.h
Normal file
40
radio/ETHERNET/oran/5g/oran.h
Normal file
@@ -0,0 +1,40 @@
|
||||
/*
|
||||
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership.
|
||||
* The OpenAirInterface Software Alliance licenses this file to You under
|
||||
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
|
||||
* except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.openairinterface.org/?page_id=698
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*-------------------------------------------------------------------------------
|
||||
* For more information about the OpenAirInterface (OAI) Software Alliance:
|
||||
* contact@openairinterface.org
|
||||
*/
|
||||
|
||||
#ifndef _ORAN_H_
|
||||
#define _ORAN_H_
|
||||
|
||||
#include "shared_buffers.h"
|
||||
#include "common_lib.h"
|
||||
void oran_fh_if4p5_south_out(RU_t *ru, int frame, int slot, uint64_t timestamp);
|
||||
|
||||
void oran_fh_if4p5_south_in(RU_t *ru, int *frame, int *slot);
|
||||
|
||||
int transport_init(openair0_device *device, openair0_config_t *openair0_cfg, eth_params_t *eth_params);
|
||||
|
||||
typedef struct {
|
||||
eth_state_t e;
|
||||
shared_buffers buffers;
|
||||
rru_config_msg_type_t last_msg;
|
||||
int capabilities_sent;
|
||||
void *oran_priv;
|
||||
} oran_eth_state_t;
|
||||
#endif /* _ORAN_H_ */
|
||||
335
radio/ETHERNET/oran/5g/oran_isolate.c
Normal file
335
radio/ETHERNET/oran/5g/oran_isolate.c
Normal file
@@ -0,0 +1,335 @@
|
||||
/*
|
||||
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership.
|
||||
* The OpenAirInterface Software Alliance licenses this file to You under
|
||||
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
|
||||
* except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.openairinterface.org/?page_id=698
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*-------------------------------------------------------------------------------
|
||||
* For more information about the OpenAirInterface (OAI) Software Alliance:
|
||||
* contact@openairinterface.org
|
||||
*/
|
||||
|
||||
#include <stdio.h>
|
||||
#include "common_lib.h"
|
||||
#include "ethernet_lib.h"
|
||||
#include "oran_isolate.h"
|
||||
|
||||
#include "common/utils/LOG/log.h"
|
||||
#include "common/utils/LOG/vcd_signal_dumper.h"
|
||||
#include "openair1/PHY/defs_gNB.h"
|
||||
|
||||
typedef struct {
|
||||
eth_state_t e;
|
||||
rru_config_msg_type_t last_msg;
|
||||
int capabilities_sent;
|
||||
void *oran_priv;
|
||||
} oran_eth_state_t;
|
||||
|
||||
int trx_oran_start(openair0_device *device)
|
||||
{
|
||||
printf("ORAN: %s\n", __FUNCTION__);
|
||||
|
||||
oran_eth_state_t *s = device->priv;
|
||||
|
||||
// Start ORAN
|
||||
if (start_oran(s->oran_priv) != 0) {
|
||||
printf("%s:%d:%s: Start ORAN failed ... Exit\n", __FILE__, __LINE__, __FUNCTION__);
|
||||
exit(1);
|
||||
} else {
|
||||
printf("Start ORAN. Done\n");
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void trx_oran_end(openair0_device *device)
|
||||
{
|
||||
printf("ORAN: %s\n", __FUNCTION__);
|
||||
oran_eth_state_t *s = device->priv;
|
||||
stop_oran(s->oran_priv);
|
||||
close_oran(s->oran_priv);
|
||||
}
|
||||
|
||||
int trx_oran_stop(openair0_device *device)
|
||||
{
|
||||
printf("ORAN: %s\n", __FUNCTION__);
|
||||
oran_eth_state_t *s = device->priv;
|
||||
stop_oran(s->oran_priv);
|
||||
return (0);
|
||||
}
|
||||
|
||||
int trx_oran_set_freq(openair0_device* device, openair0_config_t *openair0_cfg)
|
||||
{
|
||||
printf("ORAN: %s\n", __FUNCTION__);
|
||||
return (0);
|
||||
}
|
||||
|
||||
int trx_oran_set_gains(openair0_device *device, openair0_config_t *openair0_cfg)
|
||||
{
|
||||
printf("ORAN: %s\n", __FUNCTION__);
|
||||
return (0);
|
||||
}
|
||||
|
||||
int trx_oran_get_stats(openair0_device *device)
|
||||
{
|
||||
printf("ORAN: %s\n", __FUNCTION__);
|
||||
return (0);
|
||||
}
|
||||
|
||||
int trx_oran_reset_stats(openair0_device *device)
|
||||
{
|
||||
printf("ORAN: %s\n", __FUNCTION__);
|
||||
return (0);
|
||||
}
|
||||
|
||||
int ethernet_tune(openair0_device *device, unsigned int option, int value)
|
||||
{
|
||||
printf("ORAN: %s\n", __FUNCTION__);
|
||||
return 0;
|
||||
}
|
||||
|
||||
int trx_oran_write_raw(openair0_device *device, openair0_timestamp timestamp, void **buff, int nsamps, int cc, int flags)
|
||||
{
|
||||
printf("ORAN: %s\n", __FUNCTION__);
|
||||
return 0;
|
||||
}
|
||||
|
||||
int trx_oran_read_raw(openair0_device *device, openair0_timestamp *timestamp, void **buff, int nsamps, int cc)
|
||||
{
|
||||
printf("ORAN: %s\n", __FUNCTION__);
|
||||
return 0;
|
||||
}
|
||||
|
||||
char *msg_type(int t)
|
||||
{
|
||||
static char *s[12] = {
|
||||
"RAU_tick",
|
||||
"RRU_capabilities",
|
||||
"RRU_config",
|
||||
"RRU_config_ok",
|
||||
"RRU_start",
|
||||
"RRU_stop",
|
||||
"RRU_sync_ok",
|
||||
"RRU_frame_resynch",
|
||||
"RRU_MSG_max_num",
|
||||
"RRU_check_sync",
|
||||
"RRU_config_update",
|
||||
"RRU_config_update_ok",
|
||||
};
|
||||
|
||||
if (t < 0 || t > 11)
|
||||
return "UNKNOWN";
|
||||
return s[t];
|
||||
}
|
||||
|
||||
int trx_oran_ctlsend(openair0_device *device, void *msg, ssize_t msg_len)
|
||||
{
|
||||
RRU_CONFIG_msg_t *rru_config_msg = msg;
|
||||
oran_eth_state_t *s = device->priv;
|
||||
|
||||
printf("ORAN: %s\n", __FUNCTION__);
|
||||
|
||||
printf(" rru_config_msg->type %d [%s]\n", rru_config_msg->type, msg_type(rru_config_msg->type));
|
||||
|
||||
s->last_msg = rru_config_msg->type;
|
||||
|
||||
return msg_len;
|
||||
}
|
||||
|
||||
int trx_oran_ctlrecv(openair0_device *device, void *msg, ssize_t msg_len)
|
||||
{
|
||||
RRU_CONFIG_msg_t *rru_config_msg = msg;
|
||||
oran_eth_state_t *s = device->priv;
|
||||
|
||||
printf("ORAN: %s\n", __FUNCTION__);
|
||||
|
||||
if (s->last_msg == RAU_tick && s->capabilities_sent == 0) {
|
||||
printf("ORAN ctrlrcv RRU_tick received and send capabilities hard coded\n");
|
||||
RRU_capabilities_t *cap;
|
||||
rru_config_msg->type = RRU_capabilities;
|
||||
rru_config_msg->len = sizeof(RRU_CONFIG_msg_t) - MAX_RRU_CONFIG_SIZE + sizeof(RRU_capabilities_t);
|
||||
// Fill RRU capabilities (see openair1/PHY/defs_RU.h)
|
||||
// For now they are hard coded - try to retreive the params from openari device
|
||||
|
||||
cap = (RRU_capabilities_t *)&rru_config_msg->msg[0];
|
||||
cap->FH_fmt = OAI_IF4p5_only;
|
||||
cap->num_bands = 1;
|
||||
cap->band_list[0] = 78;
|
||||
// cap->num_concurrent_bands = 1; component carriers
|
||||
cap->nb_rx[0] = 1; // device->openair0_cfg->rx_num_channels;
|
||||
cap->nb_tx[0] = 1; // device->openair0_cfg->tx_num_channels;
|
||||
cap->max_pdschReferenceSignalPower[0] = -27;
|
||||
cap->max_rxgain[0] = 90;
|
||||
cap->N_RB_DL[0] = 106;
|
||||
cap->N_RB_UL[0] = 106;
|
||||
|
||||
s->capabilities_sent = 1;
|
||||
|
||||
return rru_config_msg->len;
|
||||
}
|
||||
if (s->last_msg == RRU_config) {
|
||||
printf("Oran RRU_config\n");
|
||||
rru_config_msg->type = RRU_config_ok;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
void oran_fh_if4p5_south_in(RU_t *ru, int *frame, int *slot)
|
||||
{
|
||||
oran_eth_state_t *s = ru->ifdevice.priv;
|
||||
|
||||
/*int symbol;
|
||||
int32_t *rxdata;
|
||||
int antenna;*/
|
||||
static uint8_t sync = 0;
|
||||
|
||||
ru_info_t ru_info;
|
||||
ru_info.nb_rx = ru->nb_rx;
|
||||
ru_info.rxdataF = ru->common.rxdataF;
|
||||
ru_info.prach_buf = (int **)ru->prach_rxsigF[0];//index: [prach_oca][ant_id]
|
||||
|
||||
RU_proc_t *proc = &ru->proc;
|
||||
extern uint16_t sl_ahead;
|
||||
int f, sl;
|
||||
|
||||
int ret = xran_fh_rx_read_slot(s->oran_priv, &ru_info, &f, &sl, *frame, *slot, sync);
|
||||
|
||||
if (ret != 0) {
|
||||
printf("ORAN: ORAN_fh_if4p5_south_in ERROR in RX function \n");
|
||||
}
|
||||
|
||||
proc->tti_rx = sl;
|
||||
proc->frame_rx = f;
|
||||
proc->tti_tx = (sl + sl_ahead) % 20;
|
||||
proc->frame_tx = (sl > (19 - sl_ahead)) ? (f + 1) & 1023 : f;
|
||||
if (proc->first_rx == 0) {
|
||||
if (proc->tti_rx != *slot) {
|
||||
LOG_E(PHY, "Received Timestamp doesn't correspond to the time we think it is (proc->tti_rx %d, slot %d)\n", proc->tti_rx, *slot);
|
||||
*slot = proc->tti_rx;
|
||||
}
|
||||
|
||||
if (proc->frame_rx != *frame) {
|
||||
LOG_E(PHY, "Received Timestamp doesn't correspond to the time we think it is (proc->frame_rx %d frame %d proc->tti_rx %d tti %d)\n", proc->frame_rx, *frame, proc->tti_rx, *slot);
|
||||
*frame = proc->frame_rx;
|
||||
}
|
||||
} else {
|
||||
proc->first_rx = 0;
|
||||
LOG_I(PHY, "before adjusting, OAI: frame=%d slot=%d, XRAN: frame=%d slot=%d\n", *frame, *slot, proc->frame_rx, proc->tti_rx);
|
||||
*frame = proc->frame_rx;
|
||||
*slot = proc->tti_rx;
|
||||
LOG_I(PHY, "After adjusting, OAI: frame=%d slot=%d, XRAN: frame=%d slot=%d\n", *frame, *slot, proc->frame_rx, proc->tti_rx);
|
||||
}
|
||||
|
||||
sync = 1;
|
||||
}
|
||||
|
||||
void oran_fh_if4p5_south_out(RU_t *ru, int frame, int slot, uint64_t timestamp)
|
||||
{
|
||||
openair0_device *device = &ru->ifdevice;
|
||||
oran_eth_state_t *s = device->priv;
|
||||
|
||||
ru_info_t ru_info;
|
||||
ru_info.nb_tx = ru->nb_tx;
|
||||
ru_info.txdataF_BF = ru->common.txdataF_BF;
|
||||
// printf("south_out:\tframe=%d\tslot=%d\ttimestamp=%ld\n",frame,slot,timestamp);
|
||||
|
||||
int ret = xran_fh_tx_send_slot(s->oran_priv, &ru_info, frame, slot, timestamp);
|
||||
if (ret != 0) {
|
||||
printf("ORAN: ORAN_fh_if4p5_south_out ERROR in TX function \n");
|
||||
}
|
||||
}
|
||||
|
||||
void *get_internal_parameter(char *name)
|
||||
{
|
||||
printf("ORAN: %s\n", __FUNCTION__);
|
||||
|
||||
if (!strcmp(name, "fh_if4p5_south_in"))
|
||||
return (void *)oran_fh_if4p5_south_in;
|
||||
if (!strcmp(name, "fh_if4p5_south_out"))
|
||||
return (void *)oran_fh_if4p5_south_out;
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
__attribute__((__visibility__("default"))) int transport_init(openair0_device *device, openair0_config_t *openair0_cfg, eth_params_t *eth_params)
|
||||
{
|
||||
oran_eth_state_t *eth;
|
||||
|
||||
device->Mod_id = 0;
|
||||
device->transp_type = ETHERNET_TP;
|
||||
device->trx_start_func = trx_oran_start;
|
||||
device->trx_get_stats_func = trx_oran_get_stats;
|
||||
device->trx_reset_stats_func = trx_oran_reset_stats;
|
||||
device->trx_end_func = trx_oran_end;
|
||||
device->trx_stop_func = trx_oran_stop;
|
||||
device->trx_set_freq_func = trx_oran_set_freq;
|
||||
device->trx_set_gains_func = trx_oran_set_gains;
|
||||
|
||||
device->trx_write_func = trx_oran_write_raw;
|
||||
device->trx_read_func = trx_oran_read_raw;
|
||||
|
||||
device->trx_ctlsend_func = trx_oran_ctlsend;
|
||||
device->trx_ctlrecv_func = trx_oran_ctlrecv;
|
||||
|
||||
device->get_internal_parameter = get_internal_parameter;
|
||||
|
||||
eth = (oran_eth_state_t *)calloc(1, sizeof(oran_eth_state_t));
|
||||
if (eth == NULL) {
|
||||
AssertFatal(0 == 1, "out of memory\n");
|
||||
}
|
||||
|
||||
eth->e.flags = ETH_RAW_IF4p5_MODE;
|
||||
eth->e.compression = NO_COMPRESS;
|
||||
eth->e.if_name = eth_params->local_if_name;
|
||||
eth->oran_priv = define_oran_pointer();
|
||||
device->priv = eth;
|
||||
device->openair0_cfg = &openair0_cfg[0];
|
||||
|
||||
eth->last_msg = (rru_config_msg_type_t)-1;
|
||||
|
||||
oran_eth_state_t *s = eth;
|
||||
|
||||
printf("ORAN: %s\n", __FUNCTION__);
|
||||
|
||||
// Check if the machine is PTP sync
|
||||
check_xran_ptp_sync();
|
||||
|
||||
// SetUp
|
||||
if (setup_oran(s->oran_priv) != 0) {
|
||||
printf("%s:%d:%s: SetUp ORAN failed ... Exit\n", __FILE__, __LINE__, __FUNCTION__);
|
||||
exit(1);
|
||||
} else {
|
||||
printf("SetUp ORAN. Done\n");
|
||||
}
|
||||
|
||||
// Dump ORAN config
|
||||
dump_oran_config(s->oran_priv);
|
||||
|
||||
// Register physide callbacks
|
||||
register_physide_callbacks(s->oran_priv);
|
||||
printf("Register physide callbacks. Done\n");
|
||||
|
||||
// Open callbacks
|
||||
open_oran_callback(s->oran_priv);
|
||||
printf("Open Oran callbacks. Done\n");
|
||||
|
||||
// Init ORAN
|
||||
initialize_oran(s->oran_priv);
|
||||
printf("Init Oran. Done\n");
|
||||
|
||||
// Open ORAN
|
||||
open_oran(s->oran_priv);
|
||||
printf("xran_open. Done\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
86
radio/ETHERNET/oran/5g/oran_isolate.h
Normal file
86
radio/ETHERNET/oran/5g/oran_isolate.h
Normal file
@@ -0,0 +1,86 @@
|
||||
/*
|
||||
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership.
|
||||
* The OpenAirInterface Software Alliance licenses this file to You under
|
||||
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
|
||||
* except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.openairinterface.org/?page_id=698
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*-------------------------------------------------------------------------------
|
||||
* For more information about the OpenAirInterface (OAI) Software Alliance:
|
||||
* contact@openairinterface.org
|
||||
*/
|
||||
|
||||
#ifndef _ORAN_ISOLATE_H_
|
||||
#define _ORAN_ISOLATE_H_
|
||||
|
||||
#include <stdio.h>
|
||||
|
||||
#include <pthread.h>
|
||||
#include <stdint.h>
|
||||
|
||||
/*
|
||||
* Structure added to bear the information needed from OAI RU
|
||||
*/
|
||||
typedef struct ru_info_s {
|
||||
// Needed for UL
|
||||
int nb_rx;
|
||||
int32_t **rxdataF;
|
||||
|
||||
// Needed for DL
|
||||
int nb_tx;
|
||||
int32_t **txdataF_BF;
|
||||
|
||||
// Needed for Prach
|
||||
int **prach_buf;
|
||||
} ru_info_t;
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
void *define_oran_pointer();
|
||||
|
||||
void dump_oran_config(void *xranlib_);
|
||||
|
||||
int setup_oran(void *xranlib_);
|
||||
|
||||
int open_oran_callback(void *xranlib_);
|
||||
|
||||
int open_oran(void *xranlib_);
|
||||
|
||||
int initialize_oran(void *xranlib_);
|
||||
|
||||
int start_oran(void *xranlib_);
|
||||
|
||||
int stop_oran(void *xranlib_);
|
||||
|
||||
int close_oran(void *xranlib_);
|
||||
|
||||
int register_physide_callbacks(void *xranlib_);
|
||||
|
||||
int load_iq_from_file(void *xranlib_);
|
||||
|
||||
int xran_fh_rx_read_slot(void *xranlib_, ru_info_t *ru, int *frame, int *slot, int oframe, int oslot, uint8_t sync);
|
||||
|
||||
int xran_fh_tx_send_buffer(void *xranlib_);
|
||||
|
||||
int xran_fh_tx_send_slot(void *xranlib_, ru_info_t *ru, int frame, int slot, uint64_t timestamp);
|
||||
|
||||
int compute_xran_statistics(void *xranlib_);
|
||||
|
||||
void check_xran_ptp_sync();
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _ORAN_ISOLATE_H_ */
|
||||
1260
radio/ETHERNET/oran/5g/xran_lib_wrap.cpp
Normal file
1260
radio/ETHERNET/oran/5g/xran_lib_wrap.cpp
Normal file
File diff suppressed because it is too large
Load Diff
273
radio/ETHERNET/oran/5g/xran_lib_wrap.hpp
Normal file
273
radio/ETHERNET/oran/5g/xran_lib_wrap.hpp
Normal file
@@ -0,0 +1,273 @@
|
||||
/*******************************************************************************
|
||||
*
|
||||
* <COPYRIGHT_TAG>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
#ifndef XRAN_LIB_WRAP_HPP
|
||||
#define XRAN_LIB_WRAP_HPP
|
||||
|
||||
#include <exception>
|
||||
#include <random>
|
||||
#include <string>
|
||||
#include <utility>
|
||||
#include <vector>
|
||||
|
||||
#include <malloc.h>
|
||||
#include <stdint.h>
|
||||
|
||||
#include "common.hpp"
|
||||
#include "xran_fh_o_du.h"
|
||||
#include "xran_common.h"
|
||||
#include "xran_frame_struct.h"
|
||||
|
||||
#define XRAN_UT_CFG_FILENAME "oran.fhi.json"
|
||||
|
||||
#define XRAN_UT_KEY_GLOBALCFG "GLOBAL"
|
||||
#define XRAN_UT_KEY_GLOBALCFG_IO "io_cfg"
|
||||
#define XRAN_UT_KEY_GLOBALCFG_EAXCID "eAxCId_cfg"
|
||||
#define XRAN_UT_KEY_GLOBALCFG_PRACH "prach_cfg"
|
||||
#define XRAN_UT_KEY_GLOBALCFG_RU "ru_cfg"
|
||||
#define XRAN_UT_KEY_GLOBALCFG_SLOT "slotcfg_"
|
||||
|
||||
#define MAX_NUM_OF_XRAN_CTX (2)
|
||||
|
||||
#define SW_FPGA_TOTAL_BUFFER_LEN (4 * 1024 * 1024 * 1024)
|
||||
#define SW_FPGA_SEGMENT_BUFFER_LEN (1 * 1024 * 1024 * 1024)
|
||||
#define SW_FPGA_FH_TOTAL_BUFFER_LEN (1 * 1024 * 1024 * 1024)
|
||||
#define FPGA_TO_SW_PRACH_RX_BUFFER_LEN (8192)
|
||||
|
||||
#define MAX_ANT_CARRIER_SUPPORTED (XRAN_MAX_SECTOR_NR * XRAN_MAX_ANTENNA_NR)
|
||||
|
||||
enum xran_in_period { XRAN_IN_PREV_PERIOD = 0, XRAN_IN_CURR_PERIOD, XRAN_IN_NEXT_PERIOD };
|
||||
extern "C" {
|
||||
extern uint32_t xran_lib_ota_tti;
|
||||
extern uint32_t xran_lib_ota_sym;
|
||||
extern uint32_t xran_lib_ota_sym_idx;
|
||||
extern uint32_t xran_SFN_at_Sec_Start;
|
||||
|
||||
void sym_ota_cb(struct rte_timer *tim, void *arg);
|
||||
void tti_ota_cb(struct rte_timer *tim, void *arg);
|
||||
}
|
||||
|
||||
class xranLibWraper {
|
||||
public:
|
||||
typedef enum {
|
||||
XRANFTHTX_OUT = 0,
|
||||
XRANFTHTX_PRB_MAP_OUT,
|
||||
XRANFTHTX_SEC_DESC_OUT,
|
||||
XRANFTHRX_IN,
|
||||
XRANFTHRX_PRB_MAP_IN,
|
||||
XRANFTHTX_SEC_DESC_IN,
|
||||
XRANFTHRACH_IN,
|
||||
XRANSRS_IN,
|
||||
MAX_SW_XRAN_INTERFACE_NUM
|
||||
} SWXRANInterfaceTypeEnum;
|
||||
|
||||
enum nChBw {
|
||||
PHY_BW_5MHZ = 5,
|
||||
PHY_BW_10MHZ = 10,
|
||||
PHY_BW_15MHZ = 15,
|
||||
PHY_BW_20MHZ = 20,
|
||||
PHY_BW_25MHZ = 25,
|
||||
PHY_BW_30MHZ = 30,
|
||||
PHY_BW_40MHZ = 40,
|
||||
PHY_BW_50MHZ = 50,
|
||||
PHY_BW_60MHZ = 60,
|
||||
PHY_BW_70MHZ = 70,
|
||||
PHY_BW_80MHZ = 80,
|
||||
PHY_BW_90MHZ = 90,
|
||||
PHY_BW_100MHZ = 100,
|
||||
PHY_BW_200MHZ = 200,
|
||||
PHY_BW_400MHZ = 400
|
||||
};
|
||||
|
||||
// F1 Tables 38.101-1 Table 5.3.2-1. Maximum transmission bandwidth configuration NRB
|
||||
const uint16_t nNumRbsPerSymF1[3][13] = {
|
||||
// 5MHz 10MHz 15MHz 20MHz 25MHz 30MHz 40MHz 50MHz 60MHz 70MHz 80MHz 90MHz 100MHz
|
||||
{25, 52, 79, 106, 133, 160, 216, 270, 0, 0, 0, 0, 0}, // Numerology 0 (15KHz)
|
||||
{11, 24, 38, 51, 65, 78, 106, 133, 162, 0, 217, 245, 273}, // Numerology 1 (30KHz)
|
||||
{0, 11, 18, 24, 31, 38, 51, 65, 79, 0, 107, 121, 135} // Numerology 2 (60KHz)
|
||||
};
|
||||
|
||||
// F2 Tables 38.101-2 Table 5.3.2-1. Maximum transmission bandwidth configuration NRB
|
||||
const uint16_t nNumRbsPerSymF2[2][4] = {
|
||||
// 50MHz 100MHz 200MHz 400MHz
|
||||
{66, 132, 264, 0}, // Numerology 2 (60KHz)
|
||||
{32, 66, 132, 264} // Numerology 3 (120KHz)
|
||||
};
|
||||
|
||||
protected:
|
||||
char argv[25] = {'u', 'n', 'i', 't', 't', 'e', 's', 't', '\0'};
|
||||
// char argv[25] = "unittest";
|
||||
|
||||
std::string m_dpdk_dev_up, m_dpdk_dev_cp, m_dpdk_bbdev;
|
||||
|
||||
void *m_xranhandle;
|
||||
|
||||
uint8_t m_du_mac[6]; // = { 0x00,0x11, 0x22, 0x33, 0x44, 0x55 }; // This is hard coded here and then it is read from the conf file
|
||||
uint8_t m_ru_mac[XRAN_VF_MAX][6]; //= { 0x00,0x11, 0x22, 0x33, 0x44, 0x66 }; // This is hard coded here and then it is read from the conf file
|
||||
bool m_bSub6;
|
||||
uint32_t m_nSlots; // = 20;
|
||||
|
||||
struct xran_fh_config m_xranConf;
|
||||
struct xran_fh_init m_xranInit;
|
||||
|
||||
struct xran_timer_ctx {
|
||||
uint32_t tti_to_process;
|
||||
} m_timer_ctx[MAX_NUM_OF_XRAN_CTX];
|
||||
|
||||
/* io struct */
|
||||
BbuIoBufCtrlStruct m_sFrontHaulTxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
|
||||
BbuIoBufCtrlStruct m_sFrontHaulTxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
|
||||
BbuIoBufCtrlStruct m_sFrontHaulRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
|
||||
BbuIoBufCtrlStruct m_sFrontHaulRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
|
||||
BbuIoBufCtrlStruct m_sFHPrachRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
|
||||
|
||||
/* Cat B */
|
||||
BbuIoBufCtrlStruct m_sFHSrsRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR];
|
||||
|
||||
/* buffers lists */
|
||||
struct xran_flat_buffer m_sFrontHaulTxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
|
||||
struct xran_flat_buffer m_sFrontHaulTxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
|
||||
struct xran_flat_buffer m_sFrontHaulRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
|
||||
struct xran_flat_buffer m_sFrontHaulRxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
|
||||
struct xran_flat_buffer m_sFHPrachRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
|
||||
|
||||
/* Cat B SRS buffers */
|
||||
struct xran_flat_buffer m_sFHSrsRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT];
|
||||
|
||||
void *m_nInstanceHandle[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR]; // instance per sector
|
||||
uint32_t m_nBufPoolIndex[XRAN_MAX_SECTOR_NR][MAX_SW_XRAN_INTERFACE_NUM]; // every api owns unique buffer pool
|
||||
|
||||
uint32_t m_nSW_ToFpga_FTH_TxBufferLen;
|
||||
uint32_t m_nFpgaToSW_FTH_RxBufferLen;
|
||||
|
||||
int32_t m_nSectorIndex[XRAN_MAX_SECTOR_NR];
|
||||
|
||||
int iq_bfw_buffer_size_dl = 0;
|
||||
int iq_bfw_buffer_size_ul = 0;
|
||||
|
||||
/* beamforming weights for UL (O-DU) */
|
||||
int16_t *p_tx_dl_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED];
|
||||
int32_t tx_dl_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
|
||||
int32_t tx_dl_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
|
||||
|
||||
/* beamforming weights for UL (O-DU) */
|
||||
int16_t *p_tx_ul_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED];
|
||||
int32_t tx_ul_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
|
||||
int32_t tx_ul_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
|
||||
|
||||
private:
|
||||
json m_global_cfg;
|
||||
|
||||
template <typename T>
|
||||
T get_globalcfg(const std::string &type, const std::string ¶meter_name)
|
||||
{
|
||||
return m_global_cfg[XRAN_UT_KEY_GLOBALCFG][type][parameter_name];
|
||||
}
|
||||
|
||||
template <typename T>
|
||||
std::vector<T> get_globalcfg_array(const std::string &type, const std::string ¶meter_name)
|
||||
{
|
||||
auto array_size = m_global_cfg[XRAN_UT_KEY_GLOBALCFG][type][parameter_name].size();
|
||||
|
||||
std::vector<T> result(array_size);
|
||||
|
||||
for (unsigned number = 0; number < array_size; number++)
|
||||
result.at(number) = m_global_cfg[XRAN_UT_KEY_GLOBALCFG][type][parameter_name][number];
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
uint16_t get_eaxcid_mask(int numbit, int shift);
|
||||
|
||||
int init_memory();
|
||||
|
||||
public:
|
||||
// Class constructor
|
||||
xranLibWraper();
|
||||
|
||||
// Class Distructor
|
||||
~xranLibWraper();
|
||||
|
||||
int SetUp();
|
||||
|
||||
void TearDown();
|
||||
|
||||
int Init(struct xran_fh_config *pCfg = nullptr);
|
||||
|
||||
void Cleanup();
|
||||
|
||||
void Open(xran_ethdi_mbuf_send_fn send_cp, xran_ethdi_mbuf_send_fn send_up, void *fh_rx_callback, void *fh_rx_prach_callback, void *fh_srs_callback);
|
||||
|
||||
void Close();
|
||||
|
||||
int Start();
|
||||
|
||||
int Stop();
|
||||
|
||||
/* emulation of timer */
|
||||
void update_tti();
|
||||
|
||||
void update_symbol_index();
|
||||
|
||||
int apply_cpenable(bool flag);
|
||||
|
||||
int get_slot_config(const std::string &cfgname, struct xran_frame_config *pCfg);
|
||||
|
||||
int get_num_rbs(uint32_t nNumerology, uint32_t nBandwidth, bool nSub6);
|
||||
|
||||
void *get_xranhandle();
|
||||
|
||||
void *get_timer_ctx();
|
||||
|
||||
int get_symbol_index();
|
||||
|
||||
int get_ota_tti();
|
||||
|
||||
int get_SFN_at_sec_start();
|
||||
|
||||
int get_symbol_offset(int32_t offSym, int32_t otaSym, int32_t numSymTotal, enum xran_in_period *pInPeriod);
|
||||
|
||||
bool is_running();
|
||||
|
||||
enum xran_category get_rucategory();
|
||||
|
||||
int get_numerology();
|
||||
|
||||
int get_duplextype();
|
||||
|
||||
uint32_t get_num_cc();
|
||||
|
||||
uint32_t get_num_eaxc();
|
||||
|
||||
uint32_t get_num_eaxc_ul();
|
||||
|
||||
uint32_t get_num_dlrbs();
|
||||
|
||||
uint32_t get_num_ulrbs();
|
||||
|
||||
uint32_t get_num_antelmtrx();
|
||||
|
||||
bool is_cpenable();
|
||||
|
||||
bool is_prachenable();
|
||||
|
||||
bool is_dynamicsection();
|
||||
|
||||
bool get_sub6();
|
||||
|
||||
void get_cfg_prach(struct xran_prach_config *pCfg);
|
||||
|
||||
void get_cfg_frame(struct xran_frame_config *pCfg);
|
||||
|
||||
void get_cfg_ru(struct xran_ru_config *pCfg);
|
||||
|
||||
void get_cfg_fh(struct xran_fh_config *pCfg);
|
||||
};
|
||||
|
||||
/* external declaration for the instance */
|
||||
extern xranLibWraper *xranlib;
|
||||
|
||||
#endif // XRAN_LIB_WRAP_HPP
|
||||
@@ -0,0 +1,305 @@
|
||||
Active_gNBs = ( "gNB-OAI");
|
||||
# Asn1_verbosity, choice in: none, info, annoying
|
||||
Asn1_verbosity = "none";
|
||||
|
||||
gNBs =
|
||||
(
|
||||
{
|
||||
////////// Identification parameters:
|
||||
gNB_ID = 0xe00;
|
||||
gNB_name = "gNB-OAI";
|
||||
|
||||
// Tracking area code, 0x0000 and 0xfffe are reserved values
|
||||
tracking_area_code = 1;
|
||||
plmn_list = ({
|
||||
mcc = 001;
|
||||
mnc = 01;
|
||||
mnc_length = 2;
|
||||
snssaiList = (
|
||||
{
|
||||
sst = 1;
|
||||
#sd = 0x1; // 0 false, else true
|
||||
}
|
||||
);
|
||||
|
||||
});
|
||||
|
||||
//nr_cellid = 12345678L;
|
||||
nr_cellid = 1;
|
||||
|
||||
////////// Physical parameters:
|
||||
|
||||
pdsch_AntennaPorts_XP = 1;
|
||||
pusch_AntennaPorts = 1;
|
||||
do_CSIRS = 1;
|
||||
min_rxtxtime = 4;
|
||||
sib1_tda = 15;
|
||||
|
||||
pdcch_ConfigSIB1 = (
|
||||
{
|
||||
controlResourceSetZero = 11;
|
||||
searchSpaceZero = 0;
|
||||
}
|
||||
);
|
||||
|
||||
servingCellConfigCommon = (
|
||||
{
|
||||
#spCellConfigCommon
|
||||
|
||||
physCellId = 0;
|
||||
# downlinkConfigCommon
|
||||
#frequencyInfoDL
|
||||
# this is 3300.24 + 134*12*30e3 = 3348.48 MHz (5G NR GSCN: 7741)
|
||||
absoluteFrequencySSB = 643392;
|
||||
dl_frequencyBand = 78;
|
||||
# this is 3300.24 MHz
|
||||
dl_absoluteFrequencyPointA = 642816;
|
||||
#scs-SpecificCarrierList
|
||||
dl_offstToCarrier = 0;
|
||||
# subcarrierSpacing
|
||||
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
|
||||
dl_subcarrierSpacing = 1;
|
||||
dl_carrierBandwidth = 273;
|
||||
#initialDownlinkBWP
|
||||
#genericParameters
|
||||
# this is RBstart=0,L=162 (275*(275-L+1))+(274-RBstart))
|
||||
initialDLBWPlocationAndBandwidth = 1099; #38.101-1 Table 5.3.2-1
|
||||
#
|
||||
# subcarrierSpacing
|
||||
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
|
||||
initialDLBWPsubcarrierSpacing = 1;
|
||||
#pdcch-ConfigCommon
|
||||
initialDLBWPcontrolResourceSetZero = 11;
|
||||
initialDLBWPsearchSpaceZero = 0;
|
||||
|
||||
#uplinkConfigCommon
|
||||
#frequencyInfoUL
|
||||
ul_frequencyBand = 78;
|
||||
#scs-SpecificCarrierList
|
||||
ul_offstToCarrier = 0;
|
||||
# subcarrierSpacing
|
||||
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
|
||||
ul_subcarrierSpacing = 1;
|
||||
ul_carrierBandwidth = 273;
|
||||
pMax = 23;
|
||||
#initialUplinkBWP
|
||||
#genericParameters
|
||||
initialULBWPlocationAndBandwidth = 1099;
|
||||
# subcarrierSpacing
|
||||
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
|
||||
initialULBWPsubcarrierSpacing = 1;
|
||||
#rach-ConfigCommon
|
||||
#rach-ConfigGeneric
|
||||
prach_ConfigurationIndex = 159;
|
||||
#prach_msg1_FDM
|
||||
#0 = one, 1=two, 2=four, 3=eight
|
||||
prach_msg1_FDM = 0;
|
||||
prach_msg1_FrequencyStart = 0;
|
||||
zeroCorrelationZoneConfig = 15;
|
||||
preambleReceivedTargetPower = -96;
|
||||
#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
|
||||
preambleTransMax = 6;
|
||||
#powerRampingStep
|
||||
# 0=dB0,1=dB2,2=dB4,3=dB6
|
||||
powerRampingStep = 1;
|
||||
#ra_ReponseWindow
|
||||
#1,2,4,8,10,20,40,80
|
||||
ra_ResponseWindow = 5;
|
||||
#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
|
||||
#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen
|
||||
ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 3;
|
||||
#oneHalf (0..15) 4,8,12,16,...60,64
|
||||
ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15;
|
||||
#ra_ContentionResolutionTimer
|
||||
#(0..7) 8,16,24,32,40,48,56,64
|
||||
ra_ContentionResolutionTimer = 7;
|
||||
rsrp_ThresholdSSB = 19;
|
||||
#prach-RootSequenceIndex_PR
|
||||
#1 = 839, 2 = 139
|
||||
prach_RootSequenceIndex_PR = 2;
|
||||
prach_RootSequenceIndex = 1;
|
||||
# SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
|
||||
#
|
||||
msg1_SubcarrierSpacing = 1,
|
||||
# restrictedSetConfig
|
||||
# 0=unrestricted, 1=restricted type A, 2=restricted type B
|
||||
restrictedSetConfig = 0,
|
||||
|
||||
msg3_DeltaPreamble = 6;
|
||||
p0_NominalWithGrant = -96
|
||||
|
||||
# pucch-ConfigCommon setup :
|
||||
# pucchGroupHopping
|
||||
# 0 = neither, 1= group hopping, 2=sequence hopping
|
||||
pucchGroupHopping = 0;
|
||||
hoppingId = 0;
|
||||
p0_nominal = -76;
|
||||
# ssb_PositionsInBurs_BitmapPR
|
||||
# 1=short, 2=medium, 3=long
|
||||
ssb_PositionsInBurst_PR = 2;
|
||||
ssb_PositionsInBurst_Bitmap = 0x1;
|
||||
|
||||
# ssb_periodicityServingCell
|
||||
# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
|
||||
ssb_periodicityServingCell = 2;
|
||||
|
||||
# dmrs_TypeA_position
|
||||
# 0 = pos2, 1 = pos3
|
||||
dmrs_TypeA_Position = 0;
|
||||
|
||||
# subcarrierSpacing
|
||||
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
|
||||
subcarrierSpacing = 1;
|
||||
|
||||
|
||||
#tdd-UL-DL-ConfigurationCommon
|
||||
# subcarrierSpacing
|
||||
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
|
||||
referenceSubcarrierSpacing = 1;
|
||||
# pattern1
|
||||
# dl_UL_TransmissionPeriodicity
|
||||
# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
|
||||
dl_UL_TransmissionPeriodicity = 5;
|
||||
nrofDownlinkSlots = 3;
|
||||
nrofDownlinkSymbols = 6;
|
||||
nrofUplinkSlots = 1;
|
||||
nrofUplinkSymbols = 4;
|
||||
|
||||
ssPBCH_BlockPower = -25;
|
||||
}
|
||||
|
||||
);
|
||||
|
||||
# ------- SCTP definitions
|
||||
SCTP :
|
||||
{
|
||||
# Number of streams to use in input/output
|
||||
SCTP_INSTREAMS = 2;
|
||||
SCTP_OUTSTREAMS = 2;
|
||||
};
|
||||
|
||||
|
||||
////////// AMF parameters:
|
||||
amf_ip_address = ( { ipv4 = "10.10.10.200";
|
||||
ipv6 = "192:168:30::17";
|
||||
active = "yes";
|
||||
preference = "ipv4";
|
||||
}
|
||||
);
|
||||
|
||||
NETWORK_INTERFACES :
|
||||
{
|
||||
GNB_INTERFACE_NAME_FOR_NG_AMF = "ens2f2";
|
||||
GNB_IPV4_ADDRESS_FOR_NG_AMF = "10.10.10.199/24";
|
||||
GNB_INTERFACE_NAME_FOR_NGU = "ens2f2";
|
||||
GNB_IPV4_ADDRESS_FOR_NGU = "10.10.10.199/24";
|
||||
GNB_PORT_FOR_S1U = 2152; # Spec 2152
|
||||
};
|
||||
}
|
||||
);
|
||||
|
||||
MACRLCs = (
|
||||
{
|
||||
num_cc = 1;
|
||||
tr_s_preference = "local_L1";
|
||||
tr_n_preference = "local_RRC";
|
||||
pusch_TargetSNRx10 = 300;
|
||||
pucch_TargetSNRx10 = 200;
|
||||
pusch_FailureThres = 1000;
|
||||
ulsch_max_frame_inactivity = 0;
|
||||
}
|
||||
);
|
||||
|
||||
L1s = (
|
||||
{
|
||||
num_cc = 1;
|
||||
tr_n_preference = "local_mac";
|
||||
prach_dtx_threshold = 120
|
||||
pucch0_dtx_threshold = 80;
|
||||
pusch_dtx_threshold = 10;
|
||||
max_ldpc_iterations = 6;
|
||||
#thread_pool_size = 8;
|
||||
tx_amp_backoff_dB = 10; #36; #6;
|
||||
}
|
||||
);
|
||||
|
||||
RUs = (
|
||||
{
|
||||
local_rf = "no";
|
||||
nb_tx = 1;
|
||||
nb_rx = 1;
|
||||
att_tx = 0
|
||||
att_rx = 0;
|
||||
bands = [78];
|
||||
max_pdschReferenceSignalPower = -27;
|
||||
max_rxgain = 75;
|
||||
sf_extension = 0;
|
||||
eNB_instances = [0];
|
||||
##beamforming 1x2 matrix: 1 layer x 2 antennas
|
||||
bf_weights = [0x00007fff, 0x0000, 0x00007fff, 0x0000];
|
||||
tr_preference = "raw_if4p5";
|
||||
do_precoding = 0;
|
||||
ru_thread_core = 8;
|
||||
sl_ahead = 5;
|
||||
#tp_cores = "26,18,20,22,24";
|
||||
#num_tp_cores = 5;
|
||||
|
||||
}
|
||||
);
|
||||
|
||||
THREAD_STRUCT = (
|
||||
{
|
||||
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
|
||||
parallel_config = "PARALLEL_SINGLE_THREAD";
|
||||
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
|
||||
worker_config = "WORKER_ENABLE";
|
||||
}
|
||||
);
|
||||
|
||||
rfsimulator :
|
||||
{
|
||||
serveraddr = "server";
|
||||
serverport = "4043";
|
||||
options = (); #("saviq"); or/and "chanmod"
|
||||
modelname = "AWGN";
|
||||
IQfile = "/tmp/rfsimulator.iqs";
|
||||
};
|
||||
|
||||
security = {
|
||||
# preferred ciphering algorithms
|
||||
# the first one of the list that an UE supports in chosen
|
||||
# valid values: nea0, nea1, nea2, nea3
|
||||
ciphering_algorithms = ( "nea0" );
|
||||
|
||||
# preferred integrity algorithms
|
||||
# the first one of the list that an UE supports in chosen
|
||||
# valid values: nia0, nia1, nia2, nia3
|
||||
integrity_algorithms = ( "nia2", "nia0" );
|
||||
|
||||
# setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter
|
||||
# what 'ciphering_algorithms' configures; same thing for 'drb_integrity'
|
||||
drb_ciphering = "yes";
|
||||
drb_integrity = "no";
|
||||
};
|
||||
|
||||
log_config :
|
||||
{
|
||||
global_log_level ="info";
|
||||
global_log_verbosity ="medium";
|
||||
hw_log_level ="info";
|
||||
hw_log_verbosity ="medium";
|
||||
phy_log_level ="info";
|
||||
phy_log_verbosity ="medium";
|
||||
mac_log_level ="info";
|
||||
mac_log_verbosity ="medium";
|
||||
rlc_log_level ="info";
|
||||
rlc_log_verbosity ="medium";
|
||||
pdcp_log_level ="info";
|
||||
pdcp_log_verbosity ="medium";
|
||||
rrc_log_level ="info";
|
||||
rrc_log_verbosity ="medium";
|
||||
ngap_log_level ="info";
|
||||
ngap_log_verbosity ="medium";
|
||||
f1ap_log_level ="info";
|
||||
f1ap_log_verbosity ="medium";
|
||||
};
|
||||
1852
targets/PROJECTS/GENERIC-NR-5GC/CONF/oran.fhi.json
Normal file
1852
targets/PROJECTS/GENERIC-NR-5GC/CONF/oran.fhi.json
Normal file
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user