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@@ -721,456 +721,3 @@ int xran_fh_tx_send_slot(ru_info_t *ru, int frame, int slot, uint64_t timestamp)
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}
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return (0);
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}
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#if defined F_RELEASE
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/** @details Read PRACH and PUSCH data from xran buffers. If
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* I/Q compression (bitwidth < 16 bits) is configured, deccompresses the data
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* before writing. Prints ON TIME counters every 128 frames.
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*
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* Function is blocking and waits for next frame/slot combination. It is unblocked
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* by oai_xran_fh_rx_callback(). It writes the current slot into parameters
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* frame/slot. */
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int xran_fh_rx_read_slot_BySymbol(ru_info_t *ru, int *frame, int *slot)
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{
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void *ptr = NULL;
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int32_t *pos = NULL;
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int idx = 0;
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static int64_t old_rx_counter[XRAN_PORTS_NUM] = {0};
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static int64_t old_tx_counter[XRAN_PORTS_NUM] = {0};
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struct xran_common_counters x_counters[XRAN_PORTS_NUM];
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static int outcnt = 0;
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#ifndef USE_POLLING
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// pull next even from oran_sync_fifo
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notifiedFIFO_elt_t *res = pullNotifiedFIFO(&oran_sync_fifo);
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notifiedFIFO_elt_t *f;
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while ((f = pollNotifiedFIFO(&oran_sync_fifo)) != NULL) {
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oran_sync_info_t *old_info = NotifiedFifoData(res);
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oran_sync_info_t *new_info = NotifiedFifoData(f);
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LOG_E(HW, "Detected double sync message %d.%d => %d.%d\n", old_info->f, old_info->sl, new_info->f, new_info->sl);
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delNotifiedFIFO_elt(res);
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res = f;
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}
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oran_sync_info_t *info = NotifiedFifoData(res);
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*slot = info->sl;
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*frame = info->f;
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delNotifiedFIFO_elt(res);
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#else
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*slot = oran_sync_info.sl;
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*frame = oran_sync_info.f;
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uint32_t tti_in = oran_sync_info.tti;
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static int last_slot = -1;
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LOG_D(HW, "oran slot %d, last_slot %d\n", *slot, last_slot);
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int cnt = 0;
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// while (*slot == last_slot) {
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while (tti_in == oran_sync_info.tti) {
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//*slot = oran_sync_info.sl;
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cnt++;
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}
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LOG_D(HW, "cnt %d, Reading %d.%d\n", cnt, *frame, *slot);
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last_slot = *slot;
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#endif
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// return(0);
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struct xran_fh_config *fh_cfg = get_xran_fh_config(0);
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int slots_per_frame = 10 << fh_cfg->frame_conf.nNumerology;
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int tti = slots_per_frame * (*frame) + (*slot);
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read_prach_data(ru, *frame, *slot);
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const struct xran_fh_init *fh_init = get_xran_fh_init();
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int nPRBs = fh_cfg->nULRBs;
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int fftsize = 1 << fh_cfg->nULFftSize;
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int slot_offset_rxdata = 3 & (*slot);
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uint32_t slot_size = 4 * 14 * fftsize;
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uint8_t *rx_data = (uint8_t *)ru->rxdataF[0];
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uint8_t *start_ptr = NULL;
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int nb_rx_per_ru = ru->nb_rx / fh_init->xran_ports;
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for (uint16_t cc_id = 0; cc_id < 1 /*nSectorNum*/; cc_id++) { // OAI does not support multiple CC yet.
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for (uint8_t ant_id = 0; ant_id < ru->nb_rx; ant_id++) {
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rx_data = (uint8_t *)ru->rxdataF[ant_id];
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start_ptr = rx_data + (slot_size * slot_offset_rxdata);
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const struct xran_frame_config *frame_conf = &get_xran_fh_config(ant_id / nb_rx_per_ru)->frame_conf;
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// skip processing this slot is TX (no RX in this slot)
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if (!is_tdd_ul_guard_slot(frame_conf, *slot))
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continue;
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bool sym_start_found = false;
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int32_t sym_start = 0;
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// This loop would better be more inner to avoid confusion and maybe also errors.
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for (int32_t sym_idx = 0; sym_idx < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_idx++) {
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/* the callback is for mixed and UL slots. In mixed, we have to
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* skip DL and guard symbols. */
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if (!is_tdd_ul_symbol(frame_conf, *slot, sym_idx))
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continue;
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if (!sym_start_found) {
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sym_start = sym_idx;
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sym_start_found = true;
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}
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uint8_t *pData;
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oran_buf_list_t *bufs = get_xran_buffers(ant_id / nb_rx_per_ru);
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uint8_t *pPrbMapData = bufs->dstcp[ant_id % nb_rx_per_ru][tti % XRAN_N_FE_BUF_LEN].pBuffers->pData;
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struct xran_prb_map *pPrbMap = (struct xran_prb_map *)pPrbMapData;
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struct xran_prb_map *pRbMap = pPrbMap;
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for (int idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++) {
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struct xran_prb_elm *pRbElm = &pRbMap->prbMap[idxElm];
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struct xran_section_desc *p_sec_desc = &pRbElm->sec_desc[sym_idx][0];
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pData = p_sec_desc->pData;
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ptr = pData;
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pos = (int32_t *)(start_ptr + (4 * sym_idx * fftsize));
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if (ptr == NULL || pos == NULL)
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continue;
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uint8_t *src = (uint8_t *)ptr;
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LOG_D(HW, "rx pRbMap->nPrbElm %d\n", pRbMap->nPrbElm);
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// For Liteon FR2 with RunSlotPrbMapBySymbolEnable xran_prb_map will have xran_prb_elm prbMap[14], each idxElm matches to sym_idx.
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u_int8_t section_id_tmp = pPrbMap->nPrbElm < XRAN_NUM_OF_SYMBOL_PER_SLOT ? sym_idx - sym_start: sym_idx;
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if (section_id_tmp != pRbElm->nSectId) {
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LOG_D(HW,
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"rx prbMap[%d] : PRBstart %d nPRBs %d nSectId %d != sym_idx %d:%d\n",
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idxElm,
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pRbMap->prbMap[idxElm].nRBStart,
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pRbMap->prbMap[idxElm].nRBSize,
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pRbMap->prbMap[idxElm].nSectId, sym_idx, section_id_tmp
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);
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continue;
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}
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LOG_D(HW,
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"rx prbMap[%d] : PRBstart %d:%d nPRBs %d:%d nSectId %d sym_idx %d:%d\n",
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idxElm,
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pRbMap->prbMap[idxElm].nRBStart, pRbMap->prbMap[idxElm].UP_nRBStart,
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pRbMap->prbMap[idxElm].nRBSize, pRbMap->prbMap[idxElm].UP_nRBSize,
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pRbMap->prbMap[idxElm].nSectId, sym_idx, section_id_tmp
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);
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int pos_len = 0;
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int neg_len = 0;
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int num_prbu = p_sec_desc->num_prbu;
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int start_prbu = p_sec_desc->start_prbu;
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if (start_prbu < (nPRBs >> 1)) // there are PRBs left of DC
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neg_len = min((nPRBs * 6) - (start_prbu * 12), num_prbu * N_SC_PER_PRB);
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pos_len = (num_prbu * N_SC_PER_PRB) - neg_len;
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src = pData;
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// Calculation of the pointer for the section in the buffer.
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// positive half
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uint8_t *dst1 = (uint8_t *)(pos + (neg_len == 0 ? ((start_prbu * N_SC_PER_PRB) - (nPRBs * 6)) : 0));
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// negative half
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uint8_t *dst2 = (uint8_t *)(pos + (start_prbu * N_SC_PER_PRB) + fftsize - (nPRBs * 6));
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int32_t local_dst[num_prbu * N_SC_PER_PRB] __attribute__((aligned(64)));
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if (pRbElm->compMethod == XRAN_COMPMETHOD_NONE) {
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// NOTE: gcc 11 knows how to generate AVX2 for this!
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for (idx = 0; idx < num_prbu * N_SC_PER_PRB * 2; idx++)
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((int16_t *)local_dst)[idx] = ((int16_t)ntohs(((uint16_t *)src)[idx])) >> 2;
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memcpy((void *)dst2, (void *)local_dst, neg_len * 4);
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memcpy((void *)dst1, (void *)&local_dst[neg_len], pos_len * 4);
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} else if (pRbElm->compMethod == XRAN_COMPMETHOD_BLKFLOAT) {
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#if defined(__i386__) || defined(__x86_64__)
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struct xranlib_decompress_request bfp_decom_req = {};
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struct xranlib_decompress_response bfp_decom_rsp = {};
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int16_t payload_len = (3 * pRbElm->iqWidth + 1) * num_prbu;
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bfp_decom_req.data_in = (int8_t *)src;
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bfp_decom_req.numRBs = num_prbu;
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bfp_decom_req.len = payload_len;
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bfp_decom_req.compMethod = pRbElm->compMethod;
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bfp_decom_req.iqWidth = pRbElm->iqWidth;
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bfp_decom_rsp.data_out = (int16_t *)local_dst;
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bfp_decom_rsp.len = 0;
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xranlib_decompress_avx512(&bfp_decom_req, &bfp_decom_rsp);
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#elif defined(__arm__) || defined(__aarch64__)
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armral_bfp_decompression(pRbElm->iqWidth, num_prbu, (int8_t *)src, (int16_t *)local_dst);
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#else
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AssertFatal(1 == 0, "BFP compression not supported on this architecture");
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#endif
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memcpy((void *)dst2, (void *)local_dst, neg_len * 4);
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memcpy((void *)dst1, (void *)&local_dst[neg_len], pos_len * 4);
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outcnt++;
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} else {
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printf("pRbElm->compMethod == %d is not supported\n", pRbElm->compMethod);
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exit(-1);
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}
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}
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} // sym_ind
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} // ant_ind
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} // vv_inf
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if ((*frame & 0x7f) == 0 && *slot == 0 && xran_get_common_counters(gxran_handle, &x_counters[0]) == XRAN_STATUS_SUCCESS) {
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for (int o_xu_id = 0; o_xu_id < fh_init->xran_ports; o_xu_id++) {
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LOG_I(HW,
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"[%s%d][rx %7ld pps %7ld kbps %7ld][tx %7ld pps %7ld kbps %7ld][Total Msgs_Rcvd %ld]\n",
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"o-du ",
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o_xu_id,
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x_counters[o_xu_id].rx_counter,
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x_counters[o_xu_id].rx_counter - old_rx_counter[o_xu_id],
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x_counters[o_xu_id].rx_bytes_per_sec * 8 / 1000L,
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x_counters[o_xu_id].tx_counter,
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x_counters[o_xu_id].tx_counter - old_tx_counter[o_xu_id],
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x_counters[o_xu_id].tx_bytes_per_sec * 8 / 1000L,
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x_counters[o_xu_id].Total_msgs_rcvd);
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for (int rxant = 0; rxant < ru->nb_rx / fh_init->xran_ports; rxant++)
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LOG_I(HW,
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"[%s%d][pusch%d %7ld prach%d %7ld]\n",
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"o_du",
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o_xu_id,
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rxant,
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x_counters[o_xu_id].rx_pusch_packets[rxant],
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rxant,
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x_counters[o_xu_id].rx_prach_packets[rxant]);
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if (x_counters[o_xu_id].rx_counter > old_rx_counter[o_xu_id])
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old_rx_counter[o_xu_id] = x_counters[o_xu_id].rx_counter;
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if (x_counters[o_xu_id].tx_counter > old_tx_counter[o_xu_id])
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old_tx_counter[o_xu_id] = x_counters[o_xu_id].tx_counter;
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}
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}
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return (0);
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}
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/** @details Write PDSCH IQ-data from OAI txdataF_BF buffer to xran buffers. If
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* I/Q compression (bitwidth < 16 bits) is configured, compresses the data
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* before writing. */
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int xran_fh_tx_send_slot_BySymbol(ru_info_t *ru, int frame, int slot, uint64_t timestamp)
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{
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int tti = /*frame*SUBFRAMES_PER_SYSTEMFRAME*SLOTNUM_PER_SUBFRAME+*/ 20 * frame
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+ slot; // commented out temporarily to check that compilation of oran 5g is working.
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void *ptr = NULL;
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int32_t *pos = NULL;
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int idx = 0;
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const struct xran_fh_init *fh_init = get_xran_fh_init();
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const struct xran_fh_config *fh_cfg = get_xran_fh_config(0);
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int nPRBs = fh_cfg->nDLRBs;
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int fftsize = 1 << fh_cfg->nDLFftSize;
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int nb_tx_per_ru = ru->nb_tx / fh_init->xran_ports;
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int nb_rx_per_ru = ru->nb_rx / fh_init->xran_ports;
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// Handle CP UL packet here instead of at xran_fh_rx_read_slot() as oran_fh_if4p5_south_in() lags behind
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// oran_fh_if4p5_south_out() (which is invoked at the right time slot) by 4 slots.
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// Need to use --continuous-tx so that this routine will be triggered in RX slot.
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for (uint16_t cc_id = 0; cc_id < 1 /*nSectorNum*/; cc_id++) { // OAI does not support multiple CC yet.
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for (uint8_t ant_id = 0; ant_id < ru->nb_rx; ant_id++) {
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const struct xran_frame_config *frame_conf = &get_xran_fh_config(ant_id / nb_rx_per_ru)->frame_conf;
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// skip processing this slot is TX (no RX in this slot)
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if (!is_tdd_ul_guard_slot(frame_conf, slot)) {
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continue;
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}
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bool sym_start_found = false;
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int32_t sym_start = 0;
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// This loop would better be more inner to avoid confusion and maybe also errors.
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for (int32_t sym_idx = 0; sym_idx < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_idx++) {
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/* the callback is for mixed and UL slots. In mixed, we have to
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* skip DL and guard symbols. */
|
|
|
|
|
if (!is_tdd_ul_symbol(frame_conf, slot, sym_idx)) {
|
|
|
|
|
continue;
|
|
|
|
|
}
|
|
|
|
|
if (!sym_start_found) {
|
|
|
|
|
sym_start = sym_idx;
|
|
|
|
|
sym_start_found = true;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
oran_buf_list_t *bufs = get_xran_buffers(ant_id / nb_rx_per_ru);
|
|
|
|
|
uint8_t *pPrbMapData = bufs->dstcp[ant_id % nb_rx_per_ru][tti % XRAN_N_FE_BUF_LEN].pBuffers->pData;
|
|
|
|
|
struct xran_prb_map *pPrbMap = (struct xran_prb_map *)pPrbMapData;
|
|
|
|
|
|
|
|
|
|
struct xran_prb_elm *pRbElm = &pPrbMap->prbMap[0];
|
|
|
|
|
|
|
|
|
|
struct xran_prb_map *pRbMap = pPrbMap;
|
|
|
|
|
uint32_t idxElm = 0;
|
|
|
|
|
|
|
|
|
|
LOG_D(HW, "tx0 pRbMap->nPrbElm %d\n", pRbMap->nPrbElm);
|
|
|
|
|
for (idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++) {
|
|
|
|
|
LOG_D(HW, "prbMap[%d] : PRBstart %d nPRBs %d\n", idxElm, pRbMap->prbMap[idxElm].nRBStart, pRbMap->prbMap[idxElm].nRBSize);
|
|
|
|
|
pRbElm = &pRbMap->prbMap[idxElm];
|
|
|
|
|
// For Liteon FR2 with RunSlotPrbMapBySymbolEnable xran_prb_map will have xran_prb_elm prbMap[14], each idxElm matches to sym_idx.
|
|
|
|
|
u_int8_t section_id_tmp = pPrbMap->nPrbElm < XRAN_NUM_OF_SYMBOL_PER_SLOT ? sym_idx - sym_start: sym_idx;
|
|
|
|
|
if (section_id_tmp != pRbElm->nSectId) {
|
|
|
|
|
LOG_D(HW,
|
|
|
|
|
"tx0 prbMap[%d] : PRBstart %d:%d nPRBs %d:%d nSectId %d != sym_idx %d:%d\n",
|
|
|
|
|
idxElm,
|
|
|
|
|
pRbMap->prbMap[idxElm].nRBStart, pRbMap->prbMap[idxElm].UP_nRBStart,
|
|
|
|
|
pRbMap->prbMap[idxElm].nRBSize, pRbMap->prbMap[idxElm].UP_nRBSize,
|
|
|
|
|
pRbMap->prbMap[idxElm].nSectId, sym_idx, section_id_tmp
|
|
|
|
|
);
|
|
|
|
|
continue;
|
|
|
|
|
}
|
|
|
|
|
LOG_D(HW,
|
|
|
|
|
"tx0 prbMap[%d] : PRBstart %d:%d nPRBs %d:%d nSectId %d sym_idx %d:%d\n",
|
|
|
|
|
idxElm,
|
|
|
|
|
pRbMap->prbMap[idxElm].nRBStart, pRbMap->prbMap[idxElm].UP_nRBStart,
|
|
|
|
|
pRbMap->prbMap[idxElm].nRBSize, pRbMap->prbMap[idxElm].UP_nRBSize,
|
|
|
|
|
pRbMap->prbMap[idxElm].nSectId, sym_idx, section_id_tmp
|
|
|
|
|
);
|
|
|
|
|
|
|
|
|
|
// ant_id / no of antenna per beam gives the beam_nb
|
|
|
|
|
pRbElm->nBeamIndex = ru->beam_id[ant_id / (ru->nb_rx / ru->num_beams_period)][slot * XRAN_NUM_OF_SYMBOL_PER_SLOT + sym_idx];
|
|
|
|
|
// In phy-f-1.0/fhi_lib/lib/api/xran_pkt_cp.h, beamId:15 is of 15bit. -1 set extension bit ef:1 to 1 mistakenly.
|
|
|
|
|
if (pRbElm->nBeamIndex == -1)
|
|
|
|
|
pRbElm->nBeamIndex = 0;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
for (uint16_t cc_id = 0; cc_id < 1 /*nSectorNum*/; cc_id++) { // OAI does not support multiple CC yet.
|
|
|
|
|
for (uint8_t ant_id = 0; ant_id < ru->nb_tx; ant_id++) {
|
|
|
|
|
oran_buf_list_t *bufs = get_xran_buffers(ant_id / nb_tx_per_ru);
|
|
|
|
|
const struct xran_frame_config *frame_conf = &get_xran_fh_config(ant_id / nb_tx_per_ru)->frame_conf;
|
|
|
|
|
// skip processing this slot is TX (no TX in this slot)
|
|
|
|
|
if (!is_tdd_dl_guard_slot(frame_conf, slot)) {
|
|
|
|
|
continue;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Set nPrbElm if beam_id = -1 for all downlink symbols
|
|
|
|
|
bool beam_used = false;
|
|
|
|
|
uint8_t *pPrbMapData = bufs->srccp[ant_id % nb_tx_per_ru][tti % XRAN_N_FE_BUF_LEN].pBuffers->pData;
|
|
|
|
|
struct xran_prb_map *pPrbMap = (struct xran_prb_map *)pPrbMapData;
|
|
|
|
|
struct xran_prb_map *pRbMap = pPrbMap;
|
|
|
|
|
int32_t dl_sym_end = 0;
|
|
|
|
|
for (int32_t sym_idx = 0; sym_idx < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_idx++) {
|
|
|
|
|
if (is_tdd_dl_symbol(frame_conf, slot, sym_idx)) {
|
|
|
|
|
if (ru->beam_id[ant_id / (ru->nb_tx / ru->num_beams_period)][slot * XRAN_NUM_OF_SYMBOL_PER_SLOT+ sym_idx] != -1)
|
|
|
|
|
beam_used |= true;
|
|
|
|
|
}
|
|
|
|
|
else {
|
|
|
|
|
dl_sym_end = sym_idx;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
if (is_tdd_guard_slot(frame_conf, slot))
|
|
|
|
|
pRbMap->nPrbElm = dl_sym_end;
|
|
|
|
|
else
|
|
|
|
|
pRbMap->nPrbElm = XRAN_NUM_OF_SYMBOL_PER_SLOT;
|
|
|
|
|
if (!beam_used) {
|
|
|
|
|
pRbMap->nPrbElm = 0;
|
|
|
|
|
continue;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// This loop would better be more inner to avoid confusion and maybe also errors.
|
|
|
|
|
for (int32_t sym_idx = 0; sym_idx < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_idx++) {
|
|
|
|
|
/* the callback is for mixed and UL slots. In mixed, we have to
|
|
|
|
|
* skip UL and guard symbols. */
|
|
|
|
|
if (is_tdd_ul_symbol(frame_conf, slot, sym_idx)) {
|
|
|
|
|
continue;
|
|
|
|
|
}
|
|
|
|
|
uint8_t *pData =
|
|
|
|
|
bufs->src[ant_id % nb_tx_per_ru][tti % XRAN_N_FE_BUF_LEN].pBuffers[sym_idx % XRAN_NUM_OF_SYMBOL_PER_SLOT].pData;
|
|
|
|
|
uint8_t *pPrbMapData = bufs->srccp[ant_id % nb_tx_per_ru][tti % XRAN_N_FE_BUF_LEN].pBuffers->pData;
|
|
|
|
|
struct xran_prb_map *pPrbMap = (struct xran_prb_map *)pPrbMapData;
|
|
|
|
|
ptr = pData;
|
|
|
|
|
pos = &ru->txdataF_BF[ant_id][sym_idx * fftsize];
|
|
|
|
|
|
|
|
|
|
uint8_t *u8dptr;
|
|
|
|
|
struct xran_prb_map *pRbMap = pPrbMap;
|
|
|
|
|
int32_t sym_id = sym_idx % XRAN_NUM_OF_SYMBOL_PER_SLOT;
|
|
|
|
|
if (ptr && pos) {
|
|
|
|
|
uint32_t idxElm = 0;
|
|
|
|
|
u8dptr = (uint8_t *)ptr;
|
|
|
|
|
int16_t payload_len = 0;
|
|
|
|
|
|
|
|
|
|
uint8_t *dst = (uint8_t *)u8dptr;
|
|
|
|
|
|
|
|
|
|
struct xran_prb_elm *p_prbMapElm = &pRbMap->prbMap[idxElm];
|
|
|
|
|
LOG_D(HW, "tx1 pRbMap->nPrbElm %d\n", pRbMap->nPrbElm);
|
|
|
|
|
for (idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++) {
|
|
|
|
|
// For Liteon FR2 with RunSlotPrbMapBySymbolEnable xran_prb_map will have xran_prb_elm prbMap[14], each idxElm matches to sym_idx.
|
|
|
|
|
struct xran_section_desc *p_sec_desc = NULL;
|
|
|
|
|
p_prbMapElm = &pRbMap->prbMap[idxElm];
|
|
|
|
|
if (sym_idx != p_prbMapElm->nSectId)
|
|
|
|
|
continue;
|
|
|
|
|
// ant_id / no of antenna per beam gives the beam_nb
|
|
|
|
|
p_prbMapElm->nBeamIndex = ru->beam_id[ant_id / (ru->nb_tx / ru->num_beams_period)][slot * XRAN_NUM_OF_SYMBOL_PER_SLOT+ sym_idx];
|
|
|
|
|
// In phy-f-1.0/fhi_lib/lib/api/xran_pkt_cp.h, beamId:15 is of 15bit. -1 set extension bit ef:1 to 1 mistakenly.
|
|
|
|
|
if (p_prbMapElm->nBeamIndex == -1)
|
|
|
|
|
p_prbMapElm->nBeamIndex = 0;
|
|
|
|
|
|
|
|
|
|
// assumes one fragment per symbol
|
|
|
|
|
p_sec_desc = &p_prbMapElm->sec_desc[sym_id][0];
|
|
|
|
|
|
|
|
|
|
dst = xran_add_hdr_offset(dst, p_prbMapElm->compMethod);
|
|
|
|
|
|
|
|
|
|
if (p_sec_desc == NULL) {
|
|
|
|
|
printf("p_sec_desc == NULL\n");
|
|
|
|
|
exit(-1);
|
|
|
|
|
}
|
|
|
|
|
uint16_t *dst16 = (uint16_t *)dst;
|
|
|
|
|
|
|
|
|
|
int pos_len = 0;
|
|
|
|
|
int neg_len = 0;
|
|
|
|
|
|
|
|
|
|
if (p_prbMapElm->UP_nRBStart < (nPRBs >> 1)) // there are PRBs left of DC
|
|
|
|
|
neg_len = min((nPRBs * 6) - (p_prbMapElm->UP_nRBStart * 12), p_prbMapElm->UP_nRBSize * N_SC_PER_PRB);
|
|
|
|
|
pos_len = (p_prbMapElm->UP_nRBSize * N_SC_PER_PRB) - neg_len;
|
|
|
|
|
// Calculation of the pointer for the section in the buffer.
|
|
|
|
|
// start of positive frequency component
|
|
|
|
|
uint16_t *src1 = (uint16_t *)&pos[(neg_len == 0) ? ((p_prbMapElm->UP_nRBStart * N_SC_PER_PRB) - (nPRBs * 6)) : 0];
|
|
|
|
|
// start of negative frequency component
|
|
|
|
|
uint16_t *src2 = (uint16_t *)&pos[(p_prbMapElm->UP_nRBStart * N_SC_PER_PRB) + fftsize - (nPRBs * 6)];
|
|
|
|
|
|
|
|
|
|
uint32_t local_src[p_prbMapElm->UP_nRBSize * N_SC_PER_PRB] __attribute__((aligned(64)));
|
|
|
|
|
memcpy((void *)local_src, (void *)src2, neg_len * 4);
|
|
|
|
|
memcpy((void *)&local_src[neg_len], (void *)src1, pos_len * 4);
|
|
|
|
|
if (p_prbMapElm->compMethod == XRAN_COMPMETHOD_NONE) {
|
|
|
|
|
payload_len = p_prbMapElm->UP_nRBSize * N_SC_PER_PRB * 4L;
|
|
|
|
|
/* convert to Network order */
|
|
|
|
|
// NOTE: ggc 11 knows how to generate AVX2 for this!
|
|
|
|
|
for (idx = 0; idx < (pos_len + neg_len) * 2; idx++)
|
|
|
|
|
((uint16_t *)dst16)[idx] = htons(((uint16_t *)local_src)[idx]);
|
|
|
|
|
} else if (p_prbMapElm->compMethod == XRAN_COMPMETHOD_BLKFLOAT) {
|
|
|
|
|
payload_len = (3 * p_prbMapElm->iqWidth + 1) * p_prbMapElm->UP_nRBSize;
|
|
|
|
|
|
|
|
|
|
#if defined(__i386__) || defined(__x86_64__)
|
|
|
|
|
struct xranlib_compress_request bfp_com_req = {};
|
|
|
|
|
struct xranlib_compress_response bfp_com_rsp = {};
|
|
|
|
|
|
|
|
|
|
bfp_com_req.data_in = (int16_t *)local_src;
|
|
|
|
|
bfp_com_req.numRBs = p_prbMapElm->UP_nRBSize;
|
|
|
|
|
bfp_com_req.len = payload_len;
|
|
|
|
|
bfp_com_req.compMethod = p_prbMapElm->compMethod;
|
|
|
|
|
bfp_com_req.iqWidth = p_prbMapElm->iqWidth;
|
|
|
|
|
|
|
|
|
|
bfp_com_rsp.data_out = (int8_t *)dst;
|
|
|
|
|
bfp_com_rsp.len = 0;
|
|
|
|
|
|
|
|
|
|
xranlib_compress_avx512(&bfp_com_req, &bfp_com_rsp);
|
|
|
|
|
#elif defined(__arm__) || defined(__aarch64__)
|
|
|
|
|
armral_bfp_compression(p_prbMapElm->iqWidth, p_prbMapElm->UP_nRBSize, (int16_t *)local_src, (int8_t *)dst);
|
|
|
|
|
#else
|
|
|
|
|
AssertFatal(1 == 0, "BFP compression not supported on this architecture");
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
} else {
|
|
|
|
|
printf("p_prbMapElm->compMethod == %d is not supported\n", p_prbMapElm->compMethod);
|
|
|
|
|
exit(-1);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
p_sec_desc->iq_buffer_offset = RTE_PTR_DIFF(dst, u8dptr);
|
|
|
|
|
p_sec_desc->iq_buffer_len = payload_len;
|
|
|
|
|
|
|
|
|
|
dst += payload_len;
|
|
|
|
|
dst = xran_add_hdr_offset(dst, p_prbMapElm->compMethod);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// The tti should be updated as it increased.
|
|
|
|
|
pRbMap->tti_id = tti;
|
|
|
|
|
|
|
|
|
|
} else {
|
|
|
|
|
printf("ptr ==NULL\n");
|
|
|
|
|
exit(-1); // fails here??
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
return (0);
|
|
|
|
|
}
|
|
|
|
|
#endif
|
