Compare commits

...

69 Commits

Author SHA1 Message Date
Hongzhi Wang
e9e0b200f6 Build bug fix and code cleanup 2021-12-15 10:24:19 +01:00
Hongzhi Wang
fbc5d73314 Merge branch 'develop' into ldpc_offload_t1 2021-12-13 12:30:03 +01:00
Hongzhi Wang
399b161e11 Merge branch 'ldpc_offload_t1' of https://gitlab.eurecom.fr/oai/openairinterface5g into ldpc_offload_t1 2021-12-06 17:28:51 +01:00
Hongzhi Wang
b61b3de3c8 bug fix for build issue and moving malloc to init step for offload 2021-12-06 17:25:38 +01:00
Hongzhi Wang
5636e96c45 fix for the pucchsim build issue 2021-11-30 14:35:11 +01:00
Hongzhi Wang
115fc96f89 Fix for the build issue on ulschsim 2021-11-29 10:22:30 +01:00
Hongzhi Wang
46c7a770bc Revert "using temporarily one l1tx thread for offload"
This reverts commit 18bd73d7fe.
2021-11-26 17:41:16 +01:00
Hongzhi Wang
ba11912922 Bug fix for CI build issue on dlschsim 2021-11-26 17:39:10 +01:00
Hongzhi Wang
18bd73d7fe using temporarily one l1tx thread for offload 2021-11-23 19:47:45 +01:00
Hongzhi Wang
22d459b4f6 add missing dependency condition 2021-11-20 00:05:45 +01:00
Hongzhi Wang
c798b92821 Adding a dependency condition for offload 2021-11-19 16:55:49 +01:00
Hongzhi Wang
a3d944b752 changing back to the default configuration for ulsch 2021-11-19 14:40:31 +01:00
Hongzhi Wang
2b3210eab5 Merge branch 'ulsim-perf-testing' into ldpc_offload_t1 2021-11-19 11:18:44 +01:00
Hongzhi Wang
8714eb359c Merge branch 'develop' into ldpc_offload_t1
Conflicts:
	executables/nr-gnb.c
	executables/nr-ru.c
2021-11-19 10:56:10 +01:00
Hongzhi Wang
653009cbd9 revert 2nd l1tx thread for merge 2021-11-19 10:43:55 +01:00
Hongzhi Wang
3c20b0c660 adding dependency condition for ldpc offload 2021-11-19 10:24:27 +01:00
Sakthivel Velumani
16b8713566 fixed bugs in phy sims 2021-11-19 12:28:34 +05:30
Hongzhi Wang
372061af91 bug fixes and removing warnings 2021-11-15 13:05:52 +01:00
Hongzhi Wang
a47b65726c Merge branch 'develop' into ldpc_offload_t1 2021-11-08 13:32:08 +01:00
Sakthivel Velumani
0539c838d7 Merge branch 'develop' into ulsim-perf-testing 2021-11-02 14:55:17 +05:30
Hongzhi Wang
d161a5d350 using temporarily one l1tx thread and soft ldpc for small mcs 2021-10-25 10:06:29 +02:00
Hongzhi Wang
66573f52a8 bugfix after merge 2021-10-18 17:21:55 +02:00
Hongzhi Wang
62980ae373 Merge branch 'integration_2021_wk41_bwt-abs' into ldpc_offload_t1
Conflicts:
	ci-scripts/xml_files/fr1_sa_quectel.xml
	openair1/SCHED_NR/fapi_nr_l1.c
	openair1/SCHED_NR/phy_procedures_nr_gNB.c
	openair2/GNB_APP/gnb_paramdef.h
2021-10-18 15:02:02 +02:00
Hongzhi Wang
85a0dd89d6 Merge branch 'integration_2021_wk41' into ldpc_offload_t1
Conflicts:
	ci-scripts/xml_files/fr1_sa_quectel.xml
	executables/nr-gnb.c
	openair1/SCHED_NR/fapi_nr_l1.c
	openair1/SCHED_NR/phy_procedures_nr_gNB.c
	openair2/GNB_APP/gnb_config.c
	openair2/GNB_APP/gnb_paramdef.h
2021-10-18 14:53:54 +02:00
hardy
ad65fcf210 fix iperf nohup 2021-10-18 14:53:12 +02:00
Hongzhi Wang
21885f68b1 Merge branch 'ulsim-perf-testing' into ldpc_offload_t1 2021-10-18 09:16:33 +02:00
Sakthivel Velumani
a7907069b5 A bug fix in DMRS averaging 2021-10-16 14:15:51 +05:30
Hongzhi Wang
262f7a7a37 bugfix ulsim after merge 2021-10-14 18:31:44 +02:00
Hongzhi Wang
c9b6f44927 move to cmd option v for eff_tp_check due to conflict 2021-10-14 17:07:02 +02:00
Hongzhi Wang
8937718db6 Merge branch 'ulsim-perf-testing' into ldpc_offload_t-1
Conflicts:
	openair1/SIMULATION/NR_PHY/ulsim.c
2021-10-14 10:45:19 +02:00
rmagueta
ff930ab83d Function cblas_zgemv replaced by cblas_zaxpy because it has an undefined output (for the same input) after a second call in RHEL8 (acorr = nan) 2021-10-14 10:15:20 +05:30
Sakthivel Velumani
c8590630be Enable additional DMRS symbol in UL 2021-10-14 10:13:34 +05:30
Hongzhi Wang
18086ac0d6 Merge branch 'NR_MAC_statisticsthread' into ldpc_offload_t1
Conflicts:
	executables/nr-ru.c
	openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
2021-10-13 11:22:42 +02:00
Sakthivel Velumani
3e84edd4b7 Added 3GPP TS 38104 8.2.1.2-13 16QAM CI test cases 2021-10-12 17:59:12 +05:30
Sakthivel Velumani
6af8b9626d LDPC iterations as command line parameter 2021-10-12 16:57:33 +05:30
Sakthivel Velumani
cb6eb03c72 Add MCS table option to ulsim 2021-10-12 12:58:40 +05:30
Sakthivel Velumani
b10489436d Logging changes to ulsim 2021-10-12 12:58:40 +05:30
Sakthivel Velumani
69c6aade1d Time averaging PUSCH channel estimates 2021-10-12 12:58:40 +05:30
Sakthivel Velumani
7af13db3af Fixed ulsim to test 8 Rx antennas 2021-10-12 12:58:40 +05:30
Florian Kaltenberger
18f289390f Merge remote-tracking branch 'origin/ulsim-perf-testing' into ldpc_offload_t1
Conflicts:
	openair1/SIMULATION/NR_PHY/ulsim.c
2021-10-08 15:00:34 +02:00
Hongzhi Wang
88a39dcba0 add ldpc offload cmdline option for softmodem and remove crc drop flag 2021-10-07 10:38:17 +02:00
Sakthivel Velumani
4c6f9c118c Logging changes to ulsim 2021-10-04 09:54:18 +05:30
Sakthivel Velumani
c8f118d96a Time averaging PUSCH channel estimates 2021-10-04 09:41:08 +05:30
Hongzhi Wang
5e02aa3fc1 adding segment buffer offset and updates 2021-10-03 19:24:14 +02:00
Hongzhi Wang
16baee1cc5 Merge branch 'bandwidth-testing-abs' into ldpc_offload_t1 2021-09-30 16:49:22 +02:00
Florian Kaltenberger
82dab91ac4 init multiple threads for ulsch decoding in nr_ulsim 2021-09-30 16:26:29 +02:00
Sakthivel Velumani
54bf832587 Fixed ulsim to test 8 Rx antennas 2021-09-29 18:25:05 +05:30
Hongzhi Wang
4c992ca9d5 Split fill queue function and move mbuf allocation to init step 2021-09-24 15:25:10 +02:00
Florian Kaltenberger
1d55183d2d some more error checks + data collection 2021-09-24 08:36:59 +02:00
Hongzhi Wang
6870397ffd adding allocation free function for offload 2021-09-15 16:42:54 +02:00
Florian Kaltenberger
531c8e76d6 adding some error checks 2021-09-14 10:07:26 +02:00
Florian Kaltenberger
800d7f5a70 adding some error checks 2021-09-13 16:53:41 +02:00
Hongzhi Wang
8b0810f494 Merge branch 'bandwidth-testing' into ldpc_offload_t1 2021-09-08 11:50:31 +02:00
Hongzhi Wang
0608527432 Merge branch 'develop' into ldpc_offload_t1 2021-09-08 11:24:57 +02:00
Hongzhi Wang
e13c5b7dd7 add offload on cmdline and bugfix 2021-09-08 09:41:56 +02:00
Hongzhi Wang
f5f97d6215 Merge branch 'develop' into ldpc_offload_t1 2021-09-02 16:21:31 +02:00
Hongzhi Wang
be3587d944 Load ldpc_offload lib in softmodem 2021-09-02 16:03:39 +02:00
Hongzhi Wang
75af7339be adding post decoding for offload 2021-08-30 11:17:17 +02:00
Hongzhi Wang
2b7194ba51 Initializing the device in lib load function 2021-08-23 11:12:38 +02:00
Hongzhi Wang
e573aaf3e5 moving more init functions to device initialization 2021-08-18 11:47:17 +02:00
Hongzhi Wang
6aa3315698 moving device init functions out from decoding 2021-08-07 15:07:35 +02:00
Hongzhi Wang
ef1ffce11e adding offload multiple segments 2021-08-06 10:54:31 +02:00
Hongzhi Wang
887f8a9046 code cleanup ldpc offload 2021-07-27 14:32:15 +02:00
Hongzhi Wang
a2c9a280e7 moving ldpc offload to ulsch decoding function 2021-07-26 16:29:59 +02:00
Hongzhi Wang
eab51f6ad1 removing hardcoded parameters 2021-07-20 16:28:16 +02:00
Hongzhi Wang
f8e3d922d0 removing test vector config file 2021-07-20 10:31:19 +02:00
Hongzhi Wang
eef90a1e22 Update ldpc offload decoder input and output 2021-07-13 17:32:56 +02:00
Hongzhi Wang
273965e9d1 adding temporarily bbdev testsuite in ldpc_decoder_offload to check t1 card connection 2021-06-18 15:28:04 +02:00
Hongzhi Wang
12a0ca65e0 adding dpdk library and ldpc offload library 2021-06-10 18:43:59 +02:00
37 changed files with 2634 additions and 130 deletions

View File

@@ -2298,7 +2298,9 @@ class OaiCiTest():
SSH.open(Module_UE.HostIPAddress, Module_UE.HostUsername, Module_UE.HostPassword)
cmd = 'rm ' + server_filename
SSH.command(cmd,'\$',5)
cmd = 'echo $USER; nohup iperf -s -B ' + UE_IPAddress + ' -u 2>&1 > ' + server_filename + ' &'
SSH.command(cmd,'\$',5)
SSH.close()
#client side EPC
@@ -2373,7 +2375,9 @@ class OaiCiTest():
SSH.open(Module_UE.HostIPAddress, Module_UE.HostUsername, Module_UE.HostPassword)
cmd = 'rm iperf_server_' + self.testCase_id + '_' + self.ue_id + '.log'
SSH.command(cmd,'\$',5)
cmd = 'echo $USER; nohup /opt/iperf-2.0.10/iperf -s -B ' + UE_IPAddress + ' -u 2>&1 > iperf_server_' + self.testCase_id + '_' + self.ue_id + '.log &'
SSH.command(cmd,'\$',5)
SSH.close()
#client side EPC
@@ -2396,7 +2400,9 @@ class OaiCiTest():
SSH.open(EPC.IPAddress, EPC.UserName, EPC.Password)
cmd = 'rm iperf_server_' + self.testCase_id + '_' + self.ue_id + '.log'
SSH.command(cmd,'\$',5)
cmd = 'echo $USER; nohup iperf -s -u 2>&1 > iperf_server_' + self.testCase_id + '_' + self.ue_id + '.log &'
SSH.command(cmd,'\$',5)
SSH.close()

View File

@@ -186,7 +186,6 @@ else (CUDA_FOUND)
message ("No CUDA tool installed")
endif ()
###########################################
# macros to define options as there is numerous options in oai
################################################
@@ -911,13 +910,14 @@ set(TPLIB_ETHERNET_SOURCE
add_library(oai_eth_transpro MODULE ${TPLIB_ETHERNET_SOURCE} )
include_directories("${OPENAIR_TARGETS}/ARCH/AW2SORI/")
link_directories("/usr/local/lib")
#target_link_directories(aw2sori_transpro PRIVATE "/usr/local/lib")
set(HWLIB_AW2SORI_SOURCE
${OPENAIR_TARGETS}/ARCH/AW2SORI/oaiori.c
)
add_library(aw2sori_transpro MODULE ${HWLIB_AW2SORI_SOURCE})
target_compile_options(aw2sori_transpro PRIVATE -shared -fPIC -msse4 -g -ggdb -DLITE_COMPILATION)
target_link_libraries(aw2sori_transpro libori.so)
target_link_directories(aw2sori_transpro PRIVATE "/usr/local/lib")
include_directories("${OPENAIR_TARGETS}/ARCH/IRIS/USERSPACE/LIB/")
set(option_HWIRISLIB_lib "-l SoapySDR")
@@ -949,11 +949,13 @@ set(HWLIB_TCP_BRIDGE_OAI_SOURCE
add_library(tcp_bridge_oai MODULE ${HWLIB_TCP_BRIDGE_OAI_SOURCE} )
set_target_properties(tcp_bridge_oai PROPERTIES COMPILE_FLAGS "-fvisibility=hidden")
pkg_search_module(DPDK dpdk>=20.5)
# Benetel 4G library
######################################################################
include_directories ("/usr/include/dpdk")
#include_directories ("/usr/include/dpdk")
set(HWLIB_BENETEL_4G_SOURCE
${OPENAIR_TARGETS}/ARCH/ETHERNET/benetel/4g/benetel.c
@@ -990,6 +992,25 @@ TARGET_LINK_LIBRARIES(benetel_5g pthread dl rt m numa)
##########################################################
# LDPC offload library
##########################################################
set(HWLIB_LDPC_OFFLOAD_SOURCE
${OPENAIR1_DIR}/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_offload.c
)
if (DPDK_FOUND)
add_library(ldpc_offload MODULE ${HWLIB_LDPC_OFFLOAD_SOURCE} )
set_target_properties(ldpc_offload PROPERTIES COMPILE_FLAGS "-include rte_config.h -march=native -I/usr/local/include -DALLOW_EXPERIMENTAL_API")
SET(T1_DPDK_LIBS "-Wl,-rpath /usr/local/lib64 -L/usr/local/lib64 -lrte_node -lrte_graph -lrte_bpf -lrte_flow_classify -lrte_pipeline -lrte_table -lrte_port -lrte_fib -lrte_ipsec -lrte_vhost -lrte_stack -lrte_security -lrte_sched -lrte_reorder -lrte_rib -lrte_rawdev -lrte_pdump -lrte_power -lrte_member -lrte_lpm -lrte_latencystats -lrte_kni -lrte_jobstats -lrte_ip_frag -lrte_gso -lrte_gro -lrte_eventdev -lrte_efd -lrte_distributor -lrte_cryptodev -lrte_compressdev -lrte_cfgfile -lrte_bitratestats -lrte_bbdev -lrte_acl -lrte_timer -lrte_hash -lrte_metrics -lrte_cmdline -lrte_pci -lrte_ethdev -lrte_meter -lrte_net -lrte_mbuf -lrte_mempool -lrte_rcu -lrte_ring -lrte_eal -lrte_telemetry -lrte_kvargs -Wl,--whole-archive -L/usr/local/lib64 -lrte_common_cpt -lrte_common_dpaax -lrte_common_iavf -lrte_common_octeontx -lrte_common_octeontx2 -lrte_bus_dpaa -lrte_bus_fslmc -lrte_bus_ifpga -lrte_bus_pci -lrte_bus_vdev -lrte_bus_vmbus -lrte_mempool_bucket -lrte_mempool_dpaa -lrte_mempool_dpaa2 -lrte_mempool_octeontx -lrte_mempool_octeontx2 -lrte_mempool_ring -lrte_mempool_stack -lrte_pmd_af_packet -lrte_pmd_ark -lrte_pmd_hns3 -lrte_pmd_iavf -lrte_pmd_ice -lrte_pmd_igc -lrte_pmd_ixgbe -lrte_pmd_kni -lrte_pmd_liquidio -lrte_pmd_memif -lrte_pmd_netvsc -lrte_pmd_nfp -lrte_pmd_null -lrte_pmd_octeontx -lrte_pmd_octeontx2 -lrte_pmd_pcap -lrte_pmd_pfe -lrte_pmd_qede -lrte_pmd_ring -lrte_pmd_sfc -lrte_pmd_softnic -lrte_pmd_tap -lrte_pmd_thunderx -lrte_pmd_vdev_netvsc -lrte_pmd_vhost -lrte_pmd_virtio -lrte_pmd_vmxnet3 -lrte_rawdev_dpaa2_cmdif -lrte_rawdev_dpaa2_qdma -lrte_rawdev_ioat -lrte_rawdev_ntb -lrte_rawdev_octeontx2_dma -lrte_rawdev_octeontx2_ep -lrte_rawdev_skeleton -lrte_pmd_caam_jr -lrte_pmd_ccp -lrte_pmd_dpaa_sec -lrte_pmd_dpaa2_sec -lrte_pmd_nitrox -lrte_pmd_null_crypto -lrte_pmd_octeontx_crypto -lrte_pmd_octeontx2_crypto -lrte_pmd_openssl -lrte_pmd_crypto_scheduler -lrte_pmd_virtio_crypto -lrte_pmd_octeontx_compress -lrte_pmd_qat -lrte_pmd_zlib -lrte_pmd_ifc -lrte_pmd_dpaa_event -lrte_pmd_dpaa2_event -lrte_pmd_octeontx2_event -lrte_pmd_opdl_event -lrte_pmd_skeleton_event -lrte_pmd_sw_event -lrte_pmd_dsw_event -lrte_pmd_octeontx_event -lrte_pmd_bbdev_null -lrte_pmd_bbdev_fpga_5gnr_fec -lrte_pmd_hpac_sdfec_pmd -Wl,--no-whole-archive -lrte_node -lrte_graph -lrte_bpf -lrte_flow_classify -lrte_pipeline -lrte_table -lrte_port -lrte_fib -lrte_ipsec -lrte_vhost -lrte_stack -lrte_security -lrte_sched -lrte_reorder -lrte_rib -lrte_rawdev -lrte_pdump -lrte_power -lrte_member -lrte_lpm -lrte_latencystats -lrte_kni -lrte_jobstats -lrte_ip_frag -lrte_gso -lrte_gro -lrte_eventdev -lrte_efd -lrte_distributor -lrte_cryptodev -lrte_compressdev -lrte_cfgfile -lrte_bitratestats -lrte_bbdev -lrte_acl -lrte_timer -lrte_hash -lrte_metrics -lrte_cmdline -lrte_pci -lrte_ethdev -lrte_meter -lrte_net -lrte_mbuf -lrte_mempool -lrte_rcu -lrte_ring -lrte_eal -lrte_telemetry -lrte_kvargs -Wl,-Bdynamic -pthread -lm -ldl -lnuma -lpcap")
target_link_libraries(ldpc_offload ${T1_DPDK_LIBS})
target_link_libraries(ldpc_offload pthread dl rt m numa)
endif (DPDK_FOUND)
##########################################################
include_directories ("${OPENAIR_TARGETS}/ARCH/COMMON")
Message("DEADLINE_SCHEDULER flag is ${DEADLINE_SCHEDULER}")
@@ -3061,7 +3082,11 @@ target_link_libraries (nr-softmodem pthread m ${CONFIG_LIB} rt crypt ${CRYPTO_LI
target_link_libraries (nr-softmodem ${LIB_LMS_LIBRARIES})
target_link_libraries (nr-softmodem ${T_LIB})
add_dependencies( nr-softmodem ldpc_orig ldpc_optim ldpc_optim8seg ldpc )
add_dependencies( nr-softmodem ldpc_orig ldpc_optim ldpc_optim8seg ldpc)
if (DPDK_FOUND)
target_link_libraries( nr-softmodem ldpc_offload)
endif (DPDK_FOUND)
add_executable(ocp-gnb
${rrc_h}
@@ -3341,6 +3366,13 @@ add_executable(nr_ulsim
${T_SOURCE}
${SHLIB_LOADER_SOURCES}
)
add_dependencies( nr_ulsim ldpc_orig ldpc_optim ldpc_optim8seg ldpc)
if(DPDK_FOUND)
target_link_libraries( nr_ulsim ldpc_offload)
endif (DPDK_FOUND)
target_link_libraries(nr_ulsim
-Wl,--start-group UTIL SIMU_COMMON SIMU PHY_COMMON PHY_NR_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB SCHED_NR_UE_LIB MAC_NR MAC_UE_NR MAC_NR_COMMON RRC_LIB NR_RRC_LIB CONFIG_LIB L2_LTE_NR L2_NR HASHTABLE X2AP_ENB X2AP_LIB SECU_CN NGAP_GNB -Wl,--end-group
m pthread ${ATLAS_LIBRARIES} ${T_LIB} ITTI ${OPENSSL_LIBRARIES} dl

View File

@@ -1302,7 +1302,10 @@
(Test12: SC-FDMA, 216 PRBs),
(Test13: SC-FDMA, 273 PRBs),
(Test14: SC-FDMA, 3 DMRS),
(Test15: MCS 16 50 PRBs 2 RX_Antenna)</desc>
(Test15: MCS 16 50 PRBs 2 RX_Antenna),
(Test16: 3GPP G-FR1-A4-13 2 RX Antennas Requirements Test),
(Test17: 3GPP G-FR1-A4-13 4 RX Antennas Requirements Test),
(Test18: 3GPP G-FR1-A4-13 8 RX Antennas Requirements Test)</desc>
<pre_compile_prog></pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args> --phy_simulators -c </compile_prog_args>
@@ -1314,18 +1317,20 @@
-n100 -m28 -s20
-n100 -m9 -R217 -r217 -s5
-n100 -m9 -R273 -r273 -s5
-n100 -s5 -U 2 0 1
-n100 -s5 -T 2 1 2 -U 2 0 2
-n100 -s5 -T 2 2 2 -U 2 1 2
-n100 -s5 -a4 -b8 -T 2 1 2 -U 2 1 3
-n100 -s5 -U 3 0 1 1
-n100 -s5 -T 2 1 2 -U 3 0 2 1
-n100 -s5 -T 2 2 2 -U 3 1 2 1
-n100 -s5 -a4 -b8 -T 2 1 2 -U 3 1 3 1
-n100 -s5 -Z
-n100 -s5 -Z -r75
-n50 -s5 -Z -r216 -R217
-n50 -s5 -Z -r270 -R273
-n100 -s5 -Z -U 2 0 2
-n100 -m16 -s10 -z2</main_exec_args>
<tags>nr_ulsim.test1 nr_ulsim.test2 nr_ulsim.test3 nr_ulsim.test4 nr_ulsim.test5 nr_ulsim.test6 nr_ulsim.test7 nr_ulsim.test8 nr_ulsim.test9 nr_ulsim.test10 nr_ulsim.test11 nr_ulsim.test12 nr_ulsim.test13 nr_ulsim.test14 nr_ulsim.test15</tags>
-n100 -s5 -Z -U 3 0 2 1
-n100 -m16 -s10 -z2
-m16 -r106 -s8.4 -S9 -z2 -n2000 -U 3 1 1 2 -gI -b14 -t70 -I15
-m16 -r106 -s5 -S5.6 -z4 -n2000 -U 3 1 1 2 -gI -b14 -t70 -I15
-m16 -r106 -s3 -S3.6 -z8 -n2000 -U 3 1 1 2 -gI -b14 -t70 -I15</main_exec_args>
<tags>nr_ulsim.test1 nr_ulsim.test2 nr_ulsim.test3 nr_ulsim.test4 nr_ulsim.test5 nr_ulsim.test6 nr_ulsim.test7 nr_ulsim.test8 nr_ulsim.test9 nr_ulsim.test10 nr_ulsim.test11 nr_ulsim.test12 nr_ulsim.test13 nr_ulsim.test14 nr_ulsim.test15 nr_ulsim.test16 nr_ulsim.test17 nr_ulsim.test18</tags>
<search_expr_true>PUSCH test OK</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
<nruns>3</nruns>

View File

@@ -441,7 +441,7 @@ void init_gNB_Tpool(int inst) {
reset_meas(&msgDataTx->phy_proc_tx);
gNB->phy_proc_tx_1 = &msgDataTx->phy_proc_tx;
pushNotifiedFIFO(gNB->resp_L1_tx,msgL1Tx); // to unblock the process in the beginning
// RU TX result FIFO
gNB->resp_RU_tx = (notifiedFIFO_t*) malloc(sizeof(notifiedFIFO_t));
initNotifiedFIFO(gNB->resp_RU_tx);
@@ -504,6 +504,7 @@ void init_eNB_afterRU(void) {
for (inst=0; inst<RC.nb_nr_inst; inst++) {
LOG_I(PHY,"RC.nb_nr_CC[inst:%d]:%p\n", inst, RC.gNB[inst]);
gNB = RC.gNB[inst];
gNB->ldpc_offload_flag = ldpc_offload_flag;
phy_init_nr_gNB(gNB,0,0);
// map antennas and PRACH signals to gNB RX

View File

@@ -96,7 +96,7 @@
#define CONFIG_HLP_WORKER_CMD "two option for worker 'WORKER_DISABLE' or 'WORKER_ENABLE'\n"
#define CONFIG_HLP_USRP_THREAD "having extra thead for usrp tx\n"
#define CONFIG_HLP_DISABLNBIOT "disable nb-iot, even if defined in config\n"
#define CONFIG_HLP_LDPC_OFFLOAD "enable LDPC offload\n"
#define CONFIG_HLP_USRP_ARGS "set the arguments to identify USRP (same syntax as in UHD)\n"
#define CONFIG_HLP_FLOG "Enable online log \n"

View File

@@ -29,6 +29,7 @@
{"D" , CONFIG_HLP_DLBM_PHYTEST,0, u64ptr:&dlsch_slot_bitmap, defintval:0, TYPE_UINT64, 0}, \
{"U" , CONFIG_HLP_ULBM_PHYTEST,0, u64ptr:&ulsch_slot_bitmap, defintval:0, TYPE_UINT64, 0}, \
{"usrp-tx-thread-config", CONFIG_HLP_USRP_THREAD, 0, iptr:&usrp_tx_thread, defstrval:0, TYPE_INT, 0}, \
{"ldpc-offload-enable", CONFIG_HLP_LDPC_OFFLOAD, 0, iptr:&ldpc_offload_flag, defstrval:0, TYPE_INT, 0}, \
{"s" , CONFIG_HLP_SNR, 0, dblptr:&snr_dB, defdblval:25, TYPE_DOUBLE, 0}, \
}
@@ -41,6 +42,7 @@ extern uint32_t target_dl_bw;
extern uint32_t target_ul_bw;
extern uint64_t dlsch_slot_bitmap;
extern uint64_t ulsch_slot_bitmap;
extern uint32_t ldpc_offload_flag;
// In nr-gnb.c
extern void init_gNB(int single_thread_flag,int wait_for_sync);

View File

@@ -328,6 +328,7 @@ void set_options(int CC_id, PHY_VARS_NR_UE *UE){
LOG_I(PHY, "Set UE nb_rx_antenna %d, nb_tx_antenna %d, threequarter_fs %d, ssb_start_subcarrier %d\n", fp->nb_antennas_rx, fp->nb_antennas_tx, fp->threequarter_fs, fp->ssb_start_subcarrier);
fp->ofdm_offset_divisor = nrUE_params.ofdm_offset_divisor;
UE->max_ldpc_iterations = nrUE_params.max_ldpc_iterations;
}

View File

@@ -7,10 +7,11 @@
#define CONFIG_HLP_IF_FREQ "IF frequency for RF, if needed"
#define CONFIG_HLP_IF_FREQ_OFF "UL IF frequency offset for RF, if needed"
#define CONFIG_HLP_IF_FREQ "IF frequency for RF, if needed\n"
#define CONFIG_HLP_IF_FREQ_OFF "UL IF frequency offset for RF, if needed\n"
#define CONFIG_HLP_DLSCH_PARA "number of threads for dlsch processing 0 for no parallelization\n"
#define CONFIG_HLP_OFFSET_DIV "Divisor for computing OFDM symbol offset in Rx chain (num samples in CP/<the value>). Default value is 8. To set the sample offset to 0, set this value ~ 10e6\n"
#define CONFIG_HLP_MAX_LDPC_ITERATIONS "Maximum LDPC decoder iterations\n"
/***************************************************************************************************************************************/
/* command line options definitions, CMDLINE_XXXX_DESC macros are used to initialize paramdef_t arrays which are then used as argument
when calling config_get or config_getlist functions */
@@ -32,6 +33,7 @@
{"single-thread-disable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&single_thread_flag, defintval:1, TYPE_INT, 0}, \
{"dlsch-parallel", CONFIG_HLP_DLSCH_PARA, 0, iptr:(int32_t *)&nrUE_params.nr_dlsch_parallel, defintval:0, TYPE_UINT8, 0}, \
{"offset-divisor", CONFIG_HLP_OFFSET_DIV, 0, uptr:(uint32_t *)&nrUE_params.ofdm_offset_divisor, defuintval:UINT_MAX, TYPE_UINT32, 0}, \
{"max-ldpc-iterations", CONFIG_HLP_MAX_LDPC_ITERATIONS, 0, uptr:(uint32_t *)&nrUE_params.max_ldpc_iterations, defuintval:5, TYPE_UINT8, 0}, \
{"nr-dlsch-demod-shift", CONFIG_HLP_DLSHIFT, 0, iptr:(int32_t *)&nr_dlsch_demod_shift, defintval:0, TYPE_INT, 0}, \
{"V" , CONFIG_HLP_VCD, PARAMFLAG_BOOL, iptr:&vcdflag, defintval:0, TYPE_INT, 0}, \
{"rrc_config_path", CONFIG_HLP_RRC_CFG_PATH,0, strptr:(char **)&rrc_config_path, defstrval:"./", TYPE_STRING, 0} \
@@ -74,6 +76,7 @@ typedef struct {
uint64_t optmask; //mask to store boolean config options
uint32_t ofdm_offset_divisor; // Divisor for sample offset computation for each OFDM symbol
uint8_t nr_dlsch_parallel; // number of threads for dlsch decoding, 0 means no parallelization
uint8_t max_ldpc_iterations; // number of maximum LDPC iterations
tpool_t Tpool; // thread pool
} nrUE_params_t;
extern uint64_t get_nrUE_optmask(void);

View File

@@ -47,7 +47,7 @@ char *parallel_config=NULL;
char *worker_config=NULL;
msc_interface_t msc_interface;
int usrp_tx_thread = 0;
uint32_t ldpc_offload_flag=0;
uint8_t nfapi_mode=0;
static mapping softmodem_funcs[] = MAPPING_SOFTMODEM_FUNCTIONS;

View File

@@ -267,6 +267,7 @@ extern int usrp_tx_thread;
extern uint16_t sl_ahead;
extern uint16_t sf_ahead;
extern volatile int oai_exit;
extern uint32_t ldpc_offload_flag;
void tx_func(void *param);
void rx_func(void *param);

View File

@@ -38,7 +38,6 @@
#define MAX_TURBO_ITERATIONS_MBSFN 8
#define MAX_TURBO_ITERATIONS max_turbo_iterations
#define MAX_LDPC_ITERATIONS 5
#define MAX_LDPC_ITERATIONS_MBSFN 4
#define LTE_NULL 2

File diff suppressed because it is too large Load Diff

View File

@@ -0,0 +1,135 @@
/* SPDX-License-Identifier: BSD-3-Clause
* Copyright(c) 2017 Intel Corporation
*/
#ifndef _MAIN_H_
#define _MAIN_H_
#include <stddef.h>
#include <sys/queue.h>
#include <rte_common.h>
#include <rte_hexdump.h>
#include <rte_log.h>
#define TEST_SUCCESS 0
#define TEST_FAILED -1
#define TEST_SKIPPED 1
#define MAX_BURST 512U
#define DEFAULT_BURST 32U
#define DEFAULT_OPS 64U
#define DEFAULT_ITER 6U
enum op_data_type {
DATA_INPUT = 0,
DATA_SOFT_OUTPUT,
DATA_HARD_OUTPUT,
DATA_HARQ_INPUT,
DATA_HARQ_OUTPUT,
DATA_NUM_TYPES,
};
#define TEST_ASSERT(cond, msg, ...) do { \
if (!(cond)) { \
printf("TestCase %s() line %d failed: " \
msg "\n", __func__, __LINE__, ##__VA_ARGS__); \
return TEST_FAILED; \
} \
} while (0)
/* Compare two buffers (length in bytes) */
#define TEST_ASSERT_BUFFERS_ARE_EQUAL(a, b, len, msg, ...) do { \
if (memcmp((a), (b), len)) { \
printf("TestCase %s() line %d failed: " \
msg "\n", __func__, __LINE__, ##__VA_ARGS__); \
rte_memdump(stdout, "Buffer A", (a), len); \
rte_memdump(stdout, "Buffer B", (b), len); \
return TEST_FAILED; \
} \
} while (0)
#define TEST_ASSERT_SUCCESS(val, msg, ...) do { \
typeof(val) _val = (val); \
if (!(_val == 0)) { \
printf("TestCase %s() line %d failed (err %d): " \
msg "\n", __func__, __LINE__, _val, \
##__VA_ARGS__); \
return TEST_FAILED; \
} \
} while (0)
#define TEST_ASSERT_FAIL(val, msg, ...) \
TEST_ASSERT_SUCCESS(!(val), msg, ##__VA_ARGS__)
#define TEST_ASSERT_NOT_NULL(val, msg, ...) do { \
if ((val) == NULL) { \
printf("TestCase %s() line %d failed (null): " \
msg "\n", __func__, __LINE__, ##__VA_ARGS__); \
return TEST_FAILED; \
} \
} while (0)
struct unit_test_case {
int (*setup)(void);
void (*teardown)(void);
int (*testcase)(void);
const char *name;
};
#define TEST_CASE(testcase) {NULL, NULL, testcase, #testcase}
#define TEST_CASE_ST(setup, teardown, testcase) \
{setup, teardown, testcase, #testcase}
#define TEST_CASES_END() {NULL, NULL, NULL, NULL}
struct unit_test_suite {
const char *suite_name;
int (*setup)(void);
void (*teardown)(void);
struct unit_test_case unit_test_cases[];
};
int unit_test_suite_runner(struct unit_test_suite *suite);
typedef int (test_callback)(void);
TAILQ_HEAD(test_commands_list, test_command);
struct test_command {
TAILQ_ENTRY(test_command) next;
const char *command;
test_callback *callback;
};
void add_test_command(struct test_command *t);
/* Register a test function */
#define REGISTER_TEST_COMMAND(name, testsuite) \
static int test_func_##name(void) \
{ \
return unit_test_suite_runner(&testsuite); \
} \
static struct test_command test_struct_##name = { \
.command = RTE_STR(name), \
.callback = test_func_##name, \
}; \
RTE_INIT(test_register_##name) \
{ \
add_test_command(&test_struct_##name); \
}
const char *get_vector_filename(void);
unsigned int get_num_ops(void);
unsigned int get_burst_sz(void);
unsigned int get_num_lcores(void);
double get_snr(void);
unsigned int get_iter_max(void);
bool get_init_device(void);
#endif

View File

@@ -74,6 +74,20 @@ typedef struct nrLDPC_dec_params {
e_nrLDPC_outMode outMode; /**< Output format */
} t_nrLDPC_dec_params;
/**
Structure containing LDPC decoder parameters.
*/
typedef struct nrLDPCoffload_params {
uint8_t BG; /**< Base graph */
uint16_t Z;
uint16_t Kr;
uint8_t rv;
uint32_t E;
uint16_t n_cb;
uint16_t F; /**< Filler bits */
uint8_t Qm; /**< Modulation */
} t_nrLDPCoffload_params;
/**
Structure containing LDPC decoder processing time statistics.
*/

View File

@@ -23,6 +23,7 @@
#ifndef __NRLDPC_DEFS__H__
#define __NRLDPC_DEFS__H__
#include "openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_types.h"
/**
\brief LDPC encoder
\param 1 input
@@ -57,4 +58,6 @@ typedef int(*nrLDPC_encoderfunc_t)(unsigned char **,unsigned char **,int,int,sho
\param p_profiler LDPC profiler statistics
*/
typedef int32_t(*nrLDPC_decoderfunc_t)(t_nrLDPC_dec_params* , int8_t*, int8_t* , t_nrLDPC_procBuf* , t_nrLDPC_time_stats* );
typedef int32_t(*nrLDPC_decoffloadfunc_t)(t_nrLDPC_dec_params* , uint8_t , uint8_t, uint16_t, uint32_t, uint8_t, int8_t*, int8_t* ,uint8_t);
typedef int32_t(*nrLDPC_dectopfunc_t)(void);
#endif

View File

@@ -23,16 +23,25 @@
#ifdef LDPC_LOADER
nrLDPC_decoderfunc_t nrLDPC_decoder;
nrLDPC_encoderfunc_t nrLDPC_encoder;
nrLDPC_decoffloadfunc_t nrLDPC_decoder_offload;
nrLDPC_dectopfunc_t top_testsuite;
nrLDPC_initcallfunc_t nrLDPC_initcall;
#else
/* functions to load the LDPC shared lib, implemented in openair1/PHY/CODING/nrLDPC_load.c */
extern int load_nrLDPClib(char *version) ;
extern int load_nrLDPClib_offload(void) ;
extern int free_nrLDPClib_offload(void) ;
extern int load_nrLDPClib_ref(char *libversion, nrLDPC_encoderfunc_t * nrLDPC_encoder_ptr); // for ldpctest
/* ldpc coder/decoder functions, as loaded by load_nrLDPClib(). */
extern nrLDPC_initcallfunc_t nrLDPC_initcall;
extern nrLDPC_decoderfunc_t nrLDPC_decoder;
extern nrLDPC_encoderfunc_t nrLDPC_encoder;
extern nrLDPC_decoffloadfunc_t nrLDPC_decoder_offload;
extern nrLDPC_dectopfunc_t top_testsuite;
// inline functions:
#include "openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_init_mem.h"
#endif

View File

@@ -71,6 +71,56 @@ int load_nrLDPClib(char *version) {
return 0;
}
int load_nrLDPClib_offload(void) {
loader_shlibfunc_t shlib_decoffload_fdesc;
shlib_decoffload_fdesc.fname = "nrLDPC_decod_offload";
int ret=load_module_shlib("ldpc_offload",&shlib_decoffload_fdesc,1,NULL);
AssertFatal( (ret >= 0),"Error loading ldpc decoder offload");
nrLDPC_decoder_offload = (nrLDPC_decoffloadfunc_t)shlib_decoffload_fdesc.fptr;
t_nrLDPC_dec_params decParams;
t_nrLDPC_dec_params* p_decParams = &decParams;
int8_t l[68*384];
int8_t llrProcBuf[22*384];
p_decParams->Z = 384;
p_decParams->BG = 1;
AssertFatal(nrLDPC_decoder_offload(p_decParams,
1,
0,
0,
25344,
8,
l,
llrProcBuf, 0)>=0,
"error loading LDPC decoder offload library\n");
return 0;
}
int free_nrLDPClib_offload(void) {
t_nrLDPC_dec_params decParams;
t_nrLDPC_dec_params* p_decParams = &decParams;
int8_t l[68*384];
int8_t llrProcBuf[22*384];
p_decParams->Z = 384;
p_decParams->BG = 1;
nrLDPC_decoder_offload(p_decParams,
1,
0,
0,
25344,
8,
l,
llrProcBuf, 2);
return 0;
}
int load_nrLDPClib_ref(char *libversion, nrLDPC_encoderfunc_t * nrLDPC_encoder_ptr) {
loader_shlibfunc_t shlib_encoder_fdesc;

View File

@@ -109,6 +109,9 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
init_scrambling_luts();
init_pucch2_luts();
load_nrLDPClib(NULL);
if (gNB->ldpc_offload_flag)
load_nrLDPClib_offload();
// PBCH DMRS gold sequences generation
nr_init_pbch_dmrs(gNB);
//PDCCH DMRS init
@@ -552,7 +555,7 @@ void init_nr_transport(PHY_VARS_gNB *gNB) {
for (int j=0; j<2; j++) {
// ULSCH for data
gNB->ulsch[i][j] = new_gNB_ulsch(MAX_LDPC_ITERATIONS, fp->N_RB_UL, 0);
gNB->ulsch[i][j] = new_gNB_ulsch(gNB->max_ldpc_iterations, fp->N_RB_UL, 0);
if (!gNB->ulsch[i][j]) {
LOG_E(PHY,"Can't get gNB ulsch structures\n");

View File

@@ -467,15 +467,15 @@ void init_nr_ue_transport(PHY_VARS_NR_UE *ue,
for (int i = 0; i < NUMBER_OF_CONNECTED_gNB_MAX; i++) {
for (int j=0; j<2; j++) {
for (int k=0; k<RX_NB_TH_MAX; k++) {
AssertFatal((ue->dlsch[k][i][j] = new_nr_ue_dlsch(1,NR_MAX_DLSCH_HARQ_PROCESSES,NSOFT,MAX_LDPC_ITERATIONS,ue->frame_parms.N_RB_DL, abstraction_flag))!=NULL,"Can't get ue dlsch structures\n");
AssertFatal((ue->dlsch[k][i][j] = new_nr_ue_dlsch(1,NR_MAX_DLSCH_HARQ_PROCESSES,NSOFT,ue->max_ldpc_iterations,ue->frame_parms.N_RB_DL, abstraction_flag))!=NULL,"Can't get ue dlsch structures\n");
LOG_D(PHY,"dlsch[%d][%d][%d] => %p\n",k,i,j,ue->dlsch[k][i][j]);
AssertFatal((ue->ulsch[k][i][j] = new_nr_ue_ulsch(ue->frame_parms.N_RB_UL, NR_MAX_ULSCH_HARQ_PROCESSES, abstraction_flag))!=NULL,"Can't get ue ulsch structures\n");
LOG_D(PHY,"ulsch[%d][%d][%d] => %p\n",k,i,j,ue->ulsch[k][i][j]);
}
}
ue->dlsch_SI[i] = new_nr_ue_dlsch(1,1,NSOFT,MAX_LDPC_ITERATIONS,ue->frame_parms.N_RB_DL, abstraction_flag);
ue->dlsch_ra[i] = new_nr_ue_dlsch(1,1,NSOFT,MAX_LDPC_ITERATIONS,ue->frame_parms.N_RB_DL, abstraction_flag);
ue->dlsch_SI[i] = new_nr_ue_dlsch(1,1,NSOFT,ue->max_ldpc_iterations,ue->frame_parms.N_RB_DL, abstraction_flag);
ue->dlsch_ra[i] = new_nr_ue_dlsch(1,1,NSOFT,ue->max_ldpc_iterations,ue->frame_parms.N_RB_DL, abstraction_flag);
ue->transmission_mode[i] = ue->frame_parms.nb_antenna_ports_gNB==1 ? 1 : 2;
}

View File

@@ -435,7 +435,7 @@ void nr_processULSegment(void* arg) {
if (rdata->decodeIterations > p_decoderParms->numMaxIter) rdata->decodeIterations--;
} else {
#ifdef PRINT_CRC_CHECK
LOG_I(PHY, "CRC NOK\n");
LOG_I(PHY, "segment %d CRC NOK\n",r);
#endif
rdata->decodeIterations = max_ldpc_iterations + 1;
}
@@ -464,6 +464,23 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
int kc;
int Tbslbrm;
int E;
int8_t llrProcBuf[22*384];
int ret = 0;
int i,j;
int8_t enable_ldpc_offload = phy_vars_gNB->ldpc_offload_flag;
int16_t z_ol [68*384];
int8_t l_ol [68*384];
__m128i *pv_ol128 = (__m128i*)&z_ol;
__m128i *pl_ol128 = (__m128i*)&l_ol;
int no_iteration_ldpc;
int length_dec;
uint8_t crc_type;
int K_bits_F;
int16_t z [68*384 + 16] __attribute__ ((aligned(16)));
int8_t l [68*384 + 16] __attribute__ ((aligned(16)));
__m128i *pv = (__m128i*)&z;
__m128i *pl = (__m128i*)&l;
#ifdef PRINT_CRC_CHECK
prnt_crc_cnt++;
@@ -489,7 +506,7 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
harq_process->processedSegments = 0;
double Coderate = 0.0;
uint8_t Ilbrm = 0;
// ------------------------------------------------------------------
uint16_t nb_rb = pusch_pdu->rb_size;
uint8_t Qm = pusch_pdu->qam_mod_order;
@@ -628,12 +645,172 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
Kr = harq_process->K;
Kr_bytes = Kr>>3;
offset = 0;
if (enable_ldpc_offload) {
if (harq_process->C == 1) {
if (A > 3824)
crc_type = CRC24_A;
else
crc_type = CRC16;
length_dec = harq_process->B;
}
else {
crc_type = CRC24_B;
length_dec = (harq_process->B+24*harq_process->C)/harq_process->C;
}
for (r=0; r<harq_process->C; r++) {
E = nr_get_E(G, harq_process->C, Qm, n_layers, r);
memset(harq_process->c[r],0,Kr_bytes);
if (mcs >9){
memcpy((&z_ol[0]),ulsch_llr+r_offset,E*sizeof(short));
for (i=0, j=0; j < ((kc*harq_process->Z)>>4)+1; i+=2, j++)
{
pl_ol128[j] = _mm_packs_epi16(pv_ol128[i],pv_ol128[i+1]);
}
ret = nrLDPC_decoder_offload(p_decParams,
r,
pusch_pdu->pusch_data.rv_index,
harq_process->F,
E,
Qm,
(int8_t*)&pl_ol128[0],
llrProcBuf, 1);
}
else{
K_bits_F = Kr-harq_process->F;
t_nrLDPC_time_stats procTime = {0};
t_nrLDPC_time_stats* p_procTime = &procTime ;
nr_deinterleaving_ldpc(E,
Qm,
harq_process->e[r],
ulsch_llr+r_offset);
if (nr_rate_matching_ldpc_rx(Ilbrm,
Tbslbrm,
p_decParams->BG,
p_decParams->Z,
harq_process->d[r],
harq_process->e[r],
harq_process->C,
pusch_pdu->pusch_data.rv_index,
harq_process->new_rx,
E,
harq_process->F,
Kr-harq_process->F-2*(p_decParams->Z))==-1) {
LOG_E(PHY,"ulsch_decoding.c: Problem in rate_matching\n");
no_iteration_ldpc = ulsch->max_ldpc_iterations + 1;
return;
}
//set first 2*Z_c bits to zeros
memset(&z[0],0,2*harq_process->Z*sizeof(int16_t));
//set Filler bits
memset((&z[0]+K_bits_F),127,harq_process->F*sizeof(int16_t));
//Move coded bits before filler bits
memcpy((&z[0]+2*harq_process->Z),harq_process->d[r],(K_bits_F-2*harq_process->Z)*sizeof(int16_t));
//skip filler bits
memcpy((&z[0]+Kr),harq_process->d[r]+(Kr-2*harq_process->Z),(kc*harq_process->Z-Kr)*sizeof(int16_t));
//Saturate coded bits before decoding into 8 bits values
for (i=0, j=0; j < ((kc*harq_process->Z)>>4)+1; i+=2, j++)
{
pl[j] = _mm_packs_epi16(pv[i],pv[i+1]);
}
no_iteration_ldpc = nrLDPC_decoder(p_decParams,
(int8_t*)&pl[0],
llrProcBuf,
harq_process->p_nrLDPC_procBuf[r],
p_procTime);
}
/*if (ret<0) {
no_iteration_ldpc = ulsch->max_ldpc_iterations + 1;
}
else {*/
for (int m=0; m < Kr>>3; m ++) {
harq_process->c[r][m]= (uint8_t) llrProcBuf[m];
}
if (check_crc((uint8_t*)llrProcBuf,length_dec,harq_process->F,crc_type)) {
#ifdef PRINT_CRC_CHECK
LOG_I(PHY, "Segment %d CRC OK\n",r);
#endif
no_iteration_ldpc = 2;
} else {
#ifdef PRINT_CRC_CHECK
LOG_I(PHY, "segment %d CRC NOK\n",r);
#endif
no_iteration_ldpc = ulsch->max_ldpc_iterations + 1;
}
//}
r_offset += E;
/*for (int k=0;k<8;k++)
{
printf("output decoder [%d] = 0x%02x \n", k, harq_process->c[r][k]);
printf("llrprocbuf [%d] = %x adr %p\n", k, llrProcBuf[k], llrProcBuf+k);
}
*/
bool decodeSuccess = (no_iteration_ldpc <= ulsch->max_ldpc_iterations);
if (decodeSuccess) {
memcpy(harq_process->b+offset,
harq_process->c[r],
Kr_bytes - (harq_process->F>>3) -((harq_process->C>1)?3:0));
offset += (Kr_bytes - (harq_process->F>>3) - ((harq_process->C>1)?3:0));
harq_process->processedSegments++;
}
else {
LOG_D(PHY,"uplink segment error %d/%d\n",r,harq_process->C);
LOG_D(PHY, "ULSCH %d in error\n",ULSCH_id);
}
if (r==(harq_process->C-1)){
if ((decodeSuccess)&&(harq_process->processedSegments==(harq_process->C))) {
LOG_D(PHY,"[gNB %d] ULSCH: Setting ACK for slot %d TBS %d\n",
phy_vars_gNB->Mod_id,harq_process->slot,harq_process->TBS);
harq_process->status = SCH_IDLE;
harq_process->round = 0;
ulsch->harq_mask &= ~(1 << harq_pid);
LOG_D(PHY, "ULSCH received ok \n");
nr_fill_indication(phy_vars_gNB,harq_process->frame, harq_process->slot, ULSCH_id, harq_pid, 0);
} else {
LOG_D(PHY,"[gNB %d] ULSCH: Setting NAK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d) r %d\n",
phy_vars_gNB->Mod_id, harq_process->frame, harq_process->slot,
harq_pid,harq_process->status, harq_process->round,harq_process->TBS,r);
if (harq_process->round >= ulsch->Mlimit) {
harq_process->status = SCH_IDLE;
harq_process->round = 0;
harq_process->handled = 0;
ulsch->harq_mask &= ~(1 << harq_pid);
}
harq_process->handled = 1;
no_iteration_ldpc = ulsch->max_ldpc_iterations + 1;
LOG_D(PHY, "ULSCH %d in error\n",ULSCH_id);
nr_fill_indication(phy_vars_gNB,harq_process->frame, harq_process->slot, ULSCH_id, harq_pid, 1);
}
ulsch->last_iteration_cnt = no_iteration_ldpc;
}
}
}
else {
void (*nr_processULSegment_ptr)(void*) = &nr_processULSegment;
for (r=0; r<harq_process->C; r++) {
E = nr_get_E(G, harq_process->C, Qm, n_layers, r);
union ldpcReqUnion id = {.s={ulsch->rnti,frame,nr_tti_rx,0,0}};
notifiedFIFO_elt_t *req=newNotifiedFIFO_elt(sizeof(ldpcDecode_t), id.p, phy_vars_gNB->respDecode, nr_processULSegment_ptr);
ldpcDecode_t * rdata=(ldpcDecode_t *) NotifiedFifoData(req);
@@ -663,5 +840,6 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
offset += (Kr_bytes - (harq_process->F>>3) - ((harq_process->C>1)?3:0));
//////////////////////////////////////////////////////////////////////////////////////////
}
}
return 1;
}

View File

@@ -1165,6 +1165,92 @@ void nr_ulsch_detection_mrc(NR_DL_FRAME_PARMS *frame_parms,
#endif
}
int get_first_dmrs_symbol(uint16_t dmrs_bitmap,
uint8_t start_symbol,
uint8_t num_symbols)
{
for (int i=start_symbol; i<start_symbol+num_symbols; i++)
if ((dmrs_bitmap >> i) & 0x01) return i;
return -1;
}
void nr_chest_time_domain_avg(NR_DL_FRAME_PARMS *frame_parms,
int **ul_ch,
uint8_t num_symbols,
uint8_t start_symbol,
uint16_t dmrs_bitmap,
uint16_t num_rbs)
{
__m128i *ul_ch128_0;
__m128i *ul_ch128_1;
int16_t *ul_ch16_0;
int total_symbols = start_symbol + num_symbols;
int num_dmrs_symb = get_dmrs_symbols_in_slot(dmrs_bitmap, total_symbols);
int first_dmrs_symb = get_first_dmrs_symbol(dmrs_bitmap, start_symbol, num_symbols);
AssertFatal(first_dmrs_symb > -1, "No DMRS symbol present in this slot\n");
for (int aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++) {
for (int symb = first_dmrs_symb+1; symb < total_symbols; symb++) {
ul_ch128_0 = (__m128i *)&ul_ch[aarx][first_dmrs_symb*frame_parms->ofdm_symbol_size];
if ((dmrs_bitmap >> symb) & 0x01) {
ul_ch128_1 = (__m128i *)&ul_ch[aarx][symb*frame_parms->ofdm_symbol_size];
for (int rbIdx = 0; rbIdx < num_rbs; rbIdx++) {
ul_ch128_0[0] = _mm_adds_epi16(ul_ch128_0[0], ul_ch128_1[0]);
ul_ch128_0[1] = _mm_adds_epi16(ul_ch128_0[1], ul_ch128_1[1]);
ul_ch128_0[2] = _mm_adds_epi16(ul_ch128_0[2], ul_ch128_1[2]);
ul_ch128_0 += 3;
ul_ch128_1 += 3;
}
}
}
ul_ch128_0 = (__m128i *)&ul_ch[aarx][first_dmrs_symb*frame_parms->ofdm_symbol_size];
if (num_dmrs_symb == 2) {
for (int rbIdx = 0; rbIdx < num_rbs; rbIdx++) {
ul_ch128_0[0] = _mm_srai_epi16(ul_ch128_0[0], 1);
ul_ch128_0[1] = _mm_srai_epi16(ul_ch128_0[1], 1);
ul_ch128_0[2] = _mm_srai_epi16(ul_ch128_0[2], 1);
ul_ch128_0 += 3;
}
} else if (num_dmrs_symb == 4) {
for (int rbIdx = 0; rbIdx < num_rbs; rbIdx++) {
ul_ch128_0[0] = _mm_srai_epi16(ul_ch128_0[0], 2);
ul_ch128_0[1] = _mm_srai_epi16(ul_ch128_0[1], 2);
ul_ch128_0[2] = _mm_srai_epi16(ul_ch128_0[2], 2);
ul_ch128_0 += 3;
}
} else if (num_dmrs_symb == 3) {
ul_ch16_0 = (int16_t *)&ul_ch[aarx][first_dmrs_symb*frame_parms->ofdm_symbol_size];
for (int rbIdx = 0; rbIdx < num_rbs; rbIdx++) {
ul_ch16_0[0] /= 3;
ul_ch16_0[1] /= 3;
ul_ch16_0[2] /= 3;
ul_ch16_0[3] /= 3;
ul_ch16_0[4] /= 3;
ul_ch16_0[5] /= 3;
ul_ch16_0[6] /= 3;
ul_ch16_0[7] /= 3;
ul_ch16_0[8] /= 3;
ul_ch16_0[9] /= 3;
ul_ch16_0[10] /= 3;
ul_ch16_0[11] /= 3;
ul_ch16_0[12] /= 3;
ul_ch16_0[13] /= 3;
ul_ch16_0[14] /= 3;
ul_ch16_0[15] /= 3;
ul_ch16_0[16] /= 3;
ul_ch16_0[17] /= 3;
ul_ch16_0[18] /= 3;
ul_ch16_0[19] /= 3;
ul_ch16_0[20] /= 3;
ul_ch16_0[21] /= 3;
ul_ch16_0[22] /= 3;
ul_ch16_0[23] /= 3;
ul_ch16_0 += 24;
}
} else AssertFatal((num_dmrs_symb < 5) && (num_dmrs_symb > 0), "Illegal number of DMRS symbols in the slot\n");
}
}
int nr_rx_pusch(PHY_VARS_gNB *gNB,
uint8_t ulsch_id,
uint32_t frame,
@@ -1225,6 +1311,13 @@ int nr_rx_pusch(PHY_VARS_gNB *gNB,
}
}
}
nr_chest_time_domain_avg(frame_parms,
gNB->pusch_vars[ulsch_id]->ul_ch_estimates,
rel15_ul->nr_of_symbols,
rel15_ul->start_symbol_index,
rel15_ul->ul_dmrs_symb_pos,
rel15_ul->rb_size);
stop_meas(&gNB->ulsch_channel_estimation_stats);
#ifdef __AVX2__
@@ -1234,14 +1327,13 @@ int nr_rx_pusch(PHY_VARS_gNB *gNB,
#endif
uint32_t rxdataF_ext_offset = 0;
gNB->pusch_vars[ulsch_id]->dmrs_symbol = get_first_dmrs_symbol(rel15_ul->ul_dmrs_symb_pos, rel15_ul->start_symbol_index, rel15_ul->nr_of_symbols);
for(uint8_t symbol = rel15_ul->start_symbol_index; symbol < (rel15_ul->start_symbol_index + rel15_ul->nr_of_symbols); symbol++) {
uint8_t dmrs_symbol_flag = (rel15_ul->ul_dmrs_symb_pos >> symbol) & 0x01;
if (dmrs_symbol_flag == 1) {
if ((rel15_ul->ul_dmrs_symb_pos >> ((symbol + 1) % frame_parms->symbols_per_slot)) & 0x01)
AssertFatal(1==0,"Double DMRS configuration is not yet supported\n");
gNB->pusch_vars[ulsch_id]->dmrs_symbol = symbol;
if (rel15_ul->dmrs_config_type == 0) {
// if no data in dmrs cdm group is 1 only even REs have no data
// if no data in dmrs cdm group is 2 both odd and even REs have no data

View File

@@ -831,7 +831,7 @@ typedef struct PHY_VARS_gNB_s {
double N0;
unsigned char first_run_I0_measurements;
int ldpc_offload_flag;
unsigned char is_secondary_gNB; // primary by default
unsigned char is_init_sync; /// Flag to tell if initial synchronization is performed. This affects how often the secondary eNB will listen to the PSS from the primary system.
@@ -842,7 +842,8 @@ typedef struct PHY_VARS_gNB_s {
int **dl_precoder_SgNB[3];
char log2_maxp; /// holds the maximum channel/precoder coefficient
int prb_interpolation;
int prb_interpolation;
int max_ldpc_iterations;
/// if ==0 enables phy only test mode
int mac_enabled;

View File

@@ -958,6 +958,8 @@ typedef struct {
/// N0 (used for abstraction)
double N0;
uint8_t max_ldpc_iterations;
/// PDSCH Varaibles
PDSCH_CONFIG_DEDICATED pdsch_config_dedicated[NUMBER_OF_CONNECTED_gNB_MAX];

View File

@@ -213,6 +213,7 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
pushNotifiedFIFO(gNB->resp_L1_tx,res);
for (int i = 0; i < number_ul_tti_pdu; i++) {
switch (UL_tti_req->pdus_list[i].pdu_type) {
case NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE:

View File

@@ -273,6 +273,7 @@ void nr_postDecode(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req) {
ulsch_harq->TBS,
r);
ulsch_harq->round++;
if (ulsch_harq->round >= ulsch->Mlimit) {
ulsch_harq->status = SCH_IDLE;
ulsch_harq->round = 0;
@@ -332,7 +333,7 @@ void nr_ulsch_procedures(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int ULSCH
uint8_t l, number_dmrs_symbols = 0;
uint32_t G;
uint16_t start_symbol, number_symbols, nb_re_dmrs;
uint8_t enable_ldpc_offload = gNB->ldpc_offload_flag;
start_symbol = pusch_pdu->start_symbol_index;
number_symbols = pusch_pdu->nr_of_symbols;
@@ -389,12 +390,13 @@ void nr_ulsch_procedures(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int ULSCH
slot_rx,
harq_pid,
G);
while (gNB->nbDecode > 0) {
notifiedFIFO_elt_t *req=pullTpool(gNB->respDecode, gNB->threadPool);
nr_postDecode(gNB, req);
delNotifiedFIFO_elt(req);
}
if (enable_ldpc_offload ==0) {
while (gNB->nbDecode > 0) {
notifiedFIFO_elt_t *req=pullTpool(gNB->respDecode, gNB->threadPool);
nr_postDecode(gNB, req);
delNotifiedFIFO_elt(req);
}
}
stop_meas(&gNB->ulsch_decoding_stats);
}
@@ -563,6 +565,7 @@ void fill_ul_rb_mask(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) {
((symbol < pucch_pdu->start_symbol_index+(pucch_pdu->nr_of_symbols>>1)) || (pucch_pdu->freq_hop_flag == 0) ?
pucch_pdu->prb_start : pucch_pdu->second_hop_prb);
gNB->rb_mask_ul[symbol][rb2>>5] |= (1<<(rb2&31));
}
}
}

View File

@@ -47,6 +47,8 @@
#include "openair1/SIMULATION/NR_PHY/nr_unitary_defs.h"
#include "openair1/SIMULATION/NR_PHY/nr_dummy_functions.c"
const short conjugate[8]__attribute__((aligned(16))) = {-1,1,-1,1,-1,1,-1,1};
const short conjugate2[8]__attribute__((aligned(16))) = {1,-1,1,-1,1,-1,1,-1};
//#define DEBUG_NR_DLSCHSIM
PHY_VARS_gNB *gNB;

View File

@@ -420,6 +420,7 @@ int main(int argc, char **argv)
uint8_t mcsIndex = 9;
uint8_t dlsch_threads = 0;
int prb_inter = 0;
uint8_t max_ldpc_iterations = 5;
if ( load_configmodule(argc,argv,CONFIG_ENABLECMDLINEONLY) == 0) {
exit_fun("[NR_DLSIM] Error, configuration module init failed\n");
}
@@ -622,6 +623,10 @@ int main(int argc, char **argv)
output_fd = fopen("txdata.dat", "w+");
break;
case 'Q':
max_ldpc_iterations = atoi(optarg);
break;
case 'T':
enable_ptrs=1;
for(i=0; i < atoi(optarg); i++) {
@@ -668,6 +673,7 @@ int main(int argc, char **argv)
printf("-q Use 2nd MCS table (256 QAM table) for PDSCH\n");
printf("-t Acceptable effective throughput (in percentage)\n");
printf("-T Enable PTRS, arguments list L_PTRS{0,1,2} K_PTRS{2,4}, e.g. -T 2 0 2 \n");
printf("-Q Maximum LDPC decoder iterations\n");
printf("-U Change DMRS Config, arguments list DMRS TYPE{0=A,1=B} DMRS AddPos{0:2} DMRS ConfType{1:2}, e.g. -U 3 0 2 1 \n");
printf("-P Print DLSCH performances\n");
printf("-w Write txdata to binary file (one frame)\n");
@@ -892,6 +898,7 @@ int main(int argc, char **argv)
PHY_vars_UE_g[0][0] = UE;
memcpy(&UE->frame_parms,frame_parms,sizeof(NR_DL_FRAME_PARMS));
UE->frame_parms.nb_antennas_rx = n_rx;
UE->max_ldpc_iterations = max_ldpc_iterations;
if (run_initial_sync==1) UE->is_synchronized = 0;
else {UE->is_synchronized = 1; UE->UE_mode[0]=PUSCH;}
@@ -919,7 +926,6 @@ int main(int argc, char **argv)
UE->if_inst->ul_indication = dummy_nr_ue_ul_indication;
UE->prb_interpolation = prb_inter;
UE_mac->if_module = nr_ue_if_module_init(0);
unsigned int available_bits=0;

View File

@@ -59,6 +59,9 @@ uint16_t NB_UE_INST = 1;
uint8_t const nr_rv_round_map[4] = {0, 2, 1, 3};
uint8_t const nr_rv_round_map_ue[4] = {0, 2, 1, 3};
const short conjugate[8]__attribute__((aligned(16))) = {-1,1,-1,1,-1,1,-1,1};
const short conjugate2[8]__attribute__((aligned(16))) = {1,-1,1,-1,1,-1,1,-1};
// needed for some functions
PHY_VARS_NR_UE * PHY_vars_UE_g[1][1]={{NULL}};

View File

@@ -59,6 +59,9 @@ void init_downlink_harq_status(NR_DL_UE_HARQ_t *dl_harq) {}
uint8_t const nr_rv_round_map[4] = {0, 2, 1, 3};
uint8_t const nr_rv_round_map_ue[4] = {0, 2, 1, 3};
const short conjugate[8]__attribute__((aligned(16))) = {-1,1,-1,1,-1,1,-1,1};
const short conjugate2[8]__attribute__((aligned(16))) = {1,-1,1,-1,1,-1,1,-1};
double cpuf;
//uint8_t nfapi_mode = 0;
uint16_t NB_UE_INST = 1;
@@ -137,6 +140,7 @@ int main(int argc, char **argv)
uint16_t nb_symb_sch = 12;
uint16_t nb_rb = 50;
uint8_t Imcs = 9;
uint8_t max_ldpc_iterations = 5;
double DS_TDL = .03;
@@ -388,6 +392,8 @@ int main(int argc, char **argv)
frame_parms->N_RB_DL = N_RB_DL;
frame_parms->N_RB_UL = N_RB_UL;
frame_parms->Ncp = extended_prefix_flag ? EXTENDED : NORMAL;
gNB->max_ldpc_iterations = max_ldpc_iterations;
crcTableInit();
memcpy(&gNB->frame_parms, frame_parms, sizeof(NR_DL_FRAME_PARMS));

View File

@@ -246,6 +246,7 @@ channel_desc_t *UE2gNB[NUMBER_OF_UE_MAX][NUMBER_OF_gNB_MAX];
int main(int argc, char **argv)
{
char c;
int i;
double SNR, snr0 = -2.0, snr1 = 2.0;
@@ -285,7 +286,6 @@ int main(int argc, char **argv)
int32_t txlev=0;
int start_rb = 0;
int UE_id =0; // [hna] only works for UE_id = 0 because NUMBER_OF_NR_UE_MAX is set to 1 (phy_init_nr_gNB causes segmentation fault)
float target_error_rate = 0.01;
int print_perf = 0;
cpuf = get_cpu_freq_GHz();
int msg3_flag = 0;
@@ -293,16 +293,18 @@ int main(int argc, char **argv)
float roundStats[100];
double effRate[100];
double effTP[100];
//float eff_tp_check = 0.7;
float eff_tp_check = 100;
uint8_t snrRun;
int prb_inter = 0;
int ldpc_offload_flag = 0;
uint8_t max_rounds = 4;
int enable_ptrs = 0;
int modify_dmrs = 0;
/* L_PTRS = ptrs_arg[0], K_PTRS = ptrs_arg[1] */
int ptrs_arg[2] = {-1,-1};// Invalid values
/* DMRS TYPE = dmrs_arg[0], Add Pos = dmrs_arg[1] */
int dmrs_arg[2] = {-1,-1};// Invalid values
int dmrs_arg[3] = {-1,-1,-1};// Invalid values
uint16_t ptrsSymPos = 0;
uint16_t ptrsSymbPerSlot = 0;
uint16_t ptrsRePerSymb = 0;
@@ -319,6 +321,7 @@ int main(int argc, char **argv)
int ibwps=24;
int ibwp_rboffset=41;
int params_from_file = 0;
int max_ldpc_iterations = 5;
if ( load_configmodule(argc,argv,CONFIG_ENABLECMDLINEONLY) == 0 ) {
exit_fun("[NR_ULSIM] Error, configuration module init failed\n");
}
@@ -329,7 +332,8 @@ int main(int argc, char **argv)
/* initialize the sin-cos table */
InitSinLUT();
while ((c = getopt(argc, argv, "a:b:c:d:ef:g:h:ikl:m:n:p:r:s:u:w:y:z:F:G:H:M:N:PR:S:T:U:L:Z")) != -1) {
while ((c = getopt(argc, argv, "a:b:c:d:ef:g:h:ikl:m:n:o:p:q:r:s:t:u:v:w:y:z:B:F:G:H:I:M:N:PR:S:T:U:L:Z")) != -1) {
printf("handling optarg %c\n",c);
switch (c) {
@@ -441,10 +445,18 @@ int main(int argc, char **argv)
case 'n':
n_trials = atoi(optarg);
break;
case 'o':
ldpc_offload_flag = atoi(optarg);
break;
case 'p':
extended_prefix_flag = 1;
break;
case 'q':
max_rounds = atoi(optarg);
break;
case 'r':
nb_rb = atoi(optarg);
@@ -455,6 +467,10 @@ int main(int argc, char **argv)
printf("Setting SNR0 to %f\n", snr0);
break;
case 't':
snr_step = atof(optarg);
break;
case 'u':
mu = atoi(optarg);
break;
@@ -463,11 +479,11 @@ int main(int argc, char **argv)
start_rb = atoi(optarg);
break;
/*
case 't':
eff_tp_check = (float)atoi(optarg)/100;
case 'v':
eff_tp_check = (float)atoi(optarg);
break;
*/
/*
case 'r':
ricean_factor = pow(10,-.1*atof(optarg));
@@ -501,6 +517,10 @@ int main(int argc, char **argv)
}
break;
case 'B':
mcs_table = atoi(optarg);
break;
case 'F':
input_fd = fopen(optarg, "r");
@@ -520,6 +540,10 @@ int main(int argc, char **argv)
slot = atoi(optarg);
break;
case 'I':
max_ldpc_iterations = atoi(optarg);
break;
case 'M':
// SSB_positions = atoi(optarg);
break;
@@ -589,6 +613,7 @@ int main(int argc, char **argv)
printf("-s Starting SNR, runs from SNR0 to SNR0 + 10 dB if ending SNR isn't given\n");
printf("-m MCS value\n");
printf("-n Number of trials to simulate\n");
printf("-o ldpc offload flag\n");
printf("-p Use extended prefix mode\n");
printf("-t Delay spread for multipath channel\n");
printf("-u Set the numerology\n");
@@ -597,9 +622,11 @@ int main(int argc, char **argv)
printf("-y Number of TX antennas used in eNB\n");
printf("-z Number of RX antennas used in UE\n");
printf("-A Interpolation_filname Run with Abstraction to generate Scatter plot using interpolation polynomial in file\n");
printf("-B MCS table\n");
//printf("-C Generate Calibration information for Abstraction (effective SNR adjustment to remove Pe bias w.r.t. AWGN)\n");
printf("-F Input filename (.txt format) for RX conformance testing\n");
printf("-G Offset of samples to read from file (0 default)\n");
printf("-I Maximum LDPC decoder iterations\n");
printf("-M Multiple SSB positions in burst\n");
printf("-N Nid_cell\n");
printf("-O oversampling factor (1,2,4,8,16)\n");
@@ -625,7 +652,6 @@ int main(int argc, char **argv)
get_softmodem_params()->do_ra = 0;
get_softmodem_params()->usim_test = 1;
if (snr1set == 0)
snr1 = snr0 + 10;
double sampling_frequency;
@@ -662,8 +688,17 @@ int main(int argc, char **argv)
gNB->ofdm_offset_divisor = UINT_MAX;
gNB->threadPool = (tpool_t*)malloc(sizeof(tpool_t));
gNB->respDecode = (notifiedFIFO_t*) malloc(sizeof(notifiedFIFO_t));
char tp_param[] = "n";
initTpool(tp_param, gNB->threadPool, false);
int numCPU = sysconf(_SC_NPROCESSORS_ONLN);
LOG_I(PHY,"Number of CPUs available on this machine: %d\n",numCPU);
char ul_pool[80];
sprintf(ul_pool,"-1");
int s_offset = 0;
for (int icpu=1; icpu<numCPU; icpu++) {
sprintf(ul_pool+2+s_offset,",-1");
s_offset += 3;
}
initTpool(ul_pool, gNB->threadPool, false);
initNotifiedFIFO(gNB->respDecode);
gNB->resp_L1_tx = (notifiedFIFO_t*) malloc(sizeof(notifiedFIFO_t));
initNotifiedFIFO(gNB->resp_L1_tx);
@@ -680,6 +715,7 @@ int main(int argc, char **argv)
gNB->UL_INFO.rx_ind.number_of_pdus = 0;
gNB->UL_INFO.crc_ind.number_crcs = 0;
gNB->prb_interpolation = prb_inter;
gNB->max_ldpc_iterations = max_ldpc_iterations;
frame_parms = &gNB->frame_parms; //to be initialized I suppose (maybe not necessary for PBCH)
frame_parms->N_RB_DL = N_RB_DL;
@@ -733,6 +769,8 @@ int main(int argc, char **argv)
cfg->carrier_config.num_tx_ant.value = n_tx;
cfg->carrier_config.num_rx_ant.value = n_rx;
nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu,0,0x01);
gNB->ldpc_offload_flag = ldpc_offload_flag;
phy_init_nr_gNB(gNB,0,1);
N_RB_DL = gNB->frame_parms.N_RB_DL;
@@ -751,6 +789,7 @@ int main(int argc, char **argv)
PHY_vars_UE_g[0] = malloc(sizeof(PHY_VARS_NR_UE*));
PHY_vars_UE_g[0][0] = UE;
memcpy(&UE->frame_parms, frame_parms, sizeof(NR_DL_FRAME_PARMS));
UE->frame_parms.nb_antennas_rx = 0;
//phy_init_nr_top(frame_parms);
if (init_nr_ue_signal(UE, 1, 0) != 0) {
@@ -800,7 +839,7 @@ int main(int argc, char **argv)
unsigned char harq_pid = 0;
NR_gNB_ULSCH_t *ulsch_gNB = gNB->ulsch[UE_id][0];
//nfapi_nr_ul_config_ulsch_pdu *rel15_ul = &ulsch_gNB->harq_processes[harq_pid]->ulsch_pdu;
nfapi_nr_ul_tti_request_t *UL_tti_req = malloc(sizeof(*UL_tti_req));
@@ -835,7 +874,6 @@ int main(int argc, char **argv)
uint16_t n_rb1 = 75;
uint16_t pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA; // | PUSCH_PDU_BITMAP_PUSCH_PTRS;
uint8_t max_rounds = 4;
uint8_t crc_status = 0;
unsigned char mod_order = nr_get_Qm_ul(Imcs, mcs_table);
@@ -862,6 +900,7 @@ int main(int argc, char **argv)
{
add_pos = dmrs_arg[1];
}
num_dmrs_cdm_grps_no_data = dmrs_arg[2];
}
printf("NOTE: DMRS config is modified with Mapping Type %d , Additional Position %d \n", mapping_type, add_pos );
@@ -953,7 +992,6 @@ int main(int argc, char **argv)
int slot_length = slot_offset - frame_parms->get_samples_slot_timestamp(slot-1,frame_parms,0);
if (input_fd != NULL) {
AssertFatal(frame_parms->nb_antennas_rx == 1, "nb_ant != 1\n");
// 800 samples is N_TA_OFFSET for FR1 @ 30.72 Ms/s,
AssertFatal(frame_parms->subcarrier_spacing==30000,"only 30 kHz for file input for now (%d)\n",frame_parms->subcarrier_spacing);
@@ -981,18 +1019,21 @@ int main(int argc, char **argv)
printf("harq_pid %d\n",harq_pid);
}
fseek(input_fd,file_offset*sizeof(int16_t)*2,SEEK_SET);
read_errors+=fread((void*)&gNB->common_vars.rxdata[0][slot_offset-delay],
sizeof(int16_t),
slot_length<<1,
input_fd);
if (read_errors==0) {
printf("error reading file\n");
exit(1);
for (int irx=0; irx<frame_parms->nb_antennas_rx; irx++) {
fseek(input_fd,irx*(slot_length+15)*sizeof(int16_t)*2,SEEK_SET); // matlab adds samlples to the end to emulate channel delay
read_errors+=fread((void*)&gNB->common_vars.rxdata[irx][slot_offset-delay],
sizeof(int16_t),
slot_length<<1,
input_fd);
if (read_errors==0) {
printf("error reading file\n");
exit(1);
}
for (int i=0;i<16;i+=2) printf("slot_offset %d : %d,%d\n",
slot_offset,
((int16_t*)&gNB->common_vars.rxdata[irx][slot_offset])[i],
((int16_t*)&gNB->common_vars.rxdata[irx][slot_offset])[1+i]);
}
for (int i=0;i<16;i+=2) printf("slot_offset %d : %d,%d\n",
slot_offset,
((int16_t*)&gNB->common_vars.rxdata[0][slot_offset])[i],
((int16_t*)&gNB->common_vars.rxdata[0][slot_offset])[1+i]);
mod_order = nr_get_Qm_ul(Imcs, mcs_table);
code_rate = nr_get_code_rate_ul(Imcs, mcs_table);
@@ -1004,13 +1045,17 @@ int main(int argc, char **argv)
double blerStats[4][100];
double berStats[4][100];
double snrStats[100];
double ldpcDecStats[100];
memset(errors_scrambling, 0, sizeof(uint32_t)*4*100);
memset(n_errors, 0, sizeof(int)*4*100);
memset(round_trials, 0, sizeof(int)*4*100);
memset(blerStats, 0, sizeof(double)*4*100);
memset(berStats, 0, sizeof(double)*4*100);
memset(snrStats, 0, sizeof(double)*100);
memset(ldpcDecStats, 0, sizeof(double)*100);
for (SNR = snr0; SNR < snr1; SNR += snr_step) {
varArray_t *table_rx=initVarArray(1000,sizeof(double));
int error_flag = 0;
n_false_positive = 0;
@@ -1302,52 +1347,24 @@ int main(int argc, char **argv)
&gNB->pusch_vars[0]->ul_ch_mag[0][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_M("chmagbF0.m","chmbF0",
&gNB->pusch_vars[0]->ul_ch_magb[0][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
if (n_rx == 2) {
LOG_MM("rxsigF0_comp.m","rxsF1_comp",
&gNB->pusch_vars[0]->rxdataF_comp[1][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("rxsigF0_ext.m","rxsF1_ext",
&gNB->pusch_vars[0]->rxdataF_ext[1][start_symbol*NR_NB_SC_PER_RB * pusch_pdu->rb_size],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("chestF0_ext.m","chF1_ext",
&gNB->pusch_vars[0]->ul_ch_estimates_ext[1][(start_symbol+1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],
for (int irx=1; irx<n_rx; irx++) {
char varname[50];
sprintf(varname, "rxsF%d_comp", irx);
LOG_MM("rxsigF0_comp.m",varname,
&gNB->pusch_vars[0]->rxdataF_comp[irx][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
sprintf(varname, "rxsF%d_ext", irx);
LOG_MM("rxsigF0_ext.m",varname,
&gNB->pusch_vars[0]->rxdataF_ext[irx][start_symbol*NR_NB_SC_PER_RB * pusch_pdu->rb_size],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
sprintf(varname, "chF%d_ext", irx);
LOG_MM("chestF0_ext.m",varname,
&gNB->pusch_vars[0]->ul_ch_estimates_ext[irx][(start_symbol+1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],
(nb_symb_sch-1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("chmagF0.m","chmF1",
&gNB->pusch_vars[0]->ul_ch_mag[1][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("chmagbF0.m","chmbF1",
&gNB->pusch_vars[0]->ul_ch_magb[1][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
} else if (n_rx == 4) {
LOG_MM("rxsigF0_comp.m","rxsF1_comp",
&gNB->pusch_vars[0]->rxdataF_comp[1][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("rxsigF0_comp.m","rxsF2_comp",
&gNB->pusch_vars[0]->rxdataF_comp[2][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("rxsigF0_comp.m","rxsF3_comp",
&gNB->pusch_vars[0]->rxdataF_comp[3][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("rxsigF0_ext.m","rxsF1_ext",
&gNB->pusch_vars[0]->rxdataF_ext[1][start_symbol*NR_NB_SC_PER_RB * pusch_pdu->rb_size],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("rxsigF0_ext.m","rxsF2_ext",
&gNB->pusch_vars[0]->rxdataF_ext[2][start_symbol*NR_NB_SC_PER_RB * pusch_pdu->rb_size],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("rxsigF0_ext.m","rxsF3_ext",
&gNB->pusch_vars[0]->rxdataF_ext[3][start_symbol*NR_NB_SC_PER_RB * pusch_pdu->rb_size],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("chestF0_ext.m","chF1_ext",
&gNB->pusch_vars[0]->ul_ch_estimates_ext[1][(start_symbol+1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],
(nb_symb_sch-1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("chestF0_ext.m","chF2_ext",
&gNB->pusch_vars[0]->ul_ch_estimates_ext[2][(start_symbol+1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],
(nb_symb_sch-1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("chestF0_ext.m","chF3_ext",
&gNB->pusch_vars[0]->ul_ch_estimates_ext[3][(start_symbol+1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],
(nb_symb_sch-1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("chmagF0.m","chmF1",
&gNB->pusch_vars[0]->ul_ch_mag[1][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("chmagF0.m","chmF2",
&gNB->pusch_vars[0]->ul_ch_mag[2][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("chmagF0.m","chmF3",
&gNB->pusch_vars[0]->ul_ch_mag[3][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("chmagbF0.m","chmbF1",
&gNB->pusch_vars[0]->ul_ch_magb[1][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("chmagbF0.m","chmbF2",
&gNB->pusch_vars[0]->ul_ch_magb[2][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("chmagbF0.m","chmbF3",
&gNB->pusch_vars[0]->ul_ch_magb[3][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
sprintf(varname, "chmF%d", irx);
LOG_MM("chmagF0.m",varname,
&gNB->pusch_vars[0]->ul_ch_mag[irx][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
sprintf(varname, "chmbF%d", irx);
LOG_MM("chmagbF0.m",varname,
&gNB->pusch_vars[0]->ul_ch_magb[irx][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
}
LOG_M("rxsigF0_llr.m","rxsF0_llr",
@@ -1408,16 +1425,17 @@ int main(int argc, char **argv)
errors_decoding++;
}
}
if (n_trials == 1) {
/*if (n_trials == 1) {
for (int r=0;r<ulsch_ue[0]->harq_processes[harq_pid]->C;r++)
for (int i=0;i<ulsch_ue[0]->harq_processes[harq_pid]->K>>3;i++) {
if ((ulsch_ue[0]->harq_processes[harq_pid]->c[r][i]^ulsch_gNB->harq_processes[harq_pid]->c[r][i]) != 0) printf("************");
/*printf("r %d: in[%d] %x, out[%d] %x (%x)\n",r,
if ((ulsch_ue[0]->harq_processes[harq_pid]->c[r][i]^ulsch_gNB->harq_processes[harq_pid]->c[r][i]) != 0)
printf("r %d: in[%d] %x, out[%d] %x (%x)\n",r,
i,ulsch_ue[0]->harq_processes[harq_pid]->c[r][i],
i,ulsch_gNB->harq_processes[harq_pid]->c[r][i],
ulsch_ue[0]->harq_processes[harq_pid]->c[r][i]^ulsch_gNB->harq_processes[harq_pid]->c[r][i]);*/
ulsch_ue[0]->harq_processes[harq_pid]->c[r][i]^ulsch_gNB->harq_processes[harq_pid]->c[r][i]);
}
}
}*/
if (errors_decoding > 0 && error_flag == 0) {
n_false_positive++;
if (n_trials==1)
@@ -1425,6 +1443,7 @@ int main(int argc, char **argv)
}
roundStats[snrRun] += ((float)round);
if (!crc_status) effRate[snrRun] += ((double)TBS)/(double)round;
} // trial loop
roundStats[snrRun]/=((float)n_trials);
@@ -1443,6 +1462,7 @@ int main(int argc, char **argv)
berStats[2][snrRun] = (double)errors_scrambling[2][snrRun]/available_bits/round_trials[2][snrRun];
berStats[3][snrRun] = (double)errors_scrambling[3][snrRun]/available_bits/round_trials[3][snrRun];
effTP[snrRun] = effRate[snrRun]/(double)TBS*(double)100;
printf("SNR %f: Channel BLER (%e,%e,%e,%e), Channel BER (%e,%e,%e,%e) Avg round %.2f, Eff Rate %.4f bits/slot, Eff Throughput %.2f, TBS %u bits/slot\n",
SNR,
blerStats[0][snrRun],
@@ -1456,7 +1476,12 @@ int main(int argc, char **argv)
roundStats[snrRun],effRate[snrRun],effTP[snrRun],TBS);
FILE *fd=fopen("nr_ulsim.log","w");
if (fd == NULL) {
printf("Problem with filename %s\n", "nr_ulsim.log");
exit(-1);
}
dump_pusch_stats(fd,gNB);
fclose(fd);
printf("*****************************************\n");
printf("\n");
@@ -1486,16 +1511,18 @@ int main(int argc, char **argv)
if(n_trials==1)
break;
if ((float)n_errors[0][snrRun]/(float)n_trials <= target_error_rate) {
if ((float)effTP[snrRun] >= eff_tp_check) {
printf("*************\n");
printf("PUSCH test OK\n");
printf("*************\n");
break;
}
ldpcDecStats[snrRun] = gNB->ulsch_decoding_stats.trials?inMicroS(gNB->ulsch_decoding_stats.diff/gNB->ulsch_decoding_stats.trials):0;
snrStats[snrRun] = SNR;
snrRun++;
n_errs = n_errors[0][snrRun];
snrRun++;
} // SNR loop
printf("\n");
@@ -1516,20 +1543,27 @@ int main(int argc, char **argv)
length_dmrs,
num_dmrs_cdm_grps_no_data);
LOG_M("ulsimStats.m","SNR",snrStats,snrRun,1,7);
LOG_MM("ulsimStats.m","BLER_round0",blerStats[0],snrRun,1,7);
LOG_MM("ulsimStats.m","BLER_round1",blerStats[1],snrRun,1,7);
LOG_MM("ulsimStats.m","BLER_round2",blerStats[2],snrRun,1,7);
LOG_MM("ulsimStats.m","BLER_round3",blerStats[3],snrRun,1,7);
LOG_MM("ulsimStats.m","BER_round0",berStats[0],snrRun,1,7);
LOG_MM("ulsimStats.m","BER_round1",berStats[1],snrRun,1,7);
LOG_MM("ulsimStats.m","BER_round2",berStats[2],snrRun,1,7);
LOG_MM("ulsimStats.m","BER_round3",berStats[3],snrRun,1,7);
LOG_MM("ulsimStats.m","EffRate",effRate,snrRun,1,7);
LOG_MM("ulsimStats.m","EffTP",effTP,snrRun,1,7);
char opStatsFile[50];
sprintf(opStatsFile, "ulsimStats_z%d.m", n_rx);
LOG_M(opStatsFile,"SNR",snrStats,snrRun,1,7);
LOG_MM(opStatsFile,"BLER_round0",blerStats[0],snrRun,1,7);
LOG_MM(opStatsFile,"BLER_round1",blerStats[1],snrRun,1,7);
LOG_MM(opStatsFile,"BLER_round2",blerStats[2],snrRun,1,7);
LOG_MM(opStatsFile,"BLER_round3",blerStats[3],snrRun,1,7);
LOG_MM(opStatsFile,"BER_round0",berStats[0],snrRun,1,7);
LOG_MM(opStatsFile,"BER_round1",berStats[1],snrRun,1,7);
LOG_MM(opStatsFile,"BER_round2",berStats[2],snrRun,1,7);
LOG_MM(opStatsFile,"BER_round3",berStats[3],snrRun,1,7);
LOG_MM(opStatsFile,"EffRate",effRate,snrRun,1,7);
LOG_MM(opStatsFile,"EffTP",effTP,snrRun,1,7);
LOG_MM(opStatsFile,"LDPC_dec_time",ldpcDecStats,snrRun,1,7);
free(test_input_bit);
free(estimated_output_bit);
if (gNB->ldpc_offload_flag)
free_nrLDPClib_offload();
if (output_fd)
fclose(output_fd);

View File

@@ -51,6 +51,7 @@
#define CONFIG_STRING_L1_PUCCH0_DTX_THRESHOLD "pucch0_dtx_threshold"
#define CONFIG_STRING_L1_PRACH_DTX_THRESHOLD "prach_dtx_threshold"
#define CONFIG_STRING_L1_PUSCH_DTX_THRESHOLD "pusch_dtx_threshold"
#define CONFIG_STRING_L1_MAX_LDPC_ITERATIONS "max_ldpc_iterations"
/*----------------------------------------------------------------------------------------------------------------------------------------------------*/
/* L1 configuration parameters */
/* optname helpstr paramflags XXXptr defXXXval type numelt */
@@ -69,7 +70,8 @@
{CONFIG_STRING_L1_OFDM_OFFSET_DIVISOR, NULL, 0, uptr:NULL, defuintval:8, TYPE_UINT, 0}, \
{CONFIG_STRING_L1_PUCCH0_DTX_THRESHOLD, NULL, 0, uptr:NULL, defintval:100, TYPE_UINT, 0}, \
{CONFIG_STRING_L1_PRACH_DTX_THRESHOLD, NULL, 0, uptr:NULL, defintval:150, TYPE_UINT, 0}, \
{CONFIG_STRING_L1_PUSCH_DTX_THRESHOLD, NULL, 0, uptr:NULL, defintval:50, TYPE_UINT, 0} \
{CONFIG_STRING_L1_PUSCH_DTX_THRESHOLD, NULL, 0, uptr:NULL, defintval:50, TYPE_UINT, 0}, \
{CONFIG_STRING_L1_MAX_LDPC_ITERATIONS, NULL, 0, uptr:NULL, defintval:5, TYPE_UINT, 0}, \
}
#define L1_CC_IDX 0
#define L1_TRANSPORT_N_PREFERENCE_IDX 1
@@ -85,6 +87,7 @@
#define L1_PUCCH0_DTX_THRESHOLD 11
#define L1_PRACH_DTX_THRESHOLD 12
#define L1_PUSCH_DTX_THRESHOLD 13
#define L1_MAX_LDPC_ITERATIONS 14
/*----------------------------------------------------------------------------------------------------------------------------------------------------*/
#endif

View File

@@ -603,6 +603,7 @@ void RCconfig_NR_L1(void) {
RC.gNB[j]->pucch0_thres = *(L1_ParamList.paramarray[j][L1_PUCCH0_DTX_THRESHOLD].uptr);
RC.gNB[j]->prach_thres = *(L1_ParamList.paramarray[j][L1_PRACH_DTX_THRESHOLD].uptr);
RC.gNB[j]->pusch_thres = *(L1_ParamList.paramarray[j][L1_PUSCH_DTX_THRESHOLD].uptr);
RC.gNB[j]->max_ldpc_iterations = *(L1_ParamList.paramarray[j][L1_MAX_LDPC_ITERATIONS].uptr);
RC.gNB[j]->num_ulprbbl = num_prbbl;
LOG_I(NR_PHY,"Copying %d blacklisted PRB to L1 context\n",num_prbbl);
memcpy(RC.gNB[j]->ulprbbl,prbbl,275*sizeof(int));

View File

@@ -122,7 +122,6 @@ typedef enum {
#define GNB_CONFIG_STRING_MINRXTXTIMEPDSCH "min_rxtxtime_pdsch"
#define GNB_CONFIG_STRING_ULPRBBLACKLIST "ul_prbblacklist"
/*-----------------------------------------------------------------------------------------------------------------------------------------*/
/* cell configuration parameters */
/* optname helpstr paramflags XXXptr defXXXval type numelt */

View File

@@ -1141,7 +1141,7 @@ void pf_ul(module_id_t module_id,
|| ps->num_dmrs_cdm_grps_no_data != num_dmrs_cdm_grps_no_data)
nr_set_pusch_semi_static(scc, sched_ctrl->active_ubwp, ubwpd, dci_format, tda, num_dmrs_cdm_grps_no_data, ps);
NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch;
sched_pusch->mcs = 9;
sched_pusch->mcs = 9;
update_ul_ue_R_Qm(sched_pusch, ps);
sched_pusch->rbStart = rbStart;
sched_pusch->rbSize = min_rb;

View File

@@ -702,7 +702,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup;
NR_DMRS_UplinkConfig->dmrs_Type = NULL;
NR_DMRS_UplinkConfig->dmrs_AdditionalPosition = calloc(1,sizeof(*NR_DMRS_UplinkConfig->dmrs_AdditionalPosition));
*NR_DMRS_UplinkConfig->dmrs_AdditionalPosition = NR_DMRS_UplinkConfig__dmrs_AdditionalPosition_pos0;
*NR_DMRS_UplinkConfig->dmrs_AdditionalPosition = NR_DMRS_UplinkConfig__dmrs_AdditionalPosition_pos1;
if (!servingcellconfigdedicated) {
NR_DMRS_UplinkConfig->phaseTrackingRS=NULL;
}

View File

@@ -218,6 +218,7 @@ L1s = (
num_cc = 1;
tr_n_preference = "local_mac";
pusch_proc_threads = 8;
max_ldpc_iterations = 15;
ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0
}
);

View File

@@ -0,0 +1,323 @@
Active_gNBs = ( "gNB-OAI");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
gNBs =
(
{
////////// Identification parameters:
gNB_CU_ID = 0xe00;
# cell_type = "CELL_MACRO_GNB";
gNB_name = "gNB-OAI";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = 1;
plmn_list = ({
mcc = 208;
mnc = 99;
mnc_length = 2;
snssaiList = (
{
sst = 1;
sd = 0x010203; // 0 false, else true
},
{
sst = 1;
sd = 0x112233; // 0 false, else true
}
);
});
nr_cellid = 12345678L
# tr_s_preference = "local_mac"
////////// Physical parameters:
ssb_SubcarrierOffset = 0;
pdsch_AntennaPorts = 1;
pusch_AntennaPorts = 2;
min_rxtxtime_pdsch = 2;
ul_prbblacklist = "51,52,53,54"
pdcch_ConfigSIB1 = (
{
controlResourceSetZero = 11;
searchSpaceZero = 0;
}
);
servingCellConfigCommon = (
{
#spCellConfigCommon
physCellId = 0;
# downlinkConfigCommon
#frequencyInfoDL
# this is 3301.68 MHz + 22*12*30e-3 MHz = 3309.6
#absoluteFrequencySSB = 620640;
# this is 3300.60 MHz + 53*12*30e-3 MHz = 3319.68
absoluteFrequencySSB = 621312;
# this is 3503.28 MHz + 22*12*30e-3 MHz = 3511.2
#absoluteFrequencySSB = 634080;
# this is 3600.48 MHz
#absoluteFrequencySSB = 640032;
#dl_frequencyBand = 78;
# this is 3301.68 MHz
#dl_absoluteFrequencyPointA = 620112;
# this is 3300.60 MHz
dl_absoluteFrequencyPointA = 620040;
# this is 3502.56 MHz
#dl_absoluteFrequencyPointA = 633552;
# this is 3600.48 MHz
#dl_absoluteFrequencyPointA = 640032;
#scs-SpecificCarrierList
dl_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_subcarrierSpacing = 1;
dl_carrierBandwidth = 106;
#initialDownlinkBWP
#genericParameters
# this is RBstart=0,L=106 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 28875;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 11;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=1,L=5
initialDLBWPstartSymbolAndLength_1 = 57;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 78;
#scs-SpecificCarrierList
ul_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_subcarrierSpacing = 1;
ul_carrierBandwidth = 106;
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 28875;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 1;
#rach-ConfigCommon
#rach-ConfigGeneric
prach_ConfigurationIndex = 98;
#prach_msg1_FDM
#0 = one, 1=two, 2=four, 3=eight
prach_msg1_FDM = 0;
prach_msg1_FrequencyStart = 0;
zeroCorrelationZoneConfig = 12;
preambleReceivedTargetPower = -104;
#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
preambleTransMax = 6;
#powerRampingStep
# 0=dB0,1=dB2,2=dB4,3=dB6
powerRampingStep = 1;
#ra_ReponseWindow
#1,2,4,8,10,20,40,80
ra_ResponseWindow = 4;
#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen
ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 3;
#oneHalf (0..15) 4,8,12,16,...60,64
ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15;
#ra_ContentionResolutionTimer
#(0..7) 8,16,24,32,40,48,56,64
ra_ContentionResolutionTimer = 7;
rsrp_ThresholdSSB = 19;
#prach-RootSequenceIndex_PR
#1 = 839, 2 = 139
prach_RootSequenceIndex_PR = 2;
prach_RootSequenceIndex = 1;
# SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
#
msg1_SubcarrierSpacing = 1,
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6;
initialULBWPmappingType_0 = 1
# this is SS=2 L=13
initialULBWPstartSymbolAndLength_0 = 41;
initialULBWPk2_1 = 6;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=4
initialULBWPstartSymbolAndLength_1 = 52;
initialULBWPk2_2 = 7;
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
# pucch-ConfigCommon setup :
# pucchGroupHopping
# 0 = neither, 1= group hopping, 2=sequence hopping
pucchGroupHopping = 0;
hoppingId = 40;
p0_nominal = -90;
# ssb_PositionsInBurs_BitmapPR
# 1=short, 2=medium, 3=long
ssb_PositionsInBurst_PR = 2;
ssb_PositionsInBurst_Bitmap = 1;
# ssb_periodicityServingCell
# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
ssb_periodicityServingCell = 2;
# dmrs_TypeA_position
# 0 = pos2, 1 = pos3
dmrs_TypeA_Position = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
subcarrierSpacing = 1;
#tdd-UL-DL-ConfigurationCommon
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
referenceSubcarrierSpacing = 1;
# pattern1
# dl_UL_TransmissionPeriodicity
# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
dl_UL_TransmissionPeriodicity = 6;
nrofDownlinkSlots = 7;
nrofDownlinkSymbols = 6;
nrofUplinkSlots = 2;
nrofUplinkSymbols = 4;
ssPBCH_BlockPower = -25;
}
);
# ------- SCTP definitions
SCTP :
{
# Number of streams to use in input/output
SCTP_INSTREAMS = 2;
SCTP_OUTSTREAMS = 2;
};
////////// AMF parameters:
amf_ip_address = ( { ipv4 = "192.168.69.131";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
}
);
NETWORK_INTERFACES :
{
GNB_INTERFACE_NAME_FOR_NG_AMF = "em1";
GNB_IPV4_ADDRESS_FOR_NG_AMF = "192.168.18.196/24";
GNB_INTERFACE_NAME_FOR_NGU = "em1";
GNB_IPV4_ADDRESS_FOR_NGU = "192.168.18.196/24";
GNB_PORT_FOR_S1U = 2152; # Spec 2152
};
}
);
MACRLCs = (
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
pusch_TargetSNRx10 = 200;
pucch_TargetSNRx10 = 200;
ulsch_max_slots_inactivity=10;
}
);
L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
pusch_proc_threads = 3;
prach_dtx_threshold = 120;
pucch0_dtx_threshold = 50;
}
);
RUs = (
{
local_rf = "yes"
nb_tx = 2
nb_rx = 2
att_tx = 0
att_rx = 0;
bands = [78];
max_pdschReferenceSignalPower = -27;
max_rxgain = 75;
eNB_instances = [0];
##beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000];
##beamforming 1x4 matrix: 1 layer x 4 antennas
#bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
## beamforming 2x2 matrix:
# bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
## beamforming 4x4 matrix:
#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
sdr_addrs = "addr=192.168.30.2,second_addr=192.168.50.2,clock_source=internal,time_source=internal"
}
);
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
);
log_config :
{
global_log_level ="info";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="high";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
pdcp_log_level ="info";
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
f1ap_log_level ="debug";
f1ap_log_verbosity ="medium";
};