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19 Commits

Author SHA1 Message Date
Mario Joa-Ng
616d325414 xran patch for Microamp 2026-03-19 16:59:39 +01:00
Mario Joa-Ng
f5995e9126 Limit the number of uplink slot dedicated to SR to 16 to allow enough slots for other UL signals when SSB >= 16 2026-03-18 18:57:25 +01:00
Mario Joa-Ng
c9c74760a5 configuration file for SSB >= 9 that uses lophy as parameter. 2026-03-17 23:30:34 +01:00
Mario Joa-Ng
27f9bc711f Remove the commented lines in configuration file. Use lophy parameter in configuration file 2026-03-17 22:44:17 +01:00
Mario Joa-Ng
81c03cc48e Modify dl_absoluteFrequencyPointA to 2078403 (center frequency 28.049280000GHz) to test mux pattern 3 for no of SSBs > 8) 2026-03-17 22:25:34 +01:00
Mario Joa-Ng
1bf541689d add configuration file for 28047360000. 2026-03-17 22:25:11 +01:00
Mario Joa-Ng
3f1c795e8f Fix CSI-RS slot which should not be SSB_index / 2. 2026-03-17 22:15:58 +01:00
Mario Joa-Ng
f5d8917bfc set ssb_index using get_ssbidx_from_beam() instead of using common_channels[0].ssb_index[] which was used in set_analog_beamforming = 1 previously 2026-03-17 22:15:58 +01:00
Mario Joa-Ng
46a6ba2efb handle start symbol on non-zeroth symbol for SIB for mux 3. 2026-03-17 22:15:58 +01:00
Mario Joa-Ng
11cdb35c6c Use reserve arrays so that MSG3 and PUSCH that are scheduled in advance will check if the slot which will be used by periodic UL signal (SR, SRS, CSI reports) 2026-03-17 22:15:58 +01:00
Mario Joa-Ng
c15d6f1976 Get beam loc in beam_weights and use it to assign the corresponding uplink slot for SR. 2026-03-16 21:50:23 +01:00
Mario Joa-Ng
849e0de025 Configure periodic CSI reports, periodic SRS and periodic SR according to userid on different non-PRACH uplink slots to avoid beam allocation conflict among uplink signals 2026-03-16 21:50:04 +01:00
Mario Joa-Ng
a33908c47f Temporary: Change F release version to 1.4 to match the version on microamp patch. 2026-03-07 00:00:46 +01:00
Mario Joa-Ng
6470e67336 turn on RA trace on beam id 2026-03-06 23:59:09 +01:00
Mario Joa-Ng
b0587d645a modify FHI so that it could use the xran that is w/o RunSlotPrbMapBySymbolEnable and LiteOnIgnoreUPSectionIdEnable 2026-03-06 23:58:54 +01:00
francescomani
92bbbac0ad revert RFSIM configuration file for FR2 test back to full iniitial BWP now that issue preventing it from working is fixed 2026-02-27 13:30:41 +01:00
francescomani
f85c36f49a fixes for CSET not at the bottom of BWP at OAI UE 2026-02-27 13:30:41 +01:00
francescomani
a71076dab4 option to change TDA in case of MUX23 2026-02-27 13:30:41 +01:00
francescomani
d6d12739f1 call functions to configure TDA in nr_mac_config_scc
this is done to be able to set DL TDA after calling config_sched_ctrlSIB1 and knowing the potential configuration of commonControlResourceSet for MUX pattern 3 which duration doesn't depend on the BWP size
2026-02-27 13:30:41 +01:00
27 changed files with 5254 additions and 152 deletions

View File

@@ -42,7 +42,7 @@ gNBs =
#initialDownlinkBWP
#genericParameters
# this is RBstart=0,L=32 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 6349;
initialDLBWPlocationAndBandwidth = 17875;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 3;
@@ -62,7 +62,7 @@ gNBs =
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 6349;
initialULBWPlocationAndBandwidth = 17875;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 3;
@@ -143,11 +143,6 @@ gNBs =
);
first_active_bwp = 1;
bwp_list = (
{ scs = 3; bwpStart = 0; bwpSize = 66;}
);
# ------- SCTP definitions
SCTP :
{

File diff suppressed because it is too large Load Diff

View File

@@ -840,7 +840,7 @@ void nr_pdcch_channel_estimation(const PHY_VARS_NR_UE *ue,
for (int aarx = 0; aarx < ue->frame_parms.nb_antennas_rx; aarx++) {
int k = coreset_start_subcarrier;
c16_t *pil = &pilot[dmrs_ref * 3];
c16_t *pil = &pilot[(dmrs_ref + coreset_start_rb) * 3];
c16_t *rxF = &rxdataF[aarx][k + 1];
c16_t *dl_ch = pdcch_dl_ch_estimates[aarx];

View File

@@ -243,12 +243,14 @@ static void nr_pdcch_extract_rbs_single(uint32_t rxdataF_sz,
*/
c16_t middle_prb_buffer[RE_PER_RB];
for (int rb_group = 0; rb_group < coreset_nbr_rb / 6; rb_group++) {
int start = rb_offset / 6;
int size = coreset_nbr_rb / 6;
for (int rb_group = start; rb_group < start + size; rb_group++) {
if ((coreset_freq_dom[rb_group / 8] & (1 << (7 - (rb_group & 7)))) == 0) {
continue;
}
for (int rb = 0; rb < 6; rb++) {
int c_rb = rb_group * 6 + rb + rb_offset;
int c_rb = rb_group * 6 + rb;
c16_t *rxF = NULL;
if ((frame_parms->N_RB_DL & 1) == 0) {
if ((c_rb + n_BWP_start) < frame_parms->N_RB_DL / 2)
@@ -344,11 +346,11 @@ static void nr_rx_pdcch_symbol(PHY_VARS_NR_UE *ue,
if (coreset->CoreSetType == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG)
dmrs_ref = phy_pdcch_config->pdcch_config[ss_idx].BWPStart;
// generate pilot
c16_t pilot[(n_rb + dmrs_ref) * 3] __attribute__((aligned(16)));
c16_t pilot[(n_rb + rb_offset + dmrs_ref) * 3] __attribute__((aligned(16)));
// Note: pilot returned by the following function is already the complex conjugate of the transmitted DMRS
const uint32_t *gold =
nr_gold_pdcch(ue->frame_parms.N_RB_DL, ue->frame_parms.symbols_per_slot, scrambling_id, proc->nr_slot_rx, symbol);
nr_pdcch_dmrs_ref(gold, pilot, n_rb + dmrs_ref);
nr_pdcch_dmrs_ref(gold, pilot, n_rb + rb_offset + dmrs_ref);
nr_pdcch_channel_estimation(ue,
n_rb,
rb_offset,
@@ -373,7 +375,7 @@ static void nr_rx_pdcch_symbol(PHY_VARS_NR_UE *ue,
pdcch_dl_ch_estimates_ext,
fp,
coreset->frequency_domain_resource,
coreset->rb_offset,
rb_offset,
n_rb,
phy_pdcch_config->pdcch_config[ss_idx].BWPStart);

View File

@@ -819,7 +819,8 @@ int main(int argc, char **argv)
rnti_t rnti = 0x1234;
int uid = 0;
int ssb_index = 0;
NR_CellGroupConfig_t *secondaryCellGroup = get_default_secondaryCellGroup(scc, UE_Capability_nr, 0, 1, &conf, uid, ssb_index);
int beam_idx = 0;
NR_CellGroupConfig_t *secondaryCellGroup = get_default_secondaryCellGroup(scc, UE_Capability_nr, 0, 1, &conf, uid, ssb_index, beam_idx);
secondaryCellGroup->spCellConfig->reconfigurationWithSync = get_reconfiguration_with_sync(rnti, uid, scc, frame);
/* -U option modify DMRS */

View File

@@ -843,7 +843,8 @@ int main(int argc, char *argv[])
rnti_t rnti = 0x1234;
int uid = 0;
int ssb_index = 0;
NR_CellGroupConfig_t *secondaryCellGroup = get_default_secondaryCellGroup(scc, UE_Capability_nr, 0, 1, &conf, uid, ssb_index);
int beam_idx = 0;
NR_CellGroupConfig_t *secondaryCellGroup = get_default_secondaryCellGroup(scc, UE_Capability_nr, 0, 1, &conf, uid, ssb_index, beam_idx);
secondaryCellGroup->spCellConfig->reconfigurationWithSync = get_reconfiguration_with_sync(rnti, uid, scc, frame);
NR_BCCH_BCH_Message_t *mib = get_new_MIB_NR(scc);

View File

@@ -584,12 +584,6 @@ void fix_scc(NR_ServingCellConfigCommon_t *scc, uint64_t ssbmap)
}
DevAssert(rach_ConfigCommon->rach_ConfigGeneric.ra_ResponseWindow >= 0);
// prepare DL Allocation lists
nr_rrc_config_dl_tda(dlcc->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList,
frame_type,
scc->tdd_UL_DL_ConfigurationCommon,
NRRIV2BW(dlcc->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE));
if (frame_type == FDD) {
ASN_STRUCT_FREE(asn_DEF_NR_TDD_UL_DL_ConfigCommon, scc->tdd_UL_DL_ConfigurationCommon);
scc->tdd_UL_DL_ConfigurationCommon = NULL;
@@ -1005,7 +999,6 @@ static NR_ServingCellConfigCommon_t *get_scc_config(configmodule_interface_t *cf
check_ssb_raster(ssb_freq, *frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing);
fix_scc(scc, ssb_bitmap);
}
nr_rrc_config_ul_tda(scc, minRXTXTIME, do_SRS);
// the gNB uses the servingCellConfigCommon everywhere, even when it should use the servingCellConfigCommonSIB.
// previously (before this commit), the following fields were indirectly populated through get_SIB1_NR().
@@ -1653,9 +1646,9 @@ void RCconfig_nr_macrlc(configmodule_interface_t *cfg)
// each beam is described by a set of weights (one for each antenna)
// in case of analog beamforming an index to the RU beam identifier is provided
// (one for each beam regardless of the number of antennas per beam)
config.nb_bfw[0] = num_tx; // number of tx antennas
config.nb_bfw[1] = num_beam; // number of beams weights/indices
config.bw_list = calloc_or_fail(n, sizeof(*config.bw_list));
RC.nrmac[j]->radio_config.nb_bfw[0] = config.nb_bfw[0] = num_tx; // number of tx antennas
RC.nrmac[j]->radio_config.nb_bfw[1] = config.nb_bfw[1] = num_beam; // number of beams weights/indices
RC.nrmac[j]->radio_config.bw_list = config.bw_list = calloc_or_fail(n, sizeof(*config.bw_list));
for (int b = 0; b < n; b++)
config.bw_list[b] = MacRLC_ParamList.paramarray[j][MACRLC_BEAMWEIGHTS_IDX].iptr[b];
}

View File

@@ -59,6 +59,125 @@
#include "nfapi_nr_interface_scf.h"
#include "utils.h"
bool is_prach_slot_set = false;
bool is_prach_slot[160] = {false};
#define SLOT_TYPE_SRS 0
#define SLOT_TYPE_CSIR 1
#define SLOT_TYPE_RSRP 2
#define SLOT_TYPE_SR 3
#define SLOT_TYPE_NUM (SLOT_TYPE_SR + 1)
#define MAX_SR_SLOT_PERIOD 16
int reserve_offset[MAX_MOBILES_PER_GNB * SLOT_TYPE_NUM] = {[0 ... (MAX_MOBILES_PER_GNB * SLOT_TYPE_NUM - 1)] -1};
int reserve_period[MAX_MOBILES_PER_GNB * SLOT_TYPE_NUM] = {[0 ... (MAX_MOBILES_PER_GNB * SLOT_TYPE_NUM - 1)] -1};
void unset_period_offset_beam(int uid)
{
for (int i = 0; i < SLOT_TYPE_NUM; i++) {
reserve_offset[uid * SLOT_TYPE_NUM + i] = -1;
reserve_period[uid * SLOT_TYPE_NUM + i] = -1;
}
}
bool check_period_offset_reserve(int sched_frame, int sched_slot, int n_slots_frame) {
for (int i = 0; i < MAX_MOBILES_PER_GNB * SLOT_TYPE_NUM; i++) {
if ((reserve_period[i] == -1) || (reserve_offset[i] == -1))
continue;
if ((sched_frame * n_slots_frame + sched_slot - reserve_offset[i]) % reserve_period[i] == 0) {
return true;
}
}
return false;
}
int get_beamloc_from_beam(int beam_index)
{
gNB_MAC_INST *mac = RC.nrmac[0];
if (mac->beam_info.beam_mode == LOPHY_BEAM_IDX) {
for (int i = 0; i < mac->radio_config.nb_bfw[1]; i++) {
if (mac->radio_config.bw_list[i] == beam_index)
return i;
}
AssertFatal(false, "beam_index %d not found\n", beam_index);
return 0;
}
return beam_index;
}
bool get_nr_prach_sched_from_info_beam(nr_prach_info_t info,
int config_index,
int slot,
int mu,
frequency_range_t freq_range,
uint8_t unpaired)
{
if (freq_range == FR2) {
//Not checking n_sfn mod x = y
int slot_60khz = slot >> (mu - 2); // in table slots are numbered wrt 60kHz
if (((info.s_map >> slot_60khz) & 0x01)) {
if (mu == 3) {
if ((info.N_RA_slot == 1) && (slot % 2 == 0))
return false; // no prach in even slots @ 120kHz for 1 prach per 60khz slot
}
return true;
} else
return false; // no prach in current slot
} else {
if (unpaired) { // TDD
//Not checking n_sfn mod x = y
int subframe = slot >> mu;
if ((info.s_map >> subframe) & 0x01) {
if (config_index >= 67) {
if ((mu == 1) && (info.N_RA_slot <= 1) && (slot % 2 == 0))
return false; // no prach in even slots @ 30kHz for 1 prach per subframe
} else {
if ((slot % 2) && (mu > 0))
return false; // slot does not contain start symbol of this prach time resource
}
return true;
} else
return false; // no prach in current slot
} else { // FDD
//Not checking n_sfn mod x = y
int subframe = slot >> mu;
if ((info.s_map >> subframe) & 0x01) {
if (config_index >= 87) {
if ((mu == 1) && (info.N_RA_slot <= 1) && (slot % 2 == 0)) {
return false; // no prach in even slots @ 30kHz for 1 prach per subframe
}
} else {
if ((slot % 2) && (mu > 0))
return 0; // slot does not contain start symbol of this prach time resource
}
return true;
} else
return false; // no prach in current slot
}
}
}
void set_prach_slot()
{
gNB_MAC_INST *gNB = RC.nrmac[0];
NR_COMMON_channels_t *cc = gNB->common_channels;
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
NR_BWP_UplinkCommon_t *initialUplinkBWP = scc->uplinkConfigCommon->initialUplinkBWP;
NR_RACH_ConfigCommon_t *rach_ConfigCommon = initialUplinkBWP->rach_ConfigCommon->choice.setup;
NR_MsgA_ConfigCommon_r16_t *msgacc = NULL;
if (initialUplinkBWP->ext1 && initialUplinkBWP->ext1->msgA_ConfigCommon_r16)
msgacc = initialUplinkBWP->ext1->msgA_ConfigCommon_r16->choice.setup;
const NR_RACH_ConfigGeneric_t *rach_ConfigGeneric = &rach_ConfigCommon->rach_ConfigGeneric;
uint8_t config_index = rach_ConfigGeneric->prach_ConfigurationIndex;
const int ul_mu = scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing;
const int mu = nr_get_prach_or_ul_mu(msgacc, rach_ConfigCommon, ul_mu);
frequency_range_t freq_range = get_freq_range_from_arfcn(scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA);
frame_structure_t *fs = &RC.nrmac[0]->frame_structure;
for (int j = 0; j < fs->numb_slots_frame; j++) {
is_prach_slot[j] = get_nr_prach_sched_from_info_beam(cc->prach_info, config_index, j, mu, freq_range, cc->frame_type);
}
}
c16_t convert_precoder_weight(double complex c_in)
{
return (c16_t) {.r = round(SHRT_MAX*creal(c_in)), .i = round(SHRT_MAX*cimag(c_in))};
@@ -289,6 +408,72 @@ int get_first_ul_slot(const frame_structure_t *fs, bool mixed)
return 0; // FDD
}
/**
* @brief Get the first UL slot index in period
* @param fs frame structure
* @param beam_idx beam index
* @param beams_per_period no of concurrent beams
* @param num_beam no of beams
* @param uid UE id
* @return slot index
*
*/
int get_first_ul_slot_beam(const frame_structure_t *fs, int beam_idx, int beams_per_period, int num_beam, int uid)
{
DevAssert(fs);
// FDD
if (fs->frame_type == FDD)
return 1;
if (!is_prach_slot_set)
set_prach_slot();
// UL slots indexes in period
int ul_slot_idxs[fs->numb_slots_frame];
int ul_slot_count = 0;
for (int i = 0; i < fs->numb_slots_frame; i++) {
ul_slot_idxs[i] = 0;
}
int idx = get_beamloc_from_beam(beam_idx) / beams_per_period;
LOG_D(NR_MAC, "get_first_ul_slot_beam idx %d beam_idx %d num_beam %d\n", idx, beam_idx, num_beam);
/* Populate the indices of UL slots in the TDD period from the bitmap
* mixed slot is not used in multiple beams config file to avoid collision with SSB
*/
for (int j = 0; j < fs->numb_slots_frame; j++) {
int i = j % fs->numb_slots_period;
if ((fs->period_cfg.tdd_slot_bitmap[i].slot_type == TDD_NR_UPLINK_SLOT) && !is_prach_slot[j]) {
ul_slot_idxs[ul_slot_count++] = j;
}
}
for (int i = 0; i < fs->numb_slots_frame; i++)
LOG_D(NR_MAC, "ul_slot_idxs[%d] %d\n", i, ul_slot_idxs[i]);
// Compute slot index offset
int period_idx = idx / MAX_SR_SLOT_PERIOD; // wrap up the count of complete TDD periods spanned by the index
int ul_slot_idx_in_period = idx % MAX_SR_SLOT_PERIOD; // wrap up the UL slot index within the current TDD period
int ret = ul_slot_idxs[ul_slot_idx_in_period] + period_idx * fs->numb_slots_frame;
reserve_offset[uid * SLOT_TYPE_NUM + SLOT_TYPE_SR] = ret;
LOG_D(NR_MAC, "get_first_ul_slot_beam ret %d idx %d beam_idx %d ul_slot_count %d %d %d\n",
ret, idx, beam_idx, ul_slot_idx_in_period, period_idx, fs->numb_slots_period);
return ret;
}
void get_first_ul_slot_period_beam(const frame_structure_t *fs, int beam_idx, int period, int uid)
{
DevAssert(fs);
// FDD
if (fs->frame_type == FDD)
return;
reserve_period[uid * SLOT_TYPE_NUM + SLOT_TYPE_SR] = period;
LOG_D(NR_MAC, "get_first_ul_slot_period_beam uid %d beam_idx %d period %d\n", uid, beam_idx, period);
}
/**
* @brief Get number of DL slots per period (full DL slots + mixed slots with DL symbols)
*/
@@ -391,6 +576,162 @@ int get_ul_slot_offset(const frame_structure_t *fs, int idx, bool count_mixed)
return ul_slot_idxs[ul_slot_idx_in_period] + period_idx * fs->numb_slots_period;
}
/**
* @brief Get the nth UL slot offset for UE index idx in a TDD period using the frame structure bitmap
* @param fs frame structure
* @param idx UE index
* @param is_csi indicates whether it is csi or not
* @param beam_idx beam index
* @param beams_per_period no of concurrent beams
* @param num_beam no of beams
* @return slot index offset
*/
int get_ul_slot_offset_beam(const frame_structure_t *fs, int idx, bool is_csi, int beam_idx, int beams_per_period, int num_beam, bool set)
{
DevAssert(fs);
// FDD
if (fs->frame_type == FDD)
return idx;
if (!is_prach_slot_set)
set_prach_slot();
// UL slots indexes in period
int ul_slot_idxs[fs->numb_slots_frame];
int ul_slot_count = 0;
for (int i = 0; i < fs->numb_slots_frame; i++) {
ul_slot_idxs[i] = 0;
}
LOG_D(NR_MAC, "get_ul_slot_offset_beam idx %d is_csi %d beam_idx %d num_beam %d\n", idx, is_csi, beam_idx, num_beam);
int uid = (is_csi) ? idx/2 : idx;
int id = uid / beams_per_period;
// For NO_BEAM_MODE
// Assuming num_pucch2 = 2 and ignoring mixed slotset_csi_meas_periodicity() and configure_periodic_srs() will give this assignment
// UL slot
// 0123456789
// uid0 S
// CR
// uid1 -S
// CR
// uid2 --S
// CR
// uid3 ---S
// CR
// With beamforming, the slot assignment is
// UL slot
// 0123456789
// uid0 SCR
// uid1 ---SCR
// uid2 ------SCR
int type;
// SRS
if (!is_csi) {
type = SLOT_TYPE_SRS;
}
else {
// odd => RSRP report
if (idx % 2) {
type = SLOT_TYPE_RSRP;
}
// even => CSI report
else {
type = SLOT_TYPE_CSIR;
}
}
idx = 3 * id + type;
LOG_D(NR_MAC, "get_ul_slot_offset_beam uid %d type %d id %d idx %d is_csi %d beam_idx %d num_beam %d\n", uid, type, id, idx, is_csi, beam_idx, num_beam);
// Allow the first NUM_SSB_period slot for SR. See get_first_ul_slot_beam()
int NUM_SSB_period = (num_beam % beams_per_period > 0) ? num_beam / beams_per_period + 1 : num_beam / beams_per_period;
idx += (NUM_SSB_period > MAX_SR_SLOT_PERIOD) ? MAX_SR_SLOT_PERIOD: NUM_SSB_period;
/* Populate the indices of UL slots in the TDD period from the bitmap
* mixed slot is not used in multiple beams config file to avoid collision with SSB
*/
for (int j = 0; j < fs->numb_slots_frame; j++) {
int i = j % fs->numb_slots_period;
if ((fs->period_cfg.tdd_slot_bitmap[i].slot_type == TDD_NR_UPLINK_SLOT) && !is_prach_slot[j]) {
ul_slot_idxs[ul_slot_count++] = j;
}
}
for (int i = 0; i < fs->numb_slots_frame; i++)
LOG_D(NR_MAC, "ul_slot_idxs[%d] %d, is_prach_slot[%d] %d\n", i, ul_slot_idxs[i], i, is_prach_slot[i]);
// Compute slot index offset
int period_idx = idx / ul_slot_count; // wrap up the count of complete TDD periods spanned by the index
int ul_slot_idx_in_period = idx % ul_slot_count; // wrap up the UL slot index within the current TDD period
int ret = ul_slot_idxs[ul_slot_idx_in_period] + period_idx * fs->numb_slots_frame;
if (set)
{
reserve_offset[uid * SLOT_TYPE_NUM + type] = ret;
}
LOG_D(NR_MAC, "get_ul_slot_offset_beam ret %d uid %d type %d id %d idx %d beam_idx %d beams_period %d ul_slot_count %d %d %d\n", ret, uid, type, id, idx, beam_idx, beams_per_period, ul_slot_idx_in_period, period_idx, fs->numb_slots_period);
return ret;
}
void get_ul_slot_period_beam(const frame_structure_t *fs, int idx, bool is_csi, int beam_idx, int period, bool set)
{
DevAssert(fs);
// FDD
if (fs->frame_type == FDD)
return;
LOG_D(NR_MAC, "get_ul_slot_period_beam idx %d is_csi %d beam_idx %d period %d\n", idx, is_csi, beam_idx, period);
int uid = (is_csi) ? idx/2 : idx;
// For NO_BEAM_MODE
// Assuming num_pucch2 = 2 and ignoring mixed slotset_csi_meas_periodicity() and configure_periodic_srs() will give this assignment
// UL slot
// 0123456789
// uid0 S
// CR
// uid1 -S
// CR
// uid2 --S
// CR
// uid3 ---S
// CR
// With beamforming, the slot assignment is
// UL slot
// 0123456789
// uid0 SCR
// uid1 ---SCR
// uid2 ------SCR
int type;
// SRS
if (!is_csi) {
type = SLOT_TYPE_SRS;
}
else {
// odd => RSRP report
if (idx % 2) {
type = SLOT_TYPE_RSRP;
}
// even => CSI report
else {
type = SLOT_TYPE_CSIR;
}
}
if (set)
{
reserve_period[uid * SLOT_TYPE_NUM + type] = period;
}
LOG_D(NR_MAC, "get_ul_slot_period_beam uid %d type %d is_csi %d beam_idx %d period %d\n", uid, type, is_csi, beam_idx, period);
}
static void config_common(gNB_MAC_INST *nrmac, const nr_mac_config_t *config, NR_ServingCellConfigCommon_t *scc)
{
nfapi_nr_config_request_scf_t *cfg = &nrmac->config[0];
@@ -781,7 +1122,7 @@ static void initialize_beam_information(NR_beam_info_t *beam_info, int mu, int s
}
}
static void config_sched_ctrlSIB1(gNB_MAC_INST *nr_mac)
static bool config_sched_ctrlSIB1(gNB_MAC_INST *nr_mac)
{
const NR_MIB_t *mib = nr_mac->common_channels[0].mib->message.choice.mib;
NR_ServingCellConfigCommon_t *scc = nr_mac->common_channels[0].ServingCellConfigCommon;
@@ -825,16 +1166,23 @@ static void config_sched_ctrlSIB1(gNB_MAC_INST *nr_mac)
fill_coresetZero(&sched_ctrlCommon->coreset, &type0_PDCCH_CSS_config);
nr_mac->cset0_bwp_start = type0_PDCCH_CSS_config.cset_start_rb;
nr_mac->cset0_bwp_size = type0_PDCCH_CSS_config.num_rbs;
int bwp_size = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
bool long_cset = false;
if (type0_PDCCH_CSS_config.type0_pdcch_ss_mux_pattern > 1) {
int bwp_start = NRRIV2PRBOFFSET(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,
MAX_BWP_SIZE);
int bwp_size = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
// we need to configure a commonControlResourceSet != 0
// because CSET0 would start from a symbol != 0 and that's unwanted for anything but SIB1
// The network configures the commonControlResourceSet in SIB1 so that it is contained in the bandwidth of CSET0
bool do_TCI = nr_mac->radio_config.do_TCI;
configure_coreset_for_mux23(scc, nr_mac->cset0_bwp_start - bwp_start, nr_mac->cset0_bwp_size, bwp_start, bwp_size, do_TCI);
long_cset = configure_coreset_for_mux23(scc,
nr_mac->cset0_bwp_start - bwp_start,
nr_mac->cset0_bwp_size,
bwp_start,
bwp_size,
do_TCI);
}
return long_cset || bwp_size < 48;
}
/**
@@ -903,9 +1251,17 @@ void nr_mac_config_scc(gNB_MAC_INST *nrmac, NR_ServingCellConfigCommon_t *scc, c
find_SSB_and_RO_available(nrmac);
bool two_symb_cset = false;
if (IS_SA_MODE(get_softmodem_params()))
config_sched_ctrlSIB1(nrmac);
two_symb_cset = config_sched_ctrlSIB1(nrmac);
const nr_mac_config_t *rc = &nrmac->radio_config;
const NR_DownlinkConfigCommon_t *dlcc = scc->downlinkConfigCommon;
nr_rrc_config_dl_tda(dlcc->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList,
get_frame_type((int)*dlcc->frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing),
scc->tdd_UL_DL_ConfigurationCommon,
two_symb_cset);
nr_rrc_config_ul_tda(scc, rc->minRXTXTIME, rc->do_SRS);
seq_arr_init(&nrmac->ul_tda, sizeof(NR_tda_info_t));
init_ul_tda_info(scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList, &nrmac->ul_tda);
}

View File

@@ -118,7 +118,7 @@ static int16_t ssb_index_from_prach(module_id_t module_idP,
}
}
LOG_D(NR_MAC, "Frame %d, Slot %d: Prach Occasion id = %d ssb per RO = %f number of active SSB %u index = %d fdm %u symbol index %u freq_index %u total_RApreambles %u\n",
LOG_I(NR_MAC, "mjoang Frame %d, Slot %d: Prach Occasion id = %d ssb per RO = %f number of active SSB %u index = %d fdm %u symbol index %u freq_index %u total_RApreambles %u\n",
frameP, slotP, prach_occasion_id, num_ssb_per_RO, num_active_ssb, index, fdm, start_symbol_index, freq_index, total_RApreambles);
return index;
@@ -818,6 +818,10 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP,
|| !((msg3_mask & slot_bitmap) == msg3_mask))
return;
if (check_period_offset_reserve(sched_frame, sched_slot, slots_frame)) {
LOG_I(NR_MAC, "[UE %04x][%4d.%2d] MSG3 Beam could not be allocated due to periodic UL signal\n", UE->rnti, sched_frame, sched_slot);
return;
}
NR_beam_alloc_t beam_ul = beam_allocation_procedure(&nr_mac->beam_info, sched_frame, sched_slot, UE->UE_beam_index, slots_frame);
if (beam_ul.idx < 0)
return;
@@ -1034,6 +1038,10 @@ static bool get_feasible_msg3_tda(const NR_ServingCellConfigCommon_t *scc,
if ((slot_mask & msg3_mask) != msg3_mask)
continue;
if (check_period_offset_reserve(temp_frame, temp_frame, slots_per_frame)) {
LOG_I(NR_MAC, "[%4d.%2d] MSG3 Beam could not be allocated due to periodic UL signal\n", temp_frame, temp_slot);
continue;
}
// check if it is possible to allocate MSG3 in a beam in this slot
NR_beam_alloc_t beam = beam_allocation_procedure(beam_info, temp_frame, temp_slot, ue_beam_idx, slots_per_frame);
if (beam.idx < 0)

View File

@@ -3838,7 +3838,7 @@ bool prepare_initial_ul_rrc_message(gNB_MAC_INST *mac, NR_UE_info_t *UE)
int srb_id = 1;
const NR_ServingCellConfigCommon_t *scc = mac->common_channels[CC_id].ServingCellConfigCommon;
int ssb_index = get_ssbidx_from_beam(mac, UE->UE_beam_index);
NR_CellGroupConfig_t *cellGroupConfig = get_initial_cellGroupConfig(UE->uid, scc, &mac->radio_config, &mac->rlc_config, ssb_index);
NR_CellGroupConfig_t *cellGroupConfig = get_initial_cellGroupConfig(UE->uid, scc, &mac->radio_config, &mac->rlc_config, ssb_index, UE->UE_beam_index);
ASN_STRUCT_FREE(asn_DEF_NR_CellGroupConfig, UE->CellGroup);
UE->CellGroup = cellGroupConfig;
UE->local_bwp_id = mac->radio_config.first_active_bwp;
@@ -3964,7 +3964,7 @@ static bool verify_bwp_switch(const NR_UE_info_t *UE, const nr_mac_config_t *con
return false;
}
void nr_mac_trigger_reconfiguration(const gNB_MAC_INST *nrmac, NR_UE_info_t *UE, int new_bwp_id, bool new_beam)
void nr_mac_trigger_reconfiguration(gNB_MAC_INST *nrmac, NR_UE_info_t *UE, int new_bwp_id, bool new_beam)
{
DevAssert(UE->CellGroup != NULL);
NR_CellGroupConfig_t *cellGroup_for_UE = NULL;
@@ -3972,14 +3972,15 @@ void nr_mac_trigger_reconfiguration(const gNB_MAC_INST *nrmac, NR_UE_info_t *UE,
UE->sc_info.csi_MeasConfig = NULL; // to avoid segfault when freeing csi_MeasConfig in configDedicated
NR_UE_UL_BWP_t *current_BWP = &UE->current_UL_BWP;
current_BWP->srs_Config = NULL;
int ssb_index = nrmac->common_channels[0].ssb_index[UE->UE_beam_index];
int ssb_index = get_ssbidx_from_beam(nrmac, UE->UE_beam_index);
cellGroup_for_UE = update_cellGroupConfig_for_beam_switch(UE->CellGroup,
&nrmac->radio_config,
UE->capability,
nrmac->common_channels[0].ServingCellConfigCommon,
UE->uid,
UE->current_DL_BWP.bwp_id,
ssb_index);
ssb_index,
UE->UE_beam_index);
} else {
if (new_bwp_id >= 0) {
AssertFatal(UE->current_DL_BWP.bwp_id == UE->current_UL_BWP.bwp_id, "We only support same BWP for UL and DL\n");
@@ -3988,7 +3989,7 @@ void nr_mac_trigger_reconfiguration(const gNB_MAC_INST *nrmac, NR_UE_info_t *UE,
else {
UE->sc_info.csi_MeasConfig = NULL; // to avoid segfault when freeing csi_MeasConfig in configDedicated
UE->local_bwp_id = new_bwp_id;
int ssb_index = nrmac->common_channels[0].ssb_index[UE->UE_beam_index];
int ssb_index = get_ssbidx_from_beam(nrmac, UE->UE_beam_index);
cellGroup_for_UE = update_cellGroupConfig_for_BWP_switch(UE->CellGroup,
&nrmac->radio_config,
UE->capability,
@@ -3996,7 +3997,8 @@ void nr_mac_trigger_reconfiguration(const gNB_MAC_INST *nrmac, NR_UE_info_t *UE,
UE->uid,
UE->current_DL_BWP.bwp_id,
new_bwp_id,
ssb_index);
ssb_index,
UE->UE_beam_index);
}
}
}

View File

@@ -275,6 +275,12 @@ void nr_csi_meas_reporting(int Mod_idP,frame_t frame, slot_t slot)
// going through the list of PUCCH resources to find the one indexed by resource_id
NR_beam_alloc_t beam = beam_allocation_procedure(&nrmac->beam_info, sched_frame, sched_slot, UE->UE_beam_index, n_slots_frame);
AssertFatal(beam.idx >= 0, "Cannot allocate CSI measurements on PUCCH in any available beam\n");
// Keep the following in case AssertFatal needs to comment out for testing
if (beam.idx < 0) {
LOG_I(NR_MAC, "Cannot allocate CSI measurements on PUCCH in any available beam\n");
continue;
}
const int index = ul_buffer_index(sched_frame, sched_slot, n_slots_frame, nrmac->vrb_map_UL_size);
uint16_t *vrb_map_UL = &nrmac->common_channels[0].vrb_map_UL[beam.idx][index * MAX_BWP_SIZE];
const int m = pucch_Config->resourceToAddModList->list.count;
@@ -1218,6 +1224,15 @@ int nr_acknack_scheduling(gNB_MAC_INST *mac,
memset(curr_pucch, 0, sizeof(*curr_pucch));
}
else { // unoccupied occasion
if (check_period_offset_reserve(pucch_frame, pucch_slot, n_slots_frame)) {
LOG_I(NR_MAC,
"DL %4d.%2d, UL_ACK %4d.%2d beam resources for this occasion to be used by periodic UL signal, move to the following occasion\n",
frame,
slot,
pucch_frame,
pucch_slot);
continue;
}
// checking if in ul_slot the resources potentially to be assigned to this PUCCH are available
set_pucch_allocation(ul_bwp, r_pucch, bwp_size, curr_pucch);
NR_beam_alloc_t beam = beam_allocation_procedure(&mac->beam_info, pucch_frame, pucch_slot, ue_beam, n_slots_frame);
@@ -1328,6 +1343,11 @@ void nr_sr_reporting(gNB_MAC_INST *nrmac, frame_t SFN, slot_t slot)
else {
NR_beam_alloc_t beam = beam_allocation_procedure(&nrmac->beam_info, SFN, slot, UE->UE_beam_index, n_slots_frame);
AssertFatal(beam.idx >= 0, "Cannot allocate SR in any available beam\n");
// Keep the following in case AssertFatal needs to comment out for testing
if (beam.idx < 0) {
LOG_E(NR_MAC,"Cannot allocate SR in any available beam\n");
continue;
}
const int index = ul_buffer_index(SFN, slot, n_slots_frame, nrmac->vrb_map_UL_size);
uint16_t *vrb_map_UL = &nrmac->common_channels[CC_id].vrb_map_UL[beam.idx][index * MAX_BWP_SIZE];
const int bwp_start = ul_bwp->BWPStart;

View File

@@ -1998,6 +1998,11 @@ static int pf_ul(gNB_MAC_INST *nrmac,
continue;
}
if (check_period_offset_reserve(sched_frame, sched_slot, slots_per_frame)) {
LOG_D(NR_MAC, "[UE %04x][%4d.%2d] ULSCH Beam could not be allocated due to periodic UL signal\n", UE->rnti, frame, slot);
reset_beam_status(&nrmac->beam_info, frame, slot, UE->UE_beam_index, slots_per_frame, dci_beam.new_beam);
continue;
}
NR_beam_alloc_t beam = beam_allocation_procedure(&nrmac->beam_info, sched_frame, sched_slot, UE->UE_beam_index, slots_per_frame);
if (beam.idx < 0) {
LOG_D(NR_MAC, "[UE %04x][%4d.%2d] ULSCH Beam could not be allocated\n", UE->rnti, frame, slot);
@@ -2117,6 +2122,12 @@ static int pf_ul(gNB_MAC_INST *nrmac,
NR_UE_UL_BWP_t *current_BWP = &iterator->UE->current_UL_BWP;
NR_UE_sched_ctrl_t *sched_ctrl = &iterator->UE->UE_sched_ctrl;
if (check_period_offset_reserve(sched_frame, sched_slot, slots_per_frame)) {
LOG_D(NR_MAC, "[UE %04x][%4d.%2d] ULSCH Beam could not be allocated due to periodic UL signal\n", iterator->UE->rnti, frame, slot);
iterator++;
continue;
}
NR_beam_alloc_t beam = beam_allocation_procedure(&nrmac->beam_info, sched_frame, sched_slot, iterator->UE->UE_beam_index, slots_per_frame);
if (beam.idx < 0) {
LOG_D(NR_MAC, "[UE %04x][%4d.%2d] ULSCH Beam could not be allocated\n", iterator->UE->rnti, sched_frame, sched_slot);

View File

@@ -36,18 +36,24 @@
#include "common/ngran_types.h"
#include "openair2/LAYER2/nr_pdcp/nr_pdcp_configuration.h"
void unset_period_offset_beam(int uid);
bool check_period_offset_reserve(int sched_frame, int sched_slot, int n_slots_frame);
void set_cset_offset(uint16_t);
void get_K1_K2(int N1, int N2, int *K1, int *K2, int layers);
int get_NTN_Koffset(const NR_ServingCellConfigCommon_t *scc);
bool is_ssb_configured(const NR_ServingCellConfigCommon_t *scc, int ssb_index);
int get_max_ssbs(const NR_ServingCellConfigCommon_t *scc);
int get_first_ul_slot(const frame_structure_t *fs, bool mixed);
int get_first_ul_slot_beam(const frame_structure_t *fs, int beam_idx, int beams_per_period, int num_beam, int uid);
void get_first_ul_slot_period_beam(const frame_structure_t *fs, int beam_idx, int period, int uid);
int get_ul_slots_per_period(const frame_structure_t *fs);
int get_ul_slots_per_frame(const frame_structure_t *fs);
int get_dl_slots_per_period(const frame_structure_t *fs);
int get_full_ul_slots_per_period(const frame_structure_t *fs);
int get_full_dl_slots_per_period(const frame_structure_t *fs);
int get_ul_slot_offset(const frame_structure_t *fs, int idx, bool count_mixed);
int get_ul_slot_offset_beam(const frame_structure_t *fs, int idx, bool is_csi, int beam_idx, int beams_per_period, int num_beam, bool set);
void get_ul_slot_period_beam(const frame_structure_t *fs, int idx, bool is_csi, int beam_idx, int period, bool set);
void delete_nr_ue_data(NR_UE_info_t *UE, NR_COMMON_channels_t *ccPtr, uid_allocator_t *uia);
void mac_top_init_gNB(ngran_node_t node_type,
@@ -484,7 +490,7 @@ void nr_mac_trigger_ul_failure(NR_UE_sched_ctrl_t *sched_ctrl, NR_SubcarrierSpac
void nr_mac_reset_ul_failure(NR_UE_sched_ctrl_t *sched_ctrl);
bool nr_mac_check_ul_failure(gNB_MAC_INST *nrmac, int rnti, NR_UE_sched_ctrl_t *sched_ctrl);
void nr_mac_trigger_reconfiguration(const gNB_MAC_INST *nrmac, NR_UE_info_t *UE, int new_bwp_id, bool new_beam);
void nr_mac_trigger_reconfiguration(gNB_MAC_INST *nrmac, NR_UE_info_t *UE, int new_bwp_id, bool new_beam);
bool nr_mac_add_lcid(NR_UE_sched_ctrl_t *sched_ctrl, const nr_lc_config_t *c);
nr_lc_config_t *nr_mac_get_lc_config(NR_UE_sched_ctrl_t* sched_ctrl, int lcid);

View File

@@ -569,11 +569,11 @@ static NR_UE_info_t *create_new_UE(gNB_MAC_INST *mac, uint32_t cu_id, const NR_C
const nr_mac_config_t *configuration = &mac->radio_config;
int ssb_index = get_ssbidx_from_beam(mac, UE->UE_beam_index);
if (is_SA) {
cellGroupConfig = get_initial_cellGroupConfig(UE->uid, scc, &mac->radio_config, &mac->rlc_config, ssb_index);
cellGroupConfig = get_initial_cellGroupConfig(UE->uid, scc, &mac->radio_config, &mac->rlc_config, ssb_index, UE->UE_beam_index);
cellGroupConfig->spCellConfig->reconfigurationWithSync = get_reconfiguration_with_sync(UE->rnti, UE->uid, scc, mac->frame);
} else {
NR_UE_NR_Capability_t *cap = get_ue_nr_cap_from_cg_config_info(cgci);
cellGroupConfig = get_default_secondaryCellGroup(scc, cap, 1, 1, configuration, UE->uid, ssb_index);
cellGroupConfig = get_default_secondaryCellGroup(scc, cap, 1, 1, configuration, UE->uid, ssb_index, UE->UE_beam_index);
cellGroupConfig->spCellConfig->reconfigurationWithSync = get_reconfiguration_with_sync(UE->rnti, UE->uid, scc, mac->frame);
// TODO: in NSA we assign capabilities here, otherwise outside => not logic
UE->capability = cap;
@@ -760,7 +760,7 @@ void ue_context_setup_request(const f1ap_ue_context_setup_req_t *req)
if (ue_cap != NULL && cg_configinfo == NULL) {
// store the new UE capabilities, and update the cellGroupConfig
// only to be done if we did not already update through the cg_configinfo
update_cellGroupConfig(new_CellGroup, UE->uid, UE->capability, &mac->radio_config, scc);
update_cellGroupConfig(new_CellGroup, UE->uid, UE->capability, &mac->radio_config, scc, UE->UE_beam_index);
}
/* During re-establishment, prepare CellGroupConfig for UE Context Setup response.
@@ -887,7 +887,7 @@ void ue_context_modification_request(const f1ap_ue_context_mod_req_t *req)
ASN_STRUCT_FREE(asn_DEF_NR_UE_NR_Capability, UE->capability);
UE->capability = ue_cap;
LOG_I(NR_MAC, "UE %04x: received capabilities, updating CellGroupConfig\n", UE->rnti);
update_cellGroupConfig(new_CellGroup, UE->uid, UE->capability, &mac->radio_config, scc);
update_cellGroupConfig(new_CellGroup, UE->uid, UE->capability, &mac->radio_config, scc, UE->UE_beam_index);
}
/* 3GPP TS 38.473 Clause 8.3.4: If gNB-DU Configuration Query is present, include CellGroupConfig

View File

@@ -380,14 +380,24 @@ static int set_ideal_period(bool is_csi)
return is_csi ? MAX_MOBILES_PER_GNB * 2 * nb_slots_per_period / n_ul_slots_per_period : nb_slots_per_period * MAX_MOBILES_PER_GNB;
}
static int set_ideal_period_beam(bool is_csi, int NUM_SSB_period)
{
const frame_structure_t *fs = &RC.nrmac[0]->frame_structure;
const int nb_slots_per_period = fs->numb_slots_period;
// 2 reports per UE (RSRP and RI-PMI-CQI)
return 3 * nb_slots_per_period * MAX_MOBILES_PER_GNB + NUM_SSB_period;
}
static void set_csirs_periodicity(NR_NZP_CSI_RS_Resource_t *nzpcsi0,
int id,
int ssb_index,
int ideal_period,
const frame_structure_t *fs)
{
nzpcsi0->periodicityAndOffset = calloc(1,sizeof(*nzpcsi0->periodicityAndOffset));
// TODO ideal period to be set according to estimation by the gNB on how fast the channel changes
const int offset = id; // id = ssb_index/2, offset should be set to ssb_index/2.
gNB_MAC_INST *gNB_mac = RC.nrmac[0];
NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config = &gNB_mac->type0_PDCCH_CSS_config[ssb_index];
const int offset = type0_PDCCH_CSS_config->slot;
if (check_periodicity(4, ideal_period, fs)) {
nzpcsi0->periodicityAndOffset->present = NR_CSI_ResourcePeriodicityAndOffset_PR_slots4;
nzpcsi0->periodicityAndOffset->choice.slots4 = offset;
@@ -428,7 +438,7 @@ static void set_csirs_periodicity(NR_NZP_CSI_RS_Resource_t *nzpcsi0,
nzpcsi0->periodicityAndOffset->present = NR_CSI_ResourcePeriodicityAndOffset_PR_slots320;
const int nb_dl_slots_period = get_full_dl_slots_per_period(fs); // full DL slots
// checked for validity in verify_radio_configuration
AssertFatal(offset / 320 < nb_dl_slots_period, "Cannot allocate CSI-RS for BWP %d. Not enough resources for CSI-RS\n", id);
AssertFatal(offset / 320 < nb_dl_slots_period, "Cannot allocate CSI-RS for ssb_index %d. Not enough resources for CSI-RS\n", ssb_index);
nzpcsi0->periodicityAndOffset->choice.slots320 = (offset % 320) + (offset / 320);
}
}
@@ -438,16 +448,16 @@ static void config_csirs(const NR_ServingCellConfigCommon_t *servingcellconfigco
int num_dl_antenna_ports,
int curr_bwp,
int do_csirs,
int id)
int ssb_index)
{
if (do_csirs) {
if(!csi_MeasConfig->nzp_CSI_RS_ResourceSetToAddModList)
csi_MeasConfig->nzp_CSI_RS_ResourceSetToAddModList = calloc(1,sizeof(*csi_MeasConfig->nzp_CSI_RS_ResourceSetToAddModList));
NR_NZP_CSI_RS_ResourceSet_t *nzpcsirs0 = calloc(1,sizeof(*nzpcsirs0));
nzpcsirs0->nzp_CSI_ResourceSetId = id;
nzpcsirs0->nzp_CSI_ResourceSetId = ssb_index / 2; //max value is 32
NR_NZP_CSI_RS_ResourceId_t *nzpid0 = calloc(1,sizeof(*nzpid0));
*nzpid0 = id;
*nzpid0 = ssb_index / 2; //max value is 32
asn1cSeqAdd(&nzpcsirs0->nzp_CSI_RS_Resources,nzpid0);
nzpcsirs0->repetition = NULL;
nzpcsirs0->aperiodicTriggeringOffset = NULL;
@@ -456,7 +466,7 @@ static void config_csirs(const NR_ServingCellConfigCommon_t *servingcellconfigco
if(!csi_MeasConfig->nzp_CSI_RS_ResourceToAddModList)
csi_MeasConfig->nzp_CSI_RS_ResourceToAddModList = calloc(1,sizeof(*csi_MeasConfig->nzp_CSI_RS_ResourceToAddModList));
NR_NZP_CSI_RS_Resource_t *nzpcsi0 = calloc(1,sizeof(*nzpcsi0));
nzpcsi0->nzp_CSI_RS_ResourceId = id;
nzpcsi0->nzp_CSI_RS_ResourceId = ssb_index / 2; //max value is 32
NR_CSI_RS_ResourceMapping_t resourceMapping = {0};
switch (num_dl_antenna_ports) {
case 1:
@@ -520,9 +530,18 @@ static void config_csirs(const NR_ServingCellConfigCommon_t *servingcellconfigco
*nzpcsi0->powerControlOffsetSS = NR_NZP_CSI_RS_Resource__powerControlOffsetSS_db0;
nzpcsi0->scramblingID = *servingcellconfigcommon->physCellId;
const int ideal_period = set_ideal_period(true); // same periodicity as CSI measurement report
NR_beam_info_t *beam_info = &RC.nrmac[0]->beam_info;
int ideal_period;
if (beam_info->beam_mode != NO_BEAM_MODE) {
int num_beam = (RC.nrmac[0]->radio_config.nb_bfw[1] > 0) ? RC.nrmac[0]->radio_config.nb_bfw[1] : 1;
int beams_per_period = (beam_info->beams_per_period > 0) ? beam_info->beams_per_period : 1;
int NUM_SSB_period = (num_beam % beams_per_period > 0) ? num_beam / beams_per_period + 1 : num_beam / beams_per_period;
ideal_period = set_ideal_period_beam(true, NUM_SSB_period); // same periodicity as CSI measurement report
} else {
ideal_period = set_ideal_period(true); // same periodicity as CSI measurement report
}
const frame_structure_t *fs = &(RC.nrmac[0]->frame_structure);
set_csirs_periodicity(nzpcsi0, id, ideal_period, fs);
set_csirs_periodicity(nzpcsi0, ssb_index, ideal_period, fs);
nzpcsi0->qcl_InfoPeriodicCSI_RS = calloc(1,sizeof(*nzpcsi0->qcl_InfoPeriodicCSI_RS));
*nzpcsi0->qcl_InfoPeriodicCSI_RS = 0;
@@ -589,13 +608,13 @@ static void config_csiim(int do_csirs,
int dl_antenna_ports,
int curr_bwp,
NR_CSI_MeasConfig_t *csi_MeasConfig,
int id)
int ssb_index)
{
if (do_csirs && dl_antenna_ports > 1) {
if (!csi_MeasConfig->csi_IM_ResourceToAddModList)
csi_MeasConfig->csi_IM_ResourceToAddModList = calloc(1, sizeof(*csi_MeasConfig->csi_IM_ResourceToAddModList));
NR_CSI_IM_Resource_t *imres = calloc(1,sizeof(*imres));
imres->csi_IM_ResourceId = id;
imres->csi_IM_ResourceId = ssb_index / 2; //max value is 32
NR_NZP_CSI_RS_Resource_t *nzpcsi = NULL;
for (int i=0; i<csi_MeasConfig->nzp_CSI_RS_ResourceToAddModList->list.count; i++){
nzpcsi = csi_MeasConfig->nzp_CSI_RS_ResourceToAddModList->list.array[i];
@@ -622,9 +641,9 @@ static void config_csiim(int do_csirs,
if (!csi_MeasConfig->csi_IM_ResourceSetToAddModList)
csi_MeasConfig->csi_IM_ResourceSetToAddModList = calloc(1, sizeof(*csi_MeasConfig->csi_IM_ResourceSetToAddModList));
NR_CSI_IM_ResourceSet_t *imset = calloc(1,sizeof(*imset));
imset->csi_IM_ResourceSetId = id;
imset->csi_IM_ResourceSetId = ssb_index / 2; //max value is 32
NR_CSI_IM_ResourceId_t *res = calloc(1,sizeof(*res));
*res = id;
*res = ssb_index / 2; //max value is 32
asn1cSeqAdd(&imset->csi_IM_Resources,res);
asn1cSeqAdd(&csi_MeasConfig->csi_IM_ResourceSetToAddModList->list,imset);
}
@@ -680,75 +699,110 @@ static void set_dl_maxmimolayers(NR_PDSCH_ServingCellConfig_t *pdsch_servingcell
}
static struct NR_SRS_Resource__resourceType__periodic *configure_periodic_srs(const NR_ServingCellConfigCommon_t *scc,
const int uid)
const int uid,
int beam_idx)
{
frame_structure_t *fs = &RC.nrmac[0]->frame_structure;
int offset = get_ul_slot_offset(fs, uid, false); // only full UL slots for SRS
int offset;
int ideal_period;
NR_beam_info_t *beam_info = &RC.nrmac[0]->beam_info;
if (beam_info->beam_mode != NO_BEAM_MODE) {
int num_beam = (RC.nrmac[0]->radio_config.nb_bfw[1] > 0) ? RC.nrmac[0]->radio_config.nb_bfw[1] : 1;
int beams_per_period = (beam_info->beams_per_period > 0) ? beam_info->beams_per_period : 1 ;
int NUM_SSB_period = (num_beam % beams_per_period > 0) ? num_beam / beams_per_period + 1 : num_beam / beams_per_period;
ideal_period = set_ideal_period_beam(false, NUM_SSB_period);
offset = get_ul_slot_offset_beam(fs, uid, false, beam_idx, beams_per_period, num_beam, true); // only full UL slots for SRS
LOG_I(NR_MAC, "configure_periodic_srs 0 idx %d is_csi %d beam_idx %d num_beam %d ideal_period %d srs_offset %d\n",
uid, false, beam_idx, num_beam, ideal_period, offset);
} else {
offset = get_ul_slot_offset(fs, uid, false); // only full UL slots for SRS
ideal_period = set_ideal_period(false);
}
// checked for validity in verify_radio_configuration
AssertFatal(offset < 2560, "Cannot allocate SRS configuration for uid %d, not enough resources\n", uid);
const int ideal_period = set_ideal_period(false);
int period;
struct NR_SRS_Resource__resourceType__periodic *periodic_srs = calloc(1,sizeof(*periodic_srs));
if (check_periodicity(4, ideal_period, fs)) {
period = 4;
periodic_srs->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl4;
periodic_srs->periodicityAndOffset_p.choice.sl4 = offset;
}
else if (check_periodicity(5, ideal_period, fs)) {
period = 5;
periodic_srs->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl5;
periodic_srs->periodicityAndOffset_p.choice.sl5 = offset;
}
else if (check_periodicity(8, ideal_period, fs)) {
period = 8;
periodic_srs->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl8;
periodic_srs->periodicityAndOffset_p.choice.sl8 = offset;
}
else if (check_periodicity(10, ideal_period, fs)) {
period = 10;
periodic_srs->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl10;
periodic_srs->periodicityAndOffset_p.choice.sl10 = offset;
}
else if (check_periodicity(16, ideal_period, fs)) {
period = 10;
periodic_srs->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl16;
periodic_srs->periodicityAndOffset_p.choice.sl16 = offset;
}
else if (check_periodicity(20, ideal_period, fs)) {
period = 20;
periodic_srs->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl20;
periodic_srs->periodicityAndOffset_p.choice.sl20 = offset;
}
else if (check_periodicity(32, ideal_period, fs)) {
period = 32;
periodic_srs->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl32;
periodic_srs->periodicityAndOffset_p.choice.sl32 = offset;
}
else if (check_periodicity(40, ideal_period, fs)) {
period = 40;
periodic_srs->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl40;
periodic_srs->periodicityAndOffset_p.choice.sl40 = offset;
}
else if (check_periodicity(64, ideal_period, fs)) {
period = 64;
periodic_srs->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl64;
periodic_srs->periodicityAndOffset_p.choice.sl64 = offset;
}
else if (check_periodicity(80, ideal_period, fs)) {
period = 80;
periodic_srs->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl80;
periodic_srs->periodicityAndOffset_p.choice.sl80 = offset;
}
else if (check_periodicity(160, ideal_period, fs)) {
period = 160;
periodic_srs->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl160;
periodic_srs->periodicityAndOffset_p.choice.sl160 = offset;
}
else if (check_periodicity(320, ideal_period, fs)) {
period = 320;
periodic_srs->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl320;
periodic_srs->periodicityAndOffset_p.choice.sl320 = offset;
}
else if (check_periodicity(640, ideal_period, fs)) {
period = 640;
periodic_srs->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl640;
periodic_srs->periodicityAndOffset_p.choice.sl640 = offset;
}
else if (check_periodicity(1280, ideal_period, fs)) {
period = 1280;
periodic_srs->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl1280;
periodic_srs->periodicityAndOffset_p.choice.sl1280 = offset;
}
else {
period = 2560;
periodic_srs->periodicityAndOffset_p.present = NR_SRS_PeriodicityAndOffset_PR_sl2560;
periodic_srs->periodicityAndOffset_p.choice.sl2560 = offset;
}
if (beam_info->beam_mode != NO_BEAM_MODE) {
get_ul_slot_period_beam(fs, uid, false, beam_idx, period, true);
LOG_I(NR_MAC, "configure_periodic_srs 10 uid %d beam_idx %d period %d\n",
uid, beam_idx, period);
}
return periodic_srs;
}
@@ -795,7 +849,8 @@ static NR_SRS_Resource_t *get_srs_resource(const NR_ServingCellConfigCommon_t *s
const int res_id,
const long maxMIMO_Layers,
const NR_SRS_Resource__transmissionComb_PR tx_comb,
int do_srs)
int do_srs,
int beam_idx)
{
NR_SRS_Resource_t *srs_res = calloc_or_fail(1, sizeof(*srs_res));
srs_res->srs_ResourceId = res_id;
@@ -866,7 +921,7 @@ static NR_SRS_Resource_t *get_srs_resource(const NR_ServingCellConfigCommon_t *s
srs_res->groupOrSequenceHopping = NR_SRS_Resource__groupOrSequenceHopping_neither;
if (do_srs) {
srs_res->resourceType.present = NR_SRS_Resource__resourceType_PR_periodic;
srs_res->resourceType.choice.periodic = configure_periodic_srs(scc, uid);
srs_res->resourceType.choice.periodic = configure_periodic_srs(scc, uid, beam_idx);
} else {
srs_res->resourceType.present = NR_SRS_Resource__resourceType_PR_aperiodic;
srs_res->resourceType.choice.aperiodic = calloc_or_fail(1, sizeof(*srs_res->resourceType.choice.aperiodic));
@@ -887,7 +942,8 @@ static NR_SetupRelease_SRS_Config_t *get_config_srs(const NR_ServingCellConfigCo
const int res_id,
const long maxMIMO_Layers,
const int minRXTXTIME,
int do_srs)
int do_srs,
int beam_idx)
{
NR_SetupRelease_SRS_Config_t *setup_release_srs_Config = calloc_or_fail(1, sizeof(*setup_release_srs_Config));
setup_release_srs_Config->present = NR_SetupRelease_SRS_Config_PR_setup;
@@ -896,7 +952,7 @@ static NR_SetupRelease_SRS_Config_t *get_config_srs(const NR_ServingCellConfigCo
srs_Config->srs_ResourceToAddModList = calloc_or_fail(1, sizeof(*srs_Config->srs_ResourceToAddModList));
NR_SRS_Resource_t *srs_res0 =
get_srs_resource(scc, uecap, curr_bwp, uid, res_id, maxMIMO_Layers, NR_SRS_Resource__transmissionComb_PR_n2, do_srs);
get_srs_resource(scc, uecap, curr_bwp, uid, res_id, maxMIMO_Layers, NR_SRS_Resource__transmissionComb_PR_n2, do_srs, beam_idx);
asn1cSeqAdd(&srs_Config->srs_ResourceToAddModList->list, srs_res0);
srs_Config->srs_ResourceSetToAddModList = calloc_or_fail(1, sizeof(*srs_Config->srs_ResourceSetToAddModList));
@@ -1024,17 +1080,17 @@ void prepare_sim_uecap(NR_UE_NR_Capability_t *cap,
}
}
void nr_rrc_config_dl_tda(struct NR_PDSCH_TimeDomainResourceAllocationList *pdsch_TimeDomainAllocationList,
void nr_rrc_config_dl_tda(NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList,
frame_type_t frame_type,
NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon,
int curr_bwp)
bool small_bwp)
{
// coreset duration setting to be improved in the framework of RRC harmonization, potentially using a common function
int len_coreset = 1;
if (curr_bwp < 48)
if (small_bwp)
len_coreset = 2;
// setting default TDA for DL with TDA index 0
struct NR_PDSCH_TimeDomainResourceAllocation *timedomainresourceallocation = CALLOC(1,sizeof(NR_PDSCH_TimeDomainResourceAllocation_t));
NR_PDSCH_TimeDomainResourceAllocation_t *timedomainresourceallocation = CALLOC(1, sizeof(NR_PDSCH_TimeDomainResourceAllocation_t));
// k0: Slot offset between DCI and its scheduled PDSCH (see TS 38.214 clause 5.1.2.1) When the field is absent the UE applies the value 0.
//timedomainresourceallocation->k0 = calloc(1,sizeof(*timedomainresourceallocation->k0));
//*timedomainresourceallocation->k0 = 0;
@@ -1387,7 +1443,80 @@ static void set_SR_periodandoffset(NR_SchedulingRequestResourceConfig_t *schedul
}
}
static void scheduling_request_config(const NR_ServingCellConfigCommon_t *scc, NR_PUCCH_Config_t *pucch_Config, int scs)
static void set_SR_periodandoffset_beam(NR_SchedulingRequestResourceConfig_t *schedulingRequestResourceConfig, const NR_ServingCellConfigCommon_t *scc, int scs, int beam_idx, int uid)
{
const frame_structure_t *fs = &RC.nrmac[0]->frame_structure;
NR_beam_info_t *beam_info = &RC.nrmac[0]->beam_info;
int num_beam = (RC.nrmac[0]->radio_config.nb_bfw[1] > 0) ? RC.nrmac[0]->radio_config.nb_bfw[1] : 1;
int beams_per_period = (beam_info->beams_per_period > 0) ? beam_info->beams_per_period : 1;
int NUM_SSB_period = (num_beam % beams_per_period > 0) ? num_beam / beams_per_period + 1 : num_beam / beams_per_period;
int sr_slot = 1; // in FDD SR in slot 1
const int ideal_period = set_ideal_period_beam(false, NUM_SSB_period);
sr_slot = get_first_ul_slot_beam(fs, beam_idx, beams_per_period, num_beam, uid);
schedulingRequestResourceConfig->periodicityAndOffset = calloc(1,sizeof(*schedulingRequestResourceConfig->periodicityAndOffset));
LOG_I(NR_MAC, "set_SR_periodandoffset_beam beam_idx %d num_beam %d ideal_period %d sr_slot %d\n",
beam_idx, num_beam, ideal_period, sr_slot);
int period;
if (check_periodicity(5, ideal_period, fs)) {
period = 5;
schedulingRequestResourceConfig->periodicityAndOffset->present = NR_SchedulingRequestResourceConfig__periodicityAndOffset_PR_sl5;
schedulingRequestResourceConfig->periodicityAndOffset->choice.sl5 = sr_slot;
}
else if(check_periodicity(8, ideal_period, fs)) {
period = 8;
schedulingRequestResourceConfig->periodicityAndOffset->present = NR_SchedulingRequestResourceConfig__periodicityAndOffset_PR_sl8;
schedulingRequestResourceConfig->periodicityAndOffset->choice.sl8 = sr_slot;
}
else if(check_periodicity(10, ideal_period, fs)) {
period = 10;
schedulingRequestResourceConfig->periodicityAndOffset->present = NR_SchedulingRequestResourceConfig__periodicityAndOffset_PR_sl10;
schedulingRequestResourceConfig->periodicityAndOffset->choice.sl10 = sr_slot; return;
}
else if(check_periodicity(16, ideal_period, fs)) {
period = 16;
schedulingRequestResourceConfig->periodicityAndOffset->present = NR_SchedulingRequestResourceConfig__periodicityAndOffset_PR_sl16;
schedulingRequestResourceConfig->periodicityAndOffset->choice.sl16 = sr_slot;
}
else if(check_periodicity(20, ideal_period, fs)) {
period = 20;
schedulingRequestResourceConfig->periodicityAndOffset->present = NR_SchedulingRequestResourceConfig__periodicityAndOffset_PR_sl20;
schedulingRequestResourceConfig->periodicityAndOffset->choice.sl20 = sr_slot;
}
else if (check_periodicity(40, ideal_period, fs)) {
period = 40;
schedulingRequestResourceConfig->periodicityAndOffset->present = NR_SchedulingRequestResourceConfig__periodicityAndOffset_PR_sl40;
schedulingRequestResourceConfig->periodicityAndOffset->choice.sl40 = sr_slot;
}
else if (check_periodicity(80, ideal_period, fs)) {
period = 80;
schedulingRequestResourceConfig->periodicityAndOffset->present = NR_SchedulingRequestResourceConfig__periodicityAndOffset_PR_sl80;
schedulingRequestResourceConfig->periodicityAndOffset->choice.sl80 = sr_slot;
}
else if ((check_periodicity(160, ideal_period, fs))) {
period = 160;
schedulingRequestResourceConfig->periodicityAndOffset->present = NR_SchedulingRequestResourceConfig__periodicityAndOffset_PR_sl160;
schedulingRequestResourceConfig->periodicityAndOffset->choice.sl160 = sr_slot;
}
else if ((check_periodicity(320, ideal_period, fs))) {
period = 320;
schedulingRequestResourceConfig->periodicityAndOffset->present = NR_SchedulingRequestResourceConfig__periodicityAndOffset_PR_sl320;
schedulingRequestResourceConfig->periodicityAndOffset->choice.sl320 = sr_slot;
}
else {
period = 640;
schedulingRequestResourceConfig->periodicityAndOffset->present = NR_SchedulingRequestResourceConfig__periodicityAndOffset_PR_sl640;
schedulingRequestResourceConfig->periodicityAndOffset->choice.sl640 = sr_slot;
}
LOG_I(NR_MAC, "set_SR_periodandoffset_beam 10 uid %d beam_idx %d period %d\n",
uid, beam_idx, period);
get_first_ul_slot_period_beam(fs, beam_idx, period, uid);
}
static void scheduling_request_config(const NR_ServingCellConfigCommon_t *scc, NR_PUCCH_Config_t *pucch_Config, int scs, int beam_idx, int uid)
{
// format with <=2 bits in pucch resource set 0
NR_PUCCH_ResourceSet_t *pucchresset = pucch_Config->resourceSetToAddModList->list.array[0];
@@ -1399,7 +1528,11 @@ static void scheduling_request_config(const NR_ServingCellConfigCommon_t *scc, N
schedulingRequestResourceConfig->schedulingRequestResourceId = 1;
schedulingRequestResourceConfig->schedulingRequestID = 0;
set_SR_periodandoffset(schedulingRequestResourceConfig, scc, scs);
NR_beam_info_t *beam_info = &RC.nrmac[0]->beam_info;
if (beam_info->beam_mode == NO_BEAM_MODE)
set_SR_periodandoffset(schedulingRequestResourceConfig, scc, scs);
else
set_SR_periodandoffset_beam(schedulingRequestResourceConfig, scc, scs, beam_idx, uid);
schedulingRequestResourceConfig->resource = calloc(1,sizeof(*schedulingRequestResourceConfig->resource));
*schedulingRequestResourceConfig->resource = *pucchressetid;
@@ -1831,7 +1964,7 @@ static NR_BWP_Downlink_t *config_downlinkBWP(const NR_ServingCellConfigCommon_t
nr_rrc_config_dl_tda(bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList,
get_frame_type((int)*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing),
scc->tdd_UL_DL_ConfigurationCommon,
bwp_size);
bwp_size < 48);
if (!bwp->bwp_Dedicated) {
bwp->bwp_Dedicated=calloc(1,sizeof(*bwp->bwp_Dedicated));
@@ -1873,7 +2006,8 @@ static NR_BWP_Uplink_t *config_uplinkBWP(bool is_SA,
int maxMIMO_Layers,
const nr_mac_config_t *configuration,
const NR_ServingCellConfigCommon_t *scc,
const NR_UE_NR_Capability_t *uecap)
const NR_UE_NR_Capability_t *uecap,
int beam_idx)
{
NR_BWP_Uplink_t *ubwp = calloc_or_fail(1, sizeof(*ubwp));
ubwp->bwp_Id = 1;
@@ -1916,7 +2050,7 @@ static NR_BWP_Uplink_t *config_uplinkBWP(bool is_SA,
config_pucch_resset0(scc, pucch_Config, uid, curr_bwp, uecap, &configuration->pdsch_AntennaPorts);
config_pucch_resset1(scc, pucch_Config, uid, curr_bwp, uecap, &configuration->pdsch_AntennaPorts);
set_pucch_power_config(pucch_Config, configuration->do_CSIRS);
scheduling_request_config(scc, pucch_Config, ubwp->bwp_Common->genericParameters.subcarrierSpacing);
scheduling_request_config(scc, pucch_Config, ubwp->bwp_Common->genericParameters.subcarrierSpacing, beam_idx, uid);
set_dl_DataToUL_ACK(pucch_Config, configuration->minRXTXTIME, ubwp->bwp_Common->genericParameters.subcarrierSpacing);
ubwp->bwp_Dedicated->pusch_Config = config_pusch(configuration, scc, uecap);
@@ -1928,7 +2062,8 @@ static NR_BWP_Uplink_t *config_uplinkBWP(bool is_SA,
ubwp->bwp_Id,
maxMIMO_Layers,
configuration->minRXTXTIME,
configuration->do_SRS);
configuration->do_SRS,
beam_idx);
ubwp->bwp_Dedicated->configuredGrantConfig = NULL;
ubwp->bwp_Dedicated->beamFailureRecoveryConfig = NULL;
@@ -1950,47 +2085,87 @@ static void set_csi_meas_periodicity(const NR_ServingCellConfigCommon_t *scc,
int uid,
int curr_bwp,
const nr_pdsch_AntennaPorts_t *antennaports,
bool is_rsrp)
bool is_rsrp,
int beam_idx)
{
const int ideal_period = set_ideal_period(true);
int ideal_period;
const int num_pucch2 = get_nb_pucch2_per_slot(scc, curr_bwp, antennaports);
const int idx = (uid * 2 / num_pucch2) + is_rsrp;
int idx;
frame_structure_t *fs = &RC.nrmac[0]->frame_structure;
int offset = get_ul_slot_offset(fs, idx, true);
LOG_D(NR_MAC, "set_csi_meas_periodicity: uid = %d, offset = %d, ideal_period = %d", uid, offset, ideal_period);
NR_beam_info_t *beam_info = &RC.nrmac[0]->beam_info;
int offset;
if (beam_info->beam_mode != NO_BEAM_MODE) {
// For NO_BEAM_MODE
// C - CSI meas
// R - RSRP
// UL slot
// 0123456789
// uid0 CR
// uid1 -CR
// uid2 --CR
// With beamforming, uid0, uid1 and uid could be of different beams. CSI meas and Report of different uid could not be shared
idx = uid * 2 + is_rsrp;
int num_beam = (RC.nrmac[0]->radio_config.nb_bfw[1] > 0) ? RC.nrmac[0]->radio_config.nb_bfw[1]: 1;
int beams_per_period = (beam_info->beams_per_period > 0) ? beam_info->beams_per_period: 1;
int NUM_SSB_period = (num_beam % beams_per_period > 0) ? num_beam / beams_per_period + 1 : num_beam / beams_per_period;
ideal_period = set_ideal_period_beam(true, NUM_SSB_period);
LOG_I(NR_MAC, "set_csi_meas_periodicity 0 idx %d is_csi %d beam_idx %d num_beam %d ideal_period %d\n", idx, true, beam_idx, num_beam, ideal_period);
offset = get_ul_slot_offset_beam(fs, idx, true, beam_idx, beams_per_period, num_beam, true);
} else {
ideal_period = set_ideal_period(true);
idx = (uid * 2 / num_pucch2) + is_rsrp;
offset = get_ul_slot_offset(fs, idx, true);
}
LOG_I(NR_MAC, "set_csi_meas_periodicity: uid = %d, offset = %d, ideal_period = %d\n", uid, offset, ideal_period);
// checked for validity in verify_radio_configuration
AssertFatal(offset < 320, "Not enough UL slots to accomodate all possible UEs. Need to rework the implementation\n");
int period;
if (check_periodicity(4, ideal_period, fs)) {
period = 4;
csirep->reportConfigType.choice.periodic->reportSlotConfig.present = NR_CSI_ReportPeriodicityAndOffset_PR_slots4;
csirep->reportConfigType.choice.periodic->reportSlotConfig.choice.slots4 = offset;
} else if (check_periodicity(5, ideal_period, fs)) {
period = 5;
csirep->reportConfigType.choice.periodic->reportSlotConfig.present = NR_CSI_ReportPeriodicityAndOffset_PR_slots5;
csirep->reportConfigType.choice.periodic->reportSlotConfig.choice.slots5 = offset;
} else if (check_periodicity(8, ideal_period, fs)) {
period = 8;
csirep->reportConfigType.choice.periodic->reportSlotConfig.present = NR_CSI_ReportPeriodicityAndOffset_PR_slots8;
csirep->reportConfigType.choice.periodic->reportSlotConfig.choice.slots8 = offset;
} else if (check_periodicity(10, ideal_period, fs)) {
period = 10;
csirep->reportConfigType.choice.periodic->reportSlotConfig.present = NR_CSI_ReportPeriodicityAndOffset_PR_slots10;
csirep->reportConfigType.choice.periodic->reportSlotConfig.choice.slots10 = offset;
} else if (check_periodicity(16, ideal_period, fs)) {
period = 16;
csirep->reportConfigType.choice.periodic->reportSlotConfig.present = NR_CSI_ReportPeriodicityAndOffset_PR_slots16;
csirep->reportConfigType.choice.periodic->reportSlotConfig.choice.slots16 = offset;
} else if (check_periodicity(20, ideal_period, fs)) {
period = 20;
csirep->reportConfigType.choice.periodic->reportSlotConfig.present = NR_CSI_ReportPeriodicityAndOffset_PR_slots20;
csirep->reportConfigType.choice.periodic->reportSlotConfig.choice.slots20 = offset;
} else if (check_periodicity(40, ideal_period, fs)) {
period = 40;
csirep->reportConfigType.choice.periodic->reportSlotConfig.present = NR_CSI_ReportPeriodicityAndOffset_PR_slots40;
csirep->reportConfigType.choice.periodic->reportSlotConfig.choice.slots40 = offset;
} else if (check_periodicity(80, ideal_period, fs)) {
period = 80;
csirep->reportConfigType.choice.periodic->reportSlotConfig.present = NR_CSI_ReportPeriodicityAndOffset_PR_slots80;
csirep->reportConfigType.choice.periodic->reportSlotConfig.choice.slots80 = offset;
} else if (check_periodicity(160, ideal_period, fs)) {
period = 160;
csirep->reportConfigType.choice.periodic->reportSlotConfig.present = NR_CSI_ReportPeriodicityAndOffset_PR_slots160;
csirep->reportConfigType.choice.periodic->reportSlotConfig.choice.slots160 = offset;
} else {
period = 320;
csirep->reportConfigType.choice.periodic->reportSlotConfig.present = NR_CSI_ReportPeriodicityAndOffset_PR_slots320;
csirep->reportConfigType.choice.periodic->reportSlotConfig.choice.slots320 = offset;
}
if (beam_info->beam_mode != NO_BEAM_MODE) {
LOG_I(NR_MAC, "set_csi_meas_periodicity 10 idx %d beam_idx %d period %d\n", idx, beam_idx, period);
get_ul_slot_period_beam(fs, idx, true, beam_idx, period, true);
}
}
static void config_csi_codebook(const nr_pdsch_AntennaPorts_t *antennaports,
@@ -2107,7 +2282,8 @@ static void config_csi_meas_report(NR_CSI_MeasConfig_t *csi_MeasConfig,
const int max_layers,
int rep_id,
int uid,
int curr_bwp)
int curr_bwp,
int beam_idx)
{
int resource_id = -1;
int im_id = -1;
@@ -2136,7 +2312,7 @@ static void config_csi_meas_report(NR_CSI_MeasConfig_t *csi_MeasConfig,
csirep->nzp_CSI_RS_ResourcesForInterference = NULL;
csirep->reportConfigType.present = NR_CSI_ReportConfig__reportConfigType_PR_periodic;
csirep->reportConfigType.choice.periodic = calloc(1, sizeof(*csirep->reportConfigType.choice.periodic));
set_csi_meas_periodicity(servingcellconfigcommon, csirep, uid, curr_bwp, antennaports, false);
set_csi_meas_periodicity(servingcellconfigcommon, csirep, uid, curr_bwp, antennaports, false, beam_idx);
asn1cSeqAdd(&csirep->reportConfigType.choice.periodic->pucch_CSI_ResourceList.list, pucchcsires);
csirep->reportQuantity.present = NR_CSI_ReportConfig__reportQuantity_PR_cri_RI_PMI_CQI;
csirep->reportQuantity.choice.cri_RI_PMI_CQI = (NULL_t)0;
@@ -2203,7 +2379,8 @@ static void config_rsrp_meas_report(NR_CSI_MeasConfig_t *csi_MeasConfig,
int rep_id,
int uid,
int curr_bwp,
uint64_t ssb_bitmap)
uint64_t ssb_bitmap,
int beam_idx)
{
int resource_id = -1;
const nr_pdsch_AntennaPorts_t *pdschap = &configuration->pdsch_AntennaPorts;
@@ -2231,7 +2408,7 @@ static void config_rsrp_meas_report(NR_CSI_MeasConfig_t *csi_MeasConfig,
csirep->nzp_CSI_RS_ResourcesForInterference = NULL;
csirep->reportConfigType.present = NR_CSI_ReportConfig__reportConfigType_PR_periodic;
csirep->reportConfigType.choice.periodic = calloc(1, sizeof(*csirep->reportConfigType.choice.periodic));
set_csi_meas_periodicity(servingcellconfigcommon, csirep, uid, curr_bwp, pdschap, true);
set_csi_meas_periodicity(servingcellconfigcommon, csirep, uid, curr_bwp, pdschap, true, beam_idx);
asn1cSeqAdd(&csirep->reportConfigType.choice.periodic->pucch_CSI_ResourceList.list, pucchcsires);
if (configuration->report_type == SSB_SINR) {
csirep->reportQuantity.present = NR_CSI_ReportConfig__reportQuantity_PR_none;
@@ -2749,7 +2926,7 @@ static BIT_STRING_t bit_string_clone(const BIT_STRING_t *orig)
return bs;
}
void configure_coreset_for_mux23(const NR_ServingCellConfigCommon_t *scc,
bool configure_coreset_for_mux23(const NR_ServingCellConfigCommon_t *scc,
int offset,
int limit,
int bwp_start,
@@ -2757,11 +2934,12 @@ void configure_coreset_for_mux23(const NR_ServingCellConfigCommon_t *scc,
bool do_TCI)
{
NR_ControlResourceSet_t *coreset = get_coreset_config(5, offset, limit, bwp_start, bwp_size, get_ssb_bitmap(scc), do_TCI);
NR_PDCCH_ConfigCommon_t *pdcch_common = scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup;
NR_DownlinkConfigCommon_t *dlcc = scc->downlinkConfigCommon;
NR_PDCCH_ConfigCommon_t *pdcch_common = dlcc->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup;
pdcch_common->commonControlResourceSet = coreset;
for (int i = 0; i < pdcch_common->commonSearchSpaceList->list.count; i++) {
for (int i = 0; i < pdcch_common->commonSearchSpaceList->list.count; i++)
*pdcch_common->commonSearchSpaceList->list.array[i]->controlResourceSetId = coreset->controlResourceSetId;
}
return coreset->duration > 1;
}
NR_BCCH_DL_SCH_Message_t *get_SIB1_NR(const NR_ServingCellConfigCommon_t *scc,
@@ -3347,7 +3525,8 @@ static NR_BWP_UplinkDedicated_t *configure_initial_ul_bwp(const NR_ServingCellCo
const nr_mac_config_t *configuration,
int maxMIMO_Layers,
const NR_UE_NR_Capability_t *uecap,
int id)
int id,
int beam_idx)
{
NR_BWP_UplinkDedicated_t *initialUplinkBWP = calloc(1, sizeof(*initialUplinkBWP));
NR_BWP_t *genericParameters = &scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters;
@@ -3367,9 +3546,9 @@ static NR_BWP_UplinkDedicated_t *configure_initial_ul_bwp(const NR_ServingCellCo
initialUplinkBWP->pusch_Config = config_pusch(configuration, scc, uecap);
// We are using do_srs = 0 here because the periodic SRS will only be enabled in update_cellGroupConfig() if do_srs == 1
initialUplinkBWP->srs_Config = get_config_srs(scc, uecap, curr_bwp, id, 0, maxMIMO_Layers, configuration->minRXTXTIME, 0);
initialUplinkBWP->srs_Config = get_config_srs(scc, uecap, curr_bwp, id, 0, maxMIMO_Layers, configuration->minRXTXTIME, 0, beam_idx);
scheduling_request_config(scc, pucch_Config, scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing);
scheduling_request_config(scc, pucch_Config, scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing, beam_idx, id);
set_dl_DataToUL_ACK(pucch_Config, configuration->minRXTXTIME, genericParameters->subcarrierSpacing);
return initialUplinkBWP;
}
@@ -3425,7 +3604,8 @@ static NR_CSI_MeasConfig_t *get_csiMeasConfig(const NR_ServingCellConfig_t *conf
int uid,
int bwp_id,
uint64_t bitmap,
int ssb_index)
int ssb_index,
int beam_idx)
{
NR_CSI_MeasConfig_t *csi_MeasConfig = calloc(1, sizeof(*csi_MeasConfig));
csi_MeasConfig->csi_SSB_ResourceSetToAddModList = calloc(1, sizeof(*csi_MeasConfig->csi_SSB_ResourceSetToAddModList));
@@ -3465,8 +3645,9 @@ static NR_CSI_MeasConfig_t *get_csiMeasConfig(const NR_ServingCellConfig_t *conf
const int pdsch_AntennaPorts =
configuration->pdsch_AntennaPorts.N1 * configuration->pdsch_AntennaPorts.N2 * configuration->pdsch_AntennaPorts.XP;
config_csirs(scc, csi_MeasConfig, pdsch_AntennaPorts, curr_bwp, configuration->do_CSIRS, ssb_index / 2);
config_csiim(configuration->do_CSIRS, pdsch_AntennaPorts, curr_bwp, csi_MeasConfig, ssb_index / 2);
config_csirs(scc, csi_MeasConfig, pdsch_AntennaPorts, curr_bwp, configuration->do_CSIRS, ssb_index);
config_csiim(configuration->do_CSIRS, pdsch_AntennaPorts, curr_bwp, csi_MeasConfig, ssb_index);
NR_CSI_ResourceConfig_t *csires1 = calloc(1, sizeof(*csires1));
csires1->csi_ResourceConfigId = bwp_id + 20;
@@ -3492,7 +3673,7 @@ static NR_CSI_MeasConfig_t *get_csiMeasConfig(const NR_ServingCellConfig_t *conf
csires0->csi_RS_ResourceSetList.choice.nzp_CSI_RS_SSB->nzp_CSI_RS_ResourceSetList =
calloc(1, sizeof(*csires0->csi_RS_ResourceSetList.choice.nzp_CSI_RS_SSB->nzp_CSI_RS_ResourceSetList));
NR_NZP_CSI_RS_ResourceSetId_t *nzp0 = calloc(1, sizeof(*nzp0));
*nzp0 = ssb_index / 2;
*nzp0 = ssb_index / 2; //max value is 32
asn1cSeqAdd(&csires0->csi_RS_ResourceSetList.choice.nzp_CSI_RS_SSB->nzp_CSI_RS_ResourceSetList->list, nzp0);
csires0->bwp_Id = bwp_id;
csires0->resourceType = NR_CSI_ResourceConfig__resourceType_periodic;
@@ -3506,7 +3687,7 @@ static NR_CSI_MeasConfig_t *get_csiMeasConfig(const NR_ServingCellConfig_t *conf
csires2->csi_RS_ResourceSetList.choice.csi_IM_ResourceSetList =
calloc(1, sizeof(*csires2->csi_RS_ResourceSetList.choice.csi_IM_ResourceSetList));
NR_CSI_IM_ResourceSetId_t *csiim00 = calloc(1, sizeof(*csiim00));
*csiim00 = ssb_index / 2;
*csiim00 = ssb_index / 2; //max value is 32
asn1cSeqAdd(&csires2->csi_RS_ResourceSetList.choice.csi_IM_ResourceSetList->list, csiim00);
csires2->bwp_Id = bwp_id;
csires2->resourceType = NR_CSI_ResourceConfig__resourceType_periodic;
@@ -3523,7 +3704,8 @@ static NR_CSI_MeasConfig_t *get_csiMeasConfig(const NR_ServingCellConfig_t *conf
*configDedicated->pdsch_ServingCellConfig->choice.setup->ext1->maxMIMO_Layers,
bwp_id,
uid,
curr_bwp);
curr_bwp,
beam_idx);
}
NR_PUCCH_CSI_Resource_t *pucchrsrp = calloc(1, sizeof(*pucchrsrp));
pucchrsrp->uplinkBandwidthPartId = bwp_id;
@@ -3536,14 +3718,16 @@ static NR_CSI_MeasConfig_t *get_csiMeasConfig(const NR_ServingCellConfig_t *conf
bwp_id + 10,
uid,
curr_bwp,
bitmap);
bitmap,
beam_idx);
return csi_MeasConfig;
}
static NR_SpCellConfig_t *get_initial_SpCellConfig(int uid,
const NR_ServingCellConfigCommon_t *scc,
const nr_mac_config_t *configuration,
int ssb_index)
int ssb_index,
int beam_idx)
{
const int pdsch_AntennaPorts =
configuration->pdsch_AntennaPorts.N1 * configuration->pdsch_AntennaPorts.N2 * configuration->pdsch_AntennaPorts.XP;
@@ -3583,7 +3767,7 @@ static NR_SpCellConfig_t *get_initial_SpCellConfig(int uid,
asn1cCallocOne(configDedicated->firstActiveDownlinkBWP_Id, first_active_bwp);
asn1cCallocOne(uplinkConfig->firstActiveUplinkBWP_Id, first_active_bwp);
if (first_active_bwp == 0) {
uplinkConfig->initialUplinkBWP = configure_initial_ul_bwp(scc, configuration, maxMIMO_Layers, NULL, uid);
uplinkConfig->initialUplinkBWP = configure_initial_ul_bwp(scc, configuration, maxMIMO_Layers, NULL, uid, beam_idx);
configDedicated->initialDownlinkBWP = configure_initial_dl_bwp(scc, pdsch_AntennaPorts, bitmap, NULL, configuration);
} else {
configDedicated->downlinkBWP_ToAddModList = calloc(1, sizeof(*configDedicated->downlinkBWP_ToAddModList));
@@ -3595,7 +3779,7 @@ static NR_SpCellConfig_t *get_initial_SpCellConfig(int uid,
configuration);
asn1cSeqAdd(&configDedicated->downlinkBWP_ToAddModList->list, bwp);
uplinkConfig->uplinkBWP_ToAddModList = calloc(1, sizeof(*uplinkConfig->uplinkBWP_ToAddModList));
NR_BWP_Uplink_t *ubwp = config_uplinkBWP(true, uid, maxMIMO_Layers, configuration, scc, NULL);
NR_BWP_Uplink_t *ubwp = config_uplinkBWP(true, uid, maxMIMO_Layers, configuration, scc, NULL, beam_idx);
asn1cSeqAdd(&uplinkConfig->uplinkBWP_ToAddModList->list, ubwp);
}
@@ -3608,7 +3792,8 @@ static NR_SpCellConfig_t *get_initial_SpCellConfig(int uid,
uid,
first_active_bwp,
bitmap,
ssb_index);
ssb_index,
beam_idx);
fill_harq_IEs(configDedicated, configuration->num_dlharq, configuration->num_ulharq, first_active_bwp);
SpCellConfig->spCellConfigDedicated = configDedicated;
@@ -3741,10 +3926,21 @@ NR_RLC_BearerConfig_t *get_DRB_RLC_BearerConfig(long lcChannelId,
return rlc_BearerConfig;
}
static bool verify_radio_configuration(int uid, const NR_ServingCellConfigCommon_t *scc, const nr_mac_config_t *configuration)
static bool verify_radio_configuration(int uid, const NR_ServingCellConfigCommon_t *scc, const nr_mac_config_t *configuration, int beam_idx)
{
frame_structure_t *fs = &RC.nrmac[0]->frame_structure;
int srs_offset = get_ul_slot_offset(fs, uid, false);
NR_beam_info_t *beam_info = &RC.nrmac[0]->beam_info;
int srs_offset;
if (beam_info->beam_mode != NO_BEAM_MODE) {
int num_beam = (RC.nrmac[0]->radio_config.nb_bfw[1] > 0) ? RC.nrmac[0]->radio_config.nb_bfw[1] : 1;
int beams_per_period = (beam_info->beams_per_period > 0) ? beam_info->beams_per_period : 1;
srs_offset = get_ul_slot_offset_beam(fs, uid, false, beam_idx, beams_per_period, num_beam, false);
LOG_I(NR_MAC, "verify_radio_configuration 0 idx %d count_mixed %d beam_idx %d num_beam %d srs_offset %d\n",
uid, false, beam_idx, num_beam, srs_offset);
} else {
srs_offset = get_ul_slot_offset(fs, uid, false);
}
// see configure_periodic_srs
if (srs_offset >= 2560) {
LOG_E(NR_RRC, "UID %d, cannot allocate resources for SRS, rejecting UE\n", uid);
@@ -3774,8 +3970,29 @@ static bool verify_radio_configuration(int uid, const NR_ServingCellConfigCommon
LOG_E(NR_RRC, "UID %d, cannot allocate resources for PUCCH2, rejecting UE\n", uid);
return false; // cannot allocate resources for PUCCH2
}
const int idx = (uid * 2 / num_pucch2) + 1;
int offset = get_ul_slot_offset(fs, idx, true);
int offset;
if (beam_info->beam_mode != NO_BEAM_MODE) {
int num_beam = (RC.nrmac[0]->radio_config.nb_bfw[1] > 0) ? RC.nrmac[0]->radio_config.nb_bfw[1] : 1;
int beams_per_period = (beam_info->beams_per_period > 0) ? beam_info->beams_per_period : 1;
// For NO_BEAM_MODE
// C - CSI meas
// R - RSRP
// UL slot
// 0123456789
// uid0 CR
// uid1 -CR
// uid2 --CR
// With beamforming, uid0, uid1 and uid could be of different beams. CSI meas and Report of different uid could not be shared
const int idx = (uid * 2) + 1;
offset = get_ul_slot_offset_beam(fs, idx, true, beam_idx, beams_per_period, num_beam, false);
LOG_I(NR_MAC, "verify_radio_configuration 1 idx %d count_mixed %d beam_idx %d num_beam %d offset %d\n",
idx, true, beam_idx, num_beam, offset);
} else {
const int idx = (uid * 2 / num_pucch2) + 1;
offset = get_ul_slot_offset(fs, idx, true);;
}
// see set_csi_meas_periodicity
if (offset >= 320) {
LOG_E(NR_RRC, "UID %d, cannot allocate resources for CSI reporting, rejecting UE\n", uid);
@@ -3789,12 +4006,13 @@ NR_CellGroupConfig_t *get_initial_cellGroupConfig(int uid,
const NR_ServingCellConfigCommon_t *scc,
const nr_mac_config_t *configuration,
const nr_rlc_configuration_t *default_rlc_config,
int ssb_index)
int ssb_index,
int beam_idx)
{
if (!verify_radio_configuration(uid, scc, configuration))
if (!verify_radio_configuration(uid, scc, configuration, beam_idx))
return NULL;
NR_SpCellConfig_t *spCellConfig = get_initial_SpCellConfig(uid, scc, configuration, ssb_index);
NR_SpCellConfig_t *spCellConfig = get_initial_SpCellConfig(uid, scc, configuration, ssb_index, beam_idx);
NR_CellGroupConfig_t *cellGroupConfig = calloc(1, sizeof(*cellGroupConfig));
cellGroupConfig->cellGroupId = 0;
@@ -3826,7 +4044,8 @@ NR_CellGroupConfig_t *update_cellGroupConfig_for_BWP_switch(NR_CellGroupConfig_t
int uid,
int old_bwp,
int new_bwp,
int ssb_index)
int ssb_index,
int beam_idx)
{
NR_SpCellConfig_t *spCellConfig = cellGroupConfig->spCellConfig;
NR_ServingCellConfig_t *configDedicated = spCellConfig->spCellConfigDedicated;
@@ -3845,7 +4064,7 @@ NR_CellGroupConfig_t *update_cellGroupConfig_for_BWP_switch(NR_CellGroupConfig_t
configDedicated->initialDownlinkBWP = calloc_or_fail(1, sizeof(*configDedicated->initialDownlinkBWP));
if (!uplinkConfig->initialUplinkBWP)
uplinkConfig->initialUplinkBWP = calloc_or_fail(1, sizeof(*uplinkConfig->initialUplinkBWP));
uplinkConfig->initialUplinkBWP = configure_initial_ul_bwp(scc, &local_config, ul_maxMIMO_Layers, uecap, uid);
uplinkConfig->initialUplinkBWP = configure_initial_ul_bwp(scc, &local_config, ul_maxMIMO_Layers, uecap, uid, beam_idx);
configDedicated->initialDownlinkBWP = configure_initial_dl_bwp(scc, pdsch_AntennaPorts, bitmap, uecap, &local_config);
} else {
if (!configDedicated->downlinkBWP_ToAddModList)
@@ -3860,7 +4079,7 @@ NR_CellGroupConfig_t *update_cellGroupConfig_for_BWP_switch(NR_CellGroupConfig_t
if (!uplinkConfig->uplinkBWP_ToAddModList)
uplinkConfig->uplinkBWP_ToAddModList = calloc_or_fail(1, sizeof(*uplinkConfig->uplinkBWP_ToAddModList));
NR_BWP_Uplink_t *ul_bwp = config_uplinkBWP(true, uid, ul_maxMIMO_Layers, &local_config, scc, uecap);
NR_BWP_Uplink_t *ul_bwp = config_uplinkBWP(true, uid, ul_maxMIMO_Layers, &local_config, scc, uecap, beam_idx);
asn1cSeqAdd(&uplinkConfig->uplinkBWP_ToAddModList->list, ul_bwp);
}
@@ -3872,7 +4091,8 @@ NR_CellGroupConfig_t *update_cellGroupConfig_for_BWP_switch(NR_CellGroupConfig_t
uid,
*uplinkConfig->firstActiveUplinkBWP_Id,
bitmap,
ssb_index);
ssb_index,
beam_idx);
// we temporarily need to keep both the old and the new BWP in the CG used by the gNB
// while removing the old from the CG sent to the UE
@@ -3890,7 +4110,8 @@ NR_CellGroupConfig_t *update_cellGroupConfig_for_beam_switch(NR_CellGroupConfig_
const NR_ServingCellConfigCommon_t *scc,
int uid,
int bwp,
int ssb_index)
int ssb_index,
int beam_idx)
{
NR_SpCellConfig_t *spCellConfig = cellGroupConfig->spCellConfig;
NR_ServingCellConfig_t *configDedicated = spCellConfig->spCellConfigDedicated;
@@ -3904,7 +4125,8 @@ NR_CellGroupConfig_t *update_cellGroupConfig_for_beam_switch(NR_CellGroupConfig_
uid,
bwp,
bitmap,
ssb_index);
ssb_index,
beam_idx);
NR_CellGroupConfig_t *clone_cg = NULL;
const int copy_result = asn_copy(&asn_DEF_NR_CellGroupConfig, (void **)&clone_cg, cellGroupConfig);
@@ -3916,7 +4138,8 @@ void update_cellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig,
const int uid,
const NR_UE_NR_Capability_t *uecap,
const nr_mac_config_t *configuration,
const NR_ServingCellConfigCommon_t *scc)
const NR_ServingCellConfigCommon_t *scc,
int beam_idx)
{
DevAssert(cellGroupConfig != NULL);
DevAssert(cellGroupConfig->spCellConfig != NULL);
@@ -3998,7 +4221,8 @@ void update_cellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig,
bwp_id,
maxMIMO_Layers,
configuration->minRXTXTIME,
configuration->do_SRS);
configuration->do_SRS,
beam_idx);
}
set_ul_mcs_table(configuration->force_UL256qam_off ? NULL : uecap, scc, pusch_Config);
}
@@ -4052,7 +4276,8 @@ NR_CellGroupConfig_t *get_default_secondaryCellGroup(const NR_ServingCellConfigC
int servCellIndex,
const nr_mac_config_t *configuration,
int uid,
int ssb_index)
int ssb_index,
int beam_idx)
{
const nr_pdsch_AntennaPorts_t *pdschap = &configuration->pdsch_AntennaPorts;
const int dl_antenna_ports = pdschap->N1 * pdschap->N2 * pdschap->XP;
@@ -4123,7 +4348,8 @@ NR_CellGroupConfig_t *get_default_secondaryCellGroup(const NR_ServingCellConfigC
0,
maxMIMO_Layers,
configuration->minRXTXTIME,
configuration->do_SRS);
configuration->do_SRS,
beam_idx);
// Downlink BWPs
int firstActiveDownlinkBWP_Id = 1;
@@ -4143,7 +4369,7 @@ NR_CellGroupConfig_t *get_default_secondaryCellGroup(const NR_ServingCellConfigC
// Uplink BWPs
int firstActiveUplinkBWP_Id = 1;
ulConfig->uplinkBWP_ToAddModList = calloc(1, sizeof(*ulConfig->uplinkBWP_ToAddModList));
NR_BWP_Uplink_t *ubwp = config_uplinkBWP(false, uid, maxMIMO_Layers, configuration, servingcellconfigcommon, uecap);
NR_BWP_Uplink_t *ubwp = config_uplinkBWP(false, uid, maxMIMO_Layers, configuration, servingcellconfigcommon, uecap, beam_idx);
asn1cSeqAdd(&ulConfig->uplinkBWP_ToAddModList->list, ubwp);
ulConfig->firstActiveUplinkBWP_Id = calloc(1, sizeof(*ulConfig->firstActiveUplinkBWP_Id));
*ulConfig->firstActiveUplinkBWP_Id = firstActiveUplinkBWP_Id;
@@ -4204,7 +4430,8 @@ NR_CellGroupConfig_t *get_default_secondaryCellGroup(const NR_ServingCellConfigC
uid,
firstActiveUplinkBWP_Id,
bitmap,
ssb_index);
ssb_index,
beam_idx);
configDedicated->sCellDeactivationTimer = NULL;
configDedicated->crossCarrierSchedulingConfig = NULL;

View File

@@ -47,10 +47,10 @@ typedef struct nr_mac_timers nr_mac_timers_t;
struct measgap_config;
typedef struct measgap_config measgap_config_t;
void nr_rrc_config_dl_tda(struct NR_PDSCH_TimeDomainResourceAllocationList *pdsch_TimeDomainAllocationList,
void nr_rrc_config_dl_tda(NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList,
frame_type_t frame_type,
NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon,
int curr_bwp);
bool small_bwp);
void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay, int do_SRS);
NR_SearchSpace_t *rrc_searchspace_config(bool is_common,
int searchspaceid,
@@ -68,7 +68,7 @@ NR_BCCH_BCH_Message_t *get_new_MIB_NR(const NR_ServingCellConfigCommon_t *scc);
void free_MIB_NR(NR_BCCH_BCH_Message_t *mib);
int encode_MIB_NR(NR_BCCH_BCH_Message_t *mib, int frame, uint8_t *buf, int buf_size);
int encode_MIB_NR_setup(NR_MIB_t *mib, int frame, uint8_t *buf, int buf_size);
void configure_coreset_for_mux23(const NR_ServingCellConfigCommon_t *scc,
bool configure_coreset_for_mux23(const NR_ServingCellConfigCommon_t *scc,
int offset,
int limit,
int bwp_start,
@@ -96,12 +96,14 @@ NR_CellGroupConfig_t *get_initial_cellGroupConfig(int uid,
const NR_ServingCellConfigCommon_t *scc,
const nr_mac_config_t *configuration,
const nr_rlc_configuration_t *default_rlc_config,
int ssb_index);
int ssb_index,
int beam_idx);
void update_cellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig,
const int uid,
const NR_UE_NR_Capability_t *uecap,
const nr_mac_config_t *configuration,
const NR_ServingCellConfigCommon_t *scc);
const NR_ServingCellConfigCommon_t *scc,
int beam_idx);
int encode_cellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig, uint8_t *buffer, int max_buffer_size);
/* Note: this function returns a new CellGroupConfig for a user with given
@@ -113,7 +115,8 @@ NR_CellGroupConfig_t *get_default_secondaryCellGroup(const NR_ServingCellConfigC
int servCellIndex,
const nr_mac_config_t *configuration,
int uid,
int ssb_index);
int ssb_index,
int beam_idx);
NR_ReconfigurationWithSync_t *get_reconfiguration_with_sync(rnti_t rnti, uid_t uid, const NR_ServingCellConfigCommon_t *scc, int frame);
@@ -136,14 +139,16 @@ NR_CellGroupConfig_t *update_cellGroupConfig_for_BWP_switch(NR_CellGroupConfig_t
int uid,
int old_bwp,
int new_bwp,
int ssb_index);
int ssb_index,
int beam_idx);
NR_CellGroupConfig_t *update_cellGroupConfig_for_beam_switch(NR_CellGroupConfig_t *cellGroupConfig,
const nr_mac_config_t *configuration,
const NR_UE_NR_Capability_t *uecap,
const NR_ServingCellConfigCommon_t *scc,
int uid,
int bwp,
int ssb_index);
int ssb_index,
int beam_idx);
NR_MeasurementTimingConfiguration_t *get_nr_mtc(uint8_t *buf, uint32_t len);
measgap_config_t create_measgap_config(const NR_MeasurementTimingConfiguration_t *mtc, int scs, int min_rxtxtime);
int encode_measgap_config(const measgap_config_t *c, uint8_t *buf);

View File

@@ -16,7 +16,7 @@ add_library(oran_fhlib_5g MODULE
oran-init.c
)
set(F_VERSION 6.1.8)
set(F_VERSION 6.1.4)
find_package(xran REQUIRED)
if(xran_VERSION MATCHES "5.*")

View File

@@ -194,7 +194,7 @@ static int read_prach_data(ru_info_t *ru, int frame, int slot)
/* If it is PRACH slot, copy prach IQ from XRAN PRACH buffer to OAI PRACH buffer */
if (is_prach_slot) {
if (!ru->prach_buf) {
LOG_W(HW, "we get rach data from ru, but it is not scheduled %d.%d\n", frame, slot);
LOG_D(HW, "we get rach data from ru, but it is not scheduled %d.%d\n", frame, slot);
return -1;
}
for (sym_idx = prach_start_sym; sym_idx < prach_end_sym; sym_idx++) {
@@ -543,7 +543,6 @@ int xran_fh_tx_send_slot(ru_info_t *ru, int frame, int slot, uint64_t timestamp)
// Need to use --continuous-tx so that this routine will be triggered in RX slot.
for (uint16_t cc_id = 0; cc_id < 1 /*nSectorNum*/; cc_id++) { // OAI does not support multiple CC yet.
for (uint8_t ant_id = 0; ant_id < ru->nb_rx; ant_id++) {
int first = 1; // The first UL symbol
const struct xran_frame_config *frame_conf = &get_xran_fh_config(ant_id / nb_rx_per_ru)->frame_conf;
// skip processing this slot is TX (no RX in this slot)
if (!is_tdd_ul_guard_slot(frame_conf, slot)) {
@@ -568,17 +567,10 @@ int xran_fh_tx_send_slot(ru_info_t *ru, int frame, int slot, uint64_t timestamp)
startRB = pRbElm->UP_nRBStart;
#endif
LOG_D(HW, "pPrbMap[%d] : PRBstart %d nPRBs %d\n", idxElm, startRB, numRB);
if (first) {
// ant_id / no of antenna per beam gives the beam_nb
pRbElm->nBeamIndex =
ru->beam_id[ant_id / (ru->nb_rx / ru->num_beams_period)][slot * XRAN_NUM_OF_SYMBOL_PER_SLOT + sym_idx];
// In phy-f-1.0/fhi_lib/lib/api/xran_pkt_cp.h, beamId:15 is of 15bit. -1 set extension bit ef:1 to 1 mistakenly.
if (pRbElm->nBeamIndex == -1) {
pRbElm->nBeamIndex = 0;
} else {
first = 0;
}
}
// ant_id / no of antenna per beam gives the beam_nb
int16_t beam_id = ru->beam_id[ant_id / (ru->nb_tx / ru->num_beams_period)][slot * XRAN_NUM_OF_SYMBOL_PER_SLOT + sym_idx];
if (beam_id != -1)
pRbElm->nBeamIndex = beam_id;
}
}
}
@@ -632,17 +624,13 @@ int xran_fh_tx_send_slot(ru_info_t *ru, int frame, int slot, uint64_t timestamp)
int16_t payload_len = 0;
uint8_t *dst = (uint8_t *)u8dptr;
for (uint32_t idxElm = 0; idxElm < pPrbMap->nPrbElm; idxElm++) {
struct xran_section_desc *p_sec_desc = NULL;
struct xran_prb_elm *p_prbMapElm = &pPrbMap->prbMap[idxElm];
if (sym_idx == 0) {
// ant_id / no of antenna per beam gives the beam_nb
p_prbMapElm->nBeamIndex = ru->beam_id[ant_id / (ru->nb_tx / ru->num_beams_period)][slot * XRAN_NUM_OF_SYMBOL_PER_SLOT];
// In phy-f-1.0/fhi_lib/lib/api/xran_pkt_cp.h, beamId:15 is of 15bit. -1 set extension bit ef:1 to 1 mistakenly.
if (p_prbMapElm->nBeamIndex == -1)
p_prbMapElm->nBeamIndex = 0;
}
// ant_id / no of antenna per beam gives the beam_nb
int16_t beam_id = ru->beam_id[ant_id / (ru->nb_tx / ru->num_beams_period)][slot * XRAN_NUM_OF_SYMBOL_PER_SLOT + sym_idx];
if ( beam_id != -1)
p_prbMapElm->nBeamIndex = beam_id;
// radio-transport fragmentation is not supported in xran F release;
// E-bit = 1 => each ethernet frame is considered as the last fragment;

View File

@@ -432,12 +432,10 @@ void print_fh_config(const struct xran_fh_config *fh_config)
#if defined F_RELEASE
printf("\
RunSlotPrbMapBySymbolEnable %d\n\
LiteOnIgnoreUPSectionIdEnable %d\n\
dssEnable %d\n\
dssPeriod %d\n\
technology[XRAN_MAX_DSS_PERIODICITY] (not filled as DSS disabled)\n",
fh_config->RunSlotPrbMapBySymbolEnable,
fh_config->LiteOnIgnoreUPSectionIdEnable,
fh_config->dssEnable,
fh_config->dssPeriod);
#endif
@@ -969,8 +967,8 @@ static bool set_fh_config(void *mplane_api, int ru_idx, int num_rus, enum xran_c
fh_config->srsEnableCp = 0; // enable SRS CP; used only if XRAN_CATEGORY_B
fh_config->SrsDelaySym = 0; // number of SRS delay symbols; used only if XRAN_CATEGORY_B
fh_config->RunSlotPrbMapBySymbolEnable = *gpd(fhp, nfh, ORAN_CONFIG_RunSlotPrbMapBySymbol)->uptr; // enable RunSlotPrbMapBySymbol
fh_config->LiteOnIgnoreUPSectionIdEnable = *gpd(fhp, nfh, ORAN_CONFIG_LiteOnIgnoreUPSectionId)->uptr; // enable LiteOnIgnoreUPSectionId
liteon_prach_eAxC_offset = fh_config->LiteOnIgnoreUPSectionIdEnable;
// fh_config->LiteOnIgnoreUPSectionIdEnable = *gpd(fhp, nfh, ORAN_CONFIG_LiteOnIgnoreUPSectionId)->uptr; // enable LiteOnIgnoreUPSectionId
// liteon_prach_eAxC_offset = fh_config->LiteOnIgnoreUPSectionIdEnable;
#endif
fh_config->puschMaskEnable = 0; // enable PUSCH mask; only used if id = O_RU
fh_config->puschMaskSlot = 0; // specific which slot PUSCH channel masked; only used if id = O_RU

View File

@@ -0,0 +1,327 @@
Active_gNBs = ( "microamp");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
gNBs =
(
{
////////// Identification parameters:
gNB_ID = 0xe00;
cell_type = "CELL_MACRO_GNB";
gNB_name = "microamp";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = 1;
plmn_list = ({
mcc = 208;
mnc = 99;
mnc_length = 2;
snssaiList = (
{
sst = 1;
}
);
});
nr_cellid = 1;
#ssb_SubcarrierOffset = 0;
#n_TimingAdvanceOffset = 0;
////////// Physical parameters:
pdsch_AntennaPorts_XP = 2;
#pdsch_AntennaPorts_N1 = 2;
pusch_AntennaPorts = 2;
maxMIMO_layers = 2;
do_CSIRS = 1; #1
do_SRS = 1;
min_rxtxtime = 3;
sib1_tda = 15;
#ul_prbblacklist = "133,134,135,136"
#force_256qam_off = 1;
servingCellConfigCommon = (
{
#spCellConfigCommon
physCellId = 0;
# downlinkConfigCommon
#frequencyInfoDL
# this is pointA +:16 PRBs@120kHz SCS (same as initial BWP)
absoluteFrequencySSB = 2079739;
dl_frequencyBand = 257;
# this is 27.900 GHz
dl_absoluteFrequencyPointA = 2078403;
#scs-SpecificCarrierList
dl_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_subcarrierSpacing = 3;
dl_carrierBandwidth = 132; #32;
#initialDownlinkBWP
#genericParameters
# this is RBstart=0,L=32 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 36025;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 3;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 2; # 2;
initialDLBWPsearchSpaceZero = 1;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 257;
#scs-SpecificCarrierList
ul_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_subcarrierSpacing = 3;
ul_carrierBandwidth = 132; # 32;
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 36025;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 3;
#rach-ConfigCommon
#rach-ConfigGeneric
prach_ConfigurationIndex = 135;
#prach_msg1_FDM
#0 = one, 1=two, 2=four, 3=eight
prach_msg1_FDM = 0;
prach_msg1_FrequencyStart = 0;
zeroCorrelationZoneConfig = 15; #0;
preambleReceivedTargetPower = -100; #-118;
#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
preambleTransMax = 8; //8
#powerRampingStep
# 0=dB0,1=dB2,2=dB4,3=dB6
powerRampingStep = 2; // 3
#ra_ReponseWindow
#1,2,4,8,10,20,40,80
#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen
ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4;
#oneHalf (0..15) 4,8,12,16,...60,64
ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15 #1; #7;
#ra_ContentionResolutionTimer
#(0..7) 8,16,24,32,40,48,56,64
ra_ContentionResolutionTimer = 7;
rsrp_ThresholdSSB = 19;
#prach-RootSequenceIndex_PR
#1 = 839, 2 = 139
prach_RootSequenceIndex_PR = 2;
prach_RootSequenceIndex = 1; #64;
# SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
#
msg1_SubcarrierSpacing = 3,
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
msg3_DeltaPreamble = 0;
p0_NominalWithGrant = -96; #-80
# pucch-ConfigCommon setup :
# pucchGroupHopping
# 0 = neither, 1= group hopping, 2=sequence hopping
pucchGroupHopping = 0;
hoppingId = 0; #40;
p0_nominal = -96; #-80
# ssb_PositionsInBurs_BitmapPR
# 1=short, 2=medium, 3=long
ssb_PositionsInBurst_PR = 3;
ssb_PositionsInBurst_Bitmap = 1;
#
# ssb_periodicityServingCell
# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
ssb_periodicityServingCell = 4;
# dmrs_TypeA_position
# 0 = pos2, 1 = pos3
dmrs_TypeA_Position = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
subcarrierSpacing = 3;
#tdd-UL-DL-ConfigurationCommon
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
referenceSubcarrierSpacing = 3;
# pattern1
# dl_UL_TransmissionPeriodicity
# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
dl_UL_TransmissionPeriodicity = 1; #3;
nrofDownlinkSlots = 3; #7;
nrofDownlinkSymbols = 10; #6
nrofUplinkSlots = 1; #2;
nrofUplinkSymbols = 2; #4
ssPBCH_BlockPower = 5;
}
);
# ------- SCTP definitions
SCTP :
{
# Number of streams to use in input/output
SCTP_INSTREAMS = 2;
SCTP_OUTSTREAMS = 2;
};
////////// AMF parameters:
amf_ip_address = ( { ipv4 = "172.21.6.5";
}
);
NETWORK_INTERFACES :
{
GNB_IPV4_ADDRESS_FOR_NG_AMF = "172.21.16.51/22";
GNB_IPV4_ADDRESS_FOR_NGU = "172.21.16.51/22";
GNB_PORT_FOR_S1U = 2152; # Spec 2152
};
}
);
MACRLCs = (
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
pusch_TargetSNRx10 = 230; # 250; # 200;
pucch_TargetSNRx10 = 270; #250
#dl_min_mcs = 28;
ulsch_max_frame_inactivity= 1000;
#pusch_FailureThres = 1000;
#dl_bler_target_upper = .35;
#dl_bler_target_lower = .15;
#ul_bler_target_upper = .35;
#ul_bler_target_lower = .15;
min_grant_prb = 1;
#ul_max_mcs = 16;
#dl_max_mcs = 24;
#dl_harq_round_max = 1;
#ul_harq_round_max = 1;
set_analog_beamforming = "lophy";
beam_duration = 1;
beams_per_period = 1;
beam_weights = [0];
}
);
L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
prach_dtx_threshold = 120; #120;
pucch0_dtx_threshold = 50; #190 with auto TPC
pusch_dtx_threshold = -200; #190 with auto TPC
max_ldpc_iterations = 15;
tx_amp_backoff_dB = 6; #12
L1_rx_thread_core = 15;
L1_tx_thread_core = 16;
#L1_phase_comp = 1;
phase_compensation = 0;
}
);
RUs = (
{
local_rf = "no"; #thamizh change
nb_tx = 2; #2; #thamizh change
nb_rx = 2; #2; #thamizh change
att_tx = 0
att_rx = 0;
bands = [257];
nr_scs_for_raster = 3;
max_pdschReferenceSignalPower = -40;
max_rxgain = 60;
#sf_extension = 0;
eNB_instances = [0];
ru_thread_core = 14;
sl_ahead = 5; #5;
tr_preference = "raw_if4p5"; #thamizh change
do_precoding = 0; #thamizh change
}
);
security = {
# preferred ciphering algorithms
# the first one of the list that an UE supports in chosen
# valid values: nea0, nea1, nea2, nea3
ciphering_algorithms = ( "nea0" );
# preferred integrity algorithms
# the first one of the list that an UE supports in chosen
# valid values: nia0, nia1, nia2, nia3
integrity_algorithms = ( "nia2", "nia0" );
# setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter
# what 'ciphering_algorithms' configures; same thing for 'drb_integrity'
drb_ciphering = "yes";
drb_integrity = "no";
};
log_config :
{
global_log_level ="info";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="medium";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
pdcp_log_level ="info";
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
ngap_log_level ="info";
ngap_log_verbosity ="medium";
f1ap_log_level ="info";
f1ap_log_verbosity ="medium";
};
fhi_72 = {
dpdk_devices = ("c1:11.0");
system_core = 11;
io_core = 12;
worker_cores = (13); #18
ru_addr = ("10:70:FD:B8:86:02", "10:70:FD:B8:86:02");
mtu = 9600; # check if xran uses this properly
#owdm_enable = 1;
fh_config = ({
T1a_cp_dl = (100, 124); # (min, max)
T1a_cp_ul = (60, 70); # (min, max)
T1a_up = (35, 108); # (min, max)
Ta4 = (0, 45); # 0 45 (min, max) #75 - 90
ru_config = {
iq_width = 9;
iq_width_prach = 16;
#fft_size = 10;
};
prach_config = {
eAxC_offset = 0;
kbar = 4;
};
});
};

View File

@@ -0,0 +1,341 @@
Active_gNBs = ( "microamp");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
gNBs =
(
{
////////// Identification parameters:
gNB_ID = 0xe00;
cell_type = "CELL_MACRO_GNB";
gNB_name = "microamp";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = 1;
plmn_list = ({
mcc = 208;
mnc = 99;
mnc_length = 2;
snssaiList = (
{
sst = 1;
}
);
});
nr_cellid = 1;
#ssb_SubcarrierOffset = 0;
#n_TimingAdvanceOffset = 0;
////////// Physical parameters:
pdsch_AntennaPorts_XP = 2;
#pdsch_AntennaPorts_N1 = 2;
pusch_AntennaPorts = 2;
maxMIMO_layers = 2;
do_CSIRS = 1; #1
do_SRS = 1;
min_rxtxtime = 3;
sib1_tda = 9;
#ul_prbblacklist = "133,134,135,136"
#force_256qam_off = 1;
servingCellConfigCommon = (
{
#spCellConfigCommon
physCellId = 0;
# downlinkConfigCommon
#frequencyInfoDL
# this is pointA +:16 PRBs@120kHz SCS (same as initial BWP)
absoluteFrequencySSB = 2079739;
dl_frequencyBand = 257;
# this is 27.900 GHz
dl_absoluteFrequencyPointA = 2078403;
#scs-SpecificCarrierList
dl_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_subcarrierSpacing = 3;
dl_carrierBandwidth = 132; #32;
#initialDownlinkBWP
#genericParameters
# this is RBstart=0,L=32 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 36025;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 3;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 4;
initialDLBWPsearchSpaceZero = 0;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 257;
#scs-SpecificCarrierList
ul_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_subcarrierSpacing = 3;
ul_carrierBandwidth = 132; # 32;
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 36025;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 3;
#rach-ConfigCommon
#rach-ConfigGeneric
prach_ConfigurationIndex = 135;
#prach_msg1_FDM
#0 = one, 1=two, 2=four, 3=eight
prach_msg1_FDM = 0;
prach_msg1_FrequencyStart = 0;
zeroCorrelationZoneConfig = 15; #0;
preambleReceivedTargetPower = -100; #-118;
#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
preambleTransMax = 8; //8
#powerRampingStep
# 0=dB0,1=dB2,2=dB4,3=dB6
powerRampingStep = 2; // 3
#ra_ReponseWindow
#1,2,4,8,10,20,40,80
ra_ResponseWindow = 7;
#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen
ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4;
#oneHalf (0..15) 4,8,12,16,...60,64
ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15 #1; #7;
#ra_ContentionResolutionTimer
#(0..7) 8,16,24,32,40,48,56,64
ra_ContentionResolutionTimer = 7;
rsrp_ThresholdSSB = 19;
#prach-RootSequenceIndex_PR
#1 = 839, 2 = 139
prach_RootSequenceIndex_PR = 2;
prach_RootSequenceIndex = 1; #64;
# SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
#
msg1_SubcarrierSpacing = 3,
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
msg3_DeltaPreamble = 0;
p0_NominalWithGrant = -96; #-80
# pucch-ConfigCommon setup :
# pucchGroupHopping
# 0 = neither, 1= group hopping, 2=sequence hopping
pucchGroupHopping = 0;
hoppingId = 0; #40;
p0_nominal = -96; #-80
# ssb_PositionsInBurs_BitmapPR
# 1=short, 2=medium, 3=long
ssb_PositionsInBurst_PR = 3;
ssb_PositionsInBurst_Bitmap = 0x5454545454545454L;
#
# ssb_periodicityServingCell
# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
ssb_periodicityServingCell = 4;
# dmrs_TypeA_position
# 0 = pos2, 1 = pos3
dmrs_TypeA_Position = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
subcarrierSpacing = 3;
#tdd-UL-DL-ConfigurationCommon
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
referenceSubcarrierSpacing = 3;
# pattern1
# dl_UL_TransmissionPeriodicity
# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
dl_UL_TransmissionPeriodicity = 1; #3;
nrofDownlinkSlots = 3; #7;
nrofDownlinkSymbols = 10; #6
nrofUplinkSlots = 1; #2;
nrofUplinkSymbols = 0; #4
ssPBCH_BlockPower = 5;
}
);
first_active_bwp = 1;
bwp_list = (
{ scs = 3; bwpStart = 0; bwpSize = 132;}
);
# ------- SCTP definitions
SCTP :
{
# Number of streams to use in input/output
SCTP_INSTREAMS = 2;
SCTP_OUTSTREAMS = 2;
};
////////// AMF parameters:
amf_ip_address = ( { ipv4 = "172.21.6.5";
}
);
NETWORK_INTERFACES :
{
GNB_IPV4_ADDRESS_FOR_NG_AMF = "172.21.16.51/22";
GNB_IPV4_ADDRESS_FOR_NGU = "172.21.16.51/22";
GNB_PORT_FOR_S1U = 2152; # Spec 2152
};
}
);
MACRLCs = (
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
pusch_TargetSNRx10 = 230; # 250; # 200;
pucch_TargetSNRx10 = 270; #250
#dl_min_mcs = 28;
#ulsch_max_frame_inactivity= 1000;
#pusch_FailureThres = 1000;
#dl_bler_target_upper = .35;
#dl_bler_target_lower = .15;
#ul_bler_target_upper = .35;
#ul_bler_target_lower = .15;
#min_grant_prb = 1;
ul_max_mcs = 16;
dl_max_mcs = 20;
#dl_harq_round_max = 1;
#ul_harq_round_max = 1;
set_analog_beamforming = "lophy";
beam_duration = 1;
beams_per_period = 1;
beam_weights = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23];
}
);
L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
prach_dtx_threshold = 120; #120;
pucch0_dtx_threshold = 50; #190 with auto TPC
pusch_dtx_threshold = -200; #190 with auto TPC
max_ldpc_iterations = 15;
tx_amp_backoff_dB = 6; #12
L1_rx_thread_core = 15;
L1_tx_thread_core = 16;
#L1_phase_comp = 1;
phase_compensation = 0;
}
);
RUs = (
{
local_rf = "no"; #thamizh change
nb_tx = 2; #2; #thamizh change
nb_rx = 2; #2; #thamizh change
att_tx = 0
att_rx = 0;
bands = [257];
nr_scs_for_raster = 3;
max_pdschReferenceSignalPower = -40;
max_rxgain = 60;
#sf_extension = 0;
eNB_instances = [0];
ru_thread_core = 14;
sl_ahead = 5; #5;
tr_preference = "raw_if4p5"; #thamizh change
do_precoding = 0; #thamizh change
}
);
security = {
# preferred ciphering algorithms
# the first one of the list that an UE supports in chosen
# valid values: nea0, nea1, nea2, nea3
ciphering_algorithms = ( "nea0" );
# preferred integrity algorithms
# the first one of the list that an UE supports in chosen
# valid values: nia0, nia1, nia2, nia3
integrity_algorithms = ( "nia2", "nia0" );
# setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter
# what 'ciphering_algorithms' configures; same thing for 'drb_integrity'
drb_ciphering = "yes";
drb_integrity = "no";
};
log_config :
{
global_log_level ="info";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="medium";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
pdcp_log_level ="info";
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
ngap_log_level ="info";
ngap_log_verbosity ="medium";
f1ap_log_level ="info";
f1ap_log_verbosity ="medium";
};
fhi_72 = {
dpdk_devices = ("c1:11.0");
system_core = 11;
io_core = 12;
worker_cores = (13); #18
ru_addr = ("10:70:FD:B8:86:02", "10:70:FD:B8:86:02");
mtu = 9600; # check if xran uses this properly
#owdm_enable = 1;
fh_config = ({
#Tadv_cp_dl = 25; #25;
Tadv_cp_dl = 107; #25;
T2a_cp_dl = (30, 160); # (min, max)
T2a_cp_ul = (30, 160); # (min, max)
T2a_up = (25, 140); # (min, max)
Ta3 = (16, 32); # (min, max)
T1a_cp_dl = (100, 124); # (min, max)
T1a_cp_ul = (60, 70); # (min, max)
T1a_up = (35, 108); # (min, max)
Ta4 = (0, 45); # 0 45 (min, max) #75 - 90
ru_config = {
iq_width = 9;
iq_width_prach = 16;
#fft_size = 10;
};
prach_config = {
eAxC_offset = 0;
kbar = 4;
};
});
};

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@@ -0,0 +1,341 @@
Active_gNBs = ( "microamp");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
gNBs =
(
{
////////// Identification parameters:
gNB_ID = 0xe00;
cell_type = "CELL_MACRO_GNB";
gNB_name = "microamp";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = 1;
plmn_list = ({
mcc = 208;
mnc = 99;
mnc_length = 2;
snssaiList = (
{
sst = 1;
}
);
});
nr_cellid = 1;
#ssb_SubcarrierOffset = 0;
#n_TimingAdvanceOffset = 0;
////////// Physical parameters:
pdsch_AntennaPorts_XP = 2;
#pdsch_AntennaPorts_N1 = 2;
pusch_AntennaPorts = 2;
maxMIMO_layers = 2;
do_CSIRS = 0; #1
do_SRS = 0;
min_rxtxtime = 3;
sib1_tda = 9;
#ul_prbblacklist = "133,134,135,136"
#force_256qam_off = 1;
servingCellConfigCommon = (
{
#spCellConfigCommon
physCellId = 0;
# downlinkConfigCommon
#frequencyInfoDL
# this is pointA +:16 PRBs@120kHz SCS (same as initial BWP)
absoluteFrequencySSB = 2079739;
dl_frequencyBand = 257;
# this is 27.900 GHz
dl_absoluteFrequencyPointA = 2078403;
#scs-SpecificCarrierList
dl_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_subcarrierSpacing = 3;
dl_carrierBandwidth = 132; #32;
#initialDownlinkBWP
#genericParameters
# this is RBstart=0,L=32 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 36025;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 3;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 4;
initialDLBWPsearchSpaceZero = 0;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 257;
#scs-SpecificCarrierList
ul_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_subcarrierSpacing = 3;
ul_carrierBandwidth = 132; # 32;
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 36025;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 3;
#rach-ConfigCommon
#rach-ConfigGeneric
prach_ConfigurationIndex = 135;
#prach_msg1_FDM
#0 = one, 1=two, 2=four, 3=eight
prach_msg1_FDM = 0;
prach_msg1_FrequencyStart = 0;
zeroCorrelationZoneConfig = 15; #0;
preambleReceivedTargetPower = -100; #-118;
#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
preambleTransMax = 8; //8
#powerRampingStep
# 0=dB0,1=dB2,2=dB4,3=dB6
powerRampingStep = 2; // 3
#ra_ReponseWindow
#1,2,4,8,10,20,40,80
ra_ResponseWindow = 7;
#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen
ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4;
#oneHalf (0..15) 4,8,12,16,...60,64
ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15 #1; #7;
#ra_ContentionResolutionTimer
#(0..7) 8,16,24,32,40,48,56,64
ra_ContentionResolutionTimer = 7;
rsrp_ThresholdSSB = 19;
#prach-RootSequenceIndex_PR
#1 = 839, 2 = 139
prach_RootSequenceIndex_PR = 2;
prach_RootSequenceIndex = 1; #64;
# SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
#
msg1_SubcarrierSpacing = 3,
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
msg3_DeltaPreamble = 0;
p0_NominalWithGrant = -96; #-80
# pucch-ConfigCommon setup :
# pucchGroupHopping
# 0 = neither, 1= group hopping, 2=sequence hopping
pucchGroupHopping = 0;
hoppingId = 0; #40;
p0_nominal = -96; #-80
# ssb_PositionsInBurs_BitmapPR
# 1=short, 2=medium, 3=long
ssb_PositionsInBurst_PR = 3;
ssb_PositionsInBurst_Bitmap = 0x5454545454545454L;
#
# ssb_periodicityServingCell
# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
ssb_periodicityServingCell = 4;
# dmrs_TypeA_position
# 0 = pos2, 1 = pos3
dmrs_TypeA_Position = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
subcarrierSpacing = 3;
#tdd-UL-DL-ConfigurationCommon
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
referenceSubcarrierSpacing = 3;
# pattern1
# dl_UL_TransmissionPeriodicity
# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
dl_UL_TransmissionPeriodicity = 1; #3;
nrofDownlinkSlots = 3; #7;
nrofDownlinkSymbols = 10; #6
nrofUplinkSlots = 1; #2;
nrofUplinkSymbols = 0; #4
ssPBCH_BlockPower = 5;
}
);
first_active_bwp = 1;
bwp_list = (
{ scs = 3; bwpStart = 0; bwpSize = 132;}
);
# ------- SCTP definitions
SCTP :
{
# Number of streams to use in input/output
SCTP_INSTREAMS = 2;
SCTP_OUTSTREAMS = 2;
};
////////// AMF parameters:
amf_ip_address = ( { ipv4 = "172.21.6.5";
}
);
NETWORK_INTERFACES :
{
GNB_IPV4_ADDRESS_FOR_NG_AMF = "172.21.16.51/22";
GNB_IPV4_ADDRESS_FOR_NGU = "172.21.16.51/22";
GNB_PORT_FOR_S1U = 2152; # Spec 2152
};
}
);
MACRLCs = (
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
pusch_TargetSNRx10 = 230; # 250; # 200;
pucch_TargetSNRx10 = 270; #250
#dl_min_mcs = 28;
#ulsch_max_frame_inactivity= 1000;
#pusch_FailureThres = 1000;
#dl_bler_target_upper = .35;
#dl_bler_target_lower = .15;
#ul_bler_target_upper = .35;
#ul_bler_target_lower = .15;
#min_grant_prb = 1;
ul_max_mcs = 16;
dl_max_mcs = 20;
#dl_harq_round_max = 1;
#ul_harq_round_max = 1;
set_analog_beamforming = "lophy";
beam_duration = 1;
beams_per_period = 1;
beam_weights = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23];
}
);
L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
prach_dtx_threshold = 120; #120;
pucch0_dtx_threshold = 50; #190 with auto TPC
pusch_dtx_threshold = -200; #190 with auto TPC
max_ldpc_iterations = 15;
tx_amp_backoff_dB = 6; #12
L1_rx_thread_core = 15;
L1_tx_thread_core = 16;
#L1_phase_comp = 1;
phase_compensation = 0;
}
);
RUs = (
{
local_rf = "no"; #thamizh change
nb_tx = 2; #2; #thamizh change
nb_rx = 2; #2; #thamizh change
att_tx = 0
att_rx = 0;
bands = [257];
nr_scs_for_raster = 3;
max_pdschReferenceSignalPower = -40;
max_rxgain = 60;
#sf_extension = 0;
eNB_instances = [0];
ru_thread_core = 14;
sl_ahead = 5; #5;
tr_preference = "raw_if4p5"; #thamizh change
do_precoding = 0; #thamizh change
}
);
security = {
# preferred ciphering algorithms
# the first one of the list that an UE supports in chosen
# valid values: nea0, nea1, nea2, nea3
ciphering_algorithms = ( "nea0" );
# preferred integrity algorithms
# the first one of the list that an UE supports in chosen
# valid values: nia0, nia1, nia2, nia3
integrity_algorithms = ( "nia2", "nia0" );
# setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter
# what 'ciphering_algorithms' configures; same thing for 'drb_integrity'
drb_ciphering = "yes";
drb_integrity = "no";
};
log_config :
{
global_log_level ="info";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="medium";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
pdcp_log_level ="info";
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
ngap_log_level ="info";
ngap_log_verbosity ="medium";
f1ap_log_level ="info";
f1ap_log_verbosity ="medium";
};
fhi_72 = {
dpdk_devices = ("c1:11.0");
system_core = 11;
io_core = 12;
worker_cores = (13); #18
ru_addr = ("10:70:FD:B8:86:02", "10:70:FD:B8:86:02");
mtu = 9600; # check if xran uses this properly
#owdm_enable = 1;
fh_config = ({
#Tadv_cp_dl = 25; #25;
Tadv_cp_dl = 107; #25;
T2a_cp_dl = (30, 160); # (min, max)
T2a_cp_ul = (30, 160); # (min, max)
T2a_up = (25, 140); # (min, max)
Ta3 = (16, 32); # (min, max)
T1a_cp_dl = (100, 124); # (min, max)
T1a_cp_ul = (60, 70); # (min, max)
T1a_up = (35, 108); # (min, max)
Ta4 = (0, 45); # 0 45 (min, max) #75 - 90
ru_config = {
iq_width = 9;
iq_width_prach = 16;
#fft_size = 10;
};
prach_config = {
eAxC_offset = 0;
kbar = 4;
};
});
};

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@@ -0,0 +1,327 @@
Active_gNBs = ( "microamp");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
gNBs =
(
{
////////// Identification parameters:
gNB_ID = 0xe00;
cell_type = "CELL_MACRO_GNB";
gNB_name = "microamp";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = 1;
plmn_list = ({
mcc = 208;
mnc = 99;
mnc_length = 2;
snssaiList = (
{
sst = 1;
}
);
});
nr_cellid = 1;
#ssb_SubcarrierOffset = 0;
#n_TimingAdvanceOffset = 0;
////////// Physical parameters:
pdsch_AntennaPorts_XP = 2;
#pdsch_AntennaPorts_N1 = 2;
pusch_AntennaPorts = 2;
maxMIMO_layers = 2;
do_CSIRS = 1; #1
do_SRS = 1;
min_rxtxtime = 3;
sib1_tda = 15;
#ul_prbblacklist = "133,134,135,136"
#force_256qam_off = 1;
servingCellConfigCommon = (
{
#spCellConfigCommon
physCellId = 0;
# downlinkConfigCommon
#frequencyInfoDL
# this is pointA +:16 PRBs@120kHz SCS (same as initial BWP)
absoluteFrequencySSB = 2079739;
dl_frequencyBand = 257;
# this is 27.900 GHz
dl_absoluteFrequencyPointA = 2078403;
#scs-SpecificCarrierList
dl_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_subcarrierSpacing = 3;
dl_carrierBandwidth = 132; #32;
#initialDownlinkBWP
#genericParameters
# this is RBstart=0,L=32 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 36025;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 3;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 2;
initialDLBWPsearchSpaceZero = 1;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 257;
#scs-SpecificCarrierList
ul_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_subcarrierSpacing = 3;
ul_carrierBandwidth = 132; # 32;
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 36025;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 3;
#rach-ConfigCommon
#rach-ConfigGeneric
prach_ConfigurationIndex = 135;
#prach_msg1_FDM
#0 = one, 1=two, 2=four, 3=eight
prach_msg1_FDM = 0;
prach_msg1_FrequencyStart = 0;
zeroCorrelationZoneConfig = 15; #0;
preambleReceivedTargetPower = -100; #-118;
#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
preambleTransMax = 8; //8
#powerRampingStep
# 0=dB0,1=dB2,2=dB4,3=dB6
powerRampingStep = 2; // 3
#ra_ReponseWindow
#1,2,4,8,10,20,40,80
#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen
ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4;
#oneHalf (0..15) 4,8,12,16,...60,64
ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15 #1; #7;
#ra_ContentionResolutionTimer
#(0..7) 8,16,24,32,40,48,56,64
ra_ContentionResolutionTimer = 7;
rsrp_ThresholdSSB = 19;
#prach-RootSequenceIndex_PR
#1 = 839, 2 = 139
prach_RootSequenceIndex_PR = 2;
prach_RootSequenceIndex = 1; #64;
# SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
#
msg1_SubcarrierSpacing = 3,
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
msg3_DeltaPreamble = 0;
p0_NominalWithGrant = -96; #-80
# pucch-ConfigCommon setup :
# pucchGroupHopping
# 0 = neither, 1= group hopping, 2=sequence hopping
pucchGroupHopping = 0;
hoppingId = 0; #40;
p0_nominal = -96; #-80
# ssb_PositionsInBurs_BitmapPR
# 1=short, 2=medium, 3=long
ssb_PositionsInBurst_PR = 3;
ssb_PositionsInBurst_Bitmap = 0x5454;
#
# ssb_periodicityServingCell
# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
ssb_periodicityServingCell = 4;
# dmrs_TypeA_position
# 0 = pos2, 1 = pos3
dmrs_TypeA_Position = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
subcarrierSpacing = 3;
#tdd-UL-DL-ConfigurationCommon
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
referenceSubcarrierSpacing = 3;
# pattern1
# dl_UL_TransmissionPeriodicity
# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
dl_UL_TransmissionPeriodicity = 1; #3;
nrofDownlinkSlots = 3; #7;
nrofDownlinkSymbols = 10; #6
nrofUplinkSlots = 1; #2;
nrofUplinkSymbols = 0; #4
ssPBCH_BlockPower = 5;
}
);
# ------- SCTP definitions
SCTP :
{
# Number of streams to use in input/output
SCTP_INSTREAMS = 2;
SCTP_OUTSTREAMS = 2;
};
////////// AMF parameters:
amf_ip_address = ( { ipv4 = "172.21.6.5";
}
);
NETWORK_INTERFACES :
{
GNB_IPV4_ADDRESS_FOR_NG_AMF = "172.21.16.51/22";
GNB_IPV4_ADDRESS_FOR_NGU = "172.21.16.51/22";
GNB_PORT_FOR_S1U = 2152; # Spec 2152
};
}
);
MACRLCs = (
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
pusch_TargetSNRx10 = 230; # 250; # 200;
pucch_TargetSNRx10 = 270; #250
#dl_min_mcs = 28;
ulsch_max_frame_inactivity= 1000;
#pusch_FailureThres = 1000;
#dl_bler_target_upper = .35;
#dl_bler_target_lower = .15;
#ul_bler_target_upper = .35;
#ul_bler_target_lower = .15;
min_grant_prb = 1;
#ul_max_mcs = 16;
#dl_max_mcs = 24;
#dl_harq_round_max = 1;
#ul_harq_round_max = 1;
set_analog_beamforming = "lophy";
beam_duration = 1;
beams_per_period = 1;
beam_weights = [0,1,2,3,4,5];
}
);
L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
prach_dtx_threshold = 120; #120;
pucch0_dtx_threshold = 50; #190 with auto TPC
pusch_dtx_threshold = -200; #190 with auto TPC
max_ldpc_iterations = 15;
tx_amp_backoff_dB = 6; #12
L1_rx_thread_core = 15;
L1_tx_thread_core = 16;
#L1_phase_comp = 1;
phase_compensation = 0;
}
);
RUs = (
{
local_rf = "no"; #thamizh change
nb_tx = 2; #2; #thamizh change
nb_rx = 2; #2; #thamizh change
att_tx = 0
att_rx = 0;
bands = [257];
nr_scs_for_raster = 3;
max_pdschReferenceSignalPower = -40;
max_rxgain = 60;
#sf_extension = 0;
eNB_instances = [0];
ru_thread_core = 14;
sl_ahead = 5; #5;
tr_preference = "raw_if4p5"; #thamizh change
do_precoding = 0; #thamizh change
}
);
security = {
# preferred ciphering algorithms
# the first one of the list that an UE supports in chosen
# valid values: nea0, nea1, nea2, nea3
ciphering_algorithms = ( "nea0" );
# preferred integrity algorithms
# the first one of the list that an UE supports in chosen
# valid values: nia0, nia1, nia2, nia3
integrity_algorithms = ( "nia2", "nia0" );
# setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter
# what 'ciphering_algorithms' configures; same thing for 'drb_integrity'
drb_ciphering = "yes";
drb_integrity = "no";
};
log_config :
{
global_log_level ="info";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="medium";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
pdcp_log_level ="info";
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
ngap_log_level ="info";
ngap_log_verbosity ="medium";
f1ap_log_level ="info";
f1ap_log_verbosity ="medium";
};
fhi_72 = {
dpdk_devices = ("c1:11.0");
system_core = 11;
io_core = 12;
worker_cores = (13); #18
ru_addr = ("10:70:FD:B8:86:02", "10:70:FD:B8:86:02");
mtu = 9600; # check if xran uses this properly
#owdm_enable = 1;
fh_config = ({
T1a_cp_dl = (100, 124); # (min, max)
T1a_cp_ul = (60, 70); # (min, max)
T1a_up = (35, 108); # (min, max)
Ta4 = (0, 45); # 0 45 (min, max) #75 - 90
ru_config = {
iq_width = 9;
iq_width_prach = 16;
#fft_size = 10;
};
prach_config = {
eAxC_offset = 0;
kbar = 4;
};
});
};

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@@ -0,0 +1,327 @@
Active_gNBs = ( "microamp");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
gNBs =
(
{
////////// Identification parameters:
gNB_ID = 0xe00;
cell_type = "CELL_MACRO_GNB";
gNB_name = "microamp";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = 1;
plmn_list = ({
mcc = 208;
mnc = 99;
mnc_length = 2;
snssaiList = (
{
sst = 1;
}
);
});
nr_cellid = 1;
#ssb_SubcarrierOffset = 0;
#n_TimingAdvanceOffset = 0;
////////// Physical parameters:
pdsch_AntennaPorts_XP = 2;
#pdsch_AntennaPorts_N1 = 2;
pusch_AntennaPorts = 2;
maxMIMO_layers = 2;
do_CSIRS = 0; #1
do_SRS = 0;
min_rxtxtime = 3;
sib1_tda = 15;
#ul_prbblacklist = "133,134,135,136"
#force_256qam_off = 1;
servingCellConfigCommon = (
{
#spCellConfigCommon
physCellId = 0;
# downlinkConfigCommon
#frequencyInfoDL
# this is pointA +:16 PRBs@120kHz SCS (same as initial BWP)
absoluteFrequencySSB = 2079739;
dl_frequencyBand = 257; #257;
# this is 27.900 GHz
dl_absoluteFrequencyPointA = 2078403;
#scs-SpecificCarrierList
dl_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_subcarrierSpacing = 3;
dl_carrierBandwidth = 132; #32;
#initialDownlinkBWP
#genericParameters
# this is RBstart=0,L=32 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 36025;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 3;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 2; # 2;
initialDLBWPsearchSpaceZero = 1;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 257; #257;
#scs-SpecificCarrierList
ul_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_subcarrierSpacing = 3;
ul_carrierBandwidth = 132; # 32;
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 36025;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 3;
#rach-ConfigCommon
#rach-ConfigGeneric
prach_ConfigurationIndex = 135;
#prach_msg1_FDM
#0 = one, 1=two, 2=four, 3=eight
prach_msg1_FDM = 0;
prach_msg1_FrequencyStart = 0;
zeroCorrelationZoneConfig = 15; #0;
preambleReceivedTargetPower = -100; #-118;
#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
preambleTransMax = 8; //8
#powerRampingStep
# 0=dB0,1=dB2,2=dB4,3=dB6
powerRampingStep = 2; // 3
#ra_ReponseWindow
#1,2,4,8,10,20,40,80
#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen
ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4;
#oneHalf (0..15) 4,8,12,16,...60,64
ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15 #1; #7;
#ra_ContentionResolutionTimer
#(0..7) 8,16,24,32,40,48,56,64
ra_ContentionResolutionTimer = 7;
rsrp_ThresholdSSB = 19;
#prach-RootSequenceIndex_PR
#1 = 839, 2 = 139
prach_RootSequenceIndex_PR = 2;
prach_RootSequenceIndex = 1; #64;
# SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
#
msg1_SubcarrierSpacing = 3,
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
msg3_DeltaPreamble = 0;
p0_NominalWithGrant = -96; #-80
# pucch-ConfigCommon setup :
# pucchGroupHopping
# 0 = neither, 1= group hopping, 2=sequence hopping
pucchGroupHopping = 0;
hoppingId = 0; #40;
p0_nominal = -96; #-80
# ssb_PositionsInBurs_BitmapPR
# 1=short, 2=medium, 3=long
ssb_PositionsInBurst_PR = 3;
ssb_PositionsInBurst_Bitmap = 0x5454;
#
# ssb_periodicityServingCell
# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
ssb_periodicityServingCell = 4;
# dmrs_TypeA_position
# 0 = pos2, 1 = pos3
dmrs_TypeA_Position = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
subcarrierSpacing = 3;
#tdd-UL-DL-ConfigurationCommon
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
referenceSubcarrierSpacing = 3;
# pattern1
# dl_UL_TransmissionPeriodicity
# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
dl_UL_TransmissionPeriodicity = 1; #3;
nrofDownlinkSlots = 3; #7;
nrofDownlinkSymbols = 10; #6
nrofUplinkSlots = 1; #2;
nrofUplinkSymbols = 0; #4
ssPBCH_BlockPower = 5;
}
);
# ------- SCTP definitions
SCTP :
{
# Number of streams to use in input/output
SCTP_INSTREAMS = 2;
SCTP_OUTSTREAMS = 2;
};
////////// AMF parameters:
amf_ip_address = ( { ipv4 = "172.21.6.5";
}
);
NETWORK_INTERFACES :
{
GNB_IPV4_ADDRESS_FOR_NG_AMF = "172.21.16.51/22";
GNB_IPV4_ADDRESS_FOR_NGU = "172.21.16.51/22";
GNB_PORT_FOR_S1U = 2152; # Spec 2152
};
}
);
MACRLCs = (
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
pusch_TargetSNRx10 = 230; # 250; # 200;
pucch_TargetSNRx10 = 270; #250
#dl_min_mcs = 28;
ulsch_max_frame_inactivity= 1000;
#pusch_FailureThres = 1000;
#dl_bler_target_upper = .35;
#dl_bler_target_lower = .15;
#ul_bler_target_upper = .35;
#ul_bler_target_lower = .15;
min_grant_prb = 1;
#ul_max_mcs = 16;
#dl_max_mcs = 24;
#dl_harq_round_max = 1;
#ul_harq_round_max = 1;
set_analog_beamforming = "lophy";
beam_duration = 1;
beams_per_period = 1;
beam_weights = [0,1,2,3,4,5];
}
);
L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
prach_dtx_threshold = 120; #120;
pucch0_dtx_threshold = 50; #190 with auto TPC
pusch_dtx_threshold = -200; #190 with auto TPC
max_ldpc_iterations = 15;
tx_amp_backoff_dB = 6; #12
L1_rx_thread_core = 15;
L1_tx_thread_core = 16;
#L1_phase_comp = 1;
phase_compensation = 0;
}
);
RUs = (
{
local_rf = "no"; #thamizh change
nb_tx = 2; #2; #thamizh change
nb_rx = 2; #2; #thamizh change
att_tx = 0
att_rx = 0;
bands = [257];
nr_scs_for_raster = 3;
max_pdschReferenceSignalPower = -40;
max_rxgain = 60;
#sf_extension = 0;
eNB_instances = [0];
ru_thread_core = 14;
sl_ahead = 5; #5;
tr_preference = "raw_if4p5"; #thamizh change
do_precoding = 0; #thamizh change
}
);
security = {
# preferred ciphering algorithms
# the first one of the list that an UE supports in chosen
# valid values: nea0, nea1, nea2, nea3
ciphering_algorithms = ( "nea0" );
# preferred integrity algorithms
# the first one of the list that an UE supports in chosen
# valid values: nia0, nia1, nia2, nia3
integrity_algorithms = ( "nia2", "nia0" );
# setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter
# what 'ciphering_algorithms' configures; same thing for 'drb_integrity'
drb_ciphering = "yes";
drb_integrity = "no";
};
log_config :
{
global_log_level ="info";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="medium";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
pdcp_log_level ="info";
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
ngap_log_level ="info";
ngap_log_verbosity ="medium";
f1ap_log_level ="info";
f1ap_log_verbosity ="medium";
};
fhi_72 = {
dpdk_devices = ("c1:11.0");
system_core = 11;
io_core = 12;
worker_cores = (13); #18
ru_addr = ("10:70:FD:B8:86:02", "10:70:FD:B8:86:02");
mtu = 9600; # check if xran uses this properly
#owdm_enable = 1;
fh_config = ({
T1a_cp_dl = (100, 124); # (min, max)
T1a_cp_ul = (60, 70); # (min, max)
T1a_up = (35, 108); # (min, max)
Ta4 = (0, 45); # 0 45 (min, max) #75 - 90
ru_config = {
iq_width = 9;
iq_width_prach = 16;
#fft_size = 10;
};
prach_config = {
eAxC_offset = 0;
kbar = 4;
};
});
};

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@@ -0,0 +1,341 @@
Active_gNBs = ( "microamp");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
gNBs =
(
{
////////// Identification parameters:
gNB_ID = 0xe00;
cell_type = "CELL_MACRO_GNB";
gNB_name = "microamp";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = 1;
plmn_list = ({
mcc = 208;
mnc = 99;
mnc_length = 2;
snssaiList = (
{
sst = 1;
}
);
});
nr_cellid = 1;
#ssb_SubcarrierOffset = 0;
#n_TimingAdvanceOffset = 0;
////////// Physical parameters:
pdsch_AntennaPorts_XP = 2;
#pdsch_AntennaPorts_N1 = 2;
pusch_AntennaPorts = 2;
maxMIMO_layers = 2;
do_CSIRS = 1; #1
do_SRS = 1;
min_rxtxtime = 3;
sib1_tda = 9;
#ul_prbblacklist = "133,134,135,136"
#force_256qam_off = 1;
servingCellConfigCommon = (
{
#spCellConfigCommon
physCellId = 0;
# downlinkConfigCommon
#frequencyInfoDL
# this is pointA +:16 PRBs@120kHz SCS (same as initial BWP)
absoluteFrequencySSB = 2079739;
dl_frequencyBand = 257;
# this is 27.900 GHz
dl_absoluteFrequencyPointA = 2078403;
#scs-SpecificCarrierList
dl_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_subcarrierSpacing = 3;
dl_carrierBandwidth = 132; #32;
#initialDownlinkBWP
#genericParameters
# this is RBstart=0,L=32 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 36025;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 3;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 4;
initialDLBWPsearchSpaceZero = 0;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 257;
#scs-SpecificCarrierList
ul_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_subcarrierSpacing = 3;
ul_carrierBandwidth = 132; # 32;
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 36025;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 3;
#rach-ConfigCommon
#rach-ConfigGeneric
prach_ConfigurationIndex = 135;
#prach_msg1_FDM
#0 = one, 1=two, 2=four, 3=eight
prach_msg1_FDM = 0;
prach_msg1_FrequencyStart = 0;
zeroCorrelationZoneConfig = 15; #0;
preambleReceivedTargetPower = -100; #-118;
#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
preambleTransMax = 8; //8
#powerRampingStep
# 0=dB0,1=dB2,2=dB4,3=dB6
powerRampingStep = 2; // 3
#ra_ReponseWindow
#1,2,4,8,10,20,40,80
ra_ResponseWindow = 7;
#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen
ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4;
#oneHalf (0..15) 4,8,12,16,...60,64
ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15 #1; #7;
#ra_ContentionResolutionTimer
#(0..7) 8,16,24,32,40,48,56,64
ra_ContentionResolutionTimer = 7;
rsrp_ThresholdSSB = 19;
#prach-RootSequenceIndex_PR
#1 = 839, 2 = 139
prach_RootSequenceIndex_PR = 2;
prach_RootSequenceIndex = 1; #64;
# SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
#
msg1_SubcarrierSpacing = 3,
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
msg3_DeltaPreamble = 0;
p0_NominalWithGrant = -96; #-80
# pucch-ConfigCommon setup :
# pucchGroupHopping
# 0 = neither, 1= group hopping, 2=sequence hopping
pucchGroupHopping = 0;
hoppingId = 0; #40;
p0_nominal = -96; #-80
# ssb_PositionsInBurs_BitmapPR
# 1=short, 2=medium, 3=long
ssb_PositionsInBurst_PR = 3;
ssb_PositionsInBurst_Bitmap = 0x545454;
#
# ssb_periodicityServingCell
# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
ssb_periodicityServingCell = 4;
# dmrs_TypeA_position
# 0 = pos2, 1 = pos3
dmrs_TypeA_Position = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
subcarrierSpacing = 3;
#tdd-UL-DL-ConfigurationCommon
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
referenceSubcarrierSpacing = 3;
# pattern1
# dl_UL_TransmissionPeriodicity
# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
dl_UL_TransmissionPeriodicity = 1; #3;
nrofDownlinkSlots = 3; #7;
nrofDownlinkSymbols = 10; #6
nrofUplinkSlots = 1; #2;
nrofUplinkSymbols = 0; #4
ssPBCH_BlockPower = 5;
}
);
first_active_bwp = 1;
bwp_list = (
{ scs = 3; bwpStart = 0; bwpSize = 132;}
);
# ------- SCTP definitions
SCTP :
{
# Number of streams to use in input/output
SCTP_INSTREAMS = 2;
SCTP_OUTSTREAMS = 2;
};
////////// AMF parameters:
amf_ip_address = ( { ipv4 = "172.21.6.5";
}
);
NETWORK_INTERFACES :
{
GNB_IPV4_ADDRESS_FOR_NG_AMF = "172.21.16.51/22";
GNB_IPV4_ADDRESS_FOR_NGU = "172.21.16.51/22";
GNB_PORT_FOR_S1U = 2152; # Spec 2152
};
}
);
MACRLCs = (
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
pusch_TargetSNRx10 = 230; # 250; # 200;
pucch_TargetSNRx10 = 270; #250
#dl_min_mcs = 28;
#ulsch_max_frame_inactivity= 1000;
#pusch_FailureThres = 1000;
#dl_bler_target_upper = .35;
#dl_bler_target_lower = .15;
#ul_bler_target_upper = .35;
#ul_bler_target_lower = .15;
#min_grant_prb = 1;
ul_max_mcs = 16;
dl_max_mcs = 20;
#dl_harq_round_max = 1;
#ul_harq_round_max = 1;
set_analog_beamforming = "lophy";
beam_duration = 1;
beams_per_period = 1;
beam_weights = [0,1,2,3,4,5,6,7,8];
}
);
L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
prach_dtx_threshold = 120; #120;
pucch0_dtx_threshold = 50; #190 with auto TPC
pusch_dtx_threshold = -200; #190 with auto TPC
max_ldpc_iterations = 15;
tx_amp_backoff_dB = 6; #12
L1_rx_thread_core = 15;
L1_tx_thread_core = 16;
#L1_phase_comp = 1;
phase_compensation = 0;
}
);
RUs = (
{
local_rf = "no"; #thamizh change
nb_tx = 2; #2; #thamizh change
nb_rx = 2; #2; #thamizh change
att_tx = 0
att_rx = 0;
bands = [257];
nr_scs_for_raster = 3;
max_pdschReferenceSignalPower = -40;
max_rxgain = 60;
#sf_extension = 0;
eNB_instances = [0];
ru_thread_core = 14;
sl_ahead = 5; #5;
tr_preference = "raw_if4p5"; #thamizh change
do_precoding = 0; #thamizh change
}
);
security = {
# preferred ciphering algorithms
# the first one of the list that an UE supports in chosen
# valid values: nea0, nea1, nea2, nea3
ciphering_algorithms = ( "nea0" );
# preferred integrity algorithms
# the first one of the list that an UE supports in chosen
# valid values: nia0, nia1, nia2, nia3
integrity_algorithms = ( "nia2", "nia0" );
# setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter
# what 'ciphering_algorithms' configures; same thing for 'drb_integrity'
drb_ciphering = "yes";
drb_integrity = "no";
};
log_config :
{
global_log_level ="info";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="medium";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
pdcp_log_level ="info";
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
ngap_log_level ="info";
ngap_log_verbosity ="medium";
f1ap_log_level ="info";
f1ap_log_verbosity ="medium";
};
fhi_72 = {
dpdk_devices = ("c1:11.0");
system_core = 11;
io_core = 12;
worker_cores = (13); #18
ru_addr = ("10:70:FD:B8:86:02", "10:70:FD:B8:86:02");
mtu = 9600; # check if xran uses this properly
#owdm_enable = 1;
fh_config = ({
#Tadv_cp_dl = 25; #25;
Tadv_cp_dl = 107; #25;
T2a_cp_dl = (30, 160); # (min, max)
T2a_cp_ul = (30, 160); # (min, max)
T2a_up = (25, 140); # (min, max)
Ta3 = (16, 32); # (min, max)
T1a_cp_dl = (100, 124); # (min, max)
T1a_cp_ul = (60, 70); # (min, max)
T1a_up = (35, 108); # (min, max)
Ta4 = (0, 45); # 0 45 (min, max) #75 - 90
ru_config = {
iq_width = 9;
iq_width_prach = 16;
#fft_size = 10;
};
prach_config = {
eAxC_offset = 0;
kbar = 4;
};
});
};

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@@ -0,0 +1,341 @@
Active_gNBs = ( "microamp");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
gNBs =
(
{
////////// Identification parameters:
gNB_ID = 0xe00;
cell_type = "CELL_MACRO_GNB";
gNB_name = "microamp";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = 1;
plmn_list = ({
mcc = 208;
mnc = 99;
mnc_length = 2;
snssaiList = (
{
sst = 1;
}
);
});
nr_cellid = 1;
#ssb_SubcarrierOffset = 0;
#n_TimingAdvanceOffset = 0;
////////// Physical parameters:
pdsch_AntennaPorts_XP = 2;
#pdsch_AntennaPorts_N1 = 2;
pusch_AntennaPorts = 2;
maxMIMO_layers = 2;
do_CSIRS = 0; #1
do_SRS = 0;
min_rxtxtime = 3;
sib1_tda = 9;
#ul_prbblacklist = "133,134,135,136"
#force_256qam_off = 1;
servingCellConfigCommon = (
{
#spCellConfigCommon
physCellId = 0;
# downlinkConfigCommon
#frequencyInfoDL
# this is pointA +:16 PRBs@120kHz SCS (same as initial BWP)
absoluteFrequencySSB = 2079739;
dl_frequencyBand = 257;
# this is 27.900 GHz
dl_absoluteFrequencyPointA = 2078403;
#scs-SpecificCarrierList
dl_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_subcarrierSpacing = 3;
dl_carrierBandwidth = 132; #32;
#initialDownlinkBWP
#genericParameters
# this is RBstart=0,L=32 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 36025;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 3;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 4;
initialDLBWPsearchSpaceZero = 0;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 257;
#scs-SpecificCarrierList
ul_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_subcarrierSpacing = 3;
ul_carrierBandwidth = 132; # 32;
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 36025;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 3;
#rach-ConfigCommon
#rach-ConfigGeneric
prach_ConfigurationIndex = 135;
#prach_msg1_FDM
#0 = one, 1=two, 2=four, 3=eight
prach_msg1_FDM = 0;
prach_msg1_FrequencyStart = 0;
zeroCorrelationZoneConfig = 15; #0;
preambleReceivedTargetPower = -100; #-118;
#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
preambleTransMax = 8; //8
#powerRampingStep
# 0=dB0,1=dB2,2=dB4,3=dB6
powerRampingStep = 2; // 3
#ra_ReponseWindow
#1,2,4,8,10,20,40,80
ra_ResponseWindow = 7;
#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen
ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4;
#oneHalf (0..15) 4,8,12,16,...60,64
ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15 #1; #7;
#ra_ContentionResolutionTimer
#(0..7) 8,16,24,32,40,48,56,64
ra_ContentionResolutionTimer = 7;
rsrp_ThresholdSSB = 19;
#prach-RootSequenceIndex_PR
#1 = 839, 2 = 139
prach_RootSequenceIndex_PR = 2;
prach_RootSequenceIndex = 1; #64;
# SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
#
msg1_SubcarrierSpacing = 3,
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
msg3_DeltaPreamble = 0;
p0_NominalWithGrant = -96; #-80
# pucch-ConfigCommon setup :
# pucchGroupHopping
# 0 = neither, 1= group hopping, 2=sequence hopping
pucchGroupHopping = 0;
hoppingId = 0; #40;
p0_nominal = -96; #-80
# ssb_PositionsInBurs_BitmapPR
# 1=short, 2=medium, 3=long
ssb_PositionsInBurst_PR = 3;
ssb_PositionsInBurst_Bitmap = 0x545454;
#
# ssb_periodicityServingCell
# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
ssb_periodicityServingCell = 4;
# dmrs_TypeA_position
# 0 = pos2, 1 = pos3
dmrs_TypeA_Position = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
subcarrierSpacing = 3;
#tdd-UL-DL-ConfigurationCommon
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
referenceSubcarrierSpacing = 3;
# pattern1
# dl_UL_TransmissionPeriodicity
# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
dl_UL_TransmissionPeriodicity = 1; #3;
nrofDownlinkSlots = 3; #7;
nrofDownlinkSymbols = 10; #6
nrofUplinkSlots = 1; #2;
nrofUplinkSymbols = 0; #4
ssPBCH_BlockPower = 5;
}
);
first_active_bwp = 1;
bwp_list = (
{ scs = 3; bwpStart = 0; bwpSize = 132;}
);
# ------- SCTP definitions
SCTP :
{
# Number of streams to use in input/output
SCTP_INSTREAMS = 2;
SCTP_OUTSTREAMS = 2;
};
////////// AMF parameters:
amf_ip_address = ( { ipv4 = "172.21.6.5";
}
);
NETWORK_INTERFACES :
{
GNB_IPV4_ADDRESS_FOR_NG_AMF = "172.21.16.51/22";
GNB_IPV4_ADDRESS_FOR_NGU = "172.21.16.51/22";
GNB_PORT_FOR_S1U = 2152; # Spec 2152
};
}
);
MACRLCs = (
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
pusch_TargetSNRx10 = 230; # 250; # 200;
pucch_TargetSNRx10 = 270; #250
#dl_min_mcs = 28;
#ulsch_max_frame_inactivity= 1000;
#pusch_FailureThres = 1000;
#dl_bler_target_upper = .35;
#dl_bler_target_lower = .15;
#ul_bler_target_upper = .35;
#ul_bler_target_lower = .15;
#min_grant_prb = 1;
ul_max_mcs = 16;
dl_max_mcs = 20;
#dl_harq_round_max = 1;
#ul_harq_round_max = 1;
set_analog_beamforming = "lophy";
beam_duration = 1;
beams_per_period = 1;
beam_weights = [0,1,2,3,4,5,6,7,8];
}
);
L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
prach_dtx_threshold = 120; #120;
pucch0_dtx_threshold = 50; #190 with auto TPC
pusch_dtx_threshold = -200; #190 with auto TPC
max_ldpc_iterations = 15;
tx_amp_backoff_dB = 6; #12
L1_rx_thread_core = 15;
L1_tx_thread_core = 16;
#L1_phase_comp = 1;
phase_compensation = 0;
}
);
RUs = (
{
local_rf = "no"; #thamizh change
nb_tx = 2; #2; #thamizh change
nb_rx = 2; #2; #thamizh change
att_tx = 0
att_rx = 0;
bands = [257];
nr_scs_for_raster = 3;
max_pdschReferenceSignalPower = -40;
max_rxgain = 60;
#sf_extension = 0;
eNB_instances = [0];
ru_thread_core = 14;
sl_ahead = 5; #5;
tr_preference = "raw_if4p5"; #thamizh change
do_precoding = 0; #thamizh change
}
);
security = {
# preferred ciphering algorithms
# the first one of the list that an UE supports in chosen
# valid values: nea0, nea1, nea2, nea3
ciphering_algorithms = ( "nea0" );
# preferred integrity algorithms
# the first one of the list that an UE supports in chosen
# valid values: nia0, nia1, nia2, nia3
integrity_algorithms = ( "nia2", "nia0" );
# setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter
# what 'ciphering_algorithms' configures; same thing for 'drb_integrity'
drb_ciphering = "yes";
drb_integrity = "no";
};
log_config :
{
global_log_level ="info";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="medium";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
pdcp_log_level ="info";
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
ngap_log_level ="info";
ngap_log_verbosity ="medium";
f1ap_log_level ="info";
f1ap_log_verbosity ="medium";
};
fhi_72 = {
dpdk_devices = ("c1:11.0");
system_core = 11;
io_core = 12;
worker_cores = (13); #18
ru_addr = ("10:70:FD:B8:86:02", "10:70:FD:B8:86:02");
mtu = 9600; # check if xran uses this properly
#owdm_enable = 1;
fh_config = ({
#Tadv_cp_dl = 25; #25;
Tadv_cp_dl = 107; #25;
T2a_cp_dl = (30, 160); # (min, max)
T2a_cp_ul = (30, 160); # (min, max)
T2a_up = (25, 140); # (min, max)
Ta3 = (16, 32); # (min, max)
T1a_cp_dl = (100, 124); # (min, max)
T1a_cp_ul = (60, 70); # (min, max)
T1a_up = (35, 108); # (min, max)
Ta4 = (0, 45); # 0 45 (min, max) #75 - 90
ru_config = {
iq_width = 9;
iq_width_prach = 16;
#fft_size = 10;
};
prach_config = {
eAxC_offset = 0;
kbar = 4;
};
});
};

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@@ -0,0 +1,323 @@
Active_gNBs = ( "microamp");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
gNBs =
(
{
////////// Identification parameters:
gNB_ID = 0xe00;
cell_type = "CELL_MACRO_GNB";
gNB_name = "microamp";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = 1;
plmn_list = ({
mcc = 208;
mnc = 99;
mnc_length = 2;
snssaiList = (
{
sst = 1;
}
);
});
nr_cellid = 1;
#ssb_SubcarrierOffset = 0;
#n_TimingAdvanceOffset = 0;
////////// Physical parameters:
pdsch_AntennaPorts_XP = 2;
#pdsch_AntennaPorts_N1 = 2;
pusch_AntennaPorts = 2;
maxMIMO_layers = 2;
do_CSIRS = 1; #1
do_SRS = 1;
min_rxtxtime = 3;
sib1_tda = 15;
#ul_prbblacklist = "133,134,135,136"
#force_256qam_off = 1;
servingCellConfigCommon = (
{
#spCellConfigCommon
physCellId = 0;
# downlinkConfigCommon
#frequencyInfoDL
# this is pointA +:16 PRBs@120kHz SCS (same as initial BWP)
absoluteFrequencySSB = 2079739;
dl_frequencyBand = 257;
# this is 27.900 GHz
dl_absoluteFrequencyPointA = 2078403;
#scs-SpecificCarrierList
dl_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_subcarrierSpacing = 3;
dl_carrierBandwidth = 132; #32;
#initialDownlinkBWP
#genericParameters
# this is RBstart=0,L=32 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 36025
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 3;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 2;
initialDLBWPsearchSpaceZero = 0;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 257; #257;
#scs-SpecificCarrierList
ul_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_subcarrierSpacing = 3;
ul_carrierBandwidth = 132; # 32;
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 36025;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 3;
#rach-ConfigCommon
#rach-ConfigGeneric
prach_ConfigurationIndex = 135;
#prach_msg1_FDM
#0 = one, 1=two, 2=four, 3=eight
prach_msg1_FDM = 0;
prach_msg1_FrequencyStart = 0;
zeroCorrelationZoneConfig = 15; #0;
preambleReceivedTargetPower = -100; #-118;
#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
preambleTransMax = 8; //8
#powerRampingStep
# 0=dB0,1=dB2,2=dB4,3=dB6
powerRampingStep = 2; // 3
#ra_ReponseWindow
#1,2,4,8,10,20,40,80
#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen
ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4;
#oneHalf (0..15) 4,8,12,16,...60,64
ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15 #1; #7;
#ra_ContentionResolutionTimer
#(0..7) 8,16,24,32,40,48,56,64
ra_ContentionResolutionTimer = 7;
rsrp_ThresholdSSB = 19;
#prach-RootSequenceIndex_PR
#1 = 839, 2 = 139
prach_RootSequenceIndex_PR = 2;
prach_RootSequenceIndex = 1; #64;
# SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
#
msg1_SubcarrierSpacing = 3,
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
msg3_DeltaPreamble = 0;
p0_NominalWithGrant = -96; #-80
# pucch-ConfigCommon setup :
# pucchGroupHopping
# 0 = neither, 1= group hopping, 2=sequence hopping
pucchGroupHopping = 0;
hoppingId = 0; #40;
p0_nominal = -96; #-80
# ssb_PositionsInBurs_BitmapPR
# 1=short, 2=medium, 3=long
ssb_PositionsInBurst_PR = 3;
ssb_PositionsInBurst_Bitmap = 4;
#
# ssb_periodicityServingCell
# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
ssb_periodicityServingCell = 4;
# dmrs_TypeA_position
# 0 = pos2, 1 = pos3
dmrs_TypeA_Position = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
subcarrierSpacing = 3;
#tdd-UL-DL-ConfigurationCommon
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
referenceSubcarrierSpacing = 3;
# pattern1
# dl_UL_TransmissionPeriodicity
# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
dl_UL_TransmissionPeriodicity = 1; #3;
nrofDownlinkSlots = 3; #7;
nrofDownlinkSymbols = 10; #6
nrofUplinkSlots = 1; #2;
nrofUplinkSymbols = 2; #4
ssPBCH_BlockPower = 5;
}
);
# ------- SCTP definitions
SCTP :
{
# Number of streams to use in input/output
SCTP_INSTREAMS = 2;
SCTP_OUTSTREAMS = 2;
};
////////// AMF parameters:
amf_ip_address = ( { ipv4 = "172.21.6.5";
}
);
NETWORK_INTERFACES :
{
GNB_IPV4_ADDRESS_FOR_NG_AMF = "172.21.16.51/22";
GNB_IPV4_ADDRESS_FOR_NGU = "172.21.16.51/22";
GNB_PORT_FOR_S1U = 2152; # Spec 2152
};
}
);
MACRLCs = (
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
pusch_TargetSNRx10 = 230; # 250; # 200;
pucch_TargetSNRx10 = 270; #250
#dl_min_mcs = 28;
ulsch_max_frame_inactivity= 1000;
#pusch_FailureThres = 1000;
#dl_bler_target_upper = .35;
#dl_bler_target_lower = .15;
#ul_bler_target_upper = .35;
#ul_bler_target_lower = .15;
min_grant_prb = 1;
#ul_max_mcs = 16;
#dl_max_mcs = 24;
#dl_harq_round_max = 1;
#ul_harq_round_max = 1;
}
);
L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
prach_dtx_threshold = 120; #120;
pucch0_dtx_threshold = 50; #190 with auto TPC
pusch_dtx_threshold = -200; #190 with auto TPC
max_ldpc_iterations = 15;
tx_amp_backoff_dB = 6; #12
L1_rx_thread_core = 15;
L1_tx_thread_core = 16;
#L1_phase_comp = 1;
phase_compensation = 0;
}
);
RUs = (
{
local_rf = "no"; #thamizh change
nb_tx = 2; #2; #thamizh change
nb_rx = 2; #2; #thamizh change
att_tx = 0
att_rx = 0;
bands = [257];
nr_scs_for_raster = 3;
max_pdschReferenceSignalPower = -40;
max_rxgain = 60;
#sf_extension = 0;
eNB_instances = [0];
ru_thread_core = 14;
sl_ahead = 5; #5;
tr_preference = "raw_if4p5"; #thamizh change
do_precoding = 0; #thamizh change
}
);
security = {
# preferred ciphering algorithms
# the first one of the list that an UE supports in chosen
# valid values: nea0, nea1, nea2, nea3
ciphering_algorithms = ( "nea0" );
# preferred integrity algorithms
# the first one of the list that an UE supports in chosen
# valid values: nia0, nia1, nia2, nia3
integrity_algorithms = ( "nia2", "nia0" );
# setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter
# what 'ciphering_algorithms' configures; same thing for 'drb_integrity'
drb_ciphering = "yes";
drb_integrity = "no";
};
log_config :
{
global_log_level ="info";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="medium";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
pdcp_log_level ="info";
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
ngap_log_level ="info";
ngap_log_verbosity ="medium";
f1ap_log_level ="info";
f1ap_log_verbosity ="medium";
};
fhi_72 = {
dpdk_devices = ("c1:11.0");
system_core = 11;
io_core = 12;
worker_cores = (13); #18
ru_addr = ("10:70:FD:B8:86:02", "10:70:FD:B8:86:02");
mtu = 9600; # check if xran uses this properly
#owdm_enable = 1;
fh_config = ({
T1a_cp_dl = (100, 124); # (min, max)
T1a_cp_ul = (60, 70); # (min, max)
T1a_up = (35, 108); # (min, max)
Ta4 = (0, 45); # 0 45 (min, max) #75 - 90
ru_config = {
iq_width = 9;
iq_width_prach = 16;
#fft_size = 10;
};
prach_config = {
eAxC_offset = 0;
kbar = 4;
};
});
};