Table of Contents
- Tutorial on how to setup OAI with Lime LMSDR
- Experiment Setup
- Kernel/Machine Setup
- Install the required Ubuntu packages for Lime
- Update FX3 firmware and FPGA [Optional and Dangerous]
- How to compile and run
- Achievable User Performance
- CQI and PHR Samples in 1 meter distance without PA
- RTT using ping
- Throughput using iperf
- Throughput using SpeedCheck Android App
- stability
- To Do
- Additional Materials
Tutorial on how to setup OAI with Lime LMSDR
Experiment Setup
This experiment is based on SISO, for band 7 (2.6GHz) with OAI eNB and Samsung Galaxy S6. ENB and UE were in 1 meter from each other without any mobility.
The duplexer is connected to LMSDR on TX1_2 and RX1_H antenna ports as shown in the figure below:
The rule to connect to the right connectors is as follows:
- TX1_1/2 corresponds to antenna port 1 for <2 GHz - 2-2.6 GHz
- TX2_1/2 corresponds to antenna port 2 for <2 GHz - 2.6 GHz
- RX1/2_L corresponds to antenna ports 1/2 for 700-900 MHz (band LNAL)
- RX1/2_W corresponds to antenna ports 1/2 for 700-2600 MHz (band LNAW)
- RX1/2_H corresponds to antenna port 1/2 for 2-2.6 GHz (band LNAH)
For more detail hardware setup, have a look at OAI HW requirements
Careful when connecting the connectors and make sure that it is correctly plugged.
Connecting to duplexer to TX1_1 is harmless, and still you get the connectivity
Kernel/Machine Setup
Follow the instruction provided [here] (https://gitlab.eurecom.fr/oai/openairinterface5g/wikis/OpenAirKernelMainSetup) to setup you machine, in particular the power / cpu freq management. This will resolve, in most of the cases, the realtime issues when running OAI and the RF driver.
Install the required Ubuntu packages for Lime
Note: the following steps will be shortly integrated with build_oai script
Install from packages
The drivers PPA for Ubuntu has a recent build of LimeSuite:
sudo add-apt-repository -y ppa:myriadrf/drivers
sudo apt-get update
sudo apt-get install limesuite liblimesuite liblimesuite-dev limesuite-udev limesuite-images
sudo apt-get install soapysdr soapysdr-module-lms7
For more information, have a look at Lime Suite, git clone https://github.com/myriadrf/LimeSuite, and read the following file: LimeSuite/docs/lms7suite_compilation_guide.pdf
Install from source
The instructions are provided here by [open-cells] (https://open-cells.com), and are added here for completeness.
- Install the required packages
sudo apt-get install cmake g++ libpython-dev python-numpy swig git libsqlite3-dev libi2c-dev libusb-1.0-0-dev libwxgtk3.0-dev freeglut3-dev
- Install the SoapySDR
git clone https://github.com/pothosware/SoapySDR.git
cd SoapySDR
git pull origin master
mkdir build && cd build
cmake ..
make -j4
sudo make install
sudo ldconfig
- Install LimeSDR
git clone https://github.com/myriadrf/LimeSuite.git
cd LimeSuite
mkdir build && cd build
cmake ..
make -j4
sudo make install
sudo ldconfig
cd ../udev-rules/
sudo ./install.sh
# Download board firmware
sudo LimeUtil --update
Update FX3 firmware and FPGA [Optional and Dangerous]
Flashing FX3
We used the firmware version 1.4. To flash the firmware and FPGA image, you need to install cypress-fx3-sdk-linux following the README file instructions. The most recent version of LimeSDR-USB FX3 firmware can be found at GitHub. To update, follow the steps below:
- Power OFF the board
- Remove FX3 BOOT jumper
- Power ON the board
- Put on FX3 BOOT jumper
- Start cyusb_linux
- Select device from the “List of devices”
- Go to 'Program' tab, select 'FX3' and 'RAM'
- Select image “firmware/CyBootProgrammer.img” and press start download
- Select SPI Flash
- Select image “firmware/limesdr-usb_1.2.img” and press start download
- When programming finishes, close cyusb_linux and power cycle the board
Update FPGA
This step requires LimeSuiteGUI. There is version for Windows, for Linux, follow the instructions here: LimeSuite/docs/lms7suite_compilation_guide.pdf. The most recent version of LimeSDR-USB FPGA bitstream can be fount at GitHub. To update, follow the steps below:
- Start LimeSuiteGUI:
sudo LimeSuiteGUI - Navigate to Modules->Programming
- Press Open and select file: “firmware/LimeSDR-USB_lms7_trx.rbf”
- Select 'Altera FPGA' and 'Bitstream to Flash'
- Press 'Program' and wait
- When programing finishes power cycle the board
How to compile and run
./cmake_targets/build_oai --eNB -w LMSSDR -c -C
./target/bin/lte-softmodem.Rel14 -O enb.band7.tm1.25PRB.lmssdr.conf
--rf-config-file ./targets/ARCH/LMSSDR/LimeSDR_above_1p8GHz_1v4.ini
The output for 5MHz channel bandwidth should look like :
...
[ENB_APP][I][eNB_app_task] [eNB 0] Received S1AP_REGISTER_ENB_CNF: associated MME 1
Connecting to device: LimeSDR-USB, media=USB 3.0, module=STREAM, addr=1d50:6108, serial=0009060B00463318
[INFO] Estimated reference clock 30.7197 MHz
[INFO] Selected reference clock 30.720 MHz
MCU algorithm time: 101 ms
Set sample rate 7.680000 MHz
Set TX frequency 2680.000000 MHz
MCU algorithm time: 0 ms
MCU Ref. clock: 30.72 MHz
MCU algorithm time: 193 ms
MCU algorithm time: 0 ms
MCU Ref. clock: 30.72 MHz
MCU algorithm time: 115 ms
############################################################
Rx calibration using RSSI INTERNAL ON BOARD loopback
Rx ch.A @ 2560 MHz, BW: 5 MHz, RF input: LNAH, PGA: 12, LNA: 12, TIA: 3
Performed by: MCU
------------------------------------------------------------
MCU algorithm time: 0 ms
Current MCU firmware: 3, DC/IQ calibration full
MCU Ref. clock: 30.72 MHz
MCU algorithm time: 277 ms
############################################################
Tx calibration using RSSI MCU INTERNAL ON BOARD loopback
Tx ch.A @ 2680 MHz, BW: 5 MHz, RF output: BAND2, Gain: 8
Performed by: MCU
------------------------------------------------------------
MCU algorithm time: 0 ms
Current MCU firmware: 3, DC/IQ calibration full
MCU Ref. clock: 30.72 MHz
MCU algorithm time: 323 ms
SR: 7.680 MHz
SR: 7.680 MHz
[INFO] L
[PHY][I][eNB 0][RAPROC] Frame 439 Terminating ra_proc for harq 4, UE 0
...
Achievable User Performance
CQI and PHR Samples in 1 meter distance without PA
[MAC][I][eNB_dlsch_ulsch_scheduler] UE rnti 53c2 : in synch, PHR 35 dB CQI 13
[MAC][I][eNB_dlsch_ulsch_scheduler] UE rnti 53c2 : in synch, PHR 31 dB CQI 13
[MAC][I][eNB_dlsch_ulsch_scheduler] UE rnti 53c2 : in synch, PHR 32 dB CQI 13
[MAC][I][eNB_dlsch_ulsch_scheduler] UE rnti 53c2 : in synch, PHR 26 dB CQI 13
[MAC][I][eNB_dlsch_ulsch_scheduler] UE rnti 53c2 : in synch, PHR 31 dB CQI 14
[MAC][I][eNB_dlsch_ulsch_scheduler] UE rnti 53c2 : in synch, PHR 28 dB CQI 14
[MAC][I][eNB_dlsch_ulsch_scheduler] UE rnti 53c2 : in synch, PHR 31 dB CQI 13
RTT using ping
small packets :
PING 192.172.0.2 (192.172.0.2) 56(84) bytes of data.
64 bytes from 192.172.0.2: icmp_seq=1 ttl=64 time=33.1 ms
64 bytes from 192.172.0.2: icmp_seq=2 ttl=64 time=19.7 ms
64 bytes from 192.172.0.2: icmp_seq=3 ttl=64 time=36.1 ms
64 bytes from 192.172.0.2: icmp_seq=4 ttl=64 time=20.9 ms
64 bytes from 192.172.0.2: icmp_seq=5 ttl=64 time=24.9 ms
--- 192.172.0.2 ping statistics ---
5 packets transmitted, 5 received, 0% packet loss, time 4004ms
rtt min/avg/max/mdev = 19.734/26.985/36.135/6.557 ms
medium packet (packet losses are also observed):
PING 192.172.0.2 (192.172.0.2) 726(754) bytes of data.
734 bytes from 192.172.0.2: icmp_seq=1 ttl=64 time=43.1 ms
734 bytes from 192.172.0.2: icmp_seq=2 ttl=64 time=45.7 ms
734 bytes from 192.172.0.2: icmp_seq=3 ttl=64 time=42.0 ms
734 bytes from 192.172.0.2: icmp_seq=4 ttl=64 time=36.4 ms
734 bytes from 192.172.0.2: icmp_seq=5 ttl=64 time=43.9 ms
--- 192.172.0.2 ping statistics ---
5 packets transmitted, 5 received, 0% packet loss, time 4004ms
rtt min/avg/max/mdev = 36.426/42.275/45.704/3.166 ms
Big packets (packet losses are also observed):
PING 192.172.0.2 (192.172.0.2) 1400(1428) bytes of data.
1408 bytes from 192.172.0.2: icmp_seq=1 ttl=64 time=50.5 ms
1408 bytes from 192.172.0.2: icmp_seq=2 ttl=64 time=45.1 ms
1408 bytes from 192.172.0.2: icmp_seq=3 ttl=64 time=48.4 ms
1408 bytes from 192.172.0.2: icmp_seq=4 ttl=64 time=43.2 ms
1408 bytes from 192.172.0.2: icmp_seq=5 ttl=64 time=46.5 ms
--- 192.172.0.2 ping statistics ---
5 packets transmitted, 5 received, 0% packet loss, time 4004ms
rtt min/avg/max/mdev = 43.216/46.781/50.568/2.561 ms
Throughput using iperf
Achievable downlink throughput is half of the maximum throughput.
[ 3] local 192.172.0.2 port 5001 connected with 192.172.0.1 port 35683
[ ID] Interval Transfer Bandwidth Jitter Lost/Total Datagrams
[ 3] 0.0- 1.0 sec 917 KBytes 7.51 Mbits/sec 2.054 ms 22/ 661 (3.3%)
[ 3] 1.0- 2.0 sec 835 KBytes 6.84 Mbits/sec 2.083 ms 0/ 582 (0%)
[ 3] 2.0- 3.0 sec 838 KBytes 6.87 Mbits/sec 2.070 ms 0/ 584 (0%)
[ 3] 3.0- 4.0 sec 831 KBytes 6.81 Mbits/sec 2.047 ms 0/ 579 (0%)
[ 3] 4.0- 5.0 sec 834 KBytes 6.83 Mbits/sec 2.105 ms 0/ 581 (0%)
[ 3] 5.0- 6.0 sec 835 KBytes 6.84 Mbits/sec 2.099 ms 0/ 582 (0%)
[ 3] 6.0- 7.0 sec 834 KBytes 6.83 Mbits/sec 2.081 ms 0/ 581 (0%)
[ 3] 7.0- 8.0 sec 835 KBytes 6.84 Mbits/sec 2.066 ms 0/ 582 (0%)
[ 3] 8.0- 9.0 sec 840 KBytes 6.88 Mbits/sec 2.094 ms 0/ 585 (0%)
[ 3] 9.0-10.0 sec 840 KBytes 6.88 Mbits/sec 2.032 ms 0/ 585 (0%)
[ 3] 10.0-11.0 sec 835 KBytes 6.84 Mbits/sec 2.151 ms 0/ 582 (0%)
[ 3] 11.0-12.0 sec 841 KBytes 6.89 Mbits/sec 2.096 ms 0/ 586 (0%)
[ 3] 12.0-13.0 sec 835 KBytes 6.84 Mbits/sec 2.105 ms 0/ 582 (0%)
[ 3] 13.0-14.0 sec 841 KBytes 6.89 Mbits/sec 2.040 ms 0/ 586 (0%)
[ 3] 14.0-15.0 sec 838 KBytes 6.87 Mbits/sec 2.128 ms 0/ 584 (0%)
[ 3] 0.0-15.2 sec 12.5 MBytes 6.90 Mbits/sec 2.255 ms 21/ 8921 (0.24%)
[ 3] 0.0-15.2 sec 1 datagrams received out-of-order
read failed: Connection refused
Achievable uplink throughput has reached the maximum throughput.
iperf -s -u -i 1
------------------------------------------------------------
Server listening on UDP port 5001
Receiving 1470 byte datagrams
UDP buffer size: 208 KByte (default)
------------------------------------------------------------
[ 3] local 192.172.0.1 port 5001 connected with 192.172.0.2 port 58134
[ ID] Interval Transfer Bandwidth Jitter Lost/Total Datagrams
[ 3] 0.0- 1.0 sec 1013 KBytes 8.30 Mbits/sec 0.508 ms 0/ 706 (0%)
[ 3] 1.0- 2.0 sec 1011 KBytes 8.28 Mbits/sec 0.524 ms 0/ 704 (0%)
[ 3] 2.0- 3.0 sec 1012 KBytes 8.29 Mbits/sec 0.457 ms 0/ 705 (0%)
[ 3] 3.0- 4.0 sec 1012 KBytes 8.29 Mbits/sec 0.499 ms 0/ 705 (0%)
[ 3] 4.0- 5.0 sec 1012 KBytes 8.29 Mbits/sec 0.423 ms 0/ 705 (0%)
[ 3] 5.0- 6.0 sec 1008 KBytes 8.26 Mbits/sec 0.437 ms 0/ 702 (0%)
[ 3] 6.0- 7.0 sec 1013 KBytes 8.30 Mbits/sec 0.546 ms 0/ 706 (0%)
[ 3] 7.0- 8.0 sec 1013 KBytes 8.30 Mbits/sec 0.518 ms 0/ 706 (0%)
[ 3] 8.0- 9.0 sec 1009 KBytes 8.27 Mbits/sec 0.475 ms 0/ 703 (0%)
[ 3] 9.0-10.0 sec 1013 KBytes 8.30 Mbits/sec 0.491 ms 0/ 706 (0%)
[ 3] 0.0-10.1 sec 10.0 MBytes 8.29 Mbits/sec 0.477 ms 0/ 7138 (0%)
[ 3] 0.0-10.1 sec 1 datagrams received out-of-order
Note: Results suggest that there might be a configuration issue in DL.
Throughput using SpeedCheck Android App
stability
LMSDR SDR board has shown a good level of stability at least for my 3 hours performance testing, i.e. no [INFO] L, no particular CPU overload as shown in the figure below. However, throughput variability is observed over time.
To Do
- [Integrate the LimeSDR installation into build_oai]
- [add LimeSDR_xxx_yyy.ini files for other LTE frequency bands]
- [Add example and .ini files for MIMO 2x2 ]
- [Add example and ini files for TDD mode ]


